A solar cell and a photovoltaic module

By introducing enhanced conductive parts into solar cells, the problem of poor electrical connection between electrodes and doped conductive layers is solved, carrier transport is enhanced, and photoelectric conversion efficiency and cell performance are improved.

CN115842062BActive Publication Date: 2026-07-21ZHEJIANG JINKO SOLAR CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
ZHEJIANG JINKO SOLAR CO LTD
Filing Date
2022-11-30
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

In existing solar cells, the electrical connection between the electrode and the doped conductive layer is not reliable enough, resulting in poor carrier transport and affecting photoelectric conversion efficiency.

Method used

Introducing enhanced conductive components into solar cells, including enhanced conductive films and enhanced conductive posts, enables electrical connection between the doped conductive layer and the first electrode, thereby enhancing carrier transport capability.

Benefits of technology

It improves the photoelectric conversion efficiency of solar cells, enhances the carrier transport capability, reduces series resistance, and improves the efficiency of the front cell, the efficiency of the back cell, and the bifaciality of the cell.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to a solar cell and a photovoltaic module. The solar cell comprises a substrate, a tunneling oxide layer, a doped conductive layer, an intrinsic polysilicon layer, an enhanced conductive part and a first electrode. The substrate has a first surface; the tunneling oxide layer covers the first surface; the doped conductive layer covers a side surface of the tunneling oxide layer away from the substrate; the intrinsic polysilicon layer is arranged on a side surface of the doped conductive layer away from the tunneling oxide layer; the enhanced conductive part covers a side surface of the intrinsic polysilicon layer away from the doped conductive layer, and at least part of the enhanced conductive part is connected with the doped conductive layer; and a plurality of first electrodes are arranged on a side of the enhanced conductive part away from the intrinsic polysilicon layer, and at least part of each first electrode is located in the enhanced conductive part to be electrically connected with the doped conductive layer through the enhanced conductive part. Carriers can be directly transmitted between the doped conductive layer and the first electrode through the enhanced conductive part, the transmission capacity of the carriers is enhanced, and the cell efficiency of the solar cell is improved.
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Description

Technical Field

[0001] This application relates to the field of solar cell technology, and more particularly to a solar cell and a photovoltaic module. Background Technology

[0002] Solar cells can directly convert solar radiation energy into electrical energy. Typically, a tunneling oxide layer and a doped conductive layer are fabricated on the substrate surface to enhance passivation. In existing technologies, the electrical connection between the electrodes and the doped conductive layer of solar cells is not reliable enough, resulting in poor carrier transport between them and affecting the photoelectric conversion efficiency of the solar cell. Summary of the Invention

[0003] This application provides a solar cell and a photovoltaic module that can improve the photoelectric conversion efficiency of solar cells.

[0004] A first aspect of this application provides a solar cell, the solar cell comprising:

[0005] A substrate having a first surface;

[0006] A tunneling oxide layer, which covers the first surface;

[0007] A doped conductive layer covers the surface of the tunneling oxide layer away from the substrate;

[0008] An intrinsic polysilicon layer is disposed on the surface of the doped conductive layer away from the tunneling oxide layer.

[0009] An enhanced conductive portion covers the intrinsic polysilicon layer on the side of the intrinsic polysilicon layer away from the doped conductive layer, and at least a portion of the enhanced conductive portion is connected to the doped conductive layer;

[0010] First electrodes, a plurality of first electrodes are disposed on the side of the enhanced conductivity portion away from the intrinsic polysilicon layer, at least a portion of each first electrode is located within the enhanced conductivity portion to be electrically connected to the doped conductive layer through the enhanced conductivity portion.

[0011] In one possible design, the enhanced conductivity portion includes an enhanced conductive film and an enhanced conductive post connected together, the enhanced conductive film covering the surface of the intrinsic polycrystalline silicon layer away from the doped conductive layer; along the thickness direction of the solar cell, the two ends of the enhanced conductive post are respectively connected to the doped conductive layer and the enhanced conductive film.

[0012] In one possible design, the conductivity of the enhanced conductive film and the conductivity of the enhanced conductive post are both greater than the conductivity of the doped conductive layer.

[0013] In one possible design, the thickness D1 of the enhanced conductive film satisfies: 1nm ≤ D1 ≤ 40nm.

[0014] In one possible design, the material of the enhanced conductive film is one or more of the following: metallic conductive material, semiconductor material, inorganic composite conductive material, and polymer dielectric.

[0015] In one possible design, the material of the reinforcing conductive post is one or more of the following: metallic conductive material, semiconductor material, inorganic composite conductive material, and polymer dielectric.

[0016] In one possible design, the intrinsic polysilicon layer covers the entire surface of the doped conductive layer on the side away from the tunneling oxide layer.

[0017] In one possible design, the reinforcing conductive post is formed within the intrinsic polysilicon layer; the reinforcing conductive post penetrates the intrinsic polysilicon layer to connect with the doped conductive layer and the reinforcing conductive film.

[0018] In one possible design, the doped conductive layer and the enhanced conductive film have doping elements of the same conductivity type, and the doping concentration of the enhanced conductive film is greater than that of the doped conductive layer; the doping elements in the enhanced conductive film permeate toward the doped conductive layer to form the enhanced conductive post.

[0019] In one possible design, the concentration of the dopant element in the doped conductive layer is 1 × 10⁻⁶. 18 atoms / cm 3 ~5×10 21 atoms / cm 3 .

[0020] In one possible design, the concentration of the dopant element in the enhanced conductive film is 5 × 10⁻⁶. 18 atoms / cm 3 ~1×10 22 atoms / cm 3 .

[0021] In one possible design, the intrinsic polysilicon layer includes a plurality of covering portions for covering the side surface of the doped conductive layer away from the tunneling oxide layer; the plurality of covering portions respectively cover the portions on the doped conductive layer corresponding to the plurality of first electrodes.

[0022] In one possible design, the reinforcing conductive post is located between two adjacent covers and contacts the side of the covers.

[0023] In one possible design, the solar cell further includes a locally doped region connected to the first electrode, the intrinsic polycrystalline silicon layer, and the doped conductive layer, respectively, so that the first electrode is electrically connected to the doped conductive layer.

[0024] In one possible design, the solar cell further includes a first passivation layer covering the surface of the enhanced conductive film away from the intrinsic polycrystalline silicon layer.

[0025] In one possible design, the substrate also has a second surface disposed opposite to the first surface;

[0026] The solar cell also includes:

[0027] An emitter, wherein the emitter is disposed on the second surface;

[0028] Second electrodes, a plurality of second electrodes are disposed on the side of the emitter away from the substrate, and the plurality of second electrodes are electrically connected to the emitter;

[0029] A second passivation layer is applied to the surface of the emitter away from the substrate.

[0030] A second aspect of this application provides a photovoltaic module, the photovoltaic module comprising:

[0031] A battery string, wherein the battery string is composed of multiple solar cells connected together, and the solar cells are the solar cells described above;

[0032] Encapsulation layer, the encapsulation layer being used to cover the surface of the battery string;

[0033] A cover plate for covering the surface of the encapsulation layer away from the battery string.

[0034] In this application, by setting an enhanced conductive part, an electrical connection between the doped conductive layer and the first electrode can be realized, so that charge carriers can be directly transported between the doped conductive layer and the first electrode through the enhanced conductive part, thereby enhancing the charge carrier transport capability, reducing the series resistance of the solar cell, and thus improving the photoelectric conversion efficiency of the solar cell, thereby increasing the efficiency of the front cell, the efficiency of the back cell, and the bifaciality of the solar cell.

[0035] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0036] Figure 1 A cross-sectional structural schematic diagram of the solar cell provided in this application in a first specific embodiment;

[0037] Figure 2 A cross-sectional structural schematic diagram of the solar cell provided in this application in a second specific embodiment;

[0038] Figure 3 for Figure 1 Enlarged view of section A;

[0039] Figure 4 This is a schematic diagram of the structure of the photovoltaic module provided in this application.

[0040] Figure label:

[0041] 1-Base;

[0042] 1a - First surface;

[0043] 1b - Second surface;

[0044] 2-Tunneling oxide layer;

[0045] 3-Doped conductive layer;

[0046] 4-Intrinsic polycrystalline silicon layer;

[0047] 41-Covering section;

[0048] 5-Enhanced conductive parts;

[0049] 51-Enhanced conductive film;

[0050] 52-Reinforced conductive pile;

[0051] 6-First electrode;

[0052] 61-Ontology;

[0053] 62-Extension;

[0054] 621 - Part One;

[0055] 622 - Part Two;

[0056] 7-Locally doped regions;

[0057] 8 - First passivation layer;

[0058] 9-Emitter;

[0059] 10 - Second electrode;

[0060] 11 - Second passivation layer;

[0061] 110-battery string;

[0062] 120 - Encapsulation layer;

[0063] 130 - Cover plate;

[0064] 140 - Conductive band.

[0065] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. Detailed Implementation

[0066] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0067] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0068] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0069] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0070] It should be noted that the directional terms such as "upper," "lower," "left," and "right" described in the embodiments of this application are used to describe the angles shown in the accompanying drawings and should not be construed as limiting the embodiments of this application. Furthermore, in the context, it should be understood that when it is mentioned that an element is connected "upper" or "lower" to another element, it can be directly connected to the other element "upper" or "lower," or indirectly connected to the other element "upper" or "lower" through an intermediate element.

[0071] In existing technologies, during the fabrication of solar cells, a tunneling oxide layer and a doped conductive layer are deposited on one side of the substrate. The tunneling oxide layer acts as a tunneling layer for majority carriers and simultaneously chemically passivates the substrate surface, reducing interface states. The doped conductive layer creates band bending, enabling selective carrier transport, reducing recombination losses, and ensuring carrier transport efficiency. Furthermore, a metal electrode is fabricated on the substrate surface. This metal electrode is electrically connected to the doped conductive layer but does not penetrate the tunneling oxide layer, maintaining good interface passivation. However, the doped conductive layer has light absorption capabilities, causing some optical loss and reducing the efficiency of both the front and back cells of the solar cell. This leads to a decrease in the bifaciality of the cell, resulting in a lower bifacial power generation rate when the solar cell is used for bifacial power generation.

[0072] Reducing the thickness of the doped conductive layer decreases its light absorption capacity, thereby reducing optical losses and improving the efficiency of the solar cell. However, as the doped conductive layer thins, the metal electrode can easily penetrate the tunnel oxide layer and come into contact with the substrate, disrupting the passivation effect of the substrate surface. This leads to increased carrier recombination on the substrate surface, resulting in a decrease in the photoelectric conversion efficiency of the cell.

[0073] In existing solar cells, an intrinsic polycrystalline silicon layer is added to the side of the doped conductive layer away from the substrate to achieve the effect of "the metal electrode contacting the doped conductive layer but not tunneling through the oxide layer." However, the intrinsic polycrystalline silicon layer has poor conductivity, which leads to poor carrier transport between the doped conductive layer and the metal electrode, affecting the efficiency of the solar cell.

[0074] Based on the above, this application provides a solar cell that can improve the photoelectric conversion efficiency of solar cells. For example... Figure 1 As shown, the solar cell includes a substrate 1, a tunneling oxide layer 2, a doped conductive layer 3, an intrinsic polycrystalline silicon layer 4, an enhanced conductive portion 5, and a first electrode 6. The substrate 1 has a first surface 1a, the tunneling oxide layer 2 covers the first surface 1a, the doped conductive layer 3 covers the surface of the tunneling oxide layer away from the substrate 1, the intrinsic polycrystalline silicon layer 4 is disposed on the surface of the doped conductive layer 3 away from the tunneling oxide layer 2, the enhanced conductive portion 5 covers the surface of the intrinsic polycrystalline silicon layer 4 away from the doped conductive layer 3, at least a portion of the enhanced conductive portion 5 is connected to the doped conductive layer 3, and a plurality of first electrodes 6 are disposed on the side of the enhanced conductive portion 5 away from the intrinsic polycrystalline silicon layer 4, at least a portion of each first electrode 6 is located within the enhanced conductive portion 5, so as to be electrically connected to the doped conductive layer 3 through the enhanced conductive portion 5.

[0075] The substrate 1 receives incident light and generates photogenerated carriers. The tunneling oxide layer 2 chemically passivates the first surface 1a, reducing the interface defect density of the first surface 1a and thus reducing the recombination centers and carrier recombination rate. The doped conductive layer 3 forms a field passivation layer, reducing the minority carrier concentration and further reducing the carrier recombination rate. The intrinsic polycrystalline silicon layer 4 is disposed on the side of the doped conductive layer 3 away from the tunneling oxide layer 2, increasing the distance between the first electrode 6 and the tunneling oxide layer 2. This prevents the first electrode 6 from penetrating the tunneling oxide layer 2 and contacting the substrate 1, avoiding damage to the tunneling oxide layer 2. This ensures good interface passivation at the first surface 1a, preventing increased carrier recombination and improving the photoelectric conversion efficiency of the solar cell. Furthermore, the intrinsic polycrystalline silicon layer 4 is undoped, and its absorption coefficient is much lower than that of the doped conductive layer 3. Therefore, the intrinsic polycrystalline silicon layer 4 also reduces optical losses in the solar cell and improves the utilization rate of light energy.

[0076] The intrinsic polysilicon layer 4 contains no dopant elements. Compared to the doped conductive layer 3, the intrinsic polysilicon layer 4 has weaker conductivity. Therefore, when the intrinsic polysilicon layer 4 is doped with the surface of the conductive layer 3, it is not conducive to achieving an electrical connection between the first electrode 6 and the doped conductive layer 3, resulting in a decrease in the carrier transport rate. Therefore, it is necessary to provide a conductive enhancement portion 5 with stronger conductivity to achieve an electrical connection between the first electrode 6 and the doped conductive layer 3.

[0077] Specifically, such as Figure 1 As shown, the enhanced conductive portion 5 covers the side of the intrinsic polycrystalline silicon layer 4 away from the doped conductive layer 3. At least a portion of the enhanced conductive portion 5 is connected to the doped conductive layer 3, and at least a portion of each first electrode 6 is located within the enhanced conductive portion 5. This enables electrical connection between the doped conductive layer 3 and the first electrode 6, allowing charge carriers to be directly transported between the doped conductive layer 3 and the first electrode 6 through the enhanced conductive portion 5. This enhances the charge carrier transport capability, reduces the series resistance of the solar cell, and thus improves the photoelectric conversion efficiency of the solar cell. Consequently, the efficiency of the front cell, the efficiency of the back cell, and the bifaciality of the solar cell are all increased.

[0078] In this embodiment, substrate 1 can be a silicon substrate, including but not limited to monocrystalline silicon substrate, polycrystalline silicon substrate, microcrystalline silicon substrate, nanocrystalline silicon substrate, etc.

[0079] In one specific embodiment, such as Figure 1 As shown, the enhanced conductive part 5 includes an enhanced conductive film 51 and an enhanced conductive post 52 connected to each other. The enhanced conductive film 51 covers the surface of the intrinsic polycrystalline silicon layer 4 away from the doped conductive layer 3. Along the thickness direction of the solar cell, the two ends of the enhanced conductive post 52 are connected to the doped conductive layer 3 and the enhanced conductive film 51, respectively.

[0080] The enhanced conductive part 5 includes an enhanced conductive film 51 and an enhanced conductive post 52 connected to each other. The enhanced conductive post 52 is used to electrically connect the doped conductive layer 3 and the enhanced conductive film 51. The charge carriers in the doped conductive layer 3 can flow to the enhanced conductive film 51 through the enhanced conductive post 52, and then flow to the first electrode 6 through the enhanced conductive film 51, thereby realizing the electrical connection between the doped conductive layer 3 and the first electrode 6.

[0081] Dividing the enhanced conductive part 5 into an enhanced conductive film 51 and an enhanced conductive post 52 helps to reduce the manufacturing difficulty of solar cells. The two can be designed and processed separately, which facilitates the production and manufacturing of solar cells.

[0082] Specifically, the conductivity of the enhanced conductive film 51 and the conductivity of the enhanced conductive post 52 are both greater than the conductivity of the doped conductive layer 3.

[0083] When the conductivity of the enhanced conductive film 51 and the conductivity of the enhanced conductive post 52 are greater than the conductivity of the doped conductive layer 3, the enhanced conductive part 5 as a whole has good conductivity, which can reduce the resistance of charge carriers when they are transported between the doped conductive layer 3 and the first electrode 6, improve the current transport efficiency, and thus improve the photoelectric conversion efficiency of the solar cell.

[0084] Among them, the conductivity of the enhanced conductive film 51 is higher than that of the enhanced conductive post 52.

[0085] In one specific embodiment, such as Figure 3 As shown, the thickness D1 of the enhanced conductive film 51 satisfies: 1nm ≤ D1 ≤ 40nm. Specifically, it can be 1nm, 5nm, 10nm, 20nm, 40nm, or other values ​​within the above range, which are not limited here.

[0086] The thickness D1 of the reinforcing conductive film 51 should not be too large or too small. If D1 is too large (e.g., greater than 40 nm), it will affect the absorption and utilization of photons by the substrate 1, thereby affecting the photoelectric conversion efficiency of the solar cell. If D1 is too small (e.g., less than 1 nm), it will result in low reliability of the electrical connection between the doped conductive layer 3 and the first electrode 6 and a large resistance value. Therefore, when the thickness D1 of the reinforcing conductive film 51 is between 1 nm and 40 nm, it is possible to ensure that a large number of photons reach the substrate 1 while making the electrical connection between the doped conductive layer 3 and the first electrode 6 more reliable and the resistance value smaller.

[0087] In one specific embodiment, the material of the reinforcing conductive film 51 is one or more of the following: metallic conductive material, semiconductor material, inorganic composite conductive material, and polymer dielectric.

[0088] Among them, the metallic conductive materials can be Au (gold), Pt (platinum), Pd (palladium), etc.; the semiconductor materials can be polycrystalline silicon, microcrystalline silicon, ITO (indium tin oxide), TCO (transparent conductive oxide), etc.; the inorganic composite conductive materials can be Bi2O3 / Au / Bi2O3 composite materials or TiO2 / Ag / TiO2 composite materials, etc.; and the polymer dielectric can be polyaniline or polypyrrole, etc.

[0089] The aforementioned materials have excellent electrical conductivity and high light transmittance, which can enhance the carrier transport capability between the doped conductive layer 3 and the first electrode 6, reduce the series resistance of the solar cell, and at the same time, will not cause significant optical loss to the solar cell.

[0090] The reinforcing conductive post 52 and the reinforcing conductive film 51 can be made of the same material or different materials. In a specific embodiment, the material of the reinforcing conductive post 52 is one or more of the following: metallic conductive material, semiconductor material, inorganic composite conductive material, and polymer dielectric.

[0091] Metallic conductive materials can be Au (gold), Pt (platinum), Pd (palladium), etc.; semiconductor materials can be polycrystalline silicon, microcrystalline silicon, ITO (indium tin oxide), TCO (transparent conductive oxide), etc.; inorganic composite conductive materials can be Bi2O3 / Au / Bi2O3 composite materials or TiO2 / Ag / TiO2 composite materials, etc.; polymer dielectrics can be polyaniline or polypyrrole, etc.

[0092] The aforementioned materials have excellent electrical conductivity and high light transmittance, which can enhance the carrier transport capability between the doped conductive layer 3 and the first electrode 6, reduce the series resistance of the solar cell, and at the same time, will not cause significant optical loss to the solar cell.

[0093] In one specific embodiment, such as Figure 1 As shown, the intrinsic polycrystalline silicon layer 4 covers the entire surface of the doped conductive layer 3 on the side away from the tunneling oxide layer 2.

[0094] The intrinsic polysilicon layer 4 completely covers the surface of the doped conductive layer 3 away from the tunneling oxide layer 2, which can increase the distance between the first electrode 6 and the tunneling oxide layer 2. During the sintering of the electrode paste to form the first electrode 6, the top of the first electrode 6 will first contact the intrinsic polysilicon layer 4 and then contact the doped conductive layer 3, reducing the possibility that the first electrode 6 will penetrate the tunneling oxide layer 2 and contact the substrate 1.

[0095] In one specific embodiment, such as Figure 1 As shown, the reinforcing conductive post 52 is formed within the intrinsic polysilicon layer 4 and penetrates the intrinsic polysilicon layer 4 to connect with the doped conductive layer 3 and the reinforcing conductive film 51.

[0096] The reinforcing conductive post 52 is formed within and penetrates the intrinsic polycrystalline silicon layer 4, achieving the effect of connecting with both the doped conductive layer 3 and the reinforcing conductive film 51. The intrinsic polycrystalline silicon layer 4 has poor conductivity, and the doped conductive layer 3 and the reinforcing conductive film 51 are separated by the intrinsic polycrystalline silicon layer 4, resulting in a high resistance between them, which affects the efficiency of the solar cell. Therefore, the reinforcing conductive post 52 is needed to connect the doped conductive layer 3 and the reinforcing conductive film 51, allowing charge carriers to flow from the doped conductive layer 3 through the reinforcing conductive post 52 and the reinforcing conductive film 51 to the first electrode 6, thus improving the charge carrier transport capability.

[0097] Specifically, the doped conductive layer 3 and the enhanced conductive film 51 have doping elements of the same conductivity type, and the doping concentration of the enhanced conductive film 51 is greater than that of the doped conductive layer 3. The doping elements in the enhanced conductive film 51 penetrate toward the doped conductive layer 3 to form the enhanced conductive post 52.

[0098] When the reinforcing conductive film 51 and the doped conductive layer 3 have doping elements of the same conductivity type, and the doping concentration of the reinforcing conductive film 51 is greater than that of the doped conductive layer 3, the doping elements can penetrate along the direction of high to low concentration, thereby forming reinforcing conductive posts 52 between the doped conductive layer 3 and the reinforcing conductive film 51, improving the conductivity between the doped conductive layer 3 and the first electrode 6, enhancing the carrier transport capability, and thus reducing the series resistance of the solar cell.

[0099] In one specific embodiment, the concentration of dopant elements in the doped conductive layer 3 is 1×10⁻⁶. 18 atoms / cm 3 ~5×10 21 atoms / cm 3 The concentration of doped elements in the enhanced conductive film 51 is 5 × 10⁻⁶. 18 atoms / cm 3 ~1×10 22 atoms / cm 3 .

[0100] Optionally, the concentration of dopant elements in the doped conductive layer 3 can be 1×10⁻⁶. 18 atoms / cm 3 5×10 18 atoms / cm 3 1×10 19 atoms / cm 3 1×10 20 atoms / cm 3 Or 5×10 21 atoms / cm 3It can also be any other value within the above range, and is not limited here.

[0101] Optionally, the concentration of doped elements in the enhanced conductive film 51 can be 5 × 10⁻⁶. 18 atoms / cm 3 1×10 19 atoms / cm 3 1×10 20 atoms / cm 3 5×10 21 atoms / cm 3 Or 1×10 22 atoms / cm 3 It can also be any other value within the above range, and is not limited here.

[0102] When the concentrations of doped elements in the doped conductive layer 3 and the enhanced conductive film 51 meet the above-mentioned ranges, they can penetrate and form enhanced conductive posts 52. The concentration of doped elements in the enhanced conductive posts 52 is the same as the concentration of doped elements in the enhanced conductive film 51, ensuring that the carrier transport capability of the solar cell is improved, thereby improving the performance of the solar cell.

[0103] Furthermore, in another specific embodiment, such as Figure 2 As shown, the intrinsic polysilicon layer 4 includes a plurality of covering portions 41, which are used to cover the side surface of the doped conductive layer 3 away from the tunneling oxide layer 2. The plurality of covering portions 41 respectively cover the portions of the doped conductive layer 3 corresponding to the plurality of first electrodes 6.

[0104] In this embodiment, the intrinsic polycrystalline silicon layer 4 is composed of a plurality of spaced-apart covering portions 41. Each covering portion 41 covers a portion of the surface of the doped conductive layer 3 and corresponds to the positions of the plurality of first electrodes 6. This ensures that the first electrodes 6 can contact the covering portion 41 first and then the doped conductive layer 3, reducing the possibility that the first electrodes 6 can penetrate the tunnel oxide layer 2 and contact the substrate 1. Furthermore, the spaced-apart covering portions 41 help reduce the optical loss of the solar cell, allowing more light to be absorbed by the substrate 1, generating more charge carriers, and thus improving the photoelectric conversion efficiency of the solar cell. It also reduces the cost of setting the intrinsic polycrystalline silicon layer 4, thereby lowering the manufacturing cost of the solar cell.

[0105] In one specific embodiment, such as Figure 2 As shown, the reinforcing conductive post 52 is located between two adjacent covers 41 and contacts the side of the covers 41.

[0106] The reinforcing conductive post 52 is located between two adjacent cover portions 41, effectively utilizing the internal space of the solar cell. The reinforcing conductive post 52 is in contact with the side of the cover portion 41, enabling charge carriers to be transported between adjacent cover portions 41 through the reinforcing conductive post 52, reducing the resistance of the solar cell, and thus improving the photoelectric conversion efficiency of the solar cell.

[0107] In one specific embodiment, such as Figure 1 As shown, the solar cell also includes a locally doped region 7, which is connected to the first electrode 6, the intrinsic polycrystalline silicon layer 4 and the doped conductive layer 3, respectively, so that the first electrode 6 is electrically connected to the doped conductive layer 3.

[0108] The locally doped region 7 has strong conductivity, which can improve the carrier transport capability between the first electrode 6 and the doped conductive layer 3, such as... Figure 3 As shown, the locally doped region 7 is located within the intrinsic polysilicon layer 4 and the doped conductive layer 3. When the first electrode 6 does not penetrate the intrinsic polysilicon layer 4, the locally doped region 7 can connect to the first electrode 6, the intrinsic polysilicon layer 4, and the doped conductive layer 3 respectively, thereby achieving an electrical connection between the first electrode 6 and the doped conductive layer 3 and accelerating the carrier transport rate. When the first electrode 6 penetrates the intrinsic polysilicon layer 4 and forms an electrical connection with the doped conductive layer 3, the locally doped region 7 can further improve the conductivity between the first electrode 6 and the doped conductive layer 3, thereby accelerating the carrier transport rate. Therefore, the locally doped region 7, together with the enhanced conductivity portion 5, improves the cell efficiency of the solar cell.

[0109] Specifically, the first electrode 6 is a metal electrode. The first electrode 6 and the doped conductive layer 3 have doping elements of the same conductivity type, and the doping concentration of the first electrode 6 is greater than that of the doping concentration of the doped conductive layer 3. During the high-temperature sintering process of the electrode slurry, the doping elements in the first electrode 6 penetrate towards the doped conductive layer 3 to form a local doped region 7.

[0110] Specifically, the doping element can be an N-type dopant of Group V elements such as phosphorus (P), arsenic (As), bismuth (Bi), and antimony (Sb), or a P-type dopant of Group III elements such as boron (B), aluminum (Al), gallium (Ga), and indium (In). The first electrode 6 and the substrate 1 can have doping elements of the same conductivity type or doping elements of different conductivity types.

[0111] In addition, the first electrode 6 is sintered from a metal electrode slurry. The proportion of doped elements in the metal electrode slurry to the total composition of the slurry is 0.01% to 5%, specifically 0.01%, 0.05%, 1%, 3% or 5%, or other values ​​within the above range, which are not limited here.

[0112] After forming the local doped region 7, the ratio of the doping concentration of the doped element in the local doped region 7 to the doping concentration of the doped element in the doped conductive layer 3 is 1:100 to 1:1. Specifically, it can be 1:100, 1:80, 1:50, 1:30 or 1:1, or other values ​​within the above range, which are not limited here.

[0113] Furthermore, such as Figure 3 As shown, the first electrode 6 includes a body 61 and an extension 62 extending along the body 61 toward the doped conductive layer 3. The body 61 is disposed on the side of the intrinsic polysilicon layer 4 away from the doped conductive layer 3. The body 61 does not directly contact the doped conductive layer 3, which can reduce damage to the field passivation layer and ensure that the first surface 1a has a good passivation effect. The extension 62 is electrically connected to the first body 61, and both can play the role of transporting charge carriers. The extension 62 extends along the body 61 toward the doped conductive layer 3. The extension 62 is formed by the electrode paste penetrating toward the doped conductive layer 3 during the sintering process of the electrode paste. The intrinsic polysilicon layer 4 can prevent the extension 62 from penetrating and tunneling through the oxide layer 2. The locally doped region 7 covers the surface of the extension 62 that is in contact with the body 61 and can be connected to the intrinsic polysilicon layer 4 and the doped conductive layer 3 to realize the electrical connection between the extension 62 and the doped conductive layer 3.

[0114] The extension 62 includes a first part 621 and a second part 622. The first part 61 is connected to the body 61. The second part 622 is spaced apart from both the body 61 and the first part 621. A portion of the locally doped region 7 covers the first part 621, and another portion of the locally doped region 7 covers the second part 622.

[0115] The extension 62 has two forms: one is a first part 621 that is directly connected to the body 61, and the other is a second part 622 that is spaced apart from the body 61. The second part 622 is a free-state grain. The surfaces of the first part 621 and the second part 622 are covered with local doped regions 7 to ensure a stable electrical connection between the extension 62 and the doped conductive layer 3.

[0116] In one specific embodiment, the solar cell further includes a first passivation layer 8, which covers the surface of the enhanced conductive film 51 on the side away from the intrinsic polycrystalline silicon layer 4.

[0117] The first passivation layer 8 serves to passivate the surfaces it contacts, enhancing the passivation effect of the solar cell. This reduces carrier recombination at the interface, improves carrier transport efficiency, and thus increases the photoelectric conversion efficiency of the solar cell. The first passivation layer 8 also reduces or eliminates reflected light from the solar cell surface and increases light transmittance, further improving the photoelectric conversion efficiency of the solar cell.

[0118] Specifically, the first passivation layer 8 may include components such as silicon oxide, silicon nitride, aluminum oxide, or silicon oxynitride. In addition, the first passivation layer 8 may be a single-layer structure or a multi-layer structure, and the refractive index and thickness of each layer can be designed accordingly.

[0119] In one specific embodiment, such as Figure 1 As shown, the substrate 1 also has a second surface 1b disposed opposite to the first surface 1a. The solar cell also includes an emitter 9, a second electrode 10, and a second passivation layer 11. The emitter 9 is disposed on the second surface 1b, and a plurality of second electrodes 10 are disposed on the side of the emitter 9 away from the substrate 1. The plurality of second electrodes 10 are electrically connected to the emitter 9, and the second passivation layer 11 covers the side of the emitter 9 away from the substrate 1.

[0120] Both the first surface 1a and the second surface 1b of the substrate 1 can be used to receive incident light or reflect light, such as Figure 1 As shown, an emitter 9, a second electrode 10, and a second passivation layer 11 are sequentially disposed on the second surface 1b opposite to the first surface 1a. When the substrate 1 is a P-type silicon substrate, the emitter 9 can be an N-type emitter, and the two can together form a PN junction structure. Alternatively, when the substrate 1 is an N-type silicon substrate, the emitter 9 can be a P-type emitter. The second passivation layer 11 has a similar function and effect to the first passivation layer 8, namely, it passivates the surfaces in contact with it, thereby reducing carrier recombination at the interface, improving carrier transport efficiency, and thus improving the photoelectric conversion efficiency of the solar cell.

[0121] In addition, such as Figure 1 As shown, the second surface 1b of the substrate 1 can be configured as a pyramidal textured surface to reduce the reflectivity of the second surface 1b to incident light and increase the light absorption and utilization rate, thereby improving the light transmittance of the second surface 1b and thus improving the photoelectric conversion efficiency of the solar cell. The first surface 1a of the substrate 1 can be configured as a non-pyramidal textured surface, such as a layered stepped morphology, to give the tunneling oxide layer 2 on the first surface 1a high density and uniformity, so that the tunneling oxide layer 2 has a good passivation effect on the substrate 1. Specifically, the first surface 1a can be the back side of the substrate 1, that is, the side of the substrate 1 facing away from the sun, and correspondingly, the second surface 1b can be the front side of the substrate 1, that is, the side of the substrate 1 facing the sun and used to receive sunlight; or, the first surface 1a can also be the front side of the substrate 1, and correspondingly, the second surface 1b can also be the back side of the substrate 1.

[0122] This application also provides a photovoltaic module, such as... Figure 4As shown, the photovoltaic module includes a battery string 110, an encapsulation layer 120, and a cover plate 130. The battery string 110 is composed of multiple solar cells connected together. The solar cells are the solar cells described in the above embodiments. The encapsulation layer 120 is used to cover the surface of the battery string 110, and the cover plate 130 is used to cover the surface of the encapsulation layer 120 away from the battery string 110.

[0123] like Figure 4 As shown, solar cells are electrically connected in a single unit or in multiple segments to form multiple cell strings 110, which are electrically connected in series and / or parallel. Specifically, the multiple cell strings 110 can be electrically connected to each other via conductive strips 140. An encapsulation layer 120 covers the front and back of the solar cell. Specifically, the encapsulation layer 120 can be an organic encapsulation film such as ethylene-vinyl acetate copolymer (EVA) film, polyvinyl octene copolymer elastomer (POE) film, polyethylene terephthalate (PET) film, or polyvinyl butyral (PVB). A cover plate 130 can be a light-transmitting cover plate such as a glass cover plate or a plastic cover plate. Specifically, the surface of the cover plate 130 facing the encapsulation layer 120 can be an uneven surface to increase the utilization rate of incident light.

[0124] The solar cell is provided with an enhanced conductive part 5, which can improve the carrier transport capability between the doped conductive layer 3 and the first electrode 6, reduce the series resistance of the solar cell, and thus improve the photoelectric conversion efficiency of the solar cell. Therefore, the photoelectric conversion efficiency of the photovoltaic module containing the solar cell can also be improved.

[0125] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A solar cell, characterized in that, The solar cell includes: A substrate (1) having a first surface (1a); A tunneling oxide layer (2) is formed on the first surface (1a). A doped conductive layer (3) is provided, which covers the surface of the tunneling oxide layer (2) away from the substrate (1) and is used to form a field passivation layer. An intrinsic polysilicon layer (4) is disposed on the surface of the doped conductive layer (3) away from the tunneling oxide layer (2); The enhanced conductive part (5) includes an enhanced conductive film (51) and an enhanced conductive post (52) connected to each other. The enhanced conductive film (51) covers the side surface of the intrinsic polycrystalline silicon layer (4) away from the doped conductive layer (3). The enhanced conductive post (52) passes through the intrinsic polycrystalline silicon layer (4) along the thickness direction of the solar cell. The two ends of the enhanced conductive post (52) are connected to the doped conductive layer (3) and the enhanced conductive film (51) respectively. First electrode (6), a plurality of first electrodes (6) are disposed on the side of the enhanced conductive portion (5) away from the intrinsic polysilicon layer (4), at least a portion of each first electrode (6) is located within the enhanced conductive portion (5) to be electrically connected to the doped conductive layer (3) through the enhanced conductive portion (5).

2. The solar cell according to claim 1, characterized in that, The conductivity of the enhanced conductive film (51) and the conductivity of the enhanced conductive stake (52) are both greater than the conductivity of the doped conductive layer (3).

3. The solar cell according to claim 1, characterized in that, The thickness D1 of the enhanced conductive film (51) satisfies: 1nm≤D1≤40nm.

4. The solar cell according to claim 1, characterized in that, The material of the enhanced conductive film (51) is one or more of the following: metallic conductive materials, semiconductor materials, and inorganic composite conductive materials.

5. The solar cell according to claim 1, characterized in that, The material of the enhanced conductive pile (52) is one or more of the following: metallic conductive material, semiconductor material, and inorganic composite conductive material.

6. The solar cell according to claim 1, characterized in that, The intrinsic polycrystalline silicon layer (4) covers the entire surface of the doped conductive layer (3) on the side away from the tunneling oxide layer (2).

7. The solar cell according to claim 6, characterized in that, The enhanced conductive stake (52) is formed within the intrinsic polycrystalline silicon layer (4); The enhanced conductive post (52) penetrates the intrinsic polycrystalline silicon layer 4 to connect with the doped conductive layer (3) and the enhanced conductive film (51).

8. The solar cell according to claim 7, characterized in that, The doped conductive layer (3) and the enhanced conductive film (51) have doping elements of the same conductivity type, and the doping concentration of the enhanced conductive film (51) is greater than the doping concentration of the doped conductive layer (3). The doping element in the enhanced conductive film (51) penetrates toward the doped conductive layer (3) to form the enhanced conductive post (52).

9. The solar cell according to claim 8, characterized in that, The concentration of the doped element in the doped conductive layer (3) is 1×10⁻⁶. 18 atoms / cm 3 ~5×10 21 atoms / cm 3 .

10. The solar cell according to claim 8, characterized in that, The concentration of the dopant element in the enhanced conductive film (51) is 5 × 10⁻⁶. 18 atoms / cm 3 ~1×10 22 atoms / cm 3 .

11. The solar cell according to claim 1, characterized in that, The intrinsic polycrystalline silicon layer (4) includes a plurality of covering portions (41) for covering the side surface of the doped conductive layer (3) away from the tunneling oxide layer (2). The plurality of covering portions (41) respectively cover the portions of the doped conductive layer (3) corresponding to the plurality of first electrodes (6).

12. The solar cell according to claim 11, characterized in that, The reinforced conductive post (52) is located between two adjacent covers (41) and contacts the side of the covers (41).

13. The solar cell according to any one of claims 1-12, characterized in that, The solar cell further includes a locally doped region (7), which is connected to the first electrode (6), the intrinsic polycrystalline silicon layer (4) and the doped conductive layer (3) respectively, so that the first electrode (6) is electrically connected to the doped conductive layer (3).

14. The solar cell according to any one of claims 1-12, characterized in that, The solar cell further includes a first passivation layer (8) which covers the side surface of the enhanced conductive film (51) away from the intrinsic polycrystalline silicon layer (4).

15. The solar cell according to any one of claims 1-12, characterized in that, The substrate (1) also has a second surface (1b) disposed opposite to the first surface (1a); The solar cell also includes: Emitter (9), said emitter (9) is disposed on the second surface (1b); Second electrode (10), a plurality of second electrodes (10) are disposed on the side of the emitter (9) away from the substrate (1), and the plurality of second electrodes (10) are electrically connected to the emitter (9); A second passivation layer (11) is applied to the surface of the emitter (9) away from the substrate (1).

16. A photovoltaic module, characterized in that, The photovoltaic module includes: A battery string (110), wherein the battery string (110) is composed of multiple solar cells connected together, wherein the solar cells are any one of claims 1-15; An encapsulation layer (120) is used to cover the surface of the battery string (110); A cover plate (130) is used to cover the surface of the encapsulation layer (120) away from the battery string (110).

Citation Information

Patent Citations

  • CN115172477A

  • JP6890371B1