Light emitting array

Abstract

According to a first aspect of the disclosure, a method of forming an array of light emitting devices is provided. The method includes forming a first light emitting layer on a first substrate, forming an array of first light emitting devices from the first light emitting layer, each first light emitting device configured to emit light having a first wavelength. A first bonding layer is formed on the first light emitting layer. A second light emitting layer is formed on a second substrate, the second light emitting layer configured to emit light having a second wavelength different from the first wavelength. A second bonding layer is formed on the second light emitting layer. The second bonding layer is bonded to a handling substrate; the second substrate is then removed from the second light emitting layer. A third bonding layer is formed on the second light emitting layer on a side of the second light emitting layer opposite the handling layer. The first bonding layer is bonded to the third bonding layer and the handling substrate is removed from the second light emitting layer. An array of second light emitting devices is formed from the second light emitting layer, the array of second light emitting devices aligned relative to the array of first light emitting devices such that the first light emitting devices and the second light emitting devices are spaced apart from one another in a plane parallel to each of the first light emitting layer and the second light emitting layer.

Description

Technical Field

[0001] This disclosure relates to a light-emitting device array. In particular, this disclosure relates to a light-emitting device array comprising a group III nitride. Background Technology

[0002] A micro LED array is typically defined as an LED array with a surface area of ​​100 × 100 μm or smaller. Micro LED arrays are self-emissive micro-displays / projectors that can be used in a variety of devices, such as smartwatches, head-up displays, head-up displays, cameras, viewfinders, multisite excitation sources, and pico-projectors.

[0003] One known form of micro-LED array comprises multiple LEDs formed of group III nitrides. Group III nitride LEDs are inorganic semiconductor LEDs containing GaN and its alloys with InN and AlN in the active light-emitting region. Group III nitride LEDs can be driven with significantly higher current densities and emit higher light power densities than conventional large-area LEDs (e.g., organic light-emitting diodes (OLEDs) where the light-emitting layer is an organic compound). Therefore, the higher brightness (luminance) (defined as the amount of light emitted per unit area in a given direction) makes micro-LEDs suitable for applications that require or benefit from high brightness. For example, applications benefiting from high brightness can include displays or projectors in high-brightness environments. Furthermore, group III nitride micro-LEDs are known to have relatively high luminous efficiency, expressed in lumens per watt (lm / W), compared to other conventional large-area LEDs. The relatively high luminous efficiency of group III nitride micro-LED arrays reduces power consumption compared to other light sources and makes micro-LEDs particularly suitable for portable devices.

[0004] The technology for fabricating monochromatic (blue) GaN monolithic microLED arrays is known in the art. To produce displays based on full-color microLEDs, red and green subpixels need to be integrated into the display. One method for forming a full-color display is to provide an LED array comprising multiple different LEDs, each configured to output one type of light, or for example, red, green, and blue light. Such LED arrays are often referred to as “native” LED arrays if the full-color spectrum is generated directly by electroluminescence, rather than by using color-converting materials such as phosphors or quantum dots. For small-pitch devices, such as microLED arrays, conventional pick-and-place methods for assembling red, green, and blue LED arrays are limited by yield and throughput constraints.

[0005] The object of this invention is to provide an improved method for forming a precursor for a light-emitting device array, which solves at least one problem associated with prior art methods, or at least provides a commercially useful alternative. Summary of the Invention

[0006] According to a first aspect of this disclosure, a method for forming a precursor for a light-emitting device array is provided, the method comprising:

[0007] A first light-emitting layer is formed on a first substrate, and the first light-emitting layer is configured to emit light having a first wavelength;

[0008] An array of first light-emitting devices is formed from a first light-emitting layer, each first light-emitting device being configured to emit light having a first wavelength;

[0009] A first bonding layer is formed on the first light-emitting layer;

[0010] A second light-emitting layer is formed on a second substrate, and the second light-emitting layer is configured to emit light having a second wavelength different from the first wavelength;

[0011] A second bonding layer is formed on the second light-emitting layer;

[0012] The second bonding layer is bonded to the processed substrate;

[0013] Remove the second substrate from the second light-emitting layer;

[0014] A third bonding layer is formed on the second light-emitting layer on the side opposite to the processing layer;

[0015] Bond the first bonding layer to the third bonding layer;

[0016] Remove the processed substrate from the second light-emitting layer;

[0017] An array of second light-emitting devices is formed from the second light-emitting layer, the array of second light-emitting devices being aligned with the array of first light-emitting devices, such that the light-emitting device array front body includes the array of first light-emitting devices and the array of second light-emitting devices, the first light-emitting devices and the second light-emitting devices being spaced apart from each other in a plane parallel to each of the first light-emitting layer and the second light-emitting layer.

[0018] According to the method of the first aspect, the first and second light-emitting layers can be formed on separate respective first and second substrates. By forming the first and second light-emitting layers on different substrates, the corresponding formation processes can be adapted to allow the first and second light-emitting layers to emit light of different (first and second) wavelengths. For example, in some embodiments, the first wavelength can typically be blue visible light, while the second wavelength can typically be red or green visible light.

[0019] Through a series of substrate bonding processes, the second light-emitting layer can be bonded to the first light-emitting layer. Since the second light-emitting device array has not yet been patterned onto the second light-emitting layer, the process of bonding the second light-emitting layer to the first light-emitting layer is relatively simple, as the bonding step does not require precise mechanical alignment of the two light-emitting layers. Once the two light-emitting layers are bonded together, the second light-emitting device array can be formed from the second light-emitting layer. By performing patterning on the second light-emitting device after bonding the light-emitting layers, the first aspect of the method can achieve alignment tolerances that are improved compared to the possible alignment tolerances of mechanical alignment of the individual layers.

[0020] By performing a substrate bonding step after forming the light-emitting layer, the method according to the first aspect avoids exposing the first light-emitting layer to the initial processing conditions used to form the second light-emitting layer. For example, the first light-emitting layer may not be exposed to any substrate heating provided as part of the process of forming (i.e., depositing) the second light-emitting layer, since this is performed on the second substrate.

[0021] Thus, the method according to the first aspect avoids subjecting the first light-emitting layer to any further processing steps involving other light-emitting layers used to form the light-emitting device array precursor. For example, it has been observed that the p-type GaN surface in the mask region of the light-emitting array precursor may decompose during subsequent high-temperature deposition of the light-emitting device layers, thereby damaging the anode contacts of the junction deposited in the previous step.

[0022] According to the method of the first aspect, a light-emitting device array precursor having "native" first and second light-emitting device arrays is provided. The first and second light-emitting devices are spaced apart from each other to provide an image plane (i.e., a plane parallel to each of the first and second light-emitting layers) spaced apart from each other. It should be understood, of course, that since the bonding of the first and second light-emitting layers is part of the method of forming the light-emitting device array precursor, the first light-emitting device is also spaced apart from the second light-emitting device in a direction perpendicular to the image plane. Such a light-emitting device array precursor, having first and second light-emitting devices spaced apart in the image plane (i.e., arranged in an array), can be suitable for forming a light-emitting device display or a light-emitting device projector.

[0023] Regarding the term "precursor" in the context of a light-emitting device array precursor, it should be noted that the described light-emitting device array precursor does not necessarily include electrical contacts for each light-emitting device (e.g., to allow light emission) or associated circuitry. Of course, the addition of additional electrical contacts and associated circuitry is not excluded in the light-emitting device array precursor formed according to the first aspect (and the light-emitting device array precursor of the second aspect). Therefore, the use of the term "precursor" in this disclosure is intended to include the final product (i.e., the light-emitting array).

[0024] The term "array" in the context of the light-emitting device array precursor of this disclosure is intended to refer to a plurality of light-emitting devices intentionally spaced apart across a structure. Typically, the light-emitting devices form a regular array, such as a hexagonal close-packed array or a square-packed array of light-emitting devices.

[0025] In some embodiments, the first light-emitting layer comprises multiple layers, each comprising a group III nitride. In some embodiments, the second light-emitting layer comprises multiple layers, each comprising a group III nitride. Thus, the first and / or second light-emitting layers can comprise heterostructure junctions. By forming such heterostructure junctions on the respective first and / or second substrates, the in-plane lattice constants of the first and / or second substrates can be adapted to the in-plane lattice constants of the respective heterostructures to reduce defects formed in the heterostructures due to strain. This can improve the overall efficiency of the device formed from the respective first and / or second light-emitting layers.

[0026] In some embodiments, forming the first light-emitting layer includes forming a first n-type semiconductor layer on a first substrate, forming a first active layer on the first n-type semiconducting layer, and forming a first p-type semiconductor layer on the first active layer. The first active layer may include a plurality of quantum well layers. Each quantum well layer may be configured to emit light of a first wavelength. Thus, the first light-emitting layer may include a plurality of layers configured to generate a light-emitting semiconductor junction. The semiconductor junction may be configured to generate light having a peak wavelength corresponding to the first wavelength.

[0027] In some embodiments, forming a first light-emitting device array includes forming a first mesa structure for each first light-emitting device. The first mesa structure may extend in a direction perpendicular to a first substrate. Each first mesa structure may include a portion of a first n-type layer, a first active layer, and a first p-type semiconductor layer. Thus, a light-emitting semiconductor junction may be formed within the first mesa structure of each first light-emitting device. Forming a first mesa structure for each light-emitting device can help confine charge carriers within the mesa structure, thereby improving the internal quantum efficiency of the light-emitting device.

[0028] In some embodiments, forming the second light-emitting layer includes forming a second n-type semiconductor layer on a second substrate, forming a second active layer on the second n-type semiconductor layer, and forming a second p-type semiconductor layer on the second active layer. The second active layer may include a plurality of quantum well layers configured to emit light of a second wavelength. Thus, the second light-emitting layer may include a semiconductor junction configured to generate a peak wavelength corresponding to the second wavelength.

[0029] In some embodiments, after removing the second substrate and before forming the third bonding layer, the method may further include selectively removing a portion of the second n-type semiconductor layer such that the thickness of the second n-type semiconductor layer in the direction perpendicular to the first substrate is no greater than 2 μm. Therefore, the second n-type semiconductor layer can be thinned from a deposited state thickness greater than 2 μm to a thickness of no greater than 2 μm before bonding to the first bonding layer. In some embodiments, it may be desirable to form a second n-type semiconductor layer with a deposited state thickness greater than 2 μm to improve the performance of the second active layer and the second p-type semiconductor layer formed on the second n-type semiconductor layer. The thickness of the second n-type semiconductor layer can then be thinned to a thickness more suitable for bonding to the first bonding layer.

[0030] In some embodiments, tapping bonding, oxide bonding, or adhesive (polymer) bonding may be used to perform the steps of bonding the second bonding layer to the processed substrate and bonding the first bonding layer to the third bonding layer.

[0031] A first bonding layer may be disposed on the first light-emitting layer to provide a first bonding surface for the first light-emitting layer. The first bonding surface may provide a substantially flat surface suitable for bonding to another substrate (i.e., bonding to a third bonding layer). In this way, the first bonding layer can be provided to cover any electrical contacts that may have been formed to the first light-emitting layer (i.e., to planarize the first light-emitting layer).

[0032] In some embodiments, forming a second light-emitting device array from a second light-emitting layer includes forming a second mesa structure for each second light-emitting device. Each second mesa structure may extend in a direction perpendicular to the first substrate. Each second mesa structure may include a portion of a second N-type semiconductor layer, a second active layer, and a second P-type semiconductor layer.

[0033] In some embodiments, the method further includes forming electrical contacts to each first light-emitting device and each second light-emitting device.

[0034] In some embodiments, the method further includes forming electrical contacts to each first light-emitting device and each second light-emitting device, including a common cathode contact formed to each of the first and second light-emitting devices. This allows for the efficient provision of a common cathode to each of the first and second light-emitting devices.

[0035] In some embodiments, the first bonding layer comprises a dielectric material, and the second bonding layer comprises a dielectric material. In some embodiments, bonding the first bonding layer to the second bonding layer comprises directly bonding (or tapping) the first bonding layer to the second bonding layer by applying pressure and heat. In this way, bonding techniques that do not require precise mechanical alignment of the first and second substrates can be used to bond the first bonding layer to the second bonding layer.

[0036] In some embodiments, the first wavelength is at least 440 nm and no greater than 490 nm. In some embodiments, the second wavelength is at least 500 nm and no greater than 680 nm. Therefore, the first wavelength can be substantially blue visible light. In some embodiments, the second wavelength can be substantially green or red visible light. Of course, in other embodiments, the first and second wavelengths can be wavelengths of different light; for example, the first wavelength can be red, green, or blue light, and the second wavelength can also be red, green, or blue light. In some embodiments, the first and / or second wavelengths can be other wavelengths of invisible light (e.g., ultraviolet or infrared).

[0037] In some embodiments, the first light-emitting layer may be bonded to the second light-emitting layer. In other embodiments, two or more light-emitting layers may be bonded together.

[0038] For example, in some embodiments, the three light-emitting layers can be bonded together. Such a method according to the first aspect may further include:

[0039] A fourth bonding layer is formed on the second light-emitting layer;

[0040] A third light-emitting layer is formed on a third substrate, the third light-emitting layer being configured to emit light having a third wavelength that is different from both the first and second wavelengths;

[0041] A fifth bonding layer is formed on the third light-emitting layer;

[0042] The fifth bonding layer is bonded to another processed substrate;

[0043] Remove the third substrate from the third light-emitting layer;

[0044] A sixth bonding layer is formed on the third light-emitting layer on the side opposite to the other processing layer;

[0045] Bond the fourth bonding layer to the sixth bonding layer;

[0046] Remove another processed substrate from the third light-emitting layer;

[0047] An array of third light-emitting devices is formed from the third light-emitting layer, the array of third light-emitting devices being aligned with the arrays of first light-emitting devices and second light-emitting devices, such that the light-emitting device array precursor includes arrays of first, second and third light-emitting devices spaced apart from each other.

[0048] In some embodiments, the third light-emitting layer comprises a plurality of layers, each comprising a group III nitride. In some embodiments, forming the third light-emitting device array comprises forming a third mesa structure for each third light-emitting device. In some embodiments, forming the third light-emitting layer comprises: forming a third n-type semiconductor layer on a third substrate, forming a third active layer on the first n-type semiconductor layer, the third active layer comprising a plurality of quantum well layers configured to emit light of a third wavelength, and forming a third p-type semiconductor layer on the third active layer.

[0049] In some embodiments, the light-emitting device array precursor may provide first, second (and optionally third) light-emitting devices, each of which is a micro-light-emitting device. Therefore, the surface area (or coverage area) of each first, second, or third micro-light-emitting device in a plane parallel to the first substrate / first bonding layer may not exceed 100 μm x 100 μm. For example, in some embodiments, the surface area (or coverage area) of each first, second, or third mesa structure in a plane parallel to the first substrate may not exceed 100 μm x 100 μm. In some embodiments, the surface area of ​​each first, second, or third mesa structure may not exceed: 50 μm x 50 μm, 30 μm x 30 μm, or 20 μm x 20 μm, 10 μm x 10 μm, 4 μm x 4 μm, or 2 μm x 2 μm.

[0050] In some embodiments, first, second (and optionally third) (micro) light-emitting devices may be arranged in respective light-emitting layers to provide an image plane, wherein the pitch between adjacent light-emitting devices (measured between the centers of each first, second, or third micro light-emitting device) is not greater than: 100 μm, 50 μm, 30 μm, 20 μm, 10 μm, 4 μm, or 2 μm.

[0051] According to a second aspect of this disclosure, a light-emitting device array precursor is provided. The light-emitting array precursor includes a first light-emitting layer, a first bonding layer, a second bonding layer, and a second light-emitting layer. The first light-emitting layer includes an array of first light-emitting devices. Each first light-emitting device is configured to emit light having a first wavelength. The first bonding layer is disposed on the first light-emitting layer. A second bonding layer is bonded to the first bonding layer. The second light-emitting layer is disposed on the second bonding layer. The second light-emitting layer includes an array of second light-emitting devices. Each second light-emitting device is configured to emit light having a second wavelength different from the first wavelength. The second light-emitting device array is aligned relative to the first light-emitting device array such that the light-emitting device array precursor includes arrays of first and second light-emitting devices that are laterally spaced apart from each other in a plane parallel to each of the first and second light-emitting layers.

[0052] Therefore, a light-emitting array precursor according to the second aspect of the present disclosure can be formed by the method according to the first aspect of the present disclosure.

[0053] According to the first and second aspects, the first luminescent layer and / or the second and / or the third luminescent layer may comprise a plurality of Group III nitrides. For example, Group III nitrides may comprise one or more AlInGaN, AlGaN, InGaN, and GaN. As used herein, any reference to a species by its species composition includes all available stoichiometry. Thus, for example, AlGaN includes all its alloys, such as Al X Ga 1-X N, where 0 < X ​​< 1. The preferred stoichiometry will vary depending on the function of the specific layer. Attached Figure Description

[0054] The invention will now be described in conjunction with the following non-limiting accompanying drawings. Further advantages of this disclosure will become apparent when considered in conjunction with the drawings, which are not scaled to show details more clearly. The same reference numerals indicate the same elements throughout multiple views, wherein:

[0055] - Figure 1 The cross-section of the first light-emitting layer formed in the first substrate is shown;

[0056] - Figure 2 A cross-sectional view of the first light-emitting layer on which the first bonding layer is formed is shown;

[0057] - Figure 3 A cross-sectional view of the second light-emitting layer formed on the second substrate is shown;

[0058] - Figure 4 A cross-sectional view of the second light-emitting layer with the second substrate removed is shown;

[0059] - Figure 5 A cross-sectional view of a second light-emitting layer bonded to a first light-emitting layer via first and second bonding layers is shown.

[0060] - Figure 6 A cross-sectional view showing the formation of a second mesa structure in the second light-emitting layer is shown;

[0061] - Figure 7 A cross-sectional view showing the formation of the second anode contact and the first anode contact to the second light-emitting layer is shown;

[0062] - Figure 8 The cross-sectional view shows the formation of the metal contacts to each light-emitting device and the bonding of the light-emitting device array front to the back electron substrate;

[0063] - Figure 9A cross-sectional view showing the light extraction characteristics of each light-emitting device in the light-emitting array precursor after further processing of the light-emitting surface to form the light-emitting device array precursor;

[0064] - Figure 10 A cross-sectional view of the first light-emitting layer according to another embodiment of the present disclosure is shown;

[0065] - Figure 11 A cross-sectional view of a first light-emitting layer bonded to a second light-emitting layer according to another embodiment of the present disclosure is shown;

[0066] - Figure 12 A cross-sectional view showing an electrical contact formed between the first and second light-emitting layers according to another embodiment of the present disclosure is shown;

[0067] - Figure 13 Showing Figure 12 A cross-sectional view of the structure, which has been bonded to the third light-emitting layer;

[0068] - Figure 14 Showing Figure 13 The cross-sectional view of the structure is further processed to form electrical contacts to each of the first, second, and third light-emitting layers;

[0069] - Figure 15 The formation of light extraction features for each light-emitting device according to another embodiment of the present disclosure is shown. Detailed Implementation

[0070] The invention will now be described further. In the following paragraphs, different aspects of the invention are defined in more detail. Each aspect so defined may be combined with any other one or more aspects unless explicitly indicated otherwise. In particular, any feature indicated as preferred, advantageous, or optional may be combined with any other one or more features indicated as preferred, advantageous, or optional.

[0071] Embodiments of this disclosure describe light-emitting device array precursors and methods for forming light-emitting device array precursors with various structural configurations, for the purpose of simplifying and reducing the cost of forming light-emitting devices with multiple different emission wavelengths. Embodiments of this disclosure may relate to micro-light-emitting device array precursors and / or micro-light-emitting device arrays. Micro-light-emitting device arrays are typically defined as having a size of 100 × 100 μm. 2 Or an array of smaller light-emitting devices (such as light-emitting diodes). According to embodiments of this disclosure, a method for forming a precursor 100 for a light-emitting device array is provided.

[0072] As part of the method for forming a precursor for a light-emitting device array, a first light-emitting layer 20 is formed on a first substrate 10. An example of such an intermediate structure is shown below. Figure 1 As shown.

[0073] like Figure 1 As shown, the first light-emitting layer 20 is disposed on the substrate surface 11 of the substrate 10. The substrate 10 can be any substrate suitable for fabricating group III nitrides thereon. For example, the substrate 10 can include silicon, sapphire, or SiC, or any other suitable substrate for fabricating thin-film electronic devices.

[0074] like Figure 1 As shown, the first light-emitting layer 20 may include multiple layers. Figure 1 In some embodiments, each layer of the first light-emitting layer 20 may include a group III nitride. For example, in Figure 1 In one embodiment, the first light-emitting layer 20 includes an n-type semiconductor layer 22, an active layer 24, and a p-type semiconductor layer 26. The plurality of layers 22, 24, and 26 of the first light-emitting layer 20 are stacked on top of each other to form the first light-emitting layer 20. Thus, each of the plurality of layers of the first light-emitting layer 20 extends as a substantially continuous layer across the substrate surface. Therefore, the first light-emitting layer 20 can be formed as a substantially continuous layer on the substrate surface 11.

[0075] The first light-emitting layer 20 comprises a plurality of group III nitride layers, thereby forming a semiconductor junction configured to output light having a first wavelength. As will be further discussed below, the first light-emitting layer 20 may undergo further processing steps to include a first light-emitting device array, wherein each first light-emitting device is configured to emit light having a first wavelength. Each light-emitting device of the first light-emitting layer 20 may include a semiconductor junction having a p-type side and an n-type side, such as a diode. Figure 1 In one embodiment, the first light-emitting layer 20 includes a first active layer 24 disposed between the first n-type semiconductor layer 22 and the first p-type semiconductor layer 26. Of course, in other embodiments, the first light-emitting layer 20 may include additional layers, such as a first electron blocking layer or other strain interface layers known in the art.

[0076] like Figure 1 As shown, the first n-type semiconductor layer 22 can be formed as a substantially continuous layer spanning the substrate surface 11. Figure 1 In some embodiments, the first n-type semiconductor layer 22 may include GaN. In some embodiments, for example Figure 1 In this process, the first n-type semiconductor layer 22 may include any suitable n-type dopant (i.e., electron donor), such as Si or Ge. Figure 1 In the embodiments, the first n-type semiconductor layer 22 is doped with at least 10 17 cm -3 The donor density, in some embodiments, is no greater than 10. 19 cm -3 .

[0077] The first n-type semiconductor layer 22 can be deposited using any suitable process for fabricating group III nitride thin films, such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0078] The first n-type semiconductor layer 22 may be formed to have a thickness of at least 3 μm in a direction perpendicular to the surface 11 of the first substrate. Such a thickness provides improved material thickness to accommodate the subsequent formation of the cathode contacts. Furthermore, such a thickness allows for the formation of the light extraction feature 70 (discussed in more detail below) after the first substrate 10 is removed. In some embodiments, the first n-type semiconductor layer 22 may have a thickness of no more than 10 μm, or more preferably 5 μm.

[0079] like Figure 1 As shown, the first active layer 24 is formed as a substantially continuous layer on the first n-type semiconductor layer 22. As part of the first light-emitting layer 20, the first active layer 24 is configured to generate light of a first wavelength.

[0080] exist Figure 1 In some embodiments, the first active layer 24 may include one or more quantum well layers. Thus, the first active layer 24 can be a multi-quantum well layer. The quantum well layers within the first active layer 24 may include group III nitride semiconductors, preferably group III nitride alloys containing In. For example, in Figure 1 In embodiments, the first active layer 24 may include GaN and In y GA 1- Y Alternating layers of N, where 0 < Y ≤ 1. Specifically, in some embodiments, the first active layer 24 may include an InGaN layer, where the indium content Y is 0 < Y ≤ 0.2. Therefore, the first active layer 24 of the first light-emitting layer 20 can be configured to generate light with a wavelength of at least 280 nm and no greater than 490 nm (i.e., generally blue visible light). In this disclosure, a reference to a specific wavelength of light emitted by the light-emitting device is considered a reference to the peak wavelength emitted by the light-emitting device. The thickness of the quantum well layer and the indium content (Y) can be controlled to control the wavelength of light generated by the first active layer 24. The first active layer 24 may be formed as a continuous layer covering most (e.g., all) of the surface of the first n-type semiconductor layer 22.

[0081] The first active layer 24 can be deposited using any suitable process for fabricating group III nitride films, such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0082] like Figure 1 As shown, a first p-type semiconductor layer 26 is disposed above the first active layer 24. The first p-type semiconductor layer 26 is disposed on one side of the first active layer 24 opposite to the side of the first active layer 22 where the first n-type semiconductor layer 22 is disposed. The first p-type semiconductor layer 26 comprises a group III nitride, such as GaN. The first p-type semiconductor layer 26 is doped with a suitable electron acceptor, such as Mg. The first p-type semiconductor layer 26 may have at least 10n... 19 cm -3 The acceptor density. In some embodiments, the acceptor density of the first p-type semiconducting layer 26 may not exceed 10. 21 cm -3 The first p-type semiconductor layer 26 may be formed as a continuous layer covering most (e.g., all) of the exposed surface of the first active layer 24. In some embodiments, each layer of the first light-emitting layer 20 may be formed using any suitable process for fabricating group III nitride thin films, such as MOCVD or MBE.

[0083] Next, as Figure 2 As shown, a first light-emitting device array can be formed in the first light-emitting layer 20. For example... Figure 2 As shown, forming the first light-emitting device array includes forming a first mesa structure 28 for each light-emitting device within the first light-emitting layer 20. For example... Figure 2 As shown, each of the first mesa structures 28 extends in a direction perpendicular to the first substrate 10. Each first mesa structure 28 includes a portion of a first n-type semiconductor layer 22, a portion of a first active layer 24, and a portion of a first p-type semiconductor layer 26. Figure 2 As shown, each second mesa structure 28 has a generally trapezoidal cross-section in a plane perpendicular to the first substrate surface 11. Therefore, each mesa structure 28 includes a generally flat first mesa surface 27 aligned with the surface of the first substrate 10. Each first mesa structure 28 also includes a first sidewall 29 surrounding the first mesa surface 27. The first sidewall 29 of each mesa structure extends in a direction generally transverse to the first substrate surface 11. Figure 1 In one embodiment, the first sidewall 29 is inclined relative to the normal of the first substrate surface 11, such that the inclined first sidewall 29 defines a trapezoidal cross section.

[0084] like Figure 2 As shown, the first mesa structures 28 are spaced apart on the first light-emitting layer 20 to form a regularly spaced array of light-emitting devices. The first mesa structures 28 are formed by selectively removing a portion of the first light-emitting layer 20 using a selective removal process.

[0085] For example, in Figure 2 In this process, the selective removal step is provided via an etching step. In the etching step, a first mask layer (not shown) may be deposited on the exposed surface of the p-type semiconductor layer 26. The first mask layer is configured to cover the portion of the first light-emitting layer 20 used to form the first mesa structure 28. Thus, the first mask layer can define one or more regions for selective removal to form the first mesa structure 28. The portions of the first light-emitting layer 20 exposed by the first mask layer can then be selectively removed using an etchant. Figure 2 As shown, the etchant can etch away a portion of the first p-type semiconductor layer 26, a portion of the first active layer 24, and a portion of the first n-type semiconductor layer 22 to define the first mesa structure 28. The first mask layer can be provided using any method known in the art. For example, lithography can be used to form and pattern the first mask layer.

[0086] As described above, each first mesa structure 28 can be formed by etching the first light-emitting layer 20 in a thickness direction perpendicular to the first substrate surface 11. Therefore, each formed first mesa structure 28 can have a thickness of at least 0.3 μm in the thickness direction, or in some embodiments, at least 0.5 μm, 0.7 μm, or 1 μm.

[0087] As described above, each first mesa structure 28 can be formed such that the first light-emitting layer 20 includes an array of first micro-light-emitting devices. Therefore, the surface area (or footprint) of each first micro-light-emitting device in a plane parallel to the first substrate can be no greater than 100 μm x 100 μm. In some embodiments, the pitch of each first micro-light-emitting device (measured between the centers of each first micro-light-emitting device) can be no greater than: 100 μm, 50 μm, 30 μm, 20 μm, 10 μm, 4 μm, or 2 μm. It is worth noting that the second mesa structure 128 and the third mesa structure 228, discussed in further detail below, can also be formed with similar dimensions to provide an array of micro-light-emitting devices.

[0088] After the array of the first mesa structure 28 is formed, electrical contacts can be formed on the n-type and p-type sides of each light-emitting device in the first light-emitting layer 20.

[0089] For example, a first anode layer may be formed on the first light-emitting device array. The first anode layer is configured to provide first anode contacts 30 to the p-type side of at least some of the light-emitting devices in the first light-emitting layer 20. For example, as Figure 2As shown, a first anode layer is selectively disposed on the mesa surface 29 of every other first mesa structure 28 to selectively form to the first anode contacts 30 of those light-emitting devices. The first anode layer 30 is selectively disposed on every other light-emitting device of the first light-emitting layer 20 to allow additional light-emitting devices to be formed between the first light-emitting devices of the first light-emitting layer (having first anode contacts formed thereon). Therefore, the first anode layer includes a plurality of first anode contacts 30 to select the first light-emitting devices of the first light-emitting layer 20. The first anode contact layer may include one or more metal layers, such as Ti, Al, or a Ti and Al metal stack. The first anode layer can be selectively formed on the mesa surface 29 of the first light-emitting layer using a suitable patenting method (e.g., photolithography).

[0090] After the first anode layer is formed, a first gap-filling insulating layer 40 can be formed over the first light-emitting layer 20 and the first anode contact layer. The first gap-filling insulating layer 40 is configured to provide a flat surface over the first light-emitting layer 20, thereby filling any gaps formed due to the first mesa structure 28. The first gap-filling insulating layer 40 may comprise any suitable insulator, such as SiO2 or SiN. x The gap-filling insulating layer 40 can be formed using any suitable deposition method, such as chemical vapor deposition (CVD).

[0091] After forming the first gap-filling insulating layer 40, a first cathode contact layer can be formed onto the first n-type semiconductor layer 22 of the first light-emitting layer 20. The first cathode contact layer 50 is configured to provide first cathode contacts 50 to the n-type side of each light-emitting device in the first light-emitting layer 20. Figure 2 As shown, the first cathode contact layer is formed from the side of the first light-emitting layer 20 on which the first mesa structure 28 is disposed, so that the first cathode contact layer 50 and the first anode contact layer 30 are disposed on the same surface of the first light-emitting layer 20.

[0092] like Figure 2 As shown, the first cathode contact layer 50 is formed by selectively removing a portion of the first light-emitting layer 20 in a region between each first mesa structure 28. The selective removal of a region of the first light-emitting layer 20 (first n-type semiconductor layer 22) forms a first opening in the first n-type semiconductor layer 22, the first opening (preferably uniform) being spaced apart across the first light-emitting layer 20 between the first mesa structures 28. The first opening can be formed using a suitable selective removal process, such as photolithography (to define the opening), followed by etching. Figure 2In the structure shown, the first opening extends from the exposed surface of the gap-filling insulating layer 40 to the n-type side of the light-emitting layer 20 (i.e., to the first n-type semiconductor layer 22). After the first opening is formed, a first cathode contact layer can be formed.

[0093] like Figure 2 As shown, a first cathode contact layer is formed within the first opening, thus making electrical contact with the first n-type semiconductor layer 22 between each first mesa structure 28. A portion of the first cathode contact layer 50 may also be disposed over the first gap-filling insulating layer 40 to interconnect each opening via the first n-type semiconductor layer 22. Therefore, the first cathode contact layer 50 can provide a common cathode for each light-emitting device in the first light-emitting layer 20. Figure 2 As shown, the first cathode contact layer 50 can be configured to surround each light-emitting device within the first light-emitting layer 20. The first cathode contact layer can be formed using any suitable technique for forming metal contacts, such as thermal evaporation or physical vapor deposition. The first cathode contact layer 50 may comprise Ti, Al, or Ni, or any other suitable material. In some embodiments, the first cathode contact layer may comprise multiple layers, such as a Ni layer and an Al layer. In some embodiments, the first cathode contact layer 50 may have a thickness of at least 100 nm.

[0094] In some embodiments, a single deposition step that completely fills the first opening is used to form the first cathode contact layer 50. Figure 2 In the structure shown, the thickness of the first cathode contact layer is insufficient to completely fill the first opening. To improve the conductivity of the cathode contacts and avoid forming any air gaps in the light-emitting device precursor, the first opening can be further filled with the first contact filling layer 51. For example, in forming Figure 2 In the method of constructing the structure, the first contact filling layer 51 can be deposited by thermal evaporation or any other suitable method. The first contact filling layer 51 can include any suitable metallic contact material, such as Ti, Al, Au, or Ni. For example, in Figure 2 In the structure, the first contact filling layer 51 may include Cu or Au deposited using electrodeposition. The first contact filling layer 51 may also serve as a heat sink for each first light-emitting device of the first light-emitting layer 20. The first contact filling layer 51 may also help reduce crosstalk between adjacent light-emitting devices. For example, the first contact filling layer may reduce optical crosstalk between the second light-emitting device of the second light-emitting layer 120 and the adjacent first light-emitting device of the first light-emitting layer 20.

[0095] After the first filler contact layer 51 is formed, the exposed surfaces of the first filler contact layer and the first light-emitting layer 20 can be subjected to a chemical mechanical polishing (CMP) process. The CMP process can be provided to improve the planarization of the exposed surfaces for subsequent substrate bonding steps.

[0096] It should be understood that Figure 2 The structure shown is merely one possible option for forming the first light-emitting device array in the first light-emitting layer. Therefore, this disclosure is not limited to... Figure 2 The arrangement of the first light-emitting layer 20 and the layers of anode and cathode contacts is shown.

[0097] After forming electrical contacts on the n-type side of the first light-emitting layer 20, a first bonding layer 60 is formed over the first light-emitting layer 20, the first anode contact layer, and the first cathode contact layer 50. The first bonding layer provides a bonding surface covering the first light-emitting layer 20, the first anode contact layer, and the first cathode contact layer. The first bonding layer 60 is provided to form a surface that is compatible with substrate bonding techniques used to bond the first light-emitting layer 20 to the second light-emitting layer 120 (discussed in more detail below).

[0098] exist Figure 2 In some embodiments, the first bonding layer 60 includes a dielectric material suitable for forming a direct bond with another bonding layer. For example, in Figure 2 In some embodiments, the first bonding layer comprises SiO2. The first bonding layer 60 is formed over the anode and cathode contacts and the first light-emitting layer 20 to provide a generally planarized surface extending in a plane parallel to the substrate surface 11. The first bonding layer 60 can be formed by any suitable method, such as CVD. In some embodiments, the first bonding layer 60 may include an adhesive layer or polymer layer for bonding the first light-emitting layer 20 to the second light-emitting layer 120.

[0099] It should be understood that, Figure 2 In the structure, both the gap-filling insulating layer 40 and the first bonding layer 60 can comprise SiO2. Therefore, in some embodiments where the formation of the electrical contacts can follow different process sequences, the formation of the gap-filling insulating layer 40 can provide a first bonding layer having a first bonding surface 61 suitable for bonding to another bonding layer.

[0100] In some embodiments, the first bonding layer 60 may undergo a chemical mechanical polishing (CMP) process after its formation to improve surface smoothness. The CMP process can improve subsequent bonding between the first bonding layer 60 and the second bonding layer. Therefore, a first light-emitting layer 20, including a first light-emitting device array, can be formed on a first substrate 10 suitable for bonding to another light-emitting layer.

[0101] In addition to forming the first light-emitting layer 20 on the first substrate 10, a second light-emitting layer 120 is formed on the second substrate 110 according to the method of the first embodiment. Figure 3 An example of such a second light-emitting layer 120 formed on a second substrate 110 is shown.

[0102] A second light-emitting layer 120 is formed on the second substrate 110 to provide a separate (independent of the first light-emitting layer 20) second light-emitting layer 120 configured to emit light having a second wavelength different from the first wavelength. The second light-emitting layer is formed on a substrate different from the first substrate 10, so that the growth conditions and substrate can be configured to improve the formation of the second light-emitting layer 120. Furthermore, forming the second light-emitting layer 120 on the second substrate 110 does not expose the first light-emitting layer 20 to the processes used to form the second light-emitting layer 120.

[0103] The second light-emitting layer 120 is disposed on the second substrate surface 111 of the second substrate 110. The second substrate 120 can be any suitable substrate for fabricating group III nitrides thereon. For example, the second substrate 110 can include silicon, sapphire, or SiC, or any other suitable substrate for fabricating thin-film electronic devices. In particular, the second substrate 110 can include one or more layers configured to provide the substrate surface 111 having an in-plane lattice constant, which is configured to reduce strain in the second light-emitting layer 120.

[0104] The second light-emitting layer 120 may include multiple layers. According to the first embodiment, each layer of the second light-emitting layer 120 may include a group III nitride. Multiple layers 22, 24, and 26 of the second light-emitting layer 120 may be stacked on top of each other to form the second light-emitting layer 120. Therefore, the multiple layers of the second light-emitting layer 120 may each extend as substantially continuous layers across the second substrate surface 111. Thus, the second light-emitting layer 120 can be formed as substantially continuous layers on the second substrate surface 111.

[0105] According to a first embodiment, the second light-emitting layer 120 includes a plurality of group III nitride layers, such that the second light-emitting layer 120 forms a semiconductor junction configured to output light having a second wavelength. As will be discussed further below, the second light-emitting layer 120 may undergo further processing steps to include a second light-emitting device array, wherein each second light-emitting device is configured to emit light having a second wavelength. Each second light-emitting device of the second light-emitting layer 120 may include a semiconductor junction having a p-type side and an n-type side, such as a diode.

[0106] like Figure 3 As shown, the second light-emitting layer 120 includes a second n-type semiconductor layer 122, a second active layer 124, and a second p-type semiconductor layer 126.

[0107] The second active layer 124 may include one or more quantum well layers. Thus, the second active layer 124 can be a multi-quantum well layer. The quantum well layers within the second active layer 124 may include group III nitride semiconductors, preferably group III nitride alloys of indium (In). For example, in Figure 3 In the illustrated configuration, the second active layer 124 may include GaN and In. Z Ga 1-Z N alternating layers, where 0 < Z ≤ 1. Specifically, in some embodiments, the second active layer 124 may include In... Z Ga 1-Z N layers, where 0.2 < Z ≤ 0.5. Therefore, the second active layer 124 of the second light-emitting layer 120 can be configured to generate light with a wavelength of at least 490 nm and no greater than 670 nm. The thickness of the quantum well layer and the In content (Z) can be controlled to control the wavelength of the light generated by the second active layer 124. The second active layer 124 can be formed as a continuous layer covering most (e.g., all) of the surface of the second n-type semiconductor layer 122.

[0108] It should be understood that in the method of the first embodiment, the indium content (Z) of the second active layer 124 may be higher than the indium content (Y) of the first active layer 24, i.e., Z > Y. The second active layer 124 may be formed on a suitable second substrate 110 having an in-plane lattice constant on a substrate surface 111, which is configured to reduce or eliminate strain in the second active region 124 caused by the increased in-plane lattice constant due to the indium content (Z) of the second active layer 124.

[0109] The second active layer 124 can be deposited using any suitable process for fabricating group III nitride films, such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0110] The second n-type semiconductor layer 122 can be formed as a substantially continuous layer spanning the surface 111 of the second substrate. For example... Figure 3 As shown, the second active layer 124 is formed on the second n-type semiconductor layer 122. According to the first embodiment, the second n-type semiconductor layer 122 may include GaN. Thus, the second n-type semiconductor layer 122 can be formed in a similar manner to the first n-type semiconducting layer 22.

[0111] like Figure 3 As shown, a second n-type semiconductor layer 124 can be formed on the surface 111 of a second substrate, and the thickness of the second n-type semiconductor layer 124 in the normal direction of the substrate surface 111 is greater than the thickness required to provide appropriate functionality for the light-emitting layer 120. For example, as Figure 3 As shown, the second n-type semiconductor layer 122 can be formed with a thickness of at least 0.8 μm. In some embodiments, the second n-type semiconductor layer can be formed with a thickness of at least 1 μm, 1.2 μm, 1.5 μm, 2 μm, or 3 μm. Such a thickness can be provided to aid in the removal of the second substrate 110 in subsequent processing steps.

[0112] like Figure 3 As shown, a second p-type semiconductor layer 126 is disposed above the second active layer 124. Thus, the second p-type semiconductor layer 126 is disposed on one side of the second active layer 124 opposite to the side of the second active layer 124 where the second n-type semiconductor layer 122 is disposed. According to the first embodiment, the second p-type semiconductor layer 126 comprises a group III nitride, such as GaN. Thus, the second p-type semiconductor layer 126 can be formed in a manner similar to that of the first p-type semiconducting layer 26.

[0113] After the second light-emitting layer 120 is formed, a second bonding layer 102 may be formed on the second light-emitting layer 120. The second bonding layer 102 is configured to provide a second bonding surface 103 for bonding the second light-emitting layer 120 and the second substrate 110 to the processing substrate 104. The second bonding layer 102 may include any suitable material for bonding the substrate. For example, according to the first embodiment, the second bonding layer 102 includes a dielectric material such as SiO2. The second bonding layer 102 may be formed as a substantially continuous layer on the second light-emitting layer 120 using any suitable process (e.g., CVD). Therefore, the second bonding layer 102 may be formed in a manner similar to that of the first bonding layer 60. The second bonding layer 102 may also undergo a CMP process similar to that of the first bonding layer 60.

[0114] like Figure 3 As shown, the second substrate 110 and the second light-emitting layer 120 are bonded to the processing substrate 104 via a second bonding layer 102. The processing substrate 102 is configured to provide a substrate for transferring the second light-emitting layer 120 from the second substrate 110 (on which the second light-emitting layer 120 is formed) to the first bonding layer 60. Thus, the processing substrate 102 can be any suitable substrate for processing semiconductor devices. For example, the processing substrate 102 can include silicon or any other suitable substrate. The processing substrate 104 can provide a processing surface 105 for bonding to the second bonding surface 103 of the second bonding layer 102.

[0115] According to a first embodiment, the second bonding layer 102 includes a dielectric material configured to form a direct bond, and the processing substrate can provide a bonding surface 105 configured to form a direct bond with a second bonding surface 103 of the second bonding layer 102. For example, the processing substrate 104 may include a SiO2 layer (not shown). The processing substrate 104 can be bonded to the second bonding layer 102 using any suitable bonding method to a substrate.

[0116] According to the first embodiment, the processed substrate 104 is bonded to the second bonding layer 102 by applying pressure and heat in a wafer bonder using direct bonding.

[0117] The wafer bonder enables the processing substrate surface 105 to be disposed parallel to the second bonding surface 103. The wafer bonder is then configured to bring the two surfaces into contact, thereby forming a bond between the second bonding layer 102 and the processing substrate surface 205 of the processing substrate 104. In some embodiments, the wafer bonder may apply one or more of heat and pressure to improve the bonding formed between the processing substrate surface 105 and the second bonding surface 103.

[0118] For example, in some embodiments, the wafer bonder may apply a compressive force of at least 10 kN to bond the processed substrate 104 (via the second bonding layer 102) to the second light-emitting layer 120. In some embodiments, the wafer bonder may apply a compressive force of at least 20 kN, 30 kN, or 40 kN. Applying a greater compressive force can improve the reliability of bonding between the substrates. In some embodiments, the wafer bonder may apply a compressive force of no more than 45 kN to reduce the risk of substrate breakage or other undesirable substrate deformation during bonding.

[0119] In some embodiments, the wafer bonder may also be configured to heat-process the substrate 104 and / or the second light-emitting layer / second bonding layer 102. For example, the wafer bonder may be configured to heat the substrate 104 and / or the second light-emitting layer / second bonding layer 102 to a temperature of at least 100°C. In some embodiments, the wafer bonder may be configured to heat the substrate 104 and / or the second light-emitting layer / second bonding layer 102 to a temperature of at least 200°C, 300°C, 400°C, or 500°C. The wafer bonder may be configured to hold the second substrate 104 and the second light-emitting layer 120 in a compressed state and optionally maintain them at a temperature for a period of time. In some embodiments, the period of time may be at least: 1 minute, 2 minutes, 5 minutes, 10 minutes, or 1 hour. Therefore, the wafer bonder can be used to improve the formation of a direct fusion bond at the interface between the substrate 104 and the second bonding layer 102.

[0120] Although the first embodiment utilizes direct bonding formed between dielectric layers, in other embodiments, other methods for bonding a substrate (e.g., processed substrate 102) to the light-emitting layer may be used. For example, the methods according to this disclosure may utilize tap bonding, polymer bonding, or oxide bonding.

[0121] For example, in some embodiments, a polymer bond can be used to bond the substrates. Therefore, a polymer bond (i.e., an adhesive bond) can also be used to bond the processed substrate 104 to the second bonding layer 102. This process involves applying an adhesive layer (e.g., a polymer layer) to the processed substrate 104 and / or the second light-emitting layer 120. The adhesive layer can be applied by spin coating. The two substrates can then be brought into contact by the adhesive layer. Pressure and / or heat can then be applied to the substrates to cure the adhesive bond. Examples of suitable polymers for the adhesive bonding process include polyimides, methylsilsesquioxane (MSSQ), polyetheretherketone (PEEK), thermosetting copolyester (ASTD), thermoplastic copolymer (PVDC), parlyene, liquid crystal polymers, and waxes. The polymer bond provides substrate bonding that can be easily removed by applying a suitable selective solvent. Therefore, polymer bonding may be particularly suitable for inherently temporary bonding applications, such as bonding of a substrate to a processing substrate 104. More information on substrate bonding techniques (such as oxide bonding, tap bonding, and polymer bonding) can be found at least in “MEMS Materials and Processes Handbook”, Ch. 11m Ghodssi R., et al, Springer Science+Business Media, LLC 2011.

[0122] Once the second light-emitting layer 120 is bonded to the processing substrate 104 via the second bonding layer 102, the second substrate 110 is removed from the second light-emitting layer 120. Figure 4 A schematic diagram of this structure is shown.

[0123] The second substrate 110 can be removed from the second light-emitting layer 120 using any suitable process. For example, a polishing process (i.e., a grinding process) can be used to remove the second substrate 110. A polishing process can be provided to remove most or all of the second substrate 110. If a portion of the second substrate 110 remains after the polishing process (e.g., less than 5 μm in thickness), an etching process can be provided to remove the remaining portion of the second substrate 102. The etching process can selectively remove the second substrate 110, leaving the second light-emitting layer 120 bonded to the processed substrate 104.

[0124] After removing the second substrate 110, the first main surface 121 of the second light-emitting layer 120 is exposed. The first main surface 121 of the second light-emitting layer 120 is located on the side of the second light-emitting layer 120 opposite to the processing substrate 104. As described above, the second light-emitting layer 120 can be formed such that its thickness in the direction perpendicular to the surface 106 of the processing substrate is greater than the desired thickness of the second light-emitting layer 120. After removing the second substrate 110, the second light-emitting layer 120 can be etched from the first main surface 121 to reduce the thickness of the second light-emitting layer 120 to its desired size. For example, as... Figure 4 As shown, the second n-type semiconductor layer 122 has been etched such that its thickness in the direction perpendicular to the processing substrate surface 105 is reduced from its deposited state thickness. In some embodiments, the thickness of the second n-type semiconductor layer 122 can be etched such that its thickness is no greater than 2 μm, or more preferably 1.5 μm. Defects in the second n-type semiconductor layer caused by the removal of the second substrate 110 can also be eliminated by removing a portion of the second n-type semiconductor layer 122 previously bonded to the second substrate 110. In some embodiments, the thickness of the second n-type semiconductor layer 122 can be etched such that its thickness is at least 0.8 μm. Such a thickness can reduce the contact resistance on the n-type side of the second light-emitting device layer 120.

[0125] After an (optional) etching process to reduce the thickness of the second light-emitting layer 120, a third bonding layer 160 is formed over the first main surface 121 of the second light-emitting layer 120. The third bonding layer 160 is configured to provide a layer for bonding the second light-emitting layer 120 to the first light-emitting layer 20 via the first bonding layer 60. According to a first embodiment, the third bonding layer 160 comprises a dielectric material such as SiO2. Therefore, the third bonding layer 160 is configured to form a direct fusion bond with the first bonding layer 60 to bond the first light-emitting layer 20 to the second light-emitting layer 120. In other embodiments of this disclosure, other bonding methods may be used to bond the first light-emitting layer 20 and the second light-emitting layer 120 together. For example, tap bonding, polymer bonding, or oxide bonding may be used. Therefore, in some embodiments, the third bonding layer 160 may include an adhesive layer for bonding to the first bonding layer 60. An adhesive layer may be provided as an alternative to forming the third bonding layer 160 from a dielectric material, or an adhesive layer other than a dielectric material may be provided.

[0126] An example of the first light-emitting layer 20 and the second light-emitting layer 120 being joined together is shown below. Figure 5 As shown. The first light-emitting layer 20 and the second light-emitting layer 120 can be bonded together using a wafer bonder, similar to the process of bonding the second light-emitting layer to the processing substrate 102. Importantly, at this stage of the method, the second light-emitting layer 120 does not contain any light-emitting device features. Therefore, the bonding process does not require precise mechanical alignment of the second light-emitting layer 120 with the light-emitting device features of the first light-emitting layer 20. Instead, the bonding of the second light-emitting layer 120 can be performed without aligning the features in the second light-emitting layer 120.

[0127] After bonding the first light-emitting layer 20 and the second light-emitting layer 120, the processing substrate 102 can be removed from the second light-emitting layer 120. The process of removing the processing substrate 104 from the second light-emitting layer 120 will depend on the bonding method used to bond the processing substrate to the second light-emitting layer 120. In the method according to the first embodiment, the processing substrate 104 is removed from the second light-emitting layer 120 by selectively etching the second bonding layer 102 (i.e., without etching the second light-emitting layer 120). Thus, the selective etching process etches the second bonding layer 102 to separate the second light-emitting layer 120 from the processing substrate 104.

[0128] In embodiments of this disclosure where the processed substrate 104 is bonded to the second light-emitting layer 120 using polymer bonding, the processed substrate can be removed by immersing the substrate in a selective solvent to remove the polymer. In other embodiments, the polymer can be removed by UV-assisted wet etching.

[0129] After removing the processing substrate 104, a second light-emitting device array is formed from the second light-emitting layer 120. For example... Figure 6 As shown, forming the second light-emitting device array includes forming a second mesa structure 128 for each light-emitting device within the second light-emitting layer 120. For example... Figure 6 As shown, each of the second mesa structures 128 extends in a direction perpendicular to the surface 11 of the first substrate. Each second mesa structure 128 comprises a stack of group III nitride layers from the second light-emitting layer 120. Figure 6 As shown, the second mesa structure comprises a stack of group III nitride layers, including a portion of a second n-type semiconductor layer 122, a portion of a second active layer 124, and a portion of a second p-type semiconductor layer 126. Figure 6 As shown, each second mesa structure 128 has a generally trapezoidal cross-section in a plane perpendicular to the first substrate surface 11. Thus, each second mesa structure 128 includes a generally flat second mesa surface 127 aligned with the surface of the first substrate 10. Each second mesa structure 128 also includes a second sidewall 129 surrounding the second mesa surface 27. Each of the plurality of Group III nitride layers forming the second mesa structure 128 extends as a substantially continuous layer across the second mesa structure 128 between the second sidewalls 129. The second sidewall 129 of each second mesa structure 128 extends in a direction generally transverse to the substrate surface 11. Figure 6 In the embodiment shown, the second sidewall 129 is inclined relative to the substrate surface 11, such that the inclined second sidewall 129 defines a trapezoidal cross section.

[0130] like Figure 6 As shown, the second mesa structure 128 is spaced across the second light-emitting layer 120 to form a regularly spaced array of light-emitting devices. The spacing of the second mesa structure 128 may differ from the spacing of the first mesa structure 28 in the first light-emitting layer 20. This allows the second light-emitting device array to be aligned relative to the first light-emitting device array, such that the first and second light-emitting devices forming part of the light-emitting device array precursor are laterally offset from each other in a plane parallel to the first and second light-emitting layers (e.g., a plane parallel to the first substrate surface 11). The lateral spacing between each first and second light-emitting device allows each first and second light-emitting device to be observed by the user. In addition to the lateral spacing between the first and second light-emitting devices, it should be understood that, due to the layered structure of the light-emitting device array precursor, the first light-emitting devices are inherently spaced apart from the second light-emitting devices in a plane perpendicular to the first light-emitting layer 20 and the second light-emitting layer 120.

[0131] from Figure 6It can be understood that the second mesa structure 128 overlaps with the unused first mesa structure 128 of the first light-emitting layer. Of course, in other embodiments, the unused first mesa structure may not be formed when forming the first light-emitting device array. Therefore, in some embodiments, the array of the first light-emitting device and the array of the second light-emitting device can be formed in the corresponding light-emitting layers 20, 120, with a pitch greater than the pitch between adjacent light-emitting devices in the resulting image plane.

[0132] The second mesa structure 128 can be formed using a selective removal process similar to that described for forming the first light-emitting device. By forming the second light-emitting device in the second light-emitting layer 120 after bonding the second light-emitting layer 120 to the first light-emitting layer 20, the method according to the first embodiment avoids the need for precise alignment of the light-emitting device features of the second light-emitting layer with the light-emitting device characteristics of the first light-emitting layer 120 during the substrate bonding step. Performing precise mechanical alignment of two substrates for substrate bonding with the same level of precision as the alignment of patterned layers in a photolithography step is technically challenging.

[0133] It should be understood that Figure 6 The illustrated embodiment is merely one possible option for forming the second light-emitting device array in the second light-emitting layer 120. Therefore, this disclosure is not limited to the layer arrangement of the second light-emitting layer 120, nor is it limited to... Figure 6 The arrangement of the second light-emitting device is shown.

[0134] Therefore, a light-emitting device array precursor 100 according to a first embodiment of the present disclosure can be provided. Although the method according to the first embodiment involves forming the first anode contact 30 and the first cathode contact layer 50 to the first light-emitting device prior to bonding the second light-emitting layer 120, it should be understood that the present disclosure is not limited to such a processing sequence. For example, those skilled in the art will recognize that, by appropriate photolithography and etching steps (e.g., etching from the second light-emitting layer 120 to the first light-emitting layer 20), electrical contacts extending directly to the first light-emitting layer 120 can be formed after bonding the second light-emitting layer 120.

[0135] According to the first embodiment, the light-emitting device array precursor may undergo further processing steps.

[0136] For example, after forming the array of the second mesa structures 128, a second anode layer can be formed on the array of the second light-emitting devices. The second anode layer is configured to provide second anode contacts 130 to the p-type side of at least some of the light-emitting devices in the second light-emitting layer 120. For example, as... Figure 6 As shown, the second anode layer is selectively disposed on the mesa surface 129 of each second mesa structure 128 to selectively form the second anode contacts 130 to those light-emitting devices.

[0137] It should be understood that, Figure 6 In the example shown, a different mask pattern is used to form the second light-emitting device in the second light-emitting layer 120 compared to the mask pattern used to form the first light-emitting device in the first light-emitting layer 20. In other embodiments, the same mask pattern can be used to form the mesa structure of the first light-emitting layer 20 and the second light-emitting layer 120, wherein selective patterning of the second anode contact 130 can be used to selectively form the second light-emitting device in the second light-emitting layer 120, the second light-emitting device being offset laterally from the first light-emitting device in the first light-emitting layer 20.

[0138] Thus, the first anode contact 30 and the second anode contact 130 can be selectively formed to provide an array of first and second light-emitting devices in the light-emitting device array precursor, which are spaced apart from each other in a plane parallel to the surface 11 of the first substrate. The second anode contact 130 can be formed in a similar manner to the first anode contact 30 described above.

[0139] After the second anode layer is formed, unused portions of the second light-emitting layer 120 can be selectively removed, for example, using an etching process. The selective removal process can etch through the thickness of the second light-emitting layer 120 in a direction perpendicular to the surface 11 of the first substrate to separate each second light-emitting device of the second light-emitting layer from the other light-emitting devices. This separation step can be performed considering the electrical contacts subsequently formed from the top surface of the light-emitting device array precursor to each light-emitting layer 20, 120.

[0140] Selective removal of unused portions of the second light-emitting layer 120 may selectively remove portions of the second light-emitting layer aligned with each first light-emitting device of the first light-emitting layer 20. Therefore, it should be understood that in some embodiments, mask patterns with the same pitch can be used to form the first mesa structure 28 and the second mesa structure 128, wherein the selective removal step removes unused portions of the second mesa structure 128 from the second light-emitting layer 128. Figure 7 An example of selectively removing unused portions of the second light-emitting layer (i.e., not forming a second light-emitting device) is shown.

[0141] Following the selective removal step, a second gap-filling insulating layer 140 may be formed over the second light-emitting layer 120 and the second anode contact layer. The second gap-filling insulating layer 140 is configured to provide a flat surface over the second light-emitting layer 120, thereby filling any gaps formed due to the formation of the second mesa structure 128 and the subsequent selective removal of unused portions of the second light-emitting layer 120. The second gap-filling insulating layer 140 may be formed in a manner similar to that of the first gap-filling insulating layer 40.

[0142] A second cathode contact layer 150 may be formed on the second light-emitting layer 120. The second cathode contact layer 150 is configured to provide electrical contact to the n-type side of each light-emitting device in the second light-emitting layer 120. The second cathode contact layer 150 is also configured to electrically connect the n-type sidewall of each light-emitting device in the second light-emitting layer 120 to the first cathode contact layer 50 of the first light-emitting layer 20. In this way, the first cathode contact layer 50 and the second cathode contact layer 150 can be electrically connected together to form a common cathode for the light-emitting device array precursor.

[0143] An example of the second cathode contact layer 150 is as follows: Figure 7 As shown. Figure 7 As shown, the second cathode contact layer 150 is formed by selectively removing a portion of the second light-emitting layer 120 in the region between each of the second mesa structures 128. This selective removal of a region of the second light-emitting layer 120 (the second n-type semiconductor array 122) creates an opening in the second n-type semiconductor layer 122. This opening is substantially aligned with an opening formed in the first n-type semiconductor layer 22 (which was formed prior to accommodate the first cathode contact layer 50). The second opening can be formed using a similar selective removal process, for example, for forming the first opening in the first cathode contact layer 50.

[0144] like Figure 7 As shown, a second cathode contact layer 150 is formed in the second opening such that it is in electrical contact with the second n-type semiconductor layer 122 between each first mesa structure 28. A portion of the second cathode contact layer 150 may also be disposed over the second gap-filling insulating layer 140 to interconnect each opening via the second n-type semiconductor layer 122.

[0145] The second cathode contact layer 150 can be formed in a similar manner to the first cathode contact layer described above. For example, as... Figure 7 As shown, the second opening is also filled with a second filling contact layer 151 in a manner similar to the first filling contact layer 51 of the first light-emitting layer 20.

[0146] It should be understood that Figure 7 The structure shown is merely one possible option for forming the second cathode contact and the second anode contact 130 to the second light-emitting layer 120. Therefore, this disclosure is not limited to... Figure 7 The relative arrangement of the first and second light-emitting layers 20, 120 and the anode and cathode contact layers is shown in the figure.

[0147] Therefore, a light-emitting device array precursor 100 including electrical contacts can be provided. The light-emitting device array precursor 100 includes a first light-emitting layer 20 and a second light-emitting layer 120, configured to emit light of different wavelengths. The first light-emitting layer 20 and the second light-emitting layer 120 provide an array of first and second light-emitting devices configured to emit light of a first wavelength or a second wavelength, respectively. The light-emitting devices can be arranged in the first light-emitting layer 20 and the second light-emitting layer 120 such that the first and second light-emitting devices are spaced apart from each other in a plane parallel to the surface 11 of the first substrate.

[0148] After forming electrical contacts on the n-type side of the second light-emitting layer 120, in some embodiments, the light-emitting device array precursor 100 may undergo further processing steps to adapt it for bonding to a back electron substrate. For example, a planarization dielectric layer 180 may be formed over the second light-emitting layer 120 and the second gap-filling insulating layer 140 to cover the anode contact 130 and the second cathode contact layer 150. The planarization dielectric layer 180 may provide a planarization dielectric surface 181 to which the back electron substrate 190 is bonded. The planarization dielectric layer 180 may include a suitable dielectric material, such as SiO2. First and second electrical contacts may also be formed by the planarization dielectric layer 180, the first and third bonding layers 60, 160, and the gap-filling insulating layers 40, 140 to provide electrical contact between the planarization dielectric surface and the corresponding first and second anode contacts 30, 130 of each light-emitting device. The formation of vias is well known to those skilled in the art.

[0149] After forming the planarized dielectric surface 101 and the first and second electrical contact vias 31 and 131, the light-emitting device array front can be bonded to the back electron substrate 190. An example of this structure is shown below. Figure 8 As shown. Figure 8 As shown, the back-side electronic substrate 190 is bonded to the light-emitting device array front. The back-side electronic substrate 190 has a plurality of electrical contacts aligned with the first and second vias 30, 131. Therefore, the back-side electronic substrate 190 is configured to provide electronic driving circuitry for the light-emitting devices in the light-emitting device array front. Various methods for bonding electrical devices, such as light-emitting device arrays, to the back-side electronic substrate are known to those skilled in the art and will not be discussed further here.

[0150] In some embodiments, further processing steps may be performed on the light-emitting device array precursor, such as removing the first substrate 10 to expose the light-emitting surface 13 of the light-emitting device array precursor 100.

[0151] The first substrate 10 can be removed from the first light-emitting layer 20 using a substrate removal process similar to that discussed above for removing the second substrate 110 from the second light-emitting layer 120. Figure 9 An example of a light-emitting device array precursor 100 is shown, in which the first substrate 110 is removed to expose the light-emitting surface 13. (See example...) Figure 9 As shown, the light-emitting surface 13 is provided by the exposed main surface of the first light-emitting layer 20.

[0152] Furthermore, in some embodiments of this disclosure, such as... Figure 9 As shown, the light-emitting surface 13 of the light-emitting device array front 100 can undergo further processing steps to add light extraction features 70 to the light-emitting surface 13. For example, as Figure 9 As shown, a portion of the first light-emitting layer 20 has been selectively removed to form a light extraction feature 70 for each light-emitting device in the light-emitting device array precursor 100. Each light extraction feature 70 is configured to increase the light extraction efficiency of the corresponding light-emitting device aligned with it. Figure 9 In the example shown, forming each light extraction feature 70 includes shaping the first light-emitting layer 20 to define a lens-shaped portion on the light-emitting surface of the first light-emitting layer 20. Therefore, the light-emitting surface 13 of the first light-emitting layer 12 is shaped to include a convex portion aligned with each light-emitting device. The light extraction feature 70, such as the convex portion, is configured to improve light extraction efficiency by reducing total internal reflection at the interface between the first light-emitting layer 20 and the surrounding environment. Figure 9 In one embodiment, the convex portion of the light-emitting surface 13 is formed by etching the first n-type semiconductor layer 22 of the first light-emitting layer 20 to form the desired light-emitting surface profile.

[0153] Technicians are familiar with various methods for forming optical extraction features. Therefore, the convex optical extraction feature 70 is merely one example of possible optical extraction features that can be formed. More can be added... Figure 9 Other light extraction features of the light-emitting array precursor 100 include an anti-reflection layer, one or more band-stop filters, and / or other collimated light extraction features.

[0154] like Figure 9 As shown, another common cathode contact 52 is provided on the light extraction surface to provide a contact point for further electrical connection. Cathode contact 52 is in electrical contact with each first cathode contact 50 and each second cathode contact 150.

[0155] Therefore, as described above, the light-emitting device array precursor 100 can undergo further processing steps to provide a light-emitting device array configured to emit light of first and second wavelengths. The light-emitting device array can be used to form a display or projector.

[0156] Therefore, based on the above description, a light-emitting device array precursor 100 is provided. The light-emitting device array precursor 100 includes a first light-emitting layer 20, a first bonding layer 60, a third bonding layer 160, and a second light-emitting layer 120. The first light-emitting layer 20 includes a first light-emitting device array. Each first light-emitting device is configured to allow light having a first wavelength. The second light-emitting layer 120 includes a second light-emitting device array. Each second light-emitting device is configured to allow light having a second wavelength different from the first wavelength. The second light-emitting device array is aligned with the first light-emitting device array. For example, in some embodiments, the first and second wavelengths can be configured to emit at least two of blue, red, or green visible light.

[0157] Another example of a light-emitting device array precursor (light-emitting device array) according to embodiments of this disclosure is as follows: Figure 9 As shown. Figure 9 As shown, the first light-emitting layer 120 has a first bonding layer 60 disposed on the first light-emitting layer 20. A third bonding layer 160 is bonded to the first bonding layer 60. Then, the second light-emitting layer 120 is disposed on the second bonding layer 160. Figure 9 As shown in the embodiments, the light-emitting device array precursor also includes first and second anode contacts 31, 131 and first and second cathode contacts 50, 150.

[0158] Next, according to a second embodiment of the present disclosure, a light-emitting device array precursor comprising a plurality of light-emitting devices configured to emit light having a first, second, or third wavelength will be described.

[0159] The method for forming the second embodiment of the present disclosure utilizes a substrate bonding technique similar to that of the first embodiment to combine the first, second, and third light-emitting device layers 20, 120, 220 into a single light-emitting device array precursor 200, wherein the first, second, and third light-emitting device layers are fabricated on respective first, second, and third substrates 10, 110, 210.

[0160] Therefore, similar to the first embodiment, the method for forming the light-emitting device array precursor 200 according to the second embodiment may include forming a first light-emitting layer 20 on the first substrate 10. An example of such a first light-emitting layer is as follows: Figure 10 As shown. It should be understood that, Figure 10 The arrangement of the layers shown in the first light-emitting layer is similar to that in the first embodiment. Therefore, a similar method can be used to form the first light-emitting layer 20 of the second embodiment.

[0161] Similarly, a second light-emitting layer 120 can be formed on the second substrate 110. The second light-emitting layer 120 can be formed on the second substrate in a manner similar to the steps described above with respect to the first embodiment. After the second light-emitting layer 120 is formed, it can be bonded to the processing substrate 104 via the second bonding layer 102. The second substrate 110 can then be removed from the second light-emitting layer 120. Therefore, the process of transferring the second light-emitting layer 120 from the second substrate 110 to the processing substrate 104 can be similar to the steps described above with respect to the first embodiment. The second light-emitting layer 120 can then be bonded to the first light-emitting layer by forming a third bonding layer 160 on the second light-emitting layer 120 and bonding the third bonding layer 160 to the first bonding layer 60. Therefore, the process for bonding the second light-emitting layer 120 to the first light-emitting layer 20 can be similar to the steps described above with respect to the first embodiment. For example, oxide bonding, tap bonding, or polymer (adhesive) bonding can be used in any of the substrate bonding steps described in the second embodiment. Figure 11 An example of a second bonding layer bonded to the first light-emitting layer 20 according to a second embodiment is shown.

[0162] After the second light-emitting layer 120 is bonded to the first light-emitting layer 20, the second light-emitting layer 120 can be further processed to form a second light-emitting device array within the second light-emitting layer. Thus, the process of forming the second light-emitting device in the second light-emitting layer 120 can be similar to the process described above with respect to the first embodiment. Figure 12 An example of this structure is shown after the second light-emitting device has been formed in the second light-emitting layer 120. For example... Figure 12 As shown, the second light-emitting layer 120 is selectively removed in the region of the light-emitting device front body that is aligned with the light-emitting devices of the first light-emitting layer 20. Subsequently, electrical contacts (second anode contact 130 and second cathode contact 150) are formed to the second light-emitting layer 120. The second cathode contact 150 is also electrically connected to the first cathode contact 50 in a manner similar to that of the first and second cathode contacts 50, 150 in the first embodiment.

[0163] Next, as Figure 13 As shown, a fourth bonding layer 165 may be formed on the second light-emitting layer 120 (on the side of the second light-emitting layer 120 opposite to the side where the first light-emitting layer 20 is disposed). The fourth bonding layer 165 is configured to bond the second light-emitting layer to the third light-emitting layer 220. Similar to the first bonding layer 60, the fourth bonding layer 165 is disposed on the second light-emitting layer 120, the second anode contact 130, and the second cathode contact to provide a surface for bonding the second light-emitting layer 120 to another substrate (e.g., the third light-emitting layer 220).

[0164] The third light-emitting layer 220 can be formed on a third substrate (not shown) in a manner similar to that used to form the second light-emitting layer 120 on the second substrate 110. The third light-emitting layer 220 can then be transferred to another processing substrate 204 via a fifth bonding layer 202 formed on the third light-emitting layer 220, similar to the method described above regarding the second light-emitting layer 120. The third light-emitting layer 220 is then bonded to the second light-emitting layer 120 by applying a sixth bonding layer 260 to the third light-emitting layer 220 and then bonding the fifth light-emitting layer 260 to the fourth light-emitting layer 165. Therefore, the method according to the second embodiment includes bonding the first light-emitting layer 20 to the second light-emitting layer 120 and then bonding the second light-emitting layer 120 to the third light-emitting layer 220. This provides a stack of light-emitting layers, wherein the second light-emitting layer 120 is disposed between the first light-emitting layer 20 and the third light-emitting layer 220. It should be understood that this is one possible arrangement of the first, second, and third light-emitting layers 20, 120, 220. It should be understood that this disclosure is not limited to any specific arrangement of the three layers. Thus, the first, second, and third light-emitting layers 20, 120, and 220 can be arranged in any order.

[0165] Similar to the second embodiment, the third light-emitting layer 220 can be thinned from its deposited state thickness to a thickness of no more than 2 μm. In some embodiments, the third light-emitting layer 220 can be thinned from its deposited state thickness to a thickness of no more than 1.5, 1.4 μm, 1.2 μm, or 1 μm. By thinning the third light-emitting layer 220 to the desired thickness, any damage to the light-emitting layer 220 caused by the removal of the fourth bonding layer 202 can be eliminated before the third light-emitting layer 220 is bonded to the second light-emitting layer 120. In some embodiments, the third light-emitting layer 220 can be thinned from its deposited state thickness to a thickness of at least 0.8 μm. Therefore, the third light-emitting layer 220 can be configured to have a thickness that allows the third light-emitting layer 220 to be more easily transferred to the second light-emitting layer 120.

[0166] The third light-emitting layer may have a structure similar to that of the first light-emitting layer 20 and the second light-emitting layer 120. Therefore, the third light-emitting layer 220 according to the second embodiment includes a third n-type semiconductor layer 220, a third active layer 224, and a third p-type semiconductor layer 226.

[0167] Similar to the second light-emitting layer 120, the third active layer 224 may include one or more quantum well layers. Thus, the third active layer 224 can be a multi-quantum well layer. The quantum well layers within the third active layer 224 may include group III nitride semiconductors, preferably group III nitride alloys containing In. For example, in Figure 13 In the arrangement shown, the third active layer 224 may include GaN and In. A Ga 1-AAlternating layers of N, where 0 < A ≤ 1. Specifically, in some embodiments, the third active layer 224 may comprise an InGaN layer, where 0.2 ≤ A ≤ 0.5. Therefore, the third active layer 224 of the third emitting layer 220 can be configured to generate light with a wavelength of at least 490 nm and no greater than 670 nm. Specifically, in some preferred embodiments where A > 0.2, the third emitting layer can be configured to generate light with a wavelength of at least 540 nm. The thickness of the quantum well layer and the In content (A) of the third active layer 224 can be controlled to control the wavelength of the light generated by the third active layer 224.

[0168] After the third light-emitting layer 220 is formed and bonded to the second light-emitting layer 120, the processing substrate 104 can be removed. The process for removing the processing substrate 104 can be a process similar to that used in the first embodiment.

[0169] After removing the processing substrate 104, the third light-emitting layer 220 can be further processed to define an array of third light-emitting devices. Each third light-emitting device can be formed in the third light-emitting layer 220 by forming a third mesa structure 228 in the third light-emitting layer 220. Figure 14 An example of a third mezzanine structure 228 is shown. The formation of the third mezzanine structure 228 in the third light-emitting layer 220 is aligned with the light-emitting devices already formed in the first and second light-emitting layers 20, 120. Similar to the first mezzanine structure 28 and the second mezzanine structure 128, the third mezzanine structure 228 defines a trapezoidal cross-section including sidewall surfaces 229.

[0170] like Figure 14 As shown, the first, second, and third light-emitting devices are arranged in their respective light-emitting layers 20, 120, and 220 to provide an image plane, wherein the first, second, and third light-emitting devices are spaced apart from each other by the pitch between adjacent light-emitting devices. In some embodiments, the pitch between adjacent light-emitting devices (measured between centers) may be greater than: 100 μm, 50 μm, 30 μm, 20 μm, or 10 μm.

[0171] After forming the third mesa structure 228, anode contacts 230 and third cathode contacts 250 can be formed for the third light-emitting layer 220. The steps for forming the third anode contacts 230 and third cathode contacts 250 can be similar to the steps for forming the first and second cathode contacts 50, 150 and anode contacts 30, 130 in the first embodiment. Examples of the third anode contacts 230 and third cathode contacts 250 are as follows... Figure 14 As shown.

[0172] Therefore, according to a second embodiment of this disclosure, a light-emitting array precursor 200 can be provided. The light-emitting array precursor 200 includes anode and cathode contacts already formed in each of the first, second, and third light-emitting device layers 20, 120, 220. Of course, in other embodiments, the first, second, and third light-emitting layers 20, 120, 220 may be formed (and processed to include light-emitting devices) before forming electrical contacts with each layer.

[0173] Similar to the first embodiment, the light-emitting array precursor 200 can also undergo further processing steps.

[0174] For example, similar to the first embodiment, unused portions of the third light-emitting layer 220 can be selectively removed. This selective removal of portions allows for easier formation of electrical interconnections with the first and second light-emitting layers 20, 120.

[0175] Furthermore, after forming the third anode contact 230 and the third cathode contact 250, further processing steps can be performed on the third light-emitting device layer 220, such as forming vias (first, second, and third vias 31, 131, 231), and the bonding of the first, second, and third light-emitting layers 20, 120, 220 to the back electron substrate 190 can be similar to the process of bonding the back electron substrate to the light-emitting device array front 200 already described with respect to the first embodiment. An example of such a structure is as follows... Figure 15 As shown.

[0176] Therefore, according to embodiments of the present disclosure, light-emitting device array precursors 100 and 200 and methods for forming light-emitting device array precursors are provided. The light-emitting device array precursors 100 and 200 of the present disclosure include a plurality of native light-emitting layers, each layer including an array of light-emitting devices configured to emit light of different wavelengths. Thus, a multicolor array of light-emitting devices can be provided. According to the method of the present disclosure, separate light-emitting layers are bonded together without requiring relatively precise mechanical alignment of the different layers of light-emitting devices. This further reduces or eliminates the requirement for precise mechanical alignment of semiconductor layers during the formation of the light-emitting device array precursor. Reducing or eliminating such precise mechanical alignment steps is particularly advantageous for small-pitch devices, such as micro-light-emitting devices with a surface area less than 100 μm x 100 μm. Reducing the need for precise mechanical alignment of layers is particularly advantageous for small devices, such as micro-LEDs, because it creates a tolerance that will be provided between each light-emitting device, which can become significant as the device size decreases.

[0177] The light-emitting device array precursor according to this disclosure includes multiple light-emitting device layers, each configured to emit light of a different wavelength. Therefore, the light-emitting device array precursor and the method of forming it provide a method for providing a native multicolor (i.e., red, green, and blue) display.

[0178] Although embodiments of the present disclosure have been described in detail herein, those skilled in the art will understand that changes thereto without departing from the scope of the invention are defined by the appended claims.

Claims

1. A method for forming a precursor for a light-emitting device array, comprising: A first light-emitting layer is formed on a first substrate, the first light-emitting layer being configured to emit light having a first wavelength; An array of first light-emitting devices is formed from the first light-emitting layer, each first light-emitting device being configured to emit light having a first wavelength; A first bonding layer is formed on the first light-emitting layer; A second light-emitting layer is formed on a second substrate, the second light-emitting layer being configured to emit light having a second wavelength different from the first wavelength; A second bonding layer is formed on the second light-emitting layer; The second bonding layer is bonded to the processed substrate; Remove the second substrate from the second light-emitting layer; A third bonding layer is formed on the second light-emitting layer on the side of the second light-emitting layer opposite to the processing substrate; The first bonding layer is bonded to the third bonding layer; Remove the processed substrate from the second light-emitting layer; An array of second light-emitting devices is formed from the second light-emitting layer, the array of second light-emitting devices being aligned with the array of first light-emitting devices, such that the light-emitting device array precursor includes an array of first light-emitting devices and second light-emitting devices, the first light-emitting devices and the second light-emitting devices being spaced apart from each other in a plane parallel to each of the first light-emitting layer and the second light-emitting layer.

2. The method according to claim 1, wherein The first luminescent layer comprises multiple layers, each comprising a group III nitride; and / or The second luminescent layer comprises multiple layers, each comprising a group III nitride.

3. The method according to claim 1, wherein The array forming the first light-emitting device includes: A first mesa structure is formed for each first light-emitting device.

4. The method according to claim 1, wherein Forming the first light-emitting layer includes: A first n-type semiconductor layer is formed on the first substrate; A first active layer is formed on the first n-type semiconductor layer, the first active layer including a plurality of quantum well layers configured to emit light of the first wavelength; and A first p-type semiconductor layer is formed on the first active layer.

5. The method according to claim 3, wherein Forming the first light-emitting layer includes: A first n-type semiconductor layer is formed on the first substrate; A first active layer is formed on the first n-type semiconductor layer, the first active layer including a plurality of quantum well layers configured to emit light of the first wavelength; and A first p-type semiconductor layer is formed on the first active layer; as well as The first mesa structure extends in a direction perpendicular to the first substrate, and each first mesa structure includes a portion of the first n-type semiconductor layer, the first active layer, and the first p-type semiconductor layer.

6. The method according to claim 1, wherein Forming the second light-emitting layer includes: A second n-type semiconductor layer is formed on the second substrate; A second active layer is formed on the second n-type semiconductor layer, the second active layer including a plurality of quantum well layers configured to emit light of the second wavelength; and A second p-type semiconductor layer is formed on the second active layer.

7. The method of claim 6, wherein After removing the second substrate and before forming the third bonding layer, a portion of the second n-type semiconductor layer is selectively removed such that the thickness of the second n-type semiconductor layer in the direction perpendicular to the first substrate is no greater than 2 µm.

8. The method according to claim 6, wherein The array forming the second light-emitting device from the second light-emitting layer includes: A second mesa structure is formed for each second light-emitting device, the second mesa structure extending in a direction perpendicular to the first substrate, wherein each second mesa structure includes a portion of the second n-type semiconductor layer, the second active layer, and the second p-type semiconductor layer.

9. The method of claim 1, further comprising: Electrical contacts are formed to each of the first light-emitting devices and each of the second light-emitting devices.

10. The method of claim 1, wherein The electrical contacts formed to each of the first light-emitting devices and each of the second light-emitting devices include: A common cathode contact is formed for each of the first light-emitting devices and each of the second light-emitting devices.

11. The method of claim 1, wherein The first bonding layer includes a dielectric material, and the third bonding layer includes a dielectric material, and Bonding the first bonding layer to the third bonding layer includes directly bonding the first bonding layer to the second bonding layer by applying pressure and heat.

12. The method according to claim 1, wherein The first wavelength is shorter than the second wavelength.

13. The method of claim 12, wherein The first wavelength is at least 440 nm and no greater than 490 nm.

14. The method according to claim 12 or 13, wherein The second wavelength is at least 500 nm and no greater than 680 nm.

15. The method of claim 1, further comprising: A fourth bonding layer is formed on the second light-emitting layer; A third light-emitting layer is formed on a third substrate, the third light-emitting layer being configured to emit light having a third wavelength that is different from the first wavelength and different from the second wavelength; A fifth bonding layer is formed on the third light-emitting layer; The fifth bonding layer is bonded to another processed substrate; Remove the third substrate from the third light-emitting layer; A sixth bonding layer is formed on the third light-emitting layer on the side opposite to the other processed substrate; The fourth bonding layer is bonded to the sixth bonding layer; Remove the other processed substrate from the third light-emitting layer; An array of third light-emitting devices is formed from the third light-emitting layer, the array of third light-emitting devices being aligned with the arrays of the first light-emitting devices and the arrays of the second light-emitting devices, such that the front body of the light-emitting device array includes an array of first light-emitting devices, second light-emitting devices and third light-emitting devices spaced apart from each other.

16. The method of claim 15, wherein The third luminescent layer comprises multiple layers, each comprising a group III nitride.

17. The method of claim 15, wherein The array forming the third light-emitting device includes: A third mesa structure is formed for each third light-emitting device.

18. The method of claim 15, wherein The array forming the first light-emitting device includes: A first mesa structure is formed for each first light-emitting device; Forming the first light-emitting layer includes: A first n-type semiconductor layer is formed on the first substrate; A first active layer is formed on the first n-type semiconductor layer, the first active layer including a plurality of quantum well layers configured to emit light of the first wavelength; and A first p-type semiconductor layer is formed on the first active layer; and The first mesa structure extends in a direction perpendicular to the first substrate, and each first mesa structure includes a portion of the first n-type semiconductor layer, the first active layer, and the first p-type semiconductor layer. Forming the third light-emitting layer includes: A third n-type semiconductor layer is formed on the third substrate; A third active layer is formed on the first n-type semiconductor layer, the third active layer comprising a plurality of quantum well layers configured to emit light of the third wavelength; and A third p-type semiconductor layer is formed on the third active layer.

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