Data storage system and device
By writing data sequentially to the HDD according to physical addresses and using the SSD as a read cache, combined with address mapping table optimization of the data storage system, the problem of poor HDD read performance is solved, and a balanced improvement in read and write performance is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ALIBABA (CHINA) CO LTD
- Filing Date
- 2022-12-09
- Publication Date
- 2026-07-21
AI Technical Summary
In existing data storage systems, hard disk drives (HDDs) have poor read performance, while write caches have better write performance than read performance, resulting in poor read/write balance.
By writing data to HDDs in a contiguous manner according to physical addresses, and using high-capacity, low-cost solid-state drives (SSDs) as read caches, combined with address mapping table management logic and the correspondence between physical addresses, the read and write operations of the data storage system are optimized.
It improves the write performance of HDDs and the read performance of read caches, thereby comprehensively enhancing the read-write balance of the data storage system.
Smart Images
Figure CN115857813B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer technology, and in particular to a data storage system and device. Background Technology
[0002] Electronic devices may include a data storage system, which may include a hard disk drive (HDD) and a write cache for reading and writing data.
[0003] In related technologies, data is typically read from an HDD and written to a write cache. However, due to the limited head rotation speed of an HDD, its read performance is poor; while because the write cache usually uses non-volatile memory, it is over-designed so that its write performance is better than the HDD's read performance.
[0004] As can be seen from the above, the read / write balance of the data storage system is poor. Summary of the Invention
[0005] This application provides a data storage system and device for improving the read / write balance of a data storage system.
[0006] In a first aspect, embodiments of this application provide a data storage system, including a processor, memory, a read cache, and at least one hard disk drive (HDD), wherein the processor is connected to the memory, the read cache, and the HDD, respectively.
[0007] The memory is used to store an address mapping table, which includes the correspondence between logical addresses and physical addresses in the HDD, as well as physical addresses in the read cache.
[0008] The processor is used to write data to the HDD in a contiguous manner according to physical addresses and to update the address mapping table;
[0009] The processor is also configured to read data from the read cache or the HDD according to the address mapping table.
[0010] In one possible implementation, writing data to the HDD in a physically address-contiguous manner and updating the address mapping table includes:
[0011] The target physical address is determined in the HDD in a manner that ensures contiguous physical addresses.
[0012] Write data into the HDD according to the target physical address;
[0013] Update the address mapping table based on the target physical address.
[0014] In one possible implementation, determining the target physical address in the HDD in a manner that ensures physical address contiguousness includes:
[0015] Determine the current physical address of the HDD's read / write head;
[0016] The current physical address is determined as the target physical address.
[0017] In one possible implementation, updating the address mapping table based on the target physical address includes:
[0018] Determine the target logical address corresponding to the target physical address;
[0019] If the address mapping table does not include the target physical address and the target logical address, then the target physical address and the target logical address are added to the address mapping table accordingly.
[0020] In one possible implementation, the address mapping table includes multiple logical addresses and a merged physical address corresponding to each logical address, wherein,
[0021] The merged physical address includes a first field and a second field;
[0022] The first field is used to store the physical address in the HDD corresponding to the logical address;
[0023] The second field is used to store the physical address in the read cache corresponding to the logical address.
[0024] In one possible implementation, reading data from the read cache or the HDD according to the address mapping table includes:
[0025] Determine the first logical address of the data to be read;
[0026] Based on the first logical address, determine the first merged physical address in the address mapping table;
[0027] Data is read from the read cache or the HDD based on the first merged physical address.
[0028] In one possible implementation, reading data from the read cache or the HDD based on the first merged physical address includes:
[0029] Obtain the read cache physical address from the second field in the first merged physical address;
[0030] If the physical address of the read cache is a valid address, then read the data from the read cache according to the physical address of the read cache;
[0031] If the read cache physical address is invalid, the HDD physical address is obtained from the first field of the first merged physical address. If the HDD physical address is valid, data is read from the HDD according to the HDD physical address.
[0032] In one possible implementation, the processor is further configured to:
[0033] The data to be migrated is determined in the at least one HDD and the read cache;
[0034] Determine the target HDD corresponding to the data to be migrated and the first physical address in the target HDD;
[0035] Based on the first physical address, the data to be migrated is written to the target HDD, and the address mapping table is updated.
[0036] In one possible implementation, determining the data to be migrated in the at least one HDD and the read cache includes:
[0037] A target physical storage unit is determined in the at least one HDD, wherein the size of the invalid storage space in the target physical storage unit is greater than or equal to a preset threshold, and the data stored in the invalid storage space is invalid data;
[0038] Based on the access frequency of each data in the read cache, a first data is determined in the read cache, wherein the access frequency of the first data is less than or equal to a first threshold.
[0039] The data to be migrated includes: data in the available storage space of the target physical storage unit, and the first data.
[0040] In one possible implementation, the read cache is a solid-state drive (SSD).
[0041] Secondly, embodiments of this application provide an electronic device including the data storage system described in any of the first aspects.
[0042] This application provides a data storage system and device. The data storage system may include a processor, memory, a read cache, and at least one hard disk drive (HDD). The processor can be connected to the memory, read cache, and HDD respectively. Because data can be written to the HDD in a sequential manner according to physical addresses, the time spent on repeated seeks and switching of the HDD head is reduced, improving the HDD's write performance. Furthermore, because the read cache can use a large-capacity, low-cost solid-state drive (SSD), the data read performance is improved. Therefore, combining these two aspects improves the read / write balance of the data storage system. Attached Figure Description
[0043] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0044] Figure 1 A schematic diagram illustrating an application scenario provided for an exemplary embodiment of this application;
[0045] Figure 2 A schematic diagram of the structure of a data storage system provided for an exemplary embodiment of this application;
[0046] Figure 3 A flowchart illustrating a data writing method provided for an exemplary embodiment of this application;
[0047] Figure 4 A schematic diagram illustrating a data writing method provided for an exemplary embodiment of this application;
[0048] Figure 5 A flowchart illustrating a data reading method provided for an exemplary embodiment of this application;
[0049] Figure 6 A schematic diagram illustrating a data reading method provided as an exemplary embodiment of this application;
[0050] Figure 7 A flowchart illustrating a data migration method provided for an exemplary embodiment of this application;
[0051] Figure 8 A schematic diagram illustrating a data migration method provided as an exemplary embodiment of this application;
[0052] Figure 9 This is a schematic diagram of the structure of an electronic device provided as an exemplary embodiment of this application. Detailed Implementation
[0053] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0054] Figure 1 This is a schematic diagram illustrating an application scenario provided for an exemplary embodiment of this application. Please refer to [link / reference]. Figure 1Electronic devices may include a data storage system. The data storage system may include a processor (Central Processing Unit, CPU), a read cache, and at least one hard disk drive (HDD). For example, the at least one HDD may be designated as HDD-1, HDD-2, ..., HDD-n.
[0055] After receiving a write data request, the electronic device can use the processor to write the data to the HDD in the data storage system according to the write data request; after receiving a read data request, the electronic device can use the processor to read the data from the read cache or the HDD in the data storage system according to the read data request.
[0056] In related technologies, data is typically read from the HDD and written to the write cache. However, due to the limited head rotation speed of HDDs, their read performance is poor; and because the write cache usually uses non-volatile memory, it is over-designed so that the write performance of the write cache is better than the read performance of the HDD. Therefore, the read / write balance of the data storage system is poor.
[0057] In this embodiment, the electronic device may include a data storage system, which may include a processor, a read cache, and at least one hard disk drive (HDD). Data can be written to the HDD and read from the read cache or the HDD. Because data can be written to the HDD in a sequential manner according to physical addresses, the time spent on repeated seeks and switching of the HDD head is reduced, improving the HDD's write performance. Furthermore, because the read cache can use a large-capacity, low-cost solid-state drive (SSD), read performance is improved. Combining these two aspects improves the read / write balance of the data storage system.
[0058] The technical solutions shown in this application will now be described in detail through specific embodiments. It should be noted that the following embodiments may exist independently or in combination with each other; for identical or similar content, the description will not be repeated in different embodiments.
[0059] Figure 2 This is a schematic diagram of a data storage system provided for an exemplary embodiment of this application. Please refer to [link / reference]. Figure 2 The data storage system may include a processor, memory, a read cache, and at least one hard disk drive (HDD). The processor may be connected to the memory, read cache, and HDD, respectively.
[0060] The memory can be dynamic random access memory (DRAM) in dual-inline-memory modules (DIMMs).
[0061] The read cache can be a solid-state drive (SSD).
[0062] At least one hard disk drive (HDD) can be designated as HDD-1, HDD-2, ..., HDD-n.
[0063] Optionally, memory can be used to store an address mapping table. The address mapping table may include the correspondence between logical block addresses (LBAs) and physical addresses (PBAs) in the HDD, as well as physical addresses in the read cache.
[0064] Among them, the physical address (PBA) is the actual address that exists in the HDD or read cache, also known as the absolute address; the logical address (LBA) is the address generated by the CPU, also known as the relative address.
[0065] In one alternative embodiment, the address mapping table may include multiple logical addresses and a merged physical address corresponding to each logical address.
[0066] Optionally, the merged physical address includes a first field and a second field. The first field can be used to store the physical address in the HDD corresponding to the logical address; the second field can be used to store the physical address in the read cache corresponding to the logical address. If the physical address in the HDD can be represented as HDD PBA and the physical address in the read cache can be represented as SSD PBA, then the merged physical address can be represented as HDD PBA + SSD PBA.
[0067] For example, an address mapping table can include m logical addresses and the combined physical address corresponding to each logical address, as shown in Table 1:
[0068] Table 1
[0069] Logical address Merging physical addresses LBA-1 HDD PBA-1+SSD PBA-1 LBA-2 HDD PBA-2 + SSD PBA-2 …… …… LBA-m HDD PBA-m+SSD PBA-m
[0070] As shown in Table 1, LBA-1 can correspond to merged physical address -1, i.e., HDD PBA-1 + SSD PBA-1; LBA-2 can correspond to merged physical address -2, i.e., HDD PBA-2 + SSD PBA-2; ...; LBA-m can correspond to merged physical address -m, i.e., HDDPBA-m + SSD PBA-m.
[0071] Optionally, the processor can be used to write data to the HDD in a contiguous manner of physical addresses and update the address mapping table.
[0072] The method of writing data in contiguous physical address order refers to writing data in consecutive physical addresses. For example, if physical address 1, physical address 2, and physical address 3 are contiguous, data can be written to physical address 1, and after it is full, data can be written to physical address 2. Similarly, after physical address 2 is full, data can be written to physical address 3.
[0073] In an optional embodiment, data can be written to the HDD and the address mapping table updated in the following manner: the target physical address is determined in the HDD in a manner that ensures contiguous physical addresses; data is written to the HDD based on the target physical address; and the address mapping table is updated based on the target physical address.
[0074] For example, if the data to be written is data -1, and the target physical address in the HDD is determined to be HDD PBA-2 according to the contiguous physical address method, then data -1 can be written into the HDD according to HDD PBA-2, and the address mapping table can be updated according to HDD PBA-2.
[0075] Optionally, the processor can also read data from the read cache or HDD based on an address mapping table. For example, the processor can determine a first logical address of the data to be read and determine the corresponding first merged physical address in the address mapping table based on the first logical address. Since the first merged physical address includes the physical address of the data to be read in the HDD and the physical address in the read cache, the data can be read from the HDD or the read cache based on the first merged physical address.
[0076] In this embodiment, the data storage system may include a processor, memory, a read cache, and at least one hard disk drive (HDD). The processor may be connected to the memory, read cache, and HDD. Because data can be written to the HDD in a sequential manner according to physical addresses, the time spent on repeated seeks and switching of the HDD head is reduced, improving the HDD's write performance. Furthermore, because the read cache can use a large-capacity, low-cost solid-state drive (SSD), the data read performance is improved. Therefore, combining these two aspects improves the read / write balance of the data storage system.
[0077] Below, in Figure 2 Based on the illustrated embodiments, combined with Figure 3 The process of writing data and updating the address mapping table in this data storage system is described in detail.
[0078] Figure 3 This is a flowchart illustrating a data writing method provided for an exemplary embodiment of this application. Please refer to [link / reference]. Figure 3 The method may include:
[0079] S301. Determine the current physical address of the HDD's read / write head.
[0080] Optionally, the processor can determine the current physical address where the HDD's head is currently located.
[0081] For example, the processor can determine that the current physical address of the HDD head is HDD PBA-1.
[0082] S302. Determine the current physical address as the target physical address.
[0083] For example, if the current physical address is HDD PBA-1, then HDD PBA-1 can be determined as the target physical address.
[0084] S303. Write data into the HDD according to the target physical address.
[0085] For example, if the data to be written is data-1 and the target physical address is HDD PBA-1, then data-1 can be written to the HDD according to HDDPBA-1.
[0086] S304. Determine the target logical address corresponding to the target physical address.
[0087] Optionally, after writing data to the target physical address, the processor can determine the target logical address corresponding to the target physical address based on the target physical address.
[0088] For example, if the target physical address is HDD PBA-1, after writing data -1 into HDD PBA-1, the processor can determine the corresponding target logical address based on HDD PBA-1, assuming the corresponding target logical address is LBA-1.
[0089] S305. Determine whether the target physical address and target logical address exist in the address mapping table.
[0090] Alternatively, the processor can determine whether the target physical address and the target logical address exist in the address mapping table.
[0091] If so, since the target physical address and target logical address already exist in the address mapping table, there is no need to add the target physical address and target logical address to the address mapping table.
[0092] If not, then since the target physical address and target logical address do not exist in the address mapping table, S306 can be executed.
[0093] For example, if the target physical address is HDD PBA-1 and the target logical address is LBA-1, if HDD PBA-1 and LBA-1 exist in the address mapping table, then there is no need to add HDD PBA-1 and LBA-1 to the address mapping table; if HDD PBA-1 and LBA-1 do not exist in the address mapping table, then S306 can be executed.
[0094] S306. Add the target physical address and target logical address to the address mapping table.
[0095] For example, if the target physical address is HDD PBA-1 and the target logical address is LBA-1, and HDD PBA-1 and LBA-1 do not exist in the address mapping table, then HDD PBA-1 and LBA-1 can be added to the address mapping table accordingly.
[0096] In this embodiment, the processor in the data storage system can determine the current physical address of the HDD's read / write head and identify this physical address as the target physical address. Data can then be written to the HDD based on the target physical address. The processor can determine the target logical address corresponding to the target physical address and check if the target physical address and target logical address exist in the address mapping table. If the address mapping table does not contain the target physical address and target logical address, then the target physical address and target logical address are added to the address mapping table accordingly. Since data can be written to the HDD sequentially according to physical addresses, the time spent on repeated seeks and switching of the HDD head is reduced, thus improving the HDD's write performance.
[0097] Below, based on any of the above embodiments, combined with Figure 4 The process of writing data and updating the address mapping table is further explained in detail with specific examples.
[0098] Figure 4 This is a schematic diagram illustrating a data writing method provided for an exemplary embodiment of this application. Please refer to... Figure 4 This includes steps ①②③.
[0099] like Figure 4 In this system, the data storage system may include a processor, memory, a read cache, and at least one HDD. The processor may be connected to the memory, the read cache, and the HDD, respectively.
[0100] The memory can store an address mapping table, which can include multiple logical addresses and their corresponding merged physical addresses. For example, the address mapping table can include LBA-1 and its corresponding HDD-1PBA-1+SSD PBA-1, and LBA-2 and its corresponding HDD-1PBA-2+SSD PBA-2.
[0101] At least one HDD can be HDD-1, HDD-2, ..., HDD-n.
[0102] For any given HDD, it can contain multiple physical addresses. For example, HDD-1 can contain five physical addresses: HDD-1PBA-1, HDD-1PBA-2, HDD-1PBA-3, HDD-1PBA-4, and HDD-1PBA-5.
[0103] In step ①, the processor can receive a write data request. After receiving the write data request, the processor can determine the current HDD and the current physical address of the HDD's read / write head, and then set the current physical address as the target physical address. For example, if the processor determines that the current HDD is HDD-1 and that the current physical address of HDD-1's read / write head is HDD-1PBA-3, then HDD-1PBA-3 can be set as the target physical address.
[0104] In step ②, the processor can write data to the HDD in a contiguous manner according to the target physical address. For example, if the target physical address is HDD-1PBA-3 and the write request includes the data -1, then the processor can write the data -1 to HDD-1PBA-3 in a contiguous manner according to the physical address.
[0105] Optionally, after writing data based on the target physical address, the processor can determine the target logical address corresponding to the target physical address. For example, if the target physical address is HDD-1PBA-3, the processor can determine the corresponding target logical address based on HDD-1PBA-3. Assume the determined target logical address is LBA-3.
[0106] In step ③, the processor can update the address mapping table based on the target physical address and the target logical address.
[0107] Specifically, the processor can determine whether the target physical address and target logical address exist in the address mapping table of memory. If they exist, there is no need to add them to the address mapping table since they already exist. If they do not exist, the target physical address and target logical address can be added to the address mapping table accordingly.
[0108] For example, if the target physical address is HDD-1PBA-3 and the target logical address is LBA-3, and if the address mapping table includes LBA-1 and its corresponding HDD-1PBA-1, and LBA-2 and its corresponding HDD-1PBA-2, then the processor can determine whether HDD-1PBA-3 and LBA-3 exist in the address mapping table based on HDD-1PBA-3 and LBA-3. Since the address mapping table includes LBA-1 and its corresponding HDD-1PBA-1, and LBA-2 and its corresponding HDD-1PBA-2, and does not contain HDD-1PBA-3 and LBA-3, the processor can add HDD-1PBA-3 and LBA-3 to the address mapping table accordingly.
[0109] It should be noted that since the address mapping table includes logical addresses and merged physical addresses, and the merged physical address includes a first field and a second field, the first field can be used to store the physical address in the HDD corresponding to the logical address; the second field can be used to store the physical address in the read cache corresponding to the logical address. After the processor writes the data -1 to HDD-1PBA-3, it does not write the data -1 to the read cache. Therefore, when the address mapping table includes HDD-1PBA-3 and LBA-3, the processor can store it as LBA-3 and HDD-1PBA-3+SSD PBA-3 respectively. Here, SSD PBA-3 is invalid data. If the processor writes the data -1 to SSD PBA-3, then SSD PBA-3 is valid data.
[0110] Optionally, the processor can also write data with an access frequency greater than a first threshold into the read cache based on the access frequency of the data in the HDD, in order to reduce read latency and improve read performance.
[0111] In this embodiment, the processor in the data storage system can determine the current physical address of the HDD's read / write head and identify this physical address as the target physical address. Data can then be written to the HDD based on the target physical address. The processor can determine the target logical address corresponding to the target physical address and check if the target physical address and target logical address exist in the address mapping table. If the address mapping table does not contain the target physical address and target logical address, then the target physical address and target logical address are added to the address mapping table accordingly. Since data can be written to the HDD sequentially according to physical addresses, the time spent on repeated seeks and switching of the HDD head is reduced, thus improving the HDD's write performance.
[0112] Below, in Figure 2 Based on the illustrated embodiments, combined with Figure 5 The process of reading data from this data storage system is described in detail.
[0113] Figure 5 A flowchart illustrating a data reading method provided for an exemplary embodiment of this application can be found in the following diagram: Figure 5 The method may include:
[0114] S501. Determine the first logical address of the data to be read.
[0115] Alternatively, the processor can determine the first logical address of the data to be read from the address mapping table in memory.
[0116] For example, if the data to be read is data-1, the processor can determine the first logical address in the address mapping table based on data-1. Let's assume that the first logical address of data-1 is LBA-1.
[0117] S502. Determine the first merged physical address in the address mapping table based on the first logical address.
[0118] Since the address mapping table includes multiple logical addresses and the merged physical address corresponding to each logical address, the processor can determine the first merged physical address from the address mapping table based on the first logical address.
[0119] For example, if the first logical address of data-1 is LBA-1, the processor can determine the first merged physical address in the address mapping table based on the first logical address LBA-1. Assume the first merged physical address is HDD PBA-1+SSD PBA-1.
[0120] S503. Obtain the read cache physical address from the second field in the first merged physical address.
[0121] Since the merged physical address includes a first field and a second field, where the second field is used to store the physical address in the read cache corresponding to the logical address, the processor can obtain the read cache physical address from the second field in the first merged physical address.
[0122] For example, if the first merged physical address is HDD PBA-1+SSD PBA-1, the processor can determine the read cache physical address as SSD PBA-1 from the first merged physical address.
[0123] S504. Determine whether the physical address of the read cache is a valid address.
[0124] Optionally, the processor can determine whether the physical address of the read cache is a valid address. If yes, it means that the physical address of the read cache contains data to be read, and S505 can be executed; if no, it means that the physical address of the read cache does not contain data to be read, and S506 can be executed.
[0125] For example, if the data to be read is data-1 and the physical address of the read cache is SSD PBA-1, the processor can determine whether SSD PBA-1 is a valid address. If it is, it means that data-1 is stored in SSD PBA-1, and S505 can be executed; if not, it means that data-1 does not exist in SSD PBA-1, and S506 can be executed.
[0126] S505: Read data from the read cache based on the physical address of the read cache.
[0127] Since the physical address of the read cache is a valid address, the physical address of the read cache contains the data to be read, and the processor can read the data from the read cache according to the physical address of the read cache.
[0128] For example, if the data to be read is data-1, and the physical address of the read cache is SSD PBA-1, and it is a valid address, then the processor can read data-1 from the read cache based on SSD PBA-1.
[0129] S506. Obtain the HDD physical address from the first field of the first merged physical address.
[0130] Since the merged physical address includes a first field and a second field, where the first field is used to store the physical address in the HDD corresponding to the logical address, the processor can obtain the HDD physical address from the first field in the first merged physical address.
[0131] For example, if the first merged physical address is HDD PBA-1+SSD PBA-1, the processor can determine the HDD physical address as HDD PBA-1 from the first merged physical address.
[0132] S507. Determine whether the HDD physical address is a valid address.
[0133] Optionally, the processor can determine whether the HDD physical address is a valid address. If yes, it means that the HDD physical address contains data to be read, and S508 can be executed; if no, it means that the HDD physical address does not contain data to be read, and since neither the read cache physical address nor the HDD physical address contains the data to be read, the data to be read is invalid.
[0134] For example, if the data to be read is data-1 and the HDD physical address is HDD PBA-1, the processor can determine whether HDDPBA-1 is a valid address. If it is, it means that data-1 is stored in HDD PBA-1, and S508 can be executed. If not, it means that data-1 does not exist in HDD PBA-1. Since data-1 does not exist in either the read cache physical address or the HDD physical address, data-1 is invalid.
[0135] S508: Read data from the HDD based on the HDD's physical address.
[0136] Since the HDD physical address is a valid address, the HDD physical address contains the data to be read, and the processor can read the data from the HDD based on the HDD physical address.
[0137] For example, if the data to be read is data-1, and the physical address of the HDD is HDD PBA-1, which is a valid address, then the processor can read data-1 from the HDD based on HDD PBA-1.
[0138] In this embodiment, the processor in the data storage system can determine the first logical address of the data to be read, and determine the first merged physical address in the address mapping table based on the first logical address. The processor can obtain the read cache physical address from the second field of the first merged physical address. If the read cache physical address is a valid address, the processor can read data from the read cache according to the read cache physical address; if the read cache physical address is an invalid address, the processor can obtain the HDD physical address from the first field of the first merged physical address, and read data from the HDD according to the HDD physical address if the HDD physical address is a valid address. Since the processor can read data from the read cache, and the read cache can use a large-capacity, low-cost solid-state drive (SSD), the number of random reads on the HDD is reduced, thus improving the performance of reading data.
[0139] Below, based on any of the above embodiments, combined with Figure 6 The process of reading data will be explained in further detail with specific examples.
[0140] Figure 6 Please refer to the schematic diagram of a data reading method provided for an exemplary embodiment of this application. Figure 6 This includes steps ①②③④.
[0141] like Figure 6 In this system, the data storage system may include a processor, memory, a read cache, and at least one HDD. The processor may be connected to the memory, the read cache, and the HDD, respectively.
[0142] The memory can store an address mapping table, which can include multiple logical addresses and their corresponding merged physical addresses. For example, the address mapping table can include LBA-1 and its corresponding HDD-1PBA-1+SSD PBA-1, LBA-2 and its corresponding HDD-1PBA-2+SSD PBA-2, ..., LBA-5 and its corresponding HDD-1PBA-5+SSD PBA-5, etc.
[0143] At least one HDD can be HDD-1, HDD-2, ..., HDD-n.
[0144] For any given HDD, it can contain multiple physical addresses. For example, HDD-1 can contain five physical addresses: HDD-1PBA-1, HDD-1PBA-2, HDD-1PBA-3, HDD-1PBA-4, and HDD-1PBA-5.
[0145] The read cache can include multiple physical addresses. For example, the read cache can include SSD PBA-1, SSD PBA-2, ..., SSD PBA-k.
[0146] In step ①, the processor may receive a data read request. For example, the processor may receive a data read request that includes an identifier for data -1.
[0147] In step ②, the processor can determine the first merged physical address of the data to be read.
[0148] Specifically, the processor can determine the first logical address of the data to be read in the address mapping table, and then determine the first merged physical address in the address mapping table based on the first logical address. For example, if the data read request includes data -1, the processor can determine the first logical address of data -1 in the address mapping table. If the first logical address of data -1 is LBA-1, the processor can determine the corresponding first merged physical address as HDD-1PBA-1+SSD PBA-1 in the address mapping table based on LBA-1.
[0149] Since the merged physical address includes a first field and a second field, where the second field stores the physical address in the read cache corresponding to the logical address, the processor can obtain the read cache physical address from the second field of the first merged physical address. For example, if the first merged physical address is HDD PBA-1+SSD PBA-1, the processor can determine the read cache physical address as SSD PBA-1 from the first merged physical address.
[0150] In step ③, the processor can read data from the read cache according to the physical address of the read cache.
[0151] Specifically, the processor can determine whether the read cache physical address is a valid address. If yes, it can read data from the read cache based on the read cache physical address; otherwise, it obtains the HDD physical address from the first field of the first merged physical address. For example, if the read data request includes an identifier for data -1, and if the first merged physical address is HDD PBA-1+SSD PBA-1, where the read cache physical address is SSD PBA-1, the processor can determine whether SSD PBA-1 is a valid address. If yes, it means that SSD PBA-1 contains data -1, and the processor can read data -1 from the read cache based on SSD PBA-1; if no, it means that SSD PBA-1 does not contain data -1, and the processor can determine the HDD physical address as HDD PBA-1 from the first merged physical address.
[0152] In step ④, the processor can read data from the HDD based on the HDD's physical address.
[0153] Specifically, the processor can determine whether the HDD physical address is a valid address. If it is, data can be read from the HDD based on the HDD physical address; if not, since there is no data to be read at either the read cache physical address or the HDD physical address, the data to be read is invalid.
[0154] For example, if a read request includes the identifier for data -1, and the HDD physical address is HDD PBA-1, the processor can determine whether HDD PBA-1 is a valid address. If it is, the processor can read data -1 from the HDD based on HDD PBA-1; otherwise, since neither SSD PBA-1 nor HDD PBA-1 contains data -1, it indicates that data -1 is invalid.
[0155] It should be noted that the execution order of steps ③ and ④ is not important.
[0156] In this embodiment, the processor in the data storage system can determine the first logical address of the data to be read, and determine the first merged physical address in the address mapping table based on the first logical address. The processor can obtain the read cache physical address from the second field of the first merged physical address. If the read cache physical address is a valid address, the processor can read data from the read cache according to the read cache physical address; if the read cache physical address is an invalid address, the processor can obtain the HDD physical address from the first field of the first merged physical address, and read data from the HDD according to the HDD physical address if the HDD physical address is a valid address. Since the processor can read data from the read cache, and the read cache can use a large-capacity, low-cost solid-state drive (SSD), the number of random reads on the HDD is reduced, thus improving the performance of reading data.
[0157] Optionally, Figure 2 The processor in the data storage system shown can also be used to determine the data to be migrated in at least one HDD and read cache, determine the target HDD corresponding to the data to be migrated and the first physical address in the target HDD, and then write the data to be migrated to the target HDD according to the first physical address and update the address mapping table.
[0158] Below, in conjunction with Figure 7 The process of migrating data will be explained.
[0159] Figure 7 This is a flowchart illustrating a data migration method provided for an exemplary embodiment of this application. Please refer to [link / reference]. Figure 7 The method may include:
[0160] S701. Identify a target physical storage unit in at least one HDD.
[0161] An HDD can include multiple physical storage units, which can be tracks.
[0162] Optionally, the processor may determine the target physical storage unit among multiple physical storage units of at least one HDD.
[0163] The target physical storage unit may include valid storage space and invalid storage space. Valid storage space stores valid data; invalid storage space stores invalid data, and the size of the invalid storage space is greater than or equal to a preset threshold.
[0164] Invalid data can be deleted data, expired data, etc.
[0165] For example, if the preset threshold is 90%, the processor can determine the target physical storage unit in HDD-1 as physical storage unit-1. Physical storage unit-1 can include valid storage space-1 and invalid storage space-1. The size of valid storage space-1 can be 8% of physical storage unit-1, and the data stored in valid storage space-1 is valid data; the size of invalid storage space-1 can be 92% of physical storage unit-1, and the data stored in invalid storage space-1 is invalid data.
[0166] S702. Determine the first data in the read cache based on the access frequency of each data in the read cache.
[0167] The access popularity of the first data can be less than or equal to the first threshold.
[0168] Access popularity can be defined as the number of times data is read per second. For example, if the access popularity of data -1 is 100 times / s (second), it means that data -1 was read 100 times in 1 second.
[0169] The first threshold can be a manually preset threshold. For example, the first threshold could be 20 times / second.
[0170] Optionally, the processor can determine the access frequency of each piece of data in the read cache, and determine the first piece of data in the read cache based on the access frequency of each piece of data in the read cache.
[0171] For example, if the read cache contains 100 data items, namely data-1, data-2, data-3, ..., data-100, and data-2 has an access frequency of 20 times / second, while data-3 has an access frequency of 18 times / second, then data-2 and data-3 can be identified as the first data items.
[0172] S703, The data to be migrated includes: data in the effective storage space of the target physical storage unit, and the first data.
[0173] For example, if the data stored in the effective storage space of the target physical storage unit includes 10 data items, namely data-1, data-2, data-3, ..., data-10, and the first data in the read cache includes data-11 and data-12, then it can be determined that the data to be migrated includes data-1, data-2, data-3, ..., data-10, as well as data-11 and data-12.
[0174] S704. Determine the target HDD and the first physical address in the target HDD corresponding to the data to be migrated.
[0175] The target HDD can be the HDD that receives the data to be migrated. The target HDD may include multiple physical addresses, including a first physical address.
[0176] Optionally, the processor can determine the target HDD corresponding to the data to be migrated and the first physical address within the target HDD. For example, if the data to be migrated includes data-1, data-2, data-3, ..., data-10 and data-11, data-12, then the processor can determine the target HDD corresponding to the data to be migrated and the first physical address within the target HDD. Assuming the target HDD is HDD-2, the first physical address within HDD-2 can be HDD PBA-1.
[0177] S705. Based on the first physical address, write the data to be migrated to the target HDD and update the address mapping table.
[0178] For example, if the data to be migrated includes data-1, data-2, data-3, ..., data-10 and data-11, data-12, and if the target HDD is HDD-2, the first physical address in HDD-2 can be HDD PBA-1. Then the processor can write the data to be migrated into HDD PBA-1 of HDD-2 and update the address mapping table according to HDD PBA-1.
[0179] It should be noted that the process of updating the address mapping table can be found in steps S304-S306, and will not be repeated here.
[0180] In this embodiment, the processor can determine a target physical storage unit in at least one HDD, and determine the effective storage space and invalid storage space in the target physical storage unit, thereby determining the data in the effective storage space. The processor can determine first data in the read cache based on the access frequency of each data item. The processor can determine the data to be migrated based on the data in the effective storage space of the target physical storage unit and the first data, and determine the target HDD corresponding to the data to be migrated and the first physical address in the target HDD. Then, based on the first physical address, the data to be migrated is written to the target HDD, and the address mapping table is updated. Due to the characteristics of HDDs, after data migration, the data in the original target physical storage unit does not need to be erased; it can be directly overwritten when writing new data, saving the time and energy required for HDD erasure, thereby improving the HDD's write performance.
[0181] Below, based on any of the above embodiments, combined with Figure 8 The process of migrating data will be explained in further detail with specific examples.
[0182] Figure 8This is a schematic diagram illustrating a data migration method provided for an exemplary embodiment of this application. Please refer to [link / reference]. Figure 8 This includes steps ①②③④.
[0183] like Figure 8 In this system, the data storage system may include a processor, memory, a read cache, and at least one HDD. The processor may be connected to the memory, the read cache, and the HDD, respectively.
[0184] The memory can store an address mapping table, which can include multiple logical addresses and their corresponding merged physical addresses.
[0185] At least one HDD can be HDD-1, HDD-2, ..., HDD-n.
[0186] For any given HDD, it may include multiple physical storage units. For example, HDD-1 may include physical storage unit 1, physical storage unit 2, ..., physical storage unit s.
[0187] For any given HDD, it can include multiple physical addresses. For example, HDD-2 can include 5 physical addresses, namely HDD-2PBA-1, HDD-2PBA-2, HDD-2PBA-3, HDD-2PBA-4, ..., HDD-2PBA-z.
[0188] It should be noted that a single physical storage unit can include multiple physical addresses. For example, a physical storage unit can be a track of an HDD, and a single track can include multiple physical addresses.
[0189] A read cache can hold multiple data items. For example, a read cache can contain data-1, data-2, ..., data-k.
[0190] In step ①, the processor can determine the valid data in the target physical storage unit.
[0191] Specifically, the processor can determine a target physical storage unit among multiple physical storage units of at least one HDD. The target physical storage unit can store both invalid and valid data. The invalid storage space occupied by the invalid data is greater than or equal to a preset threshold. The processor can then determine the valid data within the target physical storage unit. For example, the processor can determine that the target physical storage unit in HDD-1 is physical storage unit 1, which can store both invalid and valid data. If the preset threshold is 90%, the invalid storage space occupied by the invalid data can be 95% of that in physical storage unit-1. The processor can then determine the valid data in physical storage unit 1.
[0192] In step ②, the processor can determine the access frequency of each piece of data in the read cache and identify data with an access frequency less than or equal to a first threshold as the first data. For example, if the first threshold is 20 times / s, and the read cache includes data-1, data-2, ..., data-k, where data-1 has an access frequency of 20 times / s and data-2 has an access frequency of 18 times / s, then data-1 and data-2 can be identified as the first data.
[0193] It should be noted that the execution of steps ① and ② is not sequential.
[0194] Optionally, the processor may determine that the data to be migrated includes: data in the available storage space in the target physical storage unit, and first data. For example, the processor may determine that the data to be migrated includes data stored in the available storage space in physical storage unit 1, as well as data-1 and data-2.
[0195] In step ③, the processor can write the data to be migrated to the target HDD in a manner that follows a contiguous physical address sequence.
[0196] Specifically, the processor can determine the target HDD corresponding to the data to be migrated and the first physical address in the target HDD, and write the data to be migrated to the target HDD according to the first physical address.
[0197] For example, if the data to be migrated includes valid data in physical storage unit 1, as well as data-1 and data-2, and if the processor determines that the target HDD corresponding to the data to be migrated is HDD-2 and the first physical address is HDD-2PBA-1, then the processor can migrate the valid data in physical storage unit 1, as well as data-1 and data-2, to HDD-2PBA-1.
[0198] In step ④, the processor can update the address mapping table based on the first physical address in the target HDD.
[0199] It should be noted that the process of updating the address mapping table can be found in steps S304-S306, and will not be repeated here.
[0200] In this embodiment, the processor can determine a target physical storage unit in at least one HDD, and determine the effective storage space and invalid storage space in the target physical storage unit, thereby determining the data in the effective storage space. The processor can determine first data in the read cache based on the access frequency of each data item. The processor can determine the data to be migrated based on the data in the effective storage space of the target physical storage unit and the first data, and determine the target HDD corresponding to the data to be migrated and the first physical address in the target HDD. Then, based on the first physical address, the data to be migrated is written to the target HDD, and the address mapping table is updated. Due to the characteristics of HDDs, after data migration, the data in the original target physical storage unit does not need to be erased; it can be directly overwritten when writing new data, saving the time and energy required for HDD erasure, thereby improving the HDD's write performance.
[0201] Figure 9 For a schematic diagram of an electronic device provided as an exemplary embodiment of this application, please refer to [link / reference]. Figure 9 The electronic device may include a data storage system, which may include a processor, memory, a read cache, and at least one HDD. The processor may be connected to the memory, the read cache, and the HDD, respectively.
[0202] Optionally, memory can be used to store an address mapping table. The address mapping table may include multiple logical addresses and the combined physical address corresponding to each logical address.
[0203] Optionally, the merged physical address includes a first field and a second field. The first field can be used to store the physical address in the HDD corresponding to the logical address; the second field can be used to store the physical address in the read cache corresponding to the logical address.
[0204] Optionally, the processor can determine the target physical address in the HDD in a contiguous manner, write data in the HDD according to the target physical address, and then update the address mapping table according to the target physical address.
[0205] Optionally, the processor can also read data from the read cache or HDD according to the address mapping table. That is, the processor can determine the first logical address of the data to be read and determine the corresponding first merged physical address in the address mapping table based on the first logical address. Since the first merged physical address includes the physical address of the data to be read in the HDD and the physical address in the read cache, the data can be read from the HDD or the read cache according to the first merged physical address.
[0206] Optionally, the processor can also be used to determine the data to be migrated in at least one HDD and read cache, determine the target HDD corresponding to the data to be migrated and the first physical address in the target HDD, and then write the data to be migrated to the target HDD according to the first physical address and update the address mapping table.
[0207] In this embodiment, the electronic device may include a data storage system, which may include a processor, memory, a read cache, and at least one HDD. The processor may be connected to the memory, the read cache, and the HDD. Because data can be written to the HDD in a sequential manner according to physical addresses, the time spent on repeated seeks and switching of the HDD head is reduced, improving the HDD's write performance. Furthermore, because the read cache can use a large-capacity, low-cost solid-state drive (SSD), the data read performance is improved. Therefore, combining these two aspects improves the read / write balance of the data storage system.
[0208] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0209] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0210] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0211] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0212] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.
[0213] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.
[0214] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.
[0215] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0216] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.
Claims
1. A data storage system, characterized in that, It includes a processor, memory, a read cache, and at least one hard disk drive (HDD), wherein the processor is connected to the memory, the read cache, and the HDD, respectively. The memory is used to store an address mapping table, which includes the correspondence between logical addresses and physical addresses in the HDD, as well as physical addresses in the read cache. The processor is used to write data to the HDD in a contiguous manner according to physical addresses and to update the address mapping table; The processor is also configured to read data from the read cache or the HDD according to the address mapping table.
2. The system according to claim 1, characterized in that, Writing data to the HDD in a contiguous manner according to physical addresses and updating the address mapping table includes: The target physical address is determined in the HDD in a manner that ensures contiguous physical addresses. Write data into the HDD according to the target physical address; Update the address mapping table based on the target physical address.
3. The system according to claim 2, characterized in that, The target physical address is determined in the HDD in a manner that ensures contiguous physical addresses, including: Determine the current physical address of the HDD's read / write head; The current physical address is determined as the target physical address.
4. The system according to claim 2 or 3, characterized in that, Updating the address mapping table based on the target physical address includes: Determine the target logical address corresponding to the target physical address; If the address mapping table does not include the target physical address and the target logical address, then the target physical address and the target logical address are added to the address mapping table accordingly.
5. The system according to any one of claims 1-4, characterized in that, The address mapping table includes multiple logical addresses and a merged physical address corresponding to each logical address, wherein, The merged physical address includes a first field and a second field; The first field is used to store the physical address in the HDD corresponding to the logical address; The second field is used to store the physical address in the read cache corresponding to the logical address.
6. The system according to claim 5, characterized in that, Reading data from the read cache or the HDD according to the address mapping table includes: Determine the first logical address of the data to be read; Based on the first logical address, determine the first merged physical address in the address mapping table; Data is read from the read cache or the HDD based on the first merged physical address.
7. The system according to claim 6, characterized in that, Based on the first merged physical address, data is read from the read cache or the HDD, including: Obtain the read cache physical address from the second field in the first merged physical address; If the physical address of the read cache is a valid address, then read the data from the read cache according to the physical address of the read cache; If the read cache physical address is invalid, the HDD physical address is obtained from the first field of the first merged physical address. If the HDD physical address is valid, data is read from the HDD according to the HDD physical address.
8. The system according to any one of claims 1-7, characterized in that, The processor is also used for: The data to be migrated is determined in the at least one HDD and the read cache; Determine the target HDD corresponding to the data to be migrated and the first physical address in the target HDD; Based on the first physical address, the data to be migrated is written to the target HDD, and the address mapping table is updated.
9. The system according to claim 8, characterized in that, Determining the data to be migrated in the at least one HDD and the read cache includes: A target physical storage unit is determined in the at least one HDD, wherein the size of the invalid storage space in the target physical storage unit is greater than or equal to a preset threshold, and the data stored in the invalid storage space is invalid data; Based on the access frequency of each data in the read cache, a first data is determined in the read cache, wherein the access frequency of the first data is less than or equal to a first threshold. The data to be migrated includes: data in the available storage space of the target physical storage unit, and the first data.
10. The system according to any one of claims 1-9, characterized in that, The read cache is a solid-state drive (SSD).
11. An electronic device, characterized in that, Includes the data storage system according to any one of claims 1-10.