Methods and systems for improving the flatness of silicon wafer surfaces

Abstract

This disclosure relates to a method and system for improving the surface flatness of a silicon wafer. The method includes: detecting the flatness of the silicon wafer surface to determine the location of a recessed region including a lowest point associated with the flatness; covering the surface with a specific material layer and removing a portion of the specific material layer corresponding to the location; depositing a silicon-containing layer on the surface covered with the specific material layer, wherein the polishing removal rate of the silicon-containing layer is less than the polishing removal rate of monocrystalline silicon; removing the remaining portion of the specific material layer; and polishing the surface of the silicon wafer after the remaining portion of the specific material layer has been removed. The method and system of this disclosure achieve improvement in the surface flatness of the silicon wafer.

Description

Technical Field

[0001] This disclosure relates to the field of silicon wafer processing and manufacturing technology, and more specifically, to methods and systems for improving the surface flatness of silicon wafers. Background Technology

[0002] With the continuous development of integrated circuit manufacturing technology, the requirements for the surface flatness of silicon wafers used as integrated circuit substrates are becoming increasingly stringent.

[0003] The flatness of a silicon wafer surface is typically represented by the thickness difference between the highest and lowest points on the surface. Flatness in different areas of the wafer surface can be evaluated using parameters such as Local Flatness (SFQR), Edge Flatness (ESFQR), and Global Flatness (GBIR).

[0004] Existing chemical mechanical polishing is a commonly used processing method to achieve high flatness. It uses a combination of chemical and mechanical actions to remove surface damage so that the surface of the silicon wafer can present a bright effect with good flatness.

[0005] However, there are limitations to using chemical mechanical polishing (CMP) to improve the flatness of silicon wafer surfaces. For example, in terms of overall flatness, once the flatness of the silicon wafer surface reaches about 100 nm, it becomes difficult to further improve the flatness of the silicon wafer surface using polishing. Summary of the Invention

[0006] This section provides a general overview of this disclosure, rather than a full disclosure of the entire scope or all features of this disclosure.

[0007] The purpose of this disclosure is to provide a method for improving the flatness of a silicon wafer surface that can further improve the flatness of the silicon wafer surface after chemical mechanical polishing.

[0008] To achieve the above objectives, according to one aspect of this disclosure, a method for improving the surface flatness of a silicon wafer is provided, comprising:

[0009] The flatness of the silicon wafer surface is measured to determine the location of a recessed region, including the lowest point associated with that flatness;

[0010] The surface is covered with a specific material layer and the portion of the specific material layer corresponding to the location is removed;

[0011] A silicon-containing layer is deposited on the surface covered with a specific material layer, wherein the polishing removal rate of the silicon-containing layer is less than that of single-crystal silicon.

[0012] Remove the remainder of a specific material layer; and

[0013] The surface of the silicon wafer, from which the specific material layer has been removed, is polished.

[0014] In the above-described method for improving the flatness of a silicon wafer surface, the specific material in the specific material layer can be photoresist, and covering the surface with the specific material layer and removing the portion of the specific material layer corresponding to the location can include spin-coating photoresist onto the surface to cover the surface with a photoresist layer and removing the portion of the photoresist layer by irradiating and dissolving it.

[0015] In the above methods for improving the flatness of silicon wafer surfaces, the photoresist can be any of PMMA, PE, PET, and PI.

[0016] In the above-mentioned method for improving the surface flatness of silicon wafers, the silicon-containing layer can be a silicon nitride layer or a silicon carbide layer.

[0017] In the above-described method for improving the surface flatness of a silicon wafer, a silicon-containing layer can be deposited on the surface covered with a specific material layer by physical vapor deposition.

[0018] In the above-mentioned methods for improving the surface flatness of silicon wafers, the deposition temperature of the physical vapor deposition method can be 350℃-550℃, and the deposition time can be 30s-120s.

[0019] In the above-described method for improving the surface flatness of a silicon wafer, polishing the surface of the silicon wafer from which the remaining portion of a particular material layer has been removed may include adsorbing the back side of the silicon wafer onto an adsorption plane and performing chemical mechanical polishing on the surface of the silicon wafer that is thus deformed.

[0020] In the above-described methods for improving the flatness of silicon wafer surfaces, the flatness can be any of the following: overall flatness, local flatness, and edge flatness.

[0021] In the above-described method for improving the flatness of a silicon wafer surface, removing the remainder of a specific material layer may include removing the remainder of the photoresist layer using an organic solvent.

[0022] According to another aspect of this disclosure, a system for improving the surface flatness of a silicon wafer is provided, comprising:

[0023] A detection unit is used to detect the flatness of the silicon wafer surface to determine the location of a recessed region including the lowest point associated with the flatness;

[0024] A covering unit, used to cover the surface with a specific material layer and remove the portion of the specific material layer corresponding to the location;

[0025] A deposition unit for depositing a silicon-containing layer on a surface covered with a specific material layer, wherein the polishing removal rate of the silicon-containing layer is less than that of single-crystal silicon.

[0026] A removal unit, used to remove the remainder of a specific material layer; and

[0027] A polishing unit is used to polish the surface of a silicon wafer from which the remaining portion of a particular material layer has been removed.

[0028] According to this disclosure, by covering the silicon wafer surface with a specific material layer and removing the portion of the specific material layer corresponding to the location of the recessed area on the silicon wafer surface, a silicon-containing layer can be deposited in the recessed area while other areas of the silicon wafer surface are not deposited with a silicon-containing layer. Furthermore, by making the polishing removal rate of the silicon-containing layer lower than that of monocrystalline silicon and polishing the silicon wafer surface after removing the remaining specific material, more monocrystalline silicon at the highest point is polished away than the silicon-containing layer at the lowest point, thereby relatively reducing the thickness of the silicon wafer at the highest point. This reduces the vertical distance between the highest and lowest points on the silicon wafer surface, thereby improving the flatness of the silicon wafer surface.

[0029] The above-described features and advantages, as well as other features and advantages, of this disclosure will become clearer from the following detailed description of exemplary embodiments of the disclosure in conjunction with the accompanying drawings. Attached Figure Description

[0030] Figure 1 A flowchart illustrating a method for improving the surface flatness of a silicon wafer according to embodiments of this disclosure; and

[0031] Figure 2 The sequence is shown Figure 1 The diagram shows the steps of the method. Detailed Implementation

[0032] The present disclosure will now be described in detail with reference to the accompanying drawings and exemplary embodiments. It should be noted that the following detailed description of the present disclosure is for illustrative purposes only and is not intended to limit the scope of the disclosure.

[0033] As mentioned earlier, the flatness of a silicon wafer surface is usually represented by the thickness difference between the highest and lowest points on the surface. In other words, the flatness of the silicon wafer surface can be represented by the vertical distance between the highest and lowest points. However, it has been found that polishing processes have certain limits to improvement. That is, after achieving a certain level of flatness, it is difficult to further improve the flatness of the silicon wafer surface using polishing processes, which means it is difficult to further reduce the vertical distance between the highest and lowest points on the silicon wafer surface using polishing processes.

[0034] To address the aforementioned issues, this disclosure attempts to reduce the vertical distance between the highest and lowest points on the silicon wafer surface by decreasing the thickness of the silicon wafer at its highest point, thereby further improving the flatness of the silicon wafer surface.

[0035] Specifically, refer to Figure 1 and Figure 2 Embodiments of this disclosure provide a method for improving the surface flatness of a silicon wafer, comprising:

[0036] S101: Detect the flatness of the silicon wafer surface to determine the location of a recessed region including the lowest point associated with the flatness;

[0037] S102: Cover the surface with a specific material layer and remove the portion of the specific material layer corresponding to the location;

[0038] S103: A silicon-containing layer is deposited on the surface covered with a specific material layer, wherein the polishing removal rate of the silicon-containing layer is less than that of single-crystal silicon.

[0039] S104: Remove the remainder of a specific material layer; and

[0040] S105: Polishing the surface of the silicon wafer from which the remaining portion of a specific material layer has been removed.

[0041] In the above method, by covering the silicon wafer surface with a specific material layer and removing the portion of the specific material layer corresponding to the location of the low-recessed area on the silicon wafer surface, a silicon-containing layer can be deposited in the low-recessed area while other areas of the silicon wafer surface are not deposited with a silicon-containing layer. Furthermore, by making the polishing removal rate of the silicon-containing layer lower than that of the single-crystal silicon and polishing the silicon wafer surface after removing the remaining specific material, more of the single-crystal silicon at the highest point is polished away compared to the silicon-containing layer at the lowest point. This results in a relative reduction in the thickness of the silicon wafer at the highest point, thereby reducing the vertical distance between the highest and lowest points on the silicon wafer surface, thus improving the flatness of the silicon wafer surface.

[0042] Understandably, during deposition, the silicon-containing layer would originally cover the entire surface of the silicon wafer. However, since the portion of the wafer surface except for the recessed areas is currently covered by a specific material layer, the silicon-containing layer is actually deposited on the remaining portion of the specific material layer and the recessed areas of the silicon wafer surface. Therefore, when the remaining portion of the specific material layer is removed, the silicon-containing layer deposited on that portion is also removed, resulting in a silicon-containing layer being deposited only on the recessed areas of the silicon wafer surface.

[0043] It is important to note that the lowest point refers to the lowest point associated with the detected flatness; that is, the lowest of the highest and lowest points involved in representing that flatness. For example, for overall flatness, the lowest point is the lowest point detected over the entire surface of the silicon wafer, while for local flatness, the lowest point is the lowest point detected over the local surface of the silicon wafer being evaluated. In this case, improvements to the silicon wafer surface flatness can be made for overall flatness (measuring the flatness of the entire silicon wafer surface), local flatness (measuring the flatness of a specific portion of the silicon wafer surface), edge flatness (measuring the flatness of the edge portion of the silicon wafer surface), and other types of flatness.

[0044] After detecting the location of the lowest point, the location of the recessed area on the silicon wafer surface, including the lowest point, needs to be determined so that the recessed area can be subsequently polished. This recessed area can be determined based on the actual surface unevenness near the lowest point.

[0045] Understandably, in polishing, the polishing removal rate can be either the chemical reaction rate or the physical removal rate. When the polishing removal rate of the silicon-containing layer is lower than that of monocrystalline silicon, since the highest point and its vicinity are monocrystalline silicon while the lowest point and its vicinity are silicon-containing layers, more monocrystalline silicon will be removed during polishing, thus reducing the vertical distance between the highest and lowest points. It is conceivable that a portion of the silicon-containing layer can be removed through polishing, or even the entire silicon-containing layer can be removed. In either case, the difference in polishing removal rates between the silicon-containing layer and the monocrystalline layer will relatively reduce the thickness at the highest point, thereby improving the flatness of the silicon wafer surface.

[0046] According to embodiments of this disclosure, the specific material in a specific material layer can be photoresist, and as... Figure 2 As shown in S102, covering the surface with a specific material layer and removing the portion of the specific material layer corresponding to the location may include spin-coating photoresist onto the surface 10 of the silicon wafer 1 to cover the surface 10 with a photoresist layer 11, and removing the portion 11a of the photoresist layer 11 corresponding to the location of the recessed region 10a of the surface 10 by irradiation and dissolution.

[0047] The recessed region 10a and the corresponding portion 11a are shown in S101 in the area between the two dashed lines.

[0048] After the photoresist is spin-coated onto the surface of the silicon wafer to form a photoresist layer, the photoresist layer can be selectively irradiated with light of a specific wavelength. That is, the portion 11a of the photoresist layer 11 corresponding to the position of the recessed region 10a is irradiated. The light will cause the irradiated portion to undergo a photochemical reaction and be modified to become more soluble in acid or alkaline solutions. Thus, the irradiated portion 11a can be removed by acid or alkaline solutions.

[0049] Before spin-coating photoresist onto the surface of a silicon wafer, the process may include steps for cleaning and drying the silicon wafer to improve the adhesion of the photoresist to the silicon wafer surface.

[0050] It is conceivable that the photoresist can be polymethyl methacrylate (PMMA), polyethylene (PE), polyethylene terephthalate (PET), polyimide (PI), or any other suitable photoresist.

[0051] It is conceivable that the specific material layer could also be a layer formed of other suitable materials, as long as it can cover the portion of the silicon wafer surface other than the recessed area to prevent the other portion from being deposited with a silicon-containing layer, and as long as the portion of the specific material layer corresponding to the position of the recessed area can be removed by certain means to allow the recessed area to be deposited with a silicon-containing layer.

[0052] In embodiments of this disclosure, the silicon-containing layer 12 may be a silicon nitride layer or a silicon carbide layer.

[0053] The polishing removal rates of silicon nitride and silicon carbide are both lower than those of single-crystal silicon, thereby achieving the purpose of reducing the vertical distance between the highest and lowest points by utilizing the difference in polishing removal rates as disclosed in this invention.

[0054] It is conceivable that the silicon-containing layer could also be any other silicon-containing material layer, as long as its polishing removal rate is less than that of monocrystalline silicon.

[0055] According to embodiments of this disclosure, either the silicon nitride layer or the silicon carbide layer 12 can be deposited on the surface 10 covered with a specific material layer, such as the photoresist layer 11, by a physical vapor deposition method. Figure 2 As shown in S103.

[0056] For example, the deposition temperature of this physical vapor deposition method can be 350℃-550℃, and the deposition time can be 30s-120s.

[0057] According to embodiments of this disclosure, removing the remainder of a particular material layer may include removing the remainder of the photoresist layer using an organic solvent.

[0058] After the silicon-containing layer 12 is deposited, the remaining portion of the photoresist layer 11 needs to be removed. For example, an organic solvent can be used to dissolve the remaining photoresist on the surface 10 of the silicon wafer 1, such as... Figure 2 As shown in S104.

[0059] It is conceivable that other types of wet stripping methods or dry stripping methods can be used to remove the remaining portion of the photoresist layer 11.

[0060] In embodiments of this disclosure, polishing the surface of a silicon wafer from which the remaining portion of a particular material layer has been removed may include adsorbing the back surface 20 of the silicon wafer 1 onto an adsorption plane and performing chemical mechanical polishing on the surface 10 of the silicon wafer 1, which is thus deformed. Figure 2 As shown in S105.

[0061] Specifically, such as Figure 2 As shown in S105a, the back surface 20 of the silicon wafer 1 is adsorbed onto the adsorption plane, for example, by vacuum adsorption, causing the back surface 20 to deform into a plane, resulting in the surface 10 also deforming into a plane. At this time, the silicon-containing layer 12, which was originally located in the middle of the silicon wafer (i.e., in the recessed area), protrudes from the surface 10, while the circumferential edge, which was originally the highest point of the silicon wafer surface 10, is located on a plane lower than the surface of the silicon-containing layer 12; Figure 2 As shown in S105b, surface 10 is polished. Since the polishing removal rate of the silicon-containing layer 12 is less than that of monocrystalline silicon, the highest point of monocrystalline silicon is polished away relatively more than the silicon-containing layer, meaning that the circumferential edges of the silicon wafer are polished away relatively more. Figure 2 As shown in S105c, after polishing, the adsorption on silicon wafer 1 is removed. At this time, silicon wafer 1 undergoes shape recovery. It can be clearly observed that the thickness of silicon wafer 1 at the highest point is relatively reduced, thereby reducing the vertical distance between the highest and lowest points, thus improving the flatness of the silicon wafer surface.

[0062] According to another aspect of this disclosure, a system for improving the surface flatness of a silicon wafer is also provided, comprising:

[0063] A detection unit is used to detect the flatness of the silicon wafer surface to determine the location of a recessed region including the lowest point associated with the flatness;

[0064] A covering unit, used to cover the surface with a specific material layer and remove the portion of the specific material layer corresponding to the location;

[0065] A deposition unit for depositing a silicon-containing layer on a surface covered with a specific material layer, wherein the polishing removal rate of the silicon-containing layer is less than that of single-crystal silicon.

[0066] A removal unit, used to remove the remainder of a specific material layer; and

[0067] A polishing unit is used to polish the surface of a silicon wafer from which the remaining portion of a particular material layer has been removed.

[0068] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A method for improving the surface flatness of a silicon wafer, characterized in that, include: The flatness of the silicon wafer surface is detected to determine the location of a recessed region, including the lowest point associated with the flatness. The surface is covered with a specific material layer and the portion of the specific material layer corresponding to the location is removed; A silicon-containing layer is deposited on the surface covered with the specific material layer, wherein the polishing removal rate of the silicon-containing layer is less than that of single-crystal silicon; Remove the remainder of the specific material layer; and The back side of the silicon wafer is adsorbed onto an adsorption plane to deform the back side into a plane and cause the silicon-containing layer to protrude from the surface from which the remainder has been removed, and the surface is then chemically and mechanically polished.

2. The method for improving the surface flatness of a silicon wafer according to claim 1, characterized in that, The specific material in the specific material layer is photoresist, and the process of covering the surface with the specific material layer and removing the portion of the specific material layer corresponding to the location includes spin-coating the photoresist onto the surface to cover the surface with a photoresist layer and removing the portion by irradiating and dissolving the portion of the photoresist layer.

3. The method for improving the surface flatness of a silicon wafer according to claim 2, characterized in that, The photoresist is any one of PMMA, PE, PET, and PI.

4. The method for improving the surface flatness of a silicon wafer according to any one of claims 1 to 3, characterized in that, The silicon-containing layer is a silicon nitride layer or a silicon carbide layer.

5. The method for improving the surface flatness of a silicon wafer according to claim 4, characterized in that, The silicon-containing layer is deposited on the surface covered with the specific material layer by physical vapor deposition.

6. The method for improving the surface flatness of a silicon wafer according to claim 5, characterized in that, The physical vapor deposition method has a deposition temperature of 350℃-550℃ and a deposition time of 30s-120s.

7. The method for improving the surface flatness of a silicon wafer according to any one of claims 1 to 3, characterized in that, The flatness refers to any one of overall flatness, local flatness, and edge flatness.

8. The method for improving the surface flatness of a silicon wafer according to claim 2 or 3, characterized in that, The removal of the remainder of the specific material layer includes removing the remainder of the photoresist layer using an organic solvent.

9. A system for improving the surface flatness of silicon wafers, characterized in that, include: A detection unit is used to detect the flatness of the silicon wafer surface to determine the location of a recessed region including a lowest point associated with the flatness; A covering unit, used to cover the surface with a specific material layer and remove the portion of the specific material layer corresponding to the location; A deposition unit for depositing a silicon-containing layer on the surface covered with the specific material layer, wherein the polishing removal rate of the silicon-containing layer is less than that of single-crystal silicon; A removal unit for removing the remainder of the specific material layer; and A polishing unit is used to adsorb the back side of the silicon wafer onto an adsorption plane to deform the back side into a plane and cause the silicon-containing layer to protrude from the surface from which the remainder has been removed, and to perform chemical mechanical polishing on the surface.

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