Power supply device, power supply method, and processing method for wafer system

Abstract

The present disclosure provides a power supply device, a power supply method and a processing method for a wafer system, and relates to the technical field of computers. The power supply device comprises at least one electric energy transmitting unit and at least one electric energy receiving unit connected with the wafer system; wherein a wireless power supply link is established between the electric energy transmitting unit and the at least one electric energy receiving unit based on a wireless connection mode, and electric energy is transmitted to the electric energy receiving unit based on the wireless power supply link, and the received electric energy is provided to the wafer system by the electric energy receiving unit. According to the embodiment of the present disclosure, stable power supply can be provided for the wafer system, and normal operation of the wafer system is guaranteed.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and in particular to a power supply device, power supply method, and processing method for a wafer system. Background Technology

[0002] Power supply is essential for the normal operation of a processing system. In related technologies, power can be supplied to the processing system through energy storage units (e.g., batteries) and power supply units. For wafer systems, due to the dense arrangement of numerous chips and high chip integration, traditional wired power supply methods result in high wiring density, potentially leading to high power consumption and significant heat generation. Furthermore, the large size of wafer systems and long power supply distances can cause significant voltage drop, affecting the power supply efficiency and performance. Additionally, wired power supply links may break or become faulty during wafer system handling and movement, affecting the power supply and causing the wafer system to operate unstably and reliably. Summary of the Invention

[0003] This disclosure provides a power supply device, power supply method and processing method, electronic device and computer-readable storage medium for a wafer system.

[0004] In a first aspect, this disclosure provides a power supply device for a wafer system, the power supply device comprising: at least one power transmitting unit and at least one power receiving unit connected to the wafer system; wherein the power transmitting unit and at least one power receiving unit establish a wireless power supply link based on a wireless connection, and transmit power to the power receiving unit based on the wireless power supply link, and the power receiving unit provides the received power to the wafer system.

[0005] Secondly, this disclosure provides a power supply method applied to a wafer system, wherein the wafer system is connected to at least one power receiving unit. The power supply method includes: establishing a wireless power supply link between the power receiving unit and at least one power transmitting unit; transmitting power from the power transmitting unit to the power receiving unit based on the wireless power supply link, and having the power receiving unit provide the received power to the wafer system.

[0006] Thirdly, this disclosure provides a processing method applied to a wafer system, the processing method comprising: in response to a received task processing request, executing a task to be processed; wherein the task to be processed includes at least one of an image processing task, a voice processing task, a text processing task, and a video processing task.

[0007] Fourthly, this disclosure provides an electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores one or more computer programs executable by the at least one processor, the one or more computer programs being executed by the at least one processor to enable the at least one processor to perform the processing method described above.

[0008] Fifthly, this disclosure provides an electronic device comprising: a plurality of processing cores; and an on-chip network configured to interact with data between the plurality of processing cores and external data; wherein one or more of the processing cores store one or more instructions, and the one or more instructions are executed by the one or more processing cores to enable the one or more processing cores to perform the above-described processing method.

[0009] In a sixth aspect, this disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor / processing core, implements the above-described processing method.

[0010] The embodiments provided in this disclosure include a wafer system comprising at least one power transmitting unit and at least one power receiving unit connected to the wafer system. A wireless power supply link is established between the power transmitting unit and the at least one power receiving unit via a wireless connection. Power is transmitted to the power receiving unit via the wireless power supply link, and the power receiving unit provides the received power to the wafer system. Since the wireless power supply method eliminates the need for wired power lines, it avoids situations where wired power lines break or have poor contact due to external forces such as handling or movement, thus improving the stability of the power supply and ensuring the normal operation of the wafer system.

[0011] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0012] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the embodiments of the present disclosure to explain the disclosure and do not constitute a limitation thereof. The above and other features and advantages will become more apparent to those skilled in the art from the detailed description of exemplary embodiments with reference to the accompanying drawings, in which:

[0013] Figure 1 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0014] Figure 2 This is a schematic diagram of a wafer processing apparatus provided in an embodiment of the present disclosure;

[0015] Figure 3 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0016] Figure 4 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0017] Figure 5 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0018] Figure 6 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0019] Figure 7 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0020] Figure 8 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0021] Figure 9 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0022] Figure 10 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0023] Figure 11 A schematic diagram of a power supply device for a wafer system provided in an embodiment of this disclosure;

[0024] Figure 12 A flowchart of a power supply method provided in an embodiment of this disclosure;

[0025] Figure 13 A flowchart of a processing method provided in an embodiment of this disclosure;

[0026] Figure 14 A block diagram of an electronic device provided in an embodiment of this disclosure;

[0027] Figure 15 This is a block diagram of an electronic device provided in an embodiment of the present disclosure. Detailed Implementation

[0028] To enable those skilled in the art to better understand the technical solutions of this disclosure, exemplary embodiments of this disclosure are described below with reference to the accompanying drawings, including various details of the embodiments of this disclosure to aid understanding. These should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this disclosure. Similarly, for clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0029] Where there is no conflict, the various embodiments of this disclosure and the features thereof in the embodiments may be combined with each other.

[0030] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.

[0031] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded. Words such as “connected” or “linked” are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect.

[0032] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined herein.

[0033] When using chips to perform data processing tasks, it is usually necessary to supply energy to the chips, one of the most important energy sources being electrical energy. In related technologies, energy storage units can be incorporated into the chip to utilize the pre-stored electrical energy for data processing, or power supply units can be incorporated into the chip to receive electrical energy from an external source for data processing. However, when the chip area is large, if power is supplied using traditional wiring methods, the voltage drop may be significant, and power consumption will also be high, which can easily lead to overheating of the chip and compromise its operational stability.

[0034] In view of this, in the embodiments of this disclosure, the power supply device for supplying power to the wafer system includes at least one power transmitting unit and at least one power receiving unit connected to the wafer system; wherein, the power transmitting unit and the at least one power receiving unit establish a wireless power supply link based on a wireless connection, and transmit power to the power receiving unit based on the wireless power supply link, and the power receiving unit provides the received power to the wafer system. Since this power supply device uses a wireless power supply method, there is no need to set up a wired power supply line, thereby avoiding the situation where the wired power supply line is broken or has poor contact due to external forces such as handling or movement, which can cause the power supply to fail, improve the stability of the power supply, and thus ensure the normal operation of the wafer system and the smooth execution of various processing tasks by the wafer system.

[0035] It should also be noted that the processing method according to the embodiments of this disclosure can be executed by electronic devices such as terminal devices or servers; that is, the wafer system can be configured as any product form such as a terminal device or a server. The terminal device can be a user equipment (UE), mobile device, user terminal, terminal, cellular phone, cordless phone, personal digital assistant (PDA), handheld device, computing device, in-vehicle device, wearable device, etc. The method can be implemented by a processor calling computer-readable program instructions stored in memory. Alternatively, the method can be executed by a server.

[0036] The first aspect of this disclosure provides a power supply device for a wafer system.

[0037] Figure 1 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 1 The power supply device includes at least one power transmitting unit 10 and at least one power receiving unit 20 connected to the wafer system 40; wherein, the power transmitting unit 10 and the at least one power receiving unit 20 establish a wireless power supply link 30 based on a wireless connection, and transmit power to the power receiving unit 20 based on the wireless power supply link 30, and the power receiving unit 20 provides the received power to the wafer system 40.

[0038] In some alternative implementations, a wafer system refers to a processing system based on wafer fabrication that has functions such as data processing and data storage, and can be used to perform various tasks to be processed. These tasks include at least one of image processing, speech processing, text processing, and video processing tasks; however, this disclosure does not limit the scope of these tasks.

[0039] In some alternative implementations, the wafer system includes at least one wafer processing device, which is a wafer processing device based on the fabrication of an undivided wafer.

[0040] In some alternative implementations, the wafer processing apparatus includes at least one main functional region and multiple auxiliary functional regions, wherein the main functional region includes multiple main functional chips distributed in an array, and the auxiliary functional regions include at least one auxiliary functional chip.

[0041] For example, the central location of the wafer can be set as the main functional region to fabricate the main functional chip, and the area surrounding the main functional region can be set as the auxiliary functional region to fabricate the auxiliary functional chip.

[0042] Figure 2 This is a schematic diagram of a wafer processing apparatus provided in an embodiment of the present disclosure. (Refer to...) Figure 2 The wafer processing apparatus 200 includes a main function chip 210 disposed in the main function area, and auxiliary function chips 221, 222, 223 and 224 disposed in the auxiliary function area.

[0043] For example, the main function chip 210 may be a computing chip, and the auxiliary function chips 221, 222, 223 and 224 may include memory chips, communication chips, etc. The wafer processing device 200 is mainly used to provide computing functions.

[0044] For example, the main function chip 210 may be a memory chip, and the auxiliary function chips 221, 222, 223 and 224 may include computing chips, communication chips, etc. The wafer processing device 200 is mainly used to provide storage functions.

[0045] Considering the limited functionality or processing power of the wafer system itself, external chips can be added to the wafer system to expand its functionality or improve its processing power. These external chips are connected to at least one wafer processing device, and the external chips and the wafer system work together to perform various processing tasks. The external chips can be bonded to the wafer processing device, or other connection methods can be used; this disclosure does not limit this approach.

[0046] In summary, wafer systems consist of a large number of densely packed chips with high integration. Therefore, if traditional wired power supply methods are still used to provide power to the wafer system, the high wiring density may lead to high power consumption and severe heat generation, potentially affecting the operation of the wafer system. Furthermore, due to the large size of the wafer system and the long power supply distance, voltage drop issues may be significant, impacting the power supply efficiency and performance. Moreover, wired power supply links are prone to breakage or poor contact during handling and movement of the wafer system, thus affecting the power supply and causing the wafer system to malfunction and operate unreliably.

[0047] In some alternative implementations, a wireless power supply link can be established through a power transmitting unit and a power receiving unit, thereby powering the wafer system using Wireless Power Transfer (WPT). Energy can be transmitted without direct electrical contact, which can improve power supply stability. Furthermore, by properly setting the number and distribution of power transmitting and receiving units, voltage drop issues can be effectively mitigated, thereby improving the power supply efficiency and effect of the wafer system.

[0048] In some optional implementations, the power transmitting unit is a functional unit for providing power, and the power receiving unit is a functional unit for receiving power. A wireless power supply link can be established between the power transmitting unit and the power receiving unit to provide power to the chips in the wafer system. The chips include at least one of computing chips, memory chips, and communication chips in the wafer system. It should be noted that the above description of chips in the wafer system is merely illustrative, and this disclosure does not limit the scope of the embodiments.

[0049] In some possible implementations, the power receiving unit can be located on the wafer processing device of the wafer system and / or on an external chip.

[0050] Figure 3 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 3 The wafer system 340 includes a power receiving unit 321 disposed on a wafer processing device and a power receiving unit 322 disposed on an external chip 350. In this power supply device, a wireless power supply link 331 is established between the power receiving unit 321 and the power transmitting unit 311, and power is provided to the chip connected to the power receiving unit 321 based on the wireless power supply link 331. A wireless power supply link 332 is established between the power receiving unit 322 and the power transmitting unit 312, and power is provided to the chip connected to the power receiving unit 322 based on the wireless power supply link 332.

[0051] Therefore, in this embodiment, the installation position of the power receiving unit is relatively flexible. The power receiving unit can be reasonably installed according to the chip layout and spatial location of the wafer system, thereby meeting various power supply needs and improving the flexibility and convenience of power supply.

[0052] In some alternative implementations, the power transmission units may be distributed in a region outside the wafer system, and / or the power transmission units may be distributed on the wafer system.

[0053] In some alternative implementations, at least one external circuit board can be placed outside the wafer system, and the power receiving unit can be carried on the external circuit board to provide power to the wafer system.

[0054] For example, at least one power receiving unit is provided in the wafer system, and at least one power transmitting unit is provided in the external circuit board. By connecting the corresponding power receiving unit and power transmitting unit, the power supply to the wafer system is realized.

[0055] Figure 4 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 4 The wafer system includes a wafer processing unit 440, and four external circuit boards 451, 452, 453, and 454 are disposed around the wafer processing unit 440. A power transmitting unit 420 is disposed on the external circuit board 451, and a power receiving unit 410 is disposed on the wafer processing unit 440. A wireless power supply link 430 is established between the power transmitting unit 410 and the power receiving unit 420 to provide power to the corresponding chips in the wafer system.

[0056] It should be noted that external circuit boards can provide at least one of the following functions for the wafer system: power supply, communication, computing, storage, and clocking. Furthermore, a wafer system can be connected to one or more external circuit boards. In other words, a wafer system can be connected to any one or more of the following: power supply circuit boards, communication circuit boards, storage circuit boards, and crystal oscillator circuit boards.

[0057] In some possible implementations, the external circuit boards can be fixed to the top, bottom, side, or other locations of the wafer system enclosure. For example, the wafer system includes a wafer processing unit fixed in the middle of a wafer platform, and the various external circuit boards can be distributed outside the wafer processing unit and also fixed to the wafer platform.

[0058] It should be noted that the above description of the location of the external circuit board is merely an example, and the embodiments disclosed herein do not impose any limitations on it.

[0059] In some alternative implementations, the power transmission units are distributed on the wafer system, including: the power transmission units are fabricated on at least one chip of the wafer system, and / or, the power transmission units are independent chips fabricated in a predetermined region of the wafer system. The predetermined region may be a free area or a pre-designated multi-functional area, etc., and this disclosure does not limit this.

[0060] For example, a power transmission unit can be fabricated using a chip on the wafer system during fabrication, or an independent power transmission unit can be fabricated using an unused area in the wafer system. Alternatively, a portion of the wafer system can be pre-designated as a multifunctional area, and an independent power transmission unit can be fabricated in the multifunctional area.

[0061] It should be noted that in some optional implementations, the power transmitting unit can be connected to at least one external power source via a wired connection to obtain power from the external power source. In other words, the power transmitting unit obtains power from the external power source, transmits the power to the power receiving unit via a wireless power supply link, and then the power receiving unit further transmits the power to the various chips, thereby supporting the power supply of the wafer system.

[0062] It should also be noted that regardless of the location of the power transmitting and receiving units, a wireless power supply link can be established between the power receiving units through at least one of the following methods: electromagnetic induction, magnetic field resonance, radio wave, and electric field coupling. In other words, in the wireless connection method, there is no physical power line between the power transmitting and receiving units; they establish a wireless power supply link through a non-contact electrical connection.

[0063] Among them, electromagnetic induction mainly achieves energy transfer through the efficient conversion of magnetic energy and electrical energy. For example, a primary coil is set at the transmitting end and a secondary coil is set at the receiving end. The primary coil is connected to a wired power supply and generates an electromagnetic signal (i.e., an alternating current signal with a certain frequency). Then, electromagnetic induction is used to generate a corresponding current in the secondary coil, thereby transferring energy from the transmitting end to the receiving end.

[0064] In this embodiment, a first coil can be provided in the power transmitting unit and a second coil can be provided in the power receiving unit. The first coil generates an electromagnetic signal, and the second coil senses the electromagnetic signal to generate a current and transmits the current to the corresponding power-consuming chip, thereby realizing the power supply to the processing device.

[0065] Magnetic resonance technology primarily generates a magnetic field of the same frequency through resonance, thereby transmitting energy through resonance. For example, a coil is placed at the transmitting end and another coil is placed at the receiving end. The transmitting coil vibrates at a certain frequency, radiating electromagnetic waves in the surroundings, while the receiving coil vibrates at the same frequency, thereby receiving the energy transmitted from the transmitting end. The two coils form a nearly closed "energy channel" through which energy is transmitted.

[0066] In this embodiment of the disclosure, a third coil can be provided in the power transmitting unit and a fourth coil can be provided in the power receiving unit. The third coil and the fourth coil vibrate at the same frequency (e.g., 10 MHz), so that the third coil transmits energy to the fourth coil, and the fourth coil converts the energy into electrical energy and provides it to the corresponding power-consuming chip.

[0067] Radio wave-based energy transfer primarily achieves energy transfer through the propagation of radio waves. For example, a transmitter emits radio waves, a receiver receives these waves, and a voltage regulator modulates the voltage to a suitable level to meet the needs of the power-consuming chip.

[0068] In this embodiment of the present disclosure, a power transmitting unit can transmit radio waves to the outside, a power receiving unit can receive the radio waves, and convert the radio waves into electrical energy through a silicon rectifier diode antenna and transmit it to the corresponding power-consuming chip.

[0069] Electric field coupling can generate electricity by vertically coupling two sets of asymmetric dipoles in the form of microwaves, and then transmitting it wirelessly to a remote receiving antenna for processing such as rectification and modulation. For example, two sets of symmetrical electric dipoles are set at the transmitting and receiving ends. When the two sets are brought close together, a current is generated between them, thus achieving power transmission.

[0070] In this embodiment of the disclosure, an electric dipole T can be set in the power transmitting unit and an electric dipole R can be set in the power receiving unit. When the distance between the two is less than a preset threshold, power transmission can be realized, and the power receiving unit can further transmit the power to the corresponding power consumption chip.

[0071] It should be noted that the above examples of wireless power transmission methods are merely illustrative and are not intended to limit the scope of this disclosure.

[0072] The locations and wireless connection methods of the power transmitting and receiving units have been explained above. Based on this, the distribution of the power transmitting and receiving units will be explained in detail to further clarify how to alleviate the voltage drop problem based on this distribution, thereby improving the power supply efficiency and power supply effect of the wafer system.

[0073] In some alternative implementations, to avoid excessive voltage drop due to excessive power supply distance, which would affect power supply efficiency and performance, the power receiving units can be evenly distributed throughout the wafer system and provide power to chips located less than a preset threshold away from the power receiving units; and / or, each chip in the wafer system is provided with at least one power receiving unit, and the power receiving unit is used to provide power to the chip it is located in.

[0074] For example, the power receiving units are evenly distributed throughout the wafer system, providing power to chips located less than a preset threshold from the power receiving units. This results in a relatively balanced power supply, reducing the likelihood of chips using power receiving units located at greater distances for power supply. Therefore, it can reduce voltage drop issues caused by excessively long power supply distances. The preset threshold can be set based on any one or more of experience, statistical data, simulation results, and power supply requirements; this embodiment does not impose any limitations on this.

[0075] It should be noted that "uniform" here includes the case of relative uniformity. In practical applications, due to limitations such as the shape of the wafer system, the distribution of each processing unit, and layout requirements, it may not be possible to arrange the power receiving units in a strictly uniform manner within the wafer system. In other words, as long as the power receiving units are relatively uniformly distributed within the wafer system, the aforementioned power supply requirements can be considered met.

[0076] In some alternative implementations, corresponding power receiving units can be set according to the chip distribution of the wafer system. For example, each chip in the wafer system is provided with at least one power receiving unit, which is used to provide power to the chip it belongs to.

[0077] It should be noted that the number of power receiving units in each chip can be customized based on the chip's location, area, power consumption, chip type, and other factors.

[0078] For example, when a chip is located in the middle of a wafer system, it may be far from the power transmitting unit on an external circuit board. Considering factors such as voltage drop, more power receiving units can be set in the chip as appropriate.

[0079] For example, when the chip area is large, considering that the power receiving units located on it are far from the processing units at the edge of the chip and the voltage drop is large, multiple power receiving units can be evenly arranged in the chip.

[0080] For example, when the chip has high power consumption, multiple power receiving units can be set in the chip to meet its power consumption requirements.

[0081] For example, consider two adjacent chips with similar areas. If one chip is a computing chip and the other is a storage chip, considering that the computing chip has a larger data processing capacity and higher computing power requirements than the storage chip, N1 power receiving units can be set in the computing chip and N2 power receiving units can be set in the storage chip. Here, N1 and N2 are integers, and N1 > N2.

[0082] After completing the configuration of the power receiving unit, the configuration of the power transmitting unit (including the number and location) can be optimized so that the two work together to further improve the power supply efficiency and effect.

[0083] In some alternative implementations, considering the large number of power receiving units and the large size of the wafer system, if only one power transmitting unit is placed on the external circuit board, chips located far from that unit in the wafer system will experience significant voltage drops when receiving power due to the long power supply lines. This results in low power supply efficiency and poor power delivery performance. Therefore, in some alternative implementations, multiple power transmitting units can be set up according to the distribution of the power receiving units. This ensures that the distance between connected power transmitting and receiving units is not too large, minimizing voltage drops and improving power supply efficiency and performance.

[0084] In some alternative implementations, power supply to the wafer system can be achieved by setting up power supply partitions. A power supply partition can be considered a regional unit that provides power to the wafer system. Powering the wafer system based on power supply partitions can also alleviate voltage drop issues and improve power supply efficiency and performance.

[0085] In some alternative implementations, the power supply zone can be determined based on one or more of the following influencing factors: area, power consumption, power supply distance, etc.

[0086] For example, the area difference between power supply zones is less than a preset area threshold, and / or, the power consumption difference between power supply zones is less than a preset power consumption threshold, and / or, the distance between the connected power transmitting unit and power receiving unit is less than a preset distance threshold.

[0087] In other words, the areas in the wafer system that require power supply can be divided into multiple regions based on their relatively equal size, with each region considered as a power supply partition; alternatively, the wafer system can be divided into multiple regions based on the distribution of power consumption, with each region serving as a power supply partition, and the power consumption of each power supply partition being basically similar; or the wafer system can be divided into multiple regions based on the distance between the power transmitting unit and the power receiving unit, so that when power is supplied to the regions formed by this division, the distance between the connected power transmitting unit and the power receiving unit is smaller.

[0088] It should be noted that the shape of the power supply zone can be regular or irregular, and the embodiments disclosed herein do not impose any restrictions on it.

[0089] For example, the wafer system is divided into several regions, each with a substantially equal area. Any region can serve as a power supply partition, in which at least one power receiving unit is set up and connected to a corresponding power transmitting unit, thereby providing power to the power-consuming chip located in the power supply partition.

[0090] For example, based on the power consumption of each chip in the wafer system, the wafer system is divided into multiple power supply zones, with each power supply zone having essentially the same power consumption. Similarly, at least one power receiving unit is set in each power supply zone and connected to a corresponding power transmitting unit, thereby providing power to the power-consuming chips located in the corresponding power supply zone. The power consumption of each power supply zone is determined based on the power consumption of the power-consuming chips within that power supply zone.

[0091] For example, when dividing the power supply zones, the distance between the power transmitting unit and the power receiving unit is considered, ensuring that the distance between the interconnected power transmitting units and power receiving units in each power supply zone is less than a preset distance threshold. This preset distance threshold can be set based on experience, statistical data, etc., and this embodiment does not impose any limitations on it. Furthermore, corresponding preset distance thresholds can be set for different types of power supply connection methods.

[0092] Furthermore, more granular preset distance thresholds can be set for different wireless power supply methods.

[0093] It should be noted that when dividing the power supply zones using an equal area method, the power consumption of each power supply zone may vary significantly. Therefore, the number of power receiving units and power transmitting units can be matched according to the power consumption of each power supply zone.

[0094] For example, if the power consumption of the first power supply zone is three times that of the second power supply zone, then three power receiving units and three power transmitting units are set up for the first power supply zone, and one power receiving unit and one power transmitting unit are set up for the second power supply zone. Moreover, the three power receiving units in the first power supply zone can be set up in a uniform distribution manner.

[0095] In some alternative implementations, after dividing the power supply zones, power can be supplied to each power supply zone based on the power receiving unit and the corresponding power transmitting unit in the power supply zone.

[0096] For example, a wafer system may have multiple power supply zones, each including at least one power receiving unit, and the power receiving unit in the power supply zone provides power to the power supply zone through a wirelessly connected power transmitting unit. That is, at least one power receiving unit is set in each power supply zone, and the power receiving unit is connected to the power transmitting unit to establish a wireless power supply link, thereby providing power to the chips in the corresponding power supply zone based on the wireless power supply link.

[0097] For example, the power transmitting unit has a corresponding relationship with the power supply zone (including one-to-one, one-to-many, many-to-one, etc.), and the power transmitting unit establishes a wireless power supply link with at least one power receiving unit in the corresponding power supply zone, and provides power to the power supply zone based on the wireless power supply link.

[0098] The following is combined with Figure 5-8 The power supply device according to the embodiments of this disclosure will be described in detail.

[0099] Figure 5 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 5 The wafer system includes a wafer processing unit 510, which is relatively evenly divided into 10 power supply zones (as shown by the dashed lines). Four circuit boards for carrying external power supplies are distributed on the top, bottom, left, and right sides of the wafer processing unit 510.

[0100] like Figure 5 As shown, each power supply zone is equipped with a power receiving unit and a power transmitting unit, which are connected to a wireless power supply link. The power transmitting unit is connected to the corresponding external power supply in the circuit board to obtain power from the external power supply.

[0101] Let's take power supply zone 550 as an example for explanation. Figure 5 As shown, in power supply zone 550, there is a power receiving unit 511 and a power transmitting unit 521, which are connected by a wireless power supply link 530. The power transmitting unit 521 is connected to an external power supply 541 on the circuit board via a wired link 540 to obtain power. The power supply methods of other power supply zones are similar to those of power supply zone 550, and will not be described in detail here.

[0102] Figure 6 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 6In this power supply device, the wafer processing unit 610 of the wafer system is relatively evenly divided into 10 power supply zones (as shown by the dashed lines). Four external circuit boards are distributed on the top, bottom, left, and right sides of the wafer processing unit 610. The wafer processing unit 610 and the external circuit boards are supported and fixed by the wafer platform 640. Furthermore, each power supply zone is provided with a power receiving unit, which is connected to the corresponding power transmitting unit in the external circuit board to provide power to the chip (not shown in the figure) located in the current power supply zone.

[0103] The following explanation uses the external circuit board 620 and the power supply partition 650 as examples. Figure 6 As shown, the external circuit board 620 is equipped with a power transmitting unit 621, and the power supply partition 650 of the wafer processing device 610 is equipped with a power receiving unit 611. A wireless power supply link 630 is established between the power transmitting unit 621 and the power receiving unit 611, so that the power receiving unit 611 can provide power to the chip in the power supply partition 650 through the wireless power supply link 630. The power supply method of other power supply partitions is similar to that of power supply partition 650, and will not be described in detail here.

[0104] according to Figure 5 and Figure 6 It is understood that the wafer system can be divided into several power supply zones relatively evenly as needed. The number and size of the power supply zones can be flexibly set based on experience, statistical data, and requirements; this disclosure does not impose any limitations on this. For example, to ensure power supply performance, the area of ​​the power supply zones can be set to a relatively small size to ensure that the power receiving units in each power supply zone can provide stable power to the corresponding power-consuming chips. Alternatively, to reduce device costs, the area of ​​the power supply zones can be set to a relatively large size, thereby reducing the number of power receiving units and achieving cost reduction.

[0105] remove Figure 5 and Figure 6 In addition, there are various other ways to divide power supply zones. Figure 7 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 7In this power supply device, the wafer processing unit 710 of the wafer system is first divided into two semicircular regions based on a certain diameter, and each semicircular region is further divided into four smaller regions, so that the wafer processing unit 710 is relatively evenly divided into 8 power supply zones (as shown by the dashed lines). Four external circuit boards are distributed at the upper left, upper right, lower left, and lower right corners of the wafer processing unit 710. The wafer processing unit 710 and the external circuit boards are supported and fixed by the wafer platform 740. Furthermore, each power supply zone is provided with a power receiving unit, and each power receiving unit is connected to a corresponding power transmitting unit in the external circuit board to provide power to the chip (chip not shown in the figure) located in the current power supply zone.

[0106] The following explanation uses the external circuit board 720 and the power supply partition 750 as examples. Figure 7 As shown, the external circuit board 720 is equipped with a power transmitting unit 721, and the power supply partition 750 of the wafer processing device 710 is equipped with a power receiving unit 711. A wireless power supply link 730 is established between the power transmitting unit 721 and the power receiving unit 711, so that the power receiving unit 711 can provide power to the chip located in the power supply partition 750 through the wireless power supply link 730. The power supply method of other power supply partitions is similar to that of power supply partition 750, and will not be described in detail here.

[0107] exist Figure 7 In this process, the distance between the connected power receiving unit and the power transmitting unit is basically the same, and compared with setting a power receiving unit in the center of the wafer processing device, the above distance is effectively shortened (which can be regarded as the distance being less than the preset distance threshold), thereby alleviating problems such as voltage drop.

[0108] Figure 8 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 8 In this power supply device, the wafer processing unit 810 of the wafer system is relatively evenly divided into eight sector-shaped power supply zones (as shown by the dashed lines). Four external circuit boards 820 are distributed at the upper left, upper right, lower left, and lower right corners of the wafer processing unit 810. The wafer processing unit 810 and the external circuit boards 820 are supported and fixed by the wafer platform 840. Furthermore, each power supply zone is provided with a power receiving unit, which is connected to the corresponding power transmitting unit in the external circuit board 820 to provide power to the chip (not shown in the figure) located in the current power supply zone.

[0109] The following explanation uses the external circuit board 820 and power supply partitions 851 and 852 as examples. Figure 8As shown, the external circuit board 820 is equipped with power transmitting units 821, 822, and 823. The power consumption of power supply partition 851 is twice that of power supply partition 852. Based on this, a power receiving unit 811 is provided in power supply partition 851, and power receiving units 812 and 813 are provided in power supply partition 852. Furthermore, the power transmitting unit 821 corresponds to power supply partition 851 and is connected to the power receiving unit 811. A wireless power supply link 831 is established between them, allowing the power receiving unit 811 to provide power to the power-consuming chip located in power supply partition 851 through this wireless power supply link 831. Similarly, power transmitting units 822 and 823 correspond to power supply partition 852. Power transmitting unit 822 is connected to power receiving unit 812, and a wireless power supply link 832 is established between them. Power transmitting unit 823 is connected to power receiving unit 813, and a wireless power supply link 833 is established between them. This allows power receiving units 812 and 813 to provide power to the chip located in power supply partition 852 through wireless power supply links 832 and 833, respectively. The power supply methods for other power supply partitions are similar to those for power supply partition 851 and will not be described in detail here.

[0110] Therefore, even within power supply partitions of the same shape and area, differences in power consumption can lead to variations in the number and distribution of power receiving / transmitting units. Furthermore, within a wafer system, different power supply partitions can be configured based on different information (e.g., some partitions are configured using an evenly distributed area approach, some are configured based on power consumption, and some are configured based on a preset distance threshold). In practical applications, power supply partitions can be flexibly configured according to power requirements and the aforementioned information; this disclosure does not impose any limitations on this.

[0111] It should be noted that the aforementioned power receiving unit can be either a chip fabricated on a wafer or an external chip packaged on a wafer, and this disclosure does not impose any restrictions on this.

[0112] Figure 9 This is a schematic diagram of a power supply device for a wafer system provided in an embodiment of the present disclosure. In the wafer system 900 corresponding to this power supply device, multiple power receiving units 930 are manufactured in a chip manner, and multiple power transmitting units (not shown in the figure) are disposed outside the wafer system. The wafer system 900 includes a main functional area 910 and multiple auxiliary functional areas 921, 922, 923, and 924. The distribution positions of the power receiving units 930 in the wafer system 900 can be referenced... Figure 9 (a), 9(b) and 9(c).

[0113] exist Figure 9In (a), the power receiving unit 930 is located in the peripheral area of ​​the wafer system (i.e., the corner area excluding the main functional area 910 and auxiliary functional areas 921, 922, 923, and 924). Through a connected power transmitting unit, it provides power to the corresponding chip in the wafer system 900 and / or the chips in the corresponding power supply partition. During the wafer system manufacturing process, an electrical connection can be established between the power receiving unit and the chips in the area it is responsible for powering through a ReDistribution Layer (RDL).

[0114] In related technologies, due to the small area and often irregular shape of these peripheral regions, it may be impossible to install main function chips and auxiliary function chips, which can easily lead to wafer waste. In the embodiments of this disclosure, a power transmission unit is set on the peripheral region of the wafer system, which not only provides power to the wafer system, but also improves wafer utilization and reduces wasted wafer area.

[0115] exist Figure 9 In (b), the power receiving unit 930 is located in the functional area of ​​the wafer system (including the main functional area 910 and / or auxiliary functional areas 921, 922, 923, 924), and provides power to the corresponding chip in the wafer system 900 and / or the chip in the corresponding power supply partition through the connected power transmitting unit.

[0116] For example, a power receiving unit can be provided in each chip of the functional area, or multiple chips can share a power receiving unit. If a power receiving unit is provided in each chip, the electrical connection between the power receiving unit and the chip can be achieved through a wiring layer. If multiple chips share a power receiving unit, the electrical connection between the power receiving unit and the multiple chips can be achieved through an RDL.

[0117] exist Figure 9 In (c), some power receiving units 930 are located in the peripheral area of ​​the wafer system 900, while others are located in the functional areas of the wafer system. Similarly, each power receiving unit 930, through a connected power transmitting unit, can provide power to the corresponding chip in the wafer system 900 and / or the chip in the corresponding power supply zone. This arrangement allows for a more uniform distribution of power receiving units within the wafer system, alleviating voltage drop issues, and also makes full use of the corner areas of the wafer system, improving wafer utilization.

[0118] In some alternative implementations, considering chip yield issues, a hybrid approach can be chosen to configure the power receiving units to ensure reliable power supply to the chips within the wafer system. This hybrid approach means that one power receiving unit can supply power to multiple chips or multiple power supply zones, and there can be overlap between the chips supplied by different power receiving units (i.e., the same chip can correspond to multiple power receiving units, from which one can be selected as the power source), or the power supply zones between different power receiving units can have overlapping portions (the overlapping portions correspond to multiple power receiving units, from which one can be selected as the power source). In other words, a certain degree of "redundancy" is provided to the power receiving units to ensure a stable and reliable power supply to the wafer system in the event of a fault or other unforeseen circumstances.

[0119] In some optional implementations, to control and adjust redundancy in the hybrid mode, corresponding switches can be set to control and adjust the correspondence between the power receiving unit and the chip, and between the power receiving unit and the power supply zone, by controlling the on and off states of the switches.

[0120] In some alternative implementations, a power management device can be provided for the wafer system. This power management device can reconfigure the power supply partition of the power receiving unit and / or the chip connected to the power receiving unit based on the power status of the power transmitting unit and the power receiving unit, chip failure (e.g., whether the chip corresponding to the power receiving unit is faulty, or whether the chip connected to the power receiving unit is faulty).

[0121] For example, the power management device can adjust the power supply relationship in a timely manner by controlling the pairing relationship between the power transmitting unit and the power receiving unit, the correspondence between the power receiving unit and the power supply zone, and the connection relationship between the power receiving unit and the chip, so as to ensure that the wafer system obtains a stable and reliable power supply.

[0122] For example, if the power consumption of a certain power supply partition z1 decreases from p1 to p2 (the decrease in power consumption can be caused by chip failure or other reasons, without limitation), while the power consumption of another power supply partition z2 increases from p3 to p4, and p1 and p4 are relatively close, and p2 and p3 are relatively close, then the pairing relationship between the two power supply partitions and the power receiving unit can be swapped by the power management device, so that the power receiving unit that originally powered power supply partition z1 powers power supply partition z2, and the power receiving unit that originally powered power supply partition z2 powers power supply partition z1.

[0123] For example, if at least one of the multiple power receiving units supplying power to a certain power supply zone fails, then the redundant power receiving units can be configured to provide power to the current power supply zone to ensure the power supply of the current power supply zone.

[0124] For example, if the power consumption of a certain power supply zone decreases, the number of power receiving units that provide power to that power supply zone can be reduced proportionally.

[0125] It should be noted that the wireless connection methods between the aforementioned power transmitting unit and power receiving unit include electromagnetic induction connection, magnetic field resonance connection, radio wave connection, electric field coupling connection, etc. For the same wafer system, the connection method between the power receiving unit and the power transmitting unit may include any one or more of the aforementioned wireless connection methods, and this disclosure does not impose any limitations on this.

[0126] It should also be noted that in some optional implementations, a wired connection can be used to establish a power supply link between the power transmitting unit and the power receiving unit. Establishing a power supply link based on a wired connection means using wired power transmission to power the wafer system, which requires direct electrical contact to transmit energy.

[0127] In some optional implementations, the power receiving unit includes a wired power receiving unit, the power transmitting unit includes a wired power transmitting unit, and the power supply link is a wired power supply link; correspondingly, a wired power supply link is established between the wired power transmitting unit and the wired power receiving unit through a power line. The power line is an electrical wire used to transmit current, and includes various types of cables with conductive properties; this disclosure does not limit the specific type of cable.

[0128] For example, the power transmitting unit and the power receiving unit are connected by a power line or cable using wire bonding, and a wired power supply link is established between them based on the power line or cable.

[0129] Figure 10 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 10 In this power supply device, the wafer system includes a wafer processing device 1010 and is provided with external circuit boards 1021 and 1022.

[0130] like Figure 10As shown, an external circuit board 1021 is provided with a wireless power transmitting unit 10211, which establishes a wireless power supply link 1031 with a wireless power receiving unit 10102 on the wafer processing device 1010, so as to provide power to the corresponding chips based on the wireless power supply link 1031 (for example, to provide power to the chip connected to the wireless power receiving unit 10102, or to provide power to the chip that is less than a preset distance threshold from the wireless power receiving unit 10102). Similarly, an external circuit board 1022 is provided with a wired power transmitting unit 10221, which establishes a wired power supply link 1032 with a wired power receiving unit 10101 on the wafer processing device 1010, so as to provide power to the corresponding chips based on the wired power supply link 1022.

[0131] In some alternative implementations, the external circuit board and the wafer processing device can be arranged face-to-face, thereby reducing the distance between the power transmitting unit and the power receiving unit, shortening the power supply link length, reducing voltage drop, and improving power supply efficiency.

[0132] Figure 11 This is a schematic diagram of a power supply device for a wafer system provided as an embodiment of the present disclosure. (Refer to...) Figure 11 In this power supply device, the wafer system includes a wafer processing device 1110 and two external circuit boards 1121 and 1122. An external support platform 1140 is used to support and fix the external circuit boards 1121 and 1122.

[0133] like Figure 11 As shown, external circuit boards 1121 and 1122 are disposed on the lower side of the external support platform 1140, facing the wafer processing device 1110. The external circuit board 1121 houses a wired power transmitter unit 11211, and the wafer processing device 1110 houses a power receiver unit 11101. A wired power supply link 1131 is established between the two, allowing the power receiver unit 11101 to supply the received power to the corresponding power-consuming chip. Similarly, the external circuit board 1122 houses a wireless power transmitter unit 11221, and the wafer processing device 1110 houses a power receiver unit 11102. A wireless power supply link 1132 is established between the two, allowing the power receiver unit 11102 to supply the received power to the corresponding power-consuming chip. Figure 10 and Figure 11 It can be seen that, compared to placing the external circuit board and the wafer processing device on the same plane, the face-to-face approach can shorten the distance between the power transmitting unit and the power receiving unit to a certain extent, thereby reducing voltage drop and improving power supply efficiency and power supply effect.

[0134] It should be understood that the above description of the power supply device is merely an example. In practical applications, the location of the external circuit board can be determined based on the distribution of various functional units in the wafer system, the size of the external circuit board, the connection relationship and connection method between the external circuit board and the wafer system, etc. This disclosure does not impose any limitations on this.

[0135] It should be noted that in the schematic diagrams of this embodiment, the power supply link is only used to represent the connection relationship between the power transmitting unit and the power receiving unit, and is not used to limit the actual routing method and link shape of the power supply link. In practical applications, the routing position and shape can be set according to actual needs to establish the corresponding power supply link between the power transmitting unit and the power receiving unit.

[0136] It is important to emphasize that in a wafer system, wireless power supply and wired power supply can coexist or only one of them can exist. Moreover, for wireless power supply, any one or more of the following can be used: electromagnetic induction, magnetic field resonance, radio wave, and electric field coupling. Wired power supply is similar and will not be described in detail here.

[0137] A second aspect of this disclosure provides a power supply method.

[0138] Figure 12 This is a flowchart illustrating a power supply method provided in an embodiment of the present disclosure. This power supply method is applicable to a wafer system, and the wafer system is connected to at least one power receiving unit. (Refer to...) Figure 12 The power supply method includes:

[0139] In step S121, a wireless power supply link is established between the power receiving unit and at least one power transmitting unit.

[0140] In step S122, based on the wireless power supply link, the power of the power transmitting unit is transmitted to the power receiving unit, and the power receiving unit provides the received power to the wafer system.

[0141] In some alternative implementations, the wafer system includes at least one wafer processing device based on the fabrication of an undivided wafer.

[0142] In some alternative implementations, considering the high chip integration density in the wafer system, using traditional wiring methods for power supply could lead to high power consumption and severe heat generation, thus affecting the operation of the wafer system. Therefore, based on the regional shape, chip distribution, and power consumption of the wafer system, it can be divided into multiple power supply zones. Each power supply zone includes at least one power receiving unit and at least one chip, and there is a wireless power supply link between the power receiving unit and at least one power transmitting unit to provide power to the chip in the power supply zone where the power receiving unit is located.

[0143] In this embodiment, establishing a power supply link based on a wireless connection means supplying power to the wafer system using wireless power transmission, which transmits energy without direct electrical contact. Moreover, wireless connection methods include electromagnetic induction, magnetic field resonance, radio wave, electric field coupling, etc., and this disclosure does not limit the specific methods used.

[0144] For information on the division of power supply zones, the distribution of power receiving units and power transmitting units, please refer to the aforementioned content, which will not be repeated here.

[0145] A third aspect of the present disclosure provides a processing method.

[0146] Figure 13 A flowchart illustrating a processing method provided in this disclosure, applicable to wafer systems. (Refer to...) Figure 12 The processing method includes:

[0147] In step S131, in response to the received task processing request, the task to be processed is executed.

[0148] In some possible implementations, a task processing request is used to instruct the wafer system to perform a task to be processed based on the wafer processing device and / or an external circuit board. The task to be processed includes any one of image processing tasks, voice processing tasks, text processing tasks, and video processing tasks.

[0149] It should be noted that the above examples of tasks to be processed are merely illustrative, and the embodiments disclosed herein do not limit the tasks to be processed.

[0150] It should also be noted that the electrical energy required by the wafer system during the execution of the task to be processed is transmitted from the corresponding power transmitting unit to the power receiving unit, and then further transmitted from the power receiving unit to the corresponding chip.

[0151] It is understood that the various method embodiments mentioned above in this disclosure can be combined with each other to form combined embodiments without violating the principle and logic. Due to space limitations, this disclosure will not elaborate further. Those skilled in the art will understand that in the above methods of specific implementation, the specific execution order of each step should be determined by its function and possible internal logic.

[0152] In addition, this disclosure also provides electronic devices and computer-readable storage media, all of which can be used to implement any of the processing methods provided in this disclosure. The corresponding technical solutions and descriptions are described in the corresponding descriptions in the method section, and will not be repeated here.

[0153] Figure 14 This is a block diagram of an electronic device provided in an embodiment of the present disclosure.

[0154] Reference Figure 14 This disclosure provides an electronic device, which includes: at least one processor 1401; at least one memory 1402; and one or more I / O interfaces 1403 connected between the processor 1401 and the memory 1402; wherein the memory 1402 stores one or more computer programs that can be executed by the at least one processor 1401, and the one or more computer programs are executed by the at least one processor 1401 to enable the at least one processor 1401 to perform the above-described processing method.

[0155] In other words, the electronic device is the hardware system corresponding to the wafer system in the embodiments of this disclosure. It can be fabricated based on a complete uncut wafer or other functional unit, and provides power to the wafer system according to any of the power supply methods in the embodiments of this disclosure, so that the wafer system can be used to perform any task to be processed.

[0156] Figure 15 This is a block diagram of an electronic device provided in an embodiment of the present disclosure.

[0157] Reference Figure 15 This disclosure provides an electronic device that includes multiple processing cores 1501 and an on-chip network 1502. The multiple processing cores 1501 are all connected to the on-chip network 1502, and the on-chip network 1502 is used to exchange data between the multiple processing cores and external data.

[0158] One or more processing cores 1501 store one or more instructions, and the one or more instructions are executed by one or more processing cores 1501 to enable one or more processing cores 1501 to perform the above-described processing method.

[0159] In some alternative implementations, multiple processing cores can be fabricated on a complete, uncut wafer, and the wafer system can be powered by a power supply method according to any of the embodiments of this disclosure, so that the wafer system can be used to perform any of the tasks to be processed.

[0160] In some embodiments, the electronic device may be a neuromorphic chip. Since neuromorphic chips can employ vectorized computation and require external memory, such as Double Data Rate (DDR) synchronous dynamic random access memory, to load parameters such as weights of the neural network model, the batch processing method used in this embodiment offers higher computational efficiency.

[0161] This disclosure also provides a computer-readable storage medium storing a computer program thereon, wherein the computer program, when executed by a processor / processor core, implements the above-described processing method. The computer-readable storage medium may be volatile or non-volatile.

[0162] This disclosure also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code, wherein when the computer-readable code is run in a processor of an electronic device, the processor in the electronic device performs the above-described processing method.

[0163] Those skilled in the art will understand that all or some of the steps, systems, and apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software can be distributed on a computer-readable storage medium, which may include computer storage media (or non-transitory media) and communication media (or transient media).

[0164] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in connection with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of this disclosure as set forth by the appended claims.

Claims

1. A power supply device for a wafer system, characterized in that, include: At least one power transmitting unit and at least one power receiving unit connected to the wafer system; At least one external circuit board, wherein at least one power transmitting unit is provided on the external circuit board; The power transmitting unit establishes a wireless power supply link with at least one power receiving unit based on a wireless connection, and transmits power to the power receiving unit based on the wireless power supply link, and the power receiving unit provides the received power to the wafer system. The wafer system includes at least one wafer processing device, which is a processing device based on the fabrication of an undivided wafer; The wafer processing apparatus includes at least one main functional region and multiple auxiliary functional regions, wherein the main functional region includes multiple main functional chips arranged in an array, and the auxiliary functional regions include at least one auxiliary functional chip. The wafer system also includes at least one external chip packaged on the wafer processing device, and the power receiving unit is disposed on the wafer processing device and / or the external chip; The external circuit board and the wafer processing device are arranged face-to-face.

2. The power supply device according to claim 1, characterized in that, The power receiving units are evenly distributed in the wafer system and provide power to chips that are less than a preset threshold away from the power receiving units. And / or, Each chip in the wafer system is provided with at least one power receiving unit, and the power receiving unit is used to provide power to the chip it is located in.

3. The power supply device according to claim 1, characterized in that, include: The wafer system is provided with multiple power supply zones, each power supply zone including at least one power receiving unit, and the power receiving unit in the power supply zone provides power to the power supply zone through a wirelessly connected power transmitting unit.

4. The power supply device according to claim 3, characterized in that, include: The power transmission units are distributed in a region outside the wafer system, and / or the power transmission units are distributed on the wafer system; The power transmitting unit has a corresponding relationship with the power supply zone, and the power transmitting unit establishes a wireless power supply link with at least one power receiving unit in the corresponding power supply zone, and provides power to the power supply zone based on the wireless power supply link.

5. The power supply device according to claim 3 or 4, characterized in that, The area difference between the power supply zones is less than a preset area threshold, and / or the power consumption difference between the power supply zones is less than a preset power consumption threshold, and / or the distance between the connected power transmitting unit and the power receiving unit is less than a preset distance threshold.

6. The power supply device according to claim 4, characterized in that, The power transmission units are distributed on the wafer system, including: The power transmission unit is fabricated on at least one chip of the wafer system, and / or the power transmission unit is an independent chip fabricated in a predetermined region of the wafer system.

7. The power supply device according to claim 1, characterized in that, The power transmitting unit is connected to at least one external power source via a wired connection to obtain power from the external power source.

8. The power supply device according to claim 1, characterized in that, include: The power receiving unit establishes a wireless power supply link with the other power receiving unit through at least one of the following methods: electromagnetic induction, magnetic field resonance, radio wave, and electric field coupling.

9. A power supply method based on the power supply device as described in any one of claims 1-8, characterized in that, Applied to a wafer system, wherein the wafer system is connected to at least one power receiving unit, the power supply method includes: Establish a wireless power supply link between the power receiving unit and at least one power transmitting unit; Based on the wireless power supply link, the power of the power transmitting unit is transmitted to the power receiving unit, and the power receiving unit provides the received power to the wafer system.

10. A processing method based on the power supply device as described in any one of claims 1-8, characterized in that, Applied to wafer systems, the processing method includes: In response to a received task processing request, execute the task to be processed; The task to be processed includes at least one of image processing, speech processing, text processing, and video processing.

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