Method for forming conductive member and method for forming channel

Abstract

The present invention provides a method for forming a conductive member and a method for forming a channel, which can control grain size increase simply and effectively. First, a first portion and a second portion are formed on a substrate, wherein the first portion contains a first element constituting a conductive member to be obtained and a second element which forms a eutectic reaction with the first element, and the second portion contains a third element which forms an intermetallic compound with the second element. Next, the first portion is brought into a liquid phase state, and the temperature of the substrate is adjusted to cause primary crystallization of the first element. Next, while maintaining the temperature of the substrate at the same temperature, the second element is diffused from the first portion to the second portion, the ratio of the crystal of the first element in the first portion to the liquid phase is increased, and the grain of the first element is grown. Next, the first portion after the diffusion of the second element to the second portion is completed is used as the conductive member having the grain of the first element.

Description

Technical Field

[0001] The present invention relates to a method for forming a conductive member and a method for forming a channel. Background Art

[0002] For example, in a semiconductor device using polysilicon for a channel, carriers that carry conduction current are scattered by grain boundaries. Such grain boundary scattering increases channel resistance and decreases the current value. Therefore, attempts have been made to reduce grain boundaries, which are scattering sources of carriers, by increasing the grain size of polysilicon used for the channel.

[0003] For example, Non-Patent Document 1 discloses a technique for increasing the grain size of a polysilicon channel in 3D flash memory by using a metal-induced lateral crystallization (MILC) method with a Ni catalyst.

[0004] Prior Art Documents

[0005] Non-Patent Documents

[0006] Non-Patent Document 1: Hidenori Miyagawa et al., "Metal-Assisted Solid-PhaseCrystallization Process for Vertical Monocrystalline Si Channel in 3D FlashMemory", Published in: 2019 IEEE International Electron Devices Meeting (IEDM) <URL:https: / / doi.org / 10.1109 / IEDM19573.2019.<8993556> Summary of Invention

[0007] Technical Problem to be Solved by Invention

[0008] The present invention provides a method for forming a conductive member and a method for forming a channel that can increase the grain size of crystal grains with good controllability and in a simple manner.

[0009] Technical Solution for Solving Technical Problem

[0010] A method for forming a conductive component according to one aspect of the present invention includes: the steps of forming a first portion and a second portion on a substrate, wherein the first portion contains a first element constituting the conductive component to be obtained and a second element undergoing a eutectic reaction with the first element, and the second portion contains a third element forming an intermetallic compound with the second element; the steps of adjusting the temperature of the substrate after making the first portion into a liquid phase to induce primary crystallization of the first element; the steps of diffusing the second element from the first portion to the second portion while maintaining the temperature of the substrate at the same temperature, thereby increasing the ratio of the crystals of the first element in the first portion to the liquid phase and causing grain growth of the first element; and the steps of using the first portion after the diffusion of the second element into the second portion is completed as the conductive component having grains of the first element.

[0011] Invention Effects

[0012] According to the present invention, a method for forming a conductive component and a method for forming a channel are provided, which can controllably and easily achieve large grain size. Attached Figure Description

[0013] Figure 1 This is a cross-sectional view showing an example of a structure used in the method of forming a conductive component according to the first embodiment.

[0014] Figure 2 It means to make Figure 1 The first part of the structure is a cross-sectional view of the liquid phase.

[0015] Figure 3 It means having in Figure 1 A cross-sectional view of the conductive component of a giant grain of the first element obtained by diffusing the second element from the first part outward in the structure.

[0016] Figure 4 This is a Si-Al binary state diagram used to illustrate the crystal growth mechanism of Si when the first element is Si and the second element is Al.

[0017] Figure 5 It is a binary state diagram of Si-Al used to illustrate the growth of Si crystals during the cooling process from the liquid phase temperature in the Si-Al system.

[0018] Figure 6 It means from Figure 3 A cross-sectional view of the structure with the portion above the conductive components removed.

[0019] Figure 7 It is used to explain in Figure 6The diagram illustrates the steps involved in forming an amorphous conductive layer on a conductive component and then performing solid-phase epitaxial growth to create a thicker conductive layer overall.

[0020] Figure 8 This is a cross-sectional view showing an example of a structure used in the method for forming a conductive component according to the second embodiment.

[0021] Figure 9 It means to make Figure 8 The first part of the structure is a cross-sectional view of the liquid phase.

[0022] Figure 10 It means having in Figure 8 A cross-sectional view of a conductive component containing a large grain of the first and fourth elements, obtained by diffusing the second element from the first part outward in the structure.

[0023] Figure 11 This is a cross-sectional view showing an example of a structure used in the method for forming a conductive component in the third embodiment.

[0024] Explanation of reference numerals in the attached figures

[0025] 1, 41: Conductive layer

[0026] 2: Metal layer

[0027] 3: Intermetallic compound formation layer

[0028] 4, 4a: Barrier layer

[0029] 5: Diffusion Inhibition Layer

[0030] 11, 11': Part One

[0031] 12: Part Two

[0032] 21, 51: Grain size

[0033] 31, 34, 61: Conductive components

[0034] 33: Amorphous conductive layer. Detailed Implementation

[0035] Hereinafter, the embodiments will be described with reference to the accompanying drawings.

[0036] <Reasons and Summary>

[0037] In applications where polycrystalline conductors like polycrystalline silicon are used, such as in the channels of semiconductor devices where increased carrier mobility is required, techniques to increase crystal grain size have been studied to reduce grain boundaries, which act as sources of carrier scattering. Well-known techniques for increasing crystal grain size include limiting the crystallization of precipitates that form the basis of crystallization from the amorphous state of the solid phase to reduce their number, and allowing only the pre-precipitated nuclei (primary crystals) to grow through slow cooling.

[0038] When applying such methods to semiconductor manufacturing processes, precise temperature control within the substrate (wafer) plane is required. However, it is practically impossible to achieve uniform, slow cooling control within the substrate plane at an equal cooling rate. Furthermore, in the case of nucleation from the liquid phase, when a two-component or multi-component system is used to lower the melting point, the system becomes a solid-liquid two-phase system during cooling. This leads to heat dissipation at the solid-liquid interface, sometimes resulting in dendritic crystal growth with other components remaining between the dendritic crystals. Therefore, it is difficult to obtain crystals with a uniform and flat composition.

[0039] Therefore, in one approach, crystal growth is performed during isothermal processing. Specifically, a first portion and a second portion are formed on a substrate. The first portion contains a first element constituting the desired conductive component and a second element undergoing a eutectic reaction with the first element. The second portion contains a third element that forms an intermetallic compound with the second element, allowing the second element to diffuse from the first portion. Furthermore, after bringing the first portion to a liquid phase, the substrate temperature is adjusted to induce primary crystallization of the first element. While maintaining this temperature, the second element diffuses from the first portion to the second portion, increasing the ratio of the first element crystals to the liquid phase in the first portion, thus promoting grain growth of the first element. The first portion after the diffusion of the second element to the second portion is complete becomes a conductive component with large-diameter grains. Therefore, it is not necessary to control a slow cooling rate within the substrate surface, nor is precise temperature control required. Even with temperature inhomogeneities within the substrate surface, large-diameter grains can be achieved with good control. Additionally, conductive components with large-diameter grains can be easily formed without the need for special methods.

[0040] <Detailed Implementation>

[0041] The specific implementation methods are described below.

[0042] [First Implementation Method]

[0043] Figure 1 This is a cross-sectional view showing an example of a structure used in the method of forming a conductive component according to the first embodiment.

[0044] like Figure 1As shown, firstly, a conductive layer 1, composed of a first element constituting the desired conductive component, is formed on a substrate with an insulating film 10 made of SiO2 or the like as a barrier. A metal layer 2, composed of a second element that undergoes a eutectic reaction with the first element, is then formed on the conductive layer 1. The conductive layer 1 and the metal layer 2 constitute a first portion 11 containing the first and second elements. Furthermore, an intermetallic compound forming layer 3, containing the second element and a third element forming the intermetallic compound, is formed on the metal layer 2 with a barrier layer 4 as a barrier. The intermetallic compound forming layer 3 is configured as a second portion 12 capable of allowing the second element to diffuse from the first portion 11.

[0045] Barrier layer 4 acts as a barrier to the second element, suppressing and controlling its diffusion into the second part 12 (intermetallic compound forming layer 3). Furthermore, in... Figure 1 In the example, a barrier layer 4a is formed on the intermetallic compound forming layer 3, which has the function of inhibiting the diffusion of elements to the upper layers. The barrier layer 4a can be made of the same material as the barrier layer 4.

[0046] The conductive layer 1, metal layer 2, intermetallic compound forming layer 3, and barrier layer 4 and 4a are formed by thin film formation technologies such as CVD, ALD, and PVD.

[0047] The first element constituting the conductive layer 1 is an element that becomes the conductive component to be formed, such as silicon (Si) or germanium (Ge), which can be used as semiconductor materials. The metal layer 2 is composed of a second element that undergoes a eutectic reaction with the first element, as described above. That is, the second element satisfies the following equation (1) relative to the first element.

[0048] E 12 -(E 11 +E 22 / 2)>0 ……(1)

[0049] Here, E 12 It is the binding energy between the first and second elements, E 11 It is the binding energy between the first elements, E 22 It is the binding energy between the second element. In equation (1), the binding energy between the first element and the second element is higher than the average value of the binding energy between the first element and the second element, and the first element and the second element repel each other. The solid solubility of the second element relative to the first element is preferably less than 1 mol%.

[0050] The thicknesses of the conductive layer 1 and the metal layer 2 are adjusted so that when they melt and the first and second elements reach the liquidus temperature from the liquid phase, they become the primary crystals of the first element.

[0051] Furthermore, the intermetallic compound forming layer 3 contains a third element that forms an intermetallic compound with the second element, as described above. That is, the third element satisfies the following equation (2) relative to the second element.

[0052] E 23 -(E 22 +E 33 / 2)<0 ……(2)

[0053] Here, E 23 It is the binding energy between the second and third elements, E 22 It is the binding energy between the second element, E 33 It refers to the binding energy between the third element. That is, the binding energy between the second and third elements is higher than the average binding energy between the second and third elements, indicating that the second and third elements tend to attract each other.

[0054] When the first element is Si, aluminum (Al) can be used as the second element, for example. In addition, when the second element is Al, titanium (Ti) can be used as the third element constituting the intermetallic compound forming layer 3, and titanium nitride (TiN) can be used as the material constituting the barrier layers 4 and 4a.

[0055] When the first element is Ge, tin (Sn) can be cited as an example as the second element. In addition, when the second element is Sn, Ti can be cited as an example as the third element, and TiN can be cited as an example as a material constituting the barrier layer 4, 4a.

[0056] In this embodiment, the temperature at which the first element and the second element become liquid is set, such as... Figure 2 As shown, the conductive layer 1 and the metal layer 2 are melted to make the first part 11 a liquid phase. The processing temperature (substrate temperature) is adjusted to cause the primary crystallization of the first element. While maintaining this temperature, the second element diffuses outward to grow the primary crystal. That is, by satisfying the above equations (1) and (2), a chemical potential gradient of the second element is formed between the first part 11 and the intermetallic compound forming layer 3 that becomes the second part 12. Through isothermal processing, the second element diffuses outward to the second part 12 via the barrier layer 4. Due to the outward diffusion of the second element, the concentration of the first element increases. When the first element becomes supersaturated, the first element precipitates as a primary crystal in the liquid phase and begins to grow. Moreover, as the outward diffusion of the second element further progresses, the ratio of the first element crystals in the first part 11 to the liquid phase increases, and crystal growth progresses.

[0057] Here, the key point lies in the fact that the outer diffusion of the second element becomes the rate-limiting process for crystal growth of the first element. Therefore, by utilizing the material of the barrier layer 4 (the diffusion rate and density of the second element), the film thickness, and the processing temperature (constant), crystal growth based on the outer diffusion of the second element can be controlled, thereby designing the crystal grain size. Ultimately, as... Figure 3 As shown, the first part 11 becomes a conductive component 31 with a large grain 21 containing a first element. When the first element is a semiconductor material such as Si or Ge, the conductive component 31 can be used as a channel of a semiconductor device. The intermetallic compound forming layer 3 is formed by introducing a second element to form a metal compound, thus changing into an intermetallic compound layer 32.

[0058] As a specific example, we will explain the case where the first element is Si and the second element is Al.

[0059] like Figure 4 As shown in the binary state diagram, in the composition (C1) of 20 mole% Si-80 mole% Al, the primary crystallization temperature is 700℃. At a temperature t1 between 600 and 700℃, the molar ratio (mole ratio) of the liquid phase / solid phase in composition C1 can be expressed as solid phase: liquid phase = l1C1:S1C1 using l1 and S1 in the diagram.

[0060] If, at temperature t1, the outer diffusion of the second element progresses further, and the composition of Si changes very slowly from C1 to C2 during solidification, then the molar ratio of liquid phase to solid phase becomes solid phase: liquid phase = l1C2: S1C2, and the ratio of crystal to liquid phase increases from l1C1 to l1C2. Thus, crystal growth progresses, and ultimately, as a conductive component 31, polycrystalline silicon with large grains is formed.

[0061] When Si crystals are grown during cooling from the liquidus temperature, the number of crystal precipitates is determined by the "composition" and "temperature," while crystal growth is determined by the "cooling rate." For example, in the case of the Si-Al system, such as Figure 5 As shown in the binary state diagram, in a composition of 20 mole% Si-80 mole% Al (C1), after primary crystallization at 700°C, crystal growth is achieved by cooling at a desired rate. Therefore, as described above, precise temperature control within the substrate plane is required, and the crystals become a solid-liquid two-phase mixture during cooling, making it difficult to obtain crystals with a uniform and flat composition.

[0062] In contrast, in this embodiment, cooling is not required and therefore precise temperature control is not necessary. The crystal growth of the first element can be controlled by controlling the outer diffusion of the second element, thus enabling well-controllable and easy scaling of the large grain size.

[0063] As described above, after the process of forming the conductive component 31 by the reaction of the second and third elements is completed during temperature control, the temperature is lowered to below 300°C. Figure 6 As shown, the barrier layers 4 and 4a and the intermetallic compound layer 32 on the conductive component 31 are removed, leaving the conductive component 31. When the first element is a semiconductor material, the retained conductive component 31 can be directly used as a channel. The film thickness of the conductive component 31 at this time is, for example, about 4 to 5 nm.

[0064] In addition, such as Figure 7 As shown, a conductive component 31 with large grains can also be used as a template, and an amorphous conductive layer 33 containing the first element can be formed on it, followed by solid-state epitaxial growth to form a thicker conductive component 34. That is, by performing solid-state epitaxial growth on the amorphous conductive layer 33, a crystal is obtained by transferring the large grains of the conductive component 31, which serves as the template, resulting in a thicker conductive component 34. When the first element 1 is a semiconductor material, a thicker channel can be obtained using this method.

[0065] When the first element is Si, the amorphous conductive layer 33 is, for example, n. + When a-Si is doped, the conductive component 34 becomes n-Si. The thickness of the amorphous conductive layer 33 is, for example, 3 to 10 nm. In this case, compared to the 4 to 5 nm thickness of the conductive component 31, the thickness of the thick conductive component 34 after solid-phase epitaxial growth is about 7 to 15 nm. The solid-phase epitaxial growth temperature is preferably 600°C or higher in the case of Si. Furthermore, from the viewpoint of suppressing nucleus formation starting from the site present above, it is preferable to be below 800°C.

[0066] In this embodiment, the film thickness of the first portion 11 is set according to the desired thickness of the conductive component 31. Furthermore, the thickness of the intermetallic compound forming layer 3 is appropriately set based on the amount of the second element that should diffuse from the first portion 11 into the intermetallic compound forming layer 3. Additionally, the thickness of the barrier layer 4 is set to a thickness capable of suppressing the diffusion of the second element from the first portion 11 and controlling the diffusion rate to a moderate level.

[0067] When the first element is Si and the second element is Al, and the third element is Ti and the barrier layers 4 and 4a are TiN, the thickness of the first portion 11 can be in the range of 10 to 50 nm, for example, 15 nm. Alternatively, the thickness of the intermetallic compound layer 3 can be in the range of 20 to 100 nm, for example, 20 nm. Furthermore, the thickness of the barrier layer 4 can be in the range of 3 to 15 nm, for example, 3 nm, and the thickness of the barrier layer 4a can be in the range of 5 to 50 nm, for example, 5 nm.

[0068] In addition, Figures 1-3 In sections 6 and 7, for convenience, the element symbols of the specific examples mentioned above are marked on each layer.

[0069] [Second Implementation]

[0070] Next, the second embodiment will be described.

[0071] In the second embodiment, as a conductive component, a conductive component is obtained by adding a fourth element to the first element, which has a lower melting point than the first element and forms an all proportional solid solution with the first element. That is, the fourth element satisfies the following equation (3) relative to the first element.

[0072] E 14 -(E 11 +E 44 / 2)=0……(3)

[0073] E 14 It is the binding energy between the first and fourth elements, E 11 It is the binding energy between the first elements, E 44 It is the binding energy between the fourth element. Equation (3) means that there is no interaction between the first element and the fourth element.

[0074] Figure 8 This is a cross-sectional view showing an example of the structure used in the method for forming the conductive component according to the second embodiment. In this embodiment, instead of Figure 1 The conductive layer 1 of the structure is a conductive layer 41 obtained by adding a fourth element to the first element constituting the conductive component to be obtained. A metal layer 2 is formed on the conductive layer 41. A first portion 11' containing the first element, the fourth element, and the second element is formed by the conductive layer 41 and the metal layer 2. The intermetallic compound forming layer 3 and the barrier layers 4, 4a, which are the second portion 12, are similar to those in the first embodiment. Figure 1 The structures shown are the same.

[0075] As the first and fourth elements constituting the conductive layer 41, Si and Ge, as semiconductor materials, can be used, for example.

[0076] In this embodiment, the temperature at which the first element, the fourth element, and the second element become liquid phase is set, such as... Figure 9 As shown, the conductive layer 41 and the metal layer 2 are melted to make the first portion 11' a liquid phase. Then, the processing temperature (substrate temperature) is adjusted to cause primary crystals containing the first and fourth elements to crystallize. While maintaining this temperature, the second element diffuses outward to grow the primary crystals. Then, similar to the first embodiment, grains are grown in an isothermal process until they reach the desired size. At the end of the process, excess portions are removed. Thus, the final product is as shown... Figure 10 As shown, a conductive component 61 is formed having a large grain 51 containing a first element and a fourth element. In the case that the first element and the fourth element are Si and Ge, the conductive component 61 is silicon-germanium (SiGe).

[0077] In this embodiment, by using a conductive component 61 obtained by adding a fourth element with a lower melting point than the first element to the first element, the melting point can be lowered, and the processing temperature can be reduced. The advantage of such a low processing temperature is that by suppressing the outward diffusion of the second element, the crystallization process of the first element can proceed more slowly, resulting in larger grains.

[0078] In addition, Figures 8-10 For convenience, the element symbols of the above specific examples are labeled for each layer.

[0079] [Third Implementation Method]

[0080] Next, the third embodiment will be described.

[0081] Figure 11 This is a cross-sectional view showing an example of the structure used in the method for forming a conductive component according to the third embodiment. In this embodiment, in the structure of the first embodiment, a diffusion suppression layer 5 is formed between the first portion 11 and the intermetallic compound forming layer 3, which serves as the second portion 12, and more specifically, between the barrier layer 4 and the intermetallic compound forming layer 3, to suppress the outward diffusion of the first element. When the conductive layer 1 and the metal layer 2 are melted to make the first portion 11 a liquid phase, and then the second element is allowed to diffuse outward to the second portion 12 at a processing temperature (substrate temperature), the first element may also diffuse outward. The diffusion suppression layer 5 has the function of suppressing such outward diffusion of the first element. As the diffusion suppression layer 5, a diffusion suppression layer containing the first element can be used. For example, when the first element is Si, a Si film can be used as the diffusion suppression layer 5.

[0082] <Other Applications>

[0083] The embodiments described above are illustrative in all respects and should not be considered restrictive. The above embodiments can be omitted, substituted, or modified in various ways without departing from the scope and spirit of the invention (claims).

[0084] For example, in the above embodiments, an example is given of using semiconductor materials as the first and fourth elements and conductive components as the channel of the semiconductor device. However, the first and fourth elements are not limited to semiconductor materials, and other conductive materials can be used. In addition, the conductive components are not limited to the channel of the semiconductor device.

Claims

1. A method for forming a conductive component, characterized in that, include: The steps of forming a first part and a second part on a substrate, wherein the first part is formed by stacking a conductive layer containing a first element and a metal layer containing a second element, the first element constituting the conductive component to be obtained, the second element undergoing a eutectic reaction with the first element, and the second part being formed by an intermetallic compound forming layer formed on the metal layer, containing a third element that forms an intermetallic compound with the second element. The step of adjusting the temperature of the substrate after making the first part into a liquid phase to induce the primary crystallization of the first element; While maintaining the substrate at the same temperature, the second element diffuses from the first portion to the second portion, increasing the ratio of the first element's crystals to the liquid phase in the first portion, thereby causing grain growth of the first element; and The first part after the diffusion of the second element into the second part is completed, which is then used as the conductive component of the grain having the first element.

2. The method for forming a conductive component as described in claim 1, characterized in that: The first element is a semiconductor material.

3. The method for forming a conductive component as described in claim 2, characterized in that: The first element is silicon.

4. The method for forming a conductive component as described in claim 1 or 2, characterized in that: The first part contains a fourth element with a lower melting point than the first element and which forms an infinite solid solution with the first element, and the conductive component contains the fourth element in the first element.

5. The method for forming a conductive component as described in claim 4, characterized in that: The first element and the fourth element are semiconductor materials.

6. The method for forming a conductive component as described in claim 5, characterized in that: The first element is silicon, and the fourth element is germanium.

7. The method for forming a conductive component as described in claim 3 or 6, characterized in that: The second element is aluminum, and the third element is titanium.

8. The method for forming a conductive component as described in claim 2, characterized in that: The first element is germanium.

9. The method for forming a conductive component as described in any one of claims 1 to 3, characterized in that: A barrier layer is provided between the first part and the second part to act as a barrier to the second element, thereby suppressing and controlling the diffusion of the second element into the second part.

10. The method for forming a conductive component as described in claim 9, characterized in that: The barrier layer is titanium nitride.

11. The method for forming a conductive component as described in any one of claims 1 to 3, characterized in that: It also includes the following step: after using the first portion as the conductive component, removing the portion present on the conductive component.

12. The method for forming a conductive component as claimed in claim 11, characterized in that: After removing the portion existing on the conductive component, an amorphous conductive layer containing the first element is formed on the conductive component. The grains of the conductive component are transferred to the amorphous conductive layer by solid-phase epitaxial growth, so that the conductive component is formed thicker.

13. The method for forming a conductive component as described in any one of claims 1 to 3, characterized in that: A diffusion suppression layer is provided between the first part and the second part to suppress the diffusion of the first element into the second part.

14. The method for forming a conductive component as described in claim 13, characterized in that: The diffusion inhibition layer contains the first element.

15. A method for forming a channel in a semiconductor device, characterized in that, include: The steps of forming a first part and a second part on a substrate, wherein the first part is formed by stacking a conductive layer containing a first element and a metal layer containing a second element, the first element being a semiconductor material constituting the desired channel, the second element undergoing a eutectic reaction with the first element, and the second part being formed by an intermetallic compound forming layer formed on the metal layer, containing a third element that forms an intermetallic compound with the second element. The step of adjusting the temperature of the substrate after making the first part into a liquid phase to induce the primary crystallization of the first element; The steps of maintaining the substrate temperature at the same temperature, allowing the second element to diffuse from the first part to the second part, increasing the ratio of the first element crystals to the liquid phase in the first part, and growing the first element grains. The first part after the diffusion of the second element into the second part is completed, serving as a conductive component of the channel, having grains containing the first element; and The step of removing the portion present on the conductive component.

16. The method for forming a channel as described in claim 15, characterized in that: The first element is silicon.

17. The method for forming a channel as described in claim 15, characterized in that: The first part contains germanium as a fourth element added to silicon, which is the first element, and the conductive component is silicon-germanium.

18. The method for forming a channel as described in any one of claims 15 to 17, characterized in that: A barrier layer is provided between the first part and the second part to act as a barrier to the second element, thereby suppressing and controlling diffusion into the second part.

19. The method for forming a channel as described in any one of claims 15 to 17, characterized in that: After removing the portion existing on the conductive component, an amorphous conductive layer containing the first element is formed on the conductive component. The grains of the conductive component are transferred to the amorphous conductive layer by solid-phase epitaxial growth, making the conductive component thicker and the channel thicker.

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