Methods of fabricating gan devices and gan devices

Abstract

The application discloses a method for preparing a GaN device, and applies to the field of semiconductor devices. The method comprises the following steps: generating a stress compensation layer on the back surface of a substrate; and epitaxially growing a GaN layer on the front surface of the substrate. According to the application, the stress compensation layer is prepared on the back surface of the substrate, so that the front surface of the substrate is subjected to tensile stress. Therefore, the tensile stress applied by the substrate to the GaN layer can be reduced, and the cracking phenomenon of the GaN layer can be reduced.

Description

Technical Field

[0001] This application relates to the field of semiconductor devices, and more particularly to methods for fabricating GaN devices and GaN devices. Background Technology

[0002] GaN materials have advantages such as large bandgap, low dielectric constant, high electron mobility and high electron saturation velocity, and have quickly become an ideal material for manufacturing high-power and high-frequency power electronic devices.

[0003] Currently, due to the difficulty in fabricating homogeneous substrates for GaN, epitaxial growth of GaN materials generally uses heterogeneous substrates, such as Si substrates. The GaN epitaxial layer and the Si substrate have different lattice constants, resulting in a certain lattice mismatch. This lattice mismatch introduces a high density of dislocations into the GaN material; the greater the lattice mismatch, the higher the dislocation density tends to be. Furthermore, the GaN epitaxial layer and the Si substrate have different coefficients of thermal expansion, resulting in a certain thermal mismatch. This thermal mismatch causes the Si substrate to exert enormous tensile stress on the GaN epitaxial layer when it cools from the growth temperature to room temperature, potentially leading to cracking. The primary reason for cracking in the GaN epitaxial layer is the excessive tensile stress, which the material cannot withstand. To reduce cracking, a buffer layer is introduced between the Si substrate and the GaN epitaxial layer. This buffer layer has a smaller lattice constant than GaN, causing compressive strain at the interface between the buffer layer and the GaN epitaxial layer. This weakens or eliminates the tensile strain between the Si substrate and the GaN epitaxial layer.

[0004] If a method that can reduce dislocation density is used to epitaxially grow a GaN epitaxial layer on the buffer layer, the compressive strain generated at the interface between the buffer layer and the GaN epitaxial layer will be reduced. As a result, the tensile strain generated between the Si substrate and the GaN epitaxial layer cannot be weakened, leading to cracking of the GaN epitaxial layer. Summary of the Invention

[0005] This application provides a method for fabricating GaN devices and GaN devices that can reduce the phenomenon of cracking in GaN layers.

[0006] The first aspect of this application provides a method for fabricating GaN devices.

[0007] This method includes forming a stress compensation layer on the back side of a substrate and epitaxially growing a GaN layer on the front side of the substrate. The coefficient of thermal expansion of the stress compensation layer differs from that of the substrate; that is, the coefficient of thermal expansion of the stress compensation layer can be greater than or less than that of the substrate. Because the coefficients of thermal expansion of the stress compensation layer and the substrate are different, the stress compensation layer applies stress to the substrate. This stress exhibits different characteristics depending on the ratio of the thickness of the stress compensation layer to the thickness of the substrate. If the coefficient of thermal expansion of the stress compensation layer is greater than that of the substrate, and the ratio of the thickness of the stress compensation layer to the thickness of the substrate is large, then the stress manifests as tensile stress on the entire substrate, meaning both the front and back sides of the substrate are subjected to tensile stress. If the coefficient of thermal expansion of the stress compensation layer is less than that of the substrate, and the ratio of the thickness of the stress compensation layer to the thickness of the substrate is small, then the stress manifests as tensile stress on one part of the substrate and compressive stress on another part; that is, the back side of the substrate is subjected to compressive stress, and the front side of the substrate is subjected to tensile stress.

[0008] This application reduces the tensile stress on the GaN layer by fabricating a stress compensation layer on the back side of the substrate, thereby reducing the occurrence of GaN layer cracking.

[0009] In one possible implementation, the method further includes: generating an AlGaN layer on the GaN layer.

[0010] In one possible implementation, the method further includes forming a source, a drain, and a gate on the AlGaN layer.

[0011] In one possible implementation, the material selection and thickness of the stress compensation layer and the substrate satisfy the following conditions:

[0012] The ratio of the thickness of the stress compensation layer to the thickness of the substrate is less than a preset threshold, and the coefficient of thermal expansion of the stress compensation layer is less than the coefficient of thermal expansion of the substrate; or, the ratio of the thickness of the stress compensation layer to the thickness of the substrate is greater than a preset threshold, and the coefficient of thermal expansion of the stress compensation layer is greater than the coefficient of thermal expansion of the substrate.

[0013] In one possible implementation, the thickness of the stress compensation layer is 5 μm to 70 μm.

[0014] In one possible implementation, the substrate is a silicon substrate, and the stress compensation layer is made of SiO2. SiO2 has a lower coefficient of thermal expansion than Si, and it is also heat-resistant. Furthermore, compared to SiN, SiO2 is more easily etched, which reduces the cost of removing the stress compensation layer if it needs to be removed subsequently. Additionally, SiO2 has a lower coefficient of thermal expansion than SiC, meaning that when the substrate is SiC, SiO2 can be used as a stress compensation layer, allowing multiple substrates to share SiO2 as a stress compensation layer and reducing its cost.

[0015] In one possible implementation, the GaN layer is epitaxially grown on the front side of the substrate using a two-step growth method or lateral epitaxy. The lattice constant of Si is approximately 5.43 Å, and the lattice constant of GaN is approximately 3.19 Å. In the prior art, it is assumed that the substrate is a Si substrate, and a buffer layer is included between the Si substrate and the GaN layer. The lattice constant of the buffer layer is smaller than that of GaN. Because the lattice constant of the buffer layer is smaller than that of GaN, epitaxial growth of the GaN layer on the buffer layer applies a compressive stress to the GaN layer. This compressive stress can be used to offset part or all of the tensile stress, which is the stress exerted by the Si substrate on the GaN layer during cooling due to the difference in thermal expansion coefficients. By offsetting part or all of the tensile stress, the risk of cracking in the GaN layer can be reduced. Therefore, this compressive stress is beneficial. Two-step growth or lateral epitaxy can reduce the dislocation density between the buffer layer and the GaN layer, but it reduces or even eliminates this compressive stress, thereby increasing the risk of cracking in the GaN layer.

[0016] This application reduces or even eliminates the tensile stress exerted by the substrate on the GaN layer by fabricating a stress compensation layer on the back side of the substrate. When the stress compensation layer eliminates the tensile stress exerted by the substrate on the GaN layer, it can be expressed by the following formula 1: F1 represents the tensile stress exerted by the stress compensation layer on the front side of the substrate, K is the elastic coefficient of the substrate, D2 is the third temperature, D1 is the first temperature, α1 is the thermal expansion coefficient of GaN, and α2 is the thermal expansion coefficient of the substrate. In the presence of a buffer layer, because the lattice constant of the buffer layer differs from that of GaN, the buffer layer applies a stress Y to the GaN layer. If, according to Formula 1 above, the stress compensation layer needs to offset the tensile stress exerted by the substrate on the GaN layer, then F1 needs to be adjusted up or down due to the presence of stress Y. If the lattice constant of the buffer layer is greater than that of GaN, the stress Y is tensile stress, and F1 needs to be increased; if the lattice constant of the buffer layer is less than that of GaN, the stress Y is compressive stress, and F1 needs to be decreased. If there is no buffer layer between the substrate and the GaN layer, the stress Y can be understood as the stress exerted by the substrate on the GaN layer.

[0017] In this application, stress reduction and dislocation density reduction are decoupled by fabricating a stress compensation layer. The stress compensation layer is responsible for reducing stress, while the epitaxial growth method is responsible for reducing dislocation density. This eliminates the need to worry about stress issues preventing the use of two-step growth methods or lateral epitaxy. Therefore, reducing or even eliminating stress Y through two-step growth methods or lateral epitaxy not only avoids increasing the risk of GaN layer cracking but also reduces or eliminates the influence of stress Y on Equation 1, facilitating the determination of F1. Furthermore, the thickness and thermal expansion coefficient of the stress compensation layer can be derived from F1.

[0018] In one possible implementation, the stress compensation layer is formed on the back side of the substrate at a first temperature;

[0019] At a second temperature, the stress compensation layer is formed on the back side of the substrate, where the second temperature is greater than the second temperature.

[0020] In one possible implementation, after epitaxially growing the GaN layer on the front side of the substrate, the method further includes removing the stress compensation layer. The stress compensation layer functions to provide tensile stress on the front side of the substrate during the epitaxial growth of the GaN layer. Removing the stress compensation layer after completing the epitaxial growth of the GaN layer can reduce the thickness of the GaN device.

[0021] In one possible implementation, the stress compensation layer is removed at a third temperature, which is lower than the second temperature and lower than the first temperature, with the difference between the third temperature and the first temperature being less than 500 degrees Celsius. This application specifies the third temperature, which is generally room temperature. Removing the stress compensation layer at room temperature reduces the cost of removing the stress compensation layer.

[0022] In one possible implementation, the stress compensation layer is removed by mechanical polishing. Mechanical polishing is a common step in the fabrication process of GaN devices. This application removes the stress compensation layer during mechanical polishing, thus eliminating the need for an additional step to prepare the stress compensation layer and reducing production costs.

[0023] In one possible implementation, a buffer layer is further included between the substrate and the GaN layer to prevent an alloying reaction between the GaN layer and the substrate. Specifically, the buffer layer serves to prevent an alloying reaction between the GaN layer and the substrate. In the prior art, the lattice constant of the buffer layer must be lower than the lattice constant of GaN for the buffer layer to reduce the tensile stress on the GaN layer. In this application, the stress compensation layer performs the function of stress reduction, while the buffer layer does not need to perform this function; therefore, the lattice constant of the buffer layer does not need to be lower than the lattice constant of GaN. This increases the range of materials that can be selected for the buffer layer, providing conditions for using lower-cost materials and / or materials that do not obstruct the vertical current flow in the GaN device as buffer layers.

[0024] A second aspect of this application provides a GaN device.

[0025] The GaN device includes: a substrate;

[0026] A stress compensation layer is formed on the back side of the substrate;

[0027] A GaN layer is formed on the front side of the substrate.

[0028] In one possible implementation, the device further includes:

[0029] An AlGaN layer is formed on the front side of the GaN layer.

[0030] In one possible implementation, the device further includes:

[0031] The source region, drain region, and gate region are formed on the front side of the AlGaN layer.

[0032] In one possible implementation, the material selection and thickness of the stress compensation layer and the substrate satisfy the following conditions:

[0033] The ratio of the thickness of the stress compensation layer to the thickness of the substrate is less than a preset threshold, and the coefficient of thermal expansion of the stress compensation layer is less than the coefficient of thermal expansion of the substrate; or, the ratio of the thickness of the stress compensation layer to the thickness of the substrate is greater than a preset threshold, and the coefficient of thermal expansion of the stress compensation layer is greater than the coefficient of thermal expansion of the substrate.

[0034] In one possible implementation, the thickness of the stress compensation layer is 5 μm to 70 μm.

[0035] In one possible implementation, the substrate is a Si substrate, and the stress compensation layer is made of SiO2.

[0036] In one possible implementation, a buffer layer is further included between the substrate and the GaN layer. For a description of the beneficial effects of the second aspect of this application, or any embodiment thereof, reference can be made to the foregoing description of the beneficial effects of the first aspect, or any embodiment thereof. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the structure of GaN-based HEMT;

[0038] Figure 2 A schematic diagram of GaN device warping;

[0039] Figure 3 This is a schematic diagram of a GaN device that reduces tensile stress by adding a buffer layer.

[0040] Figure 4 This is a flowchart illustrating a method for reducing tensile stress in a GaN device according to an embodiment of this application.

[0041] Figure 5 This is a schematic diagram of the GaN device structure in the fabrication process when the thickness ratio is less than a threshold in an embodiment of this application.

[0042] Figure 6 This is a force diagram of a GaN device in an embodiment of this application;

[0043] Figure 7 This is a schematic diagram of the GaN device structure in the fabrication process when the thickness ratio is greater than a threshold in the embodiments of this application;

[0044] Figure 8 This is another force diagram of a GaN device in an embodiment of this application;

[0045] Figure 9 This is a schematic diagram of a GaN device in an embodiment of this application. Detailed Implementation

[0046] This application provides a method for fabricating GaN devices and GaN devices, which are applied in the field of semiconductor devices and can reduce the phenomenon of cracking in GaN layers in GaN devices.

[0047] To facilitate understanding of the technical solutions in this application, the relevant background technology is described below.

[0048] Epitaxial growth, broadly speaking, is also a type of thin film deposition technique. As the name suggests, epitaxy means "extending outwards." It is a special type of thin film growth, specifically referring to the growth of a new single crystal layer on a single-crystal substrate. Under certain conditions, a new single-crystal layer with the required conductivity, resistivity, and thickness is grown on a prepared single-crystal substrate along the original crystal axis; this is called an epitaxial layer. Except for the crystal orientation, which aligns with the substrate single crystal, the epitaxial layer's other properties can be selected independently, such as conductivity, resistivity, and thickness, all of which can be grown according to new requirements. Based on whether the epitaxial layer and the substrate are made of the same material, epitaxy can be divided into homoepitaxial growth and heteroepitaxial growth. If both materials are the same, it is homoepitaxial growth; otherwise, it is heteroepitaxial growth.

[0049] GaN material possesses advantages such as a large bandgap, low dielectric constant, high electron mobility, and high electron saturation velocity, rapidly becoming an ideal material for fabricating high-power and high-frequency power electronic devices. Epitaxial growth of GaN material on a substrate is fundamental to the fabrication of GaN electronic devices (GaN devices for short). GaN devices include heterojunction field-effect transistors (HFETs), metal oxide semiconductor field-effect transistors (MOSFETs), and high electron mobility transistors (HEMTs), among others. Figure 1 As shown, Figure 1 This is a schematic diagram of a GaN-based HEMT structure. Along the vertical direction, it includes a substrate 102, a GaN layer 101, and an A1AlGaN layer 103. The front side of the substrate 102 is adjacent to the GaN layer 101, and the front side of the substrate 102 refers to the surface of the substrate 102 facing the positive vertical direction. In the subsequent description of the embodiments in this application, the definitions of the horizontal direction, vertical direction, and front side of the GaN device will be used. It should be noted that... Figure 1 This is just a schematic diagram of a GaN-based HEMT. In the actual structure of a GaN-based HEMT, other layers may be included. For example, a GaN layer may also be included on the front side of the AlGaN layer 103. The front side of the AlGaN layer 103 refers to the side of the AlGaN layer 103 facing the vertical positive direction.

[0050] Lattice mismatch, in epitaxial growth, refers to the mismatch phenomenon caused by the difference in lattice constants between the substrate and the epitaxial layer. When growing a single crystal layer of another material on a single crystal substrate, the difference in lattice constants between the two materials generates stress near the growth interface, leading to crystal defects—dislocations. In materials science, dislocations refer to an internal microscopic defect in crystalline materials, namely, the local irregular arrangement of atoms (crystallographic defects). Geometrically, dislocations are a type of line defect, which can be considered as the boundary between slipped and unslipped portions of a crystal, and their existence has a significant impact on the physical properties of the material. Dislocation density is defined as the total length of boundary lines contained in a unit volume of crystal. Dislocation density can be used to describe the degree of dislocations caused by lattice mismatch.

[0051] Thermal mismatch, also known as thermal expansion mismatch, is a phenomenon that occurs during epitaxial growth due to the difference in thermal expansion coefficients between the substrate and the epitaxial layer. GaN devices typically require epitaxial growth of the epitaxial layer at a high temperature, referred to as the epitaxial growth temperature. The operating temperature for GaN devices is generally room temperature, which differs from the epitaxial growth temperature. Furthermore, the different thermal expansion coefficients of the substrate and the epitaxial layer result in stress between them when the temperature drops from the epitaxial growth temperature to room temperature.

[0052] The method for fabricating GaN devices in this application is used in the process of fabricating GaN devices, specifically, in the process of epitaxially growing GaN on a substrate. The substrate can be a Si substrate, a SiC substrate, etc. A Si substrate refers to a substrate composed of elemental Si, and a SiC substrate is a substrate composed of the compound SiC. It should be noted that the aforementioned Si and SiC substrates may contain some impurities. For ease of explanation, the following description will use a Si substrate as the substrate.

[0053] GaN crystal structures include hexagonal wurtzite or zincblende structures. Hexagonal wurtzite is the most stable, while Si has a cubic diamond structure. Furthermore, epitaxial growth of GaN layers on Si substrates presents several challenges: First, the significant lattice mismatch between the GaN epitaxial layer and the Si substrate results in a high dislocation density in the GaN epitaxial layer, which negatively impacts the performance of GaN devices. Additionally, GaN's lattice constant is lower than Si's, applying tensile stress to the GaN layer during epitaxial growth. Second, the substantial difference in thermal expansion coefficients between GaN and Si causes significant tensile stress on the GaN layer during cooling from the epitaxial growth temperature to room temperature, leading to warping of the GaN device. Under these two tensile stresses, when the GaN layer cannot withstand the tension, it cracks, failing to meet device fabrication requirements and affecting the quality and performance of the GaN layer. Figure 2As shown, Figure 2 The diagram illustrates the warping of a GaN device. Diagram 2b shows the GaN device after epitaxial growth of the GaN layer 201 at high temperature, where the GaN layer 201 and the Si substrate 202 are theoretically horizontal. Diagram 2a shows the GaN device warping at room temperature, where, under the influence of the two tensile stresses mentioned above, the Si substrate 202 and the GaN layer 201 warp along the positive direction perpendicular to the GaN device. Severe warping can also lead to cracks in the GaN layer 201, which refers to cracking on the front side of the GaN layer 201.

[0054] To reduce cracking in the GaN layer, it is necessary to reduce the tensile stress on the GaN layer, or simply reduce the tensile stress. Please refer to [link to relevant documentation]. Figure 3 , Figure 3 This is a schematic diagram of a GaN device that reduces tensile stress by adding a buffer layer. 3b shows the structure of the GaN device after epitaxial growth of the buffer layer 303 and GaN layer 301 at high temperature. In this case, the GaN layer 301, Si substrate 302, and buffer layer 303 are theoretically horizontal. Because the lattice constant of the buffer layer 303 is smaller than that of the GaN layer 301, the buffer layer 303 applies a compressive stress to the GaN layer 301 during epitaxial growth. This compressive stress can reduce or offset the tensile stress experienced by the GaN layer 301 during cooling due to thermal mismatch. Therefore, as shown in 3a, which is a schematic diagram of the GaN device at room temperature, the tensile stress experienced by the GaN layer 301 can be reduced at room temperature, thus reducing the degree of warpage. The diagram illustrates a theoretically completely eliminated tensile stress scenario. Without employing techniques to reduce dislocation density, adding a buffer layer can reduce the tensile stress on the GaN layer. However, to improve the quality of GaN devices, it is also necessary to reduce the dislocation density between the GaN layer and the Si substrate. When using techniques to reduce dislocation density, it is impossible to effectively reduce the tensile stress on the GaN layer.

[0055] As described above, the buffer layer requires lattice mismatch to generate compressive stress on the GaN layer, but this method is inefficient at reducing dislocation density. While two-step growth or lateral epitaxy can reduce dislocation density, it reduces the compressive stress on the GaN layer, thus increasing thermal mismatch and leading to cracking. In other words, in GaN epitaxial growth on a Si substrate, the goals of reducing tensile stress on the GaN layer and reducing dislocation density are intertwined, and current methods cannot simultaneously achieve both objectives. This application provides a method for fabricating GaN devices that can reduce the tensile stress on the GaN layer. Furthermore, this method has the following advantages: First, it decouples the reduction of tensile stress on the GaN layer and the reduction of dislocation density, eliminating the need to improve the effect of one objective by reducing the effect of the other. Second, this method is compatible with methods that add buffer layers and can work together. The method for fabricating GaN devices provided in this application will be described in detail below. Exemplarily, features or contents marked with dashed lines in the accompanying drawings related to this application can be understood as optional operations or structures of the embodiments.

[0056] Please see Figure 4 , Figure 4 This is a schematic flowchart of the method for fabricating GaN devices in the embodiments of this application.

[0057] In step 401, at a first temperature, a stress compensation layer is prepared on the back side of the Si substrate, the thermal expansion coefficient of the stress compensation layer being different from that of the Si substrate.

[0058] The front side of a Si substrate refers to the side on which the GaN layer is epitaxially grown, while the back side of a Si substrate refers to the side opposite to the side on which the GaN layer is epitaxially grown.

[0059] The coefficient of thermal expansion of the stress compensation layer differs from that of the Si substrate; that is, the coefficient of thermal expansion of the stress compensation layer can be greater or less than that of the Si substrate. The relative magnitude of the coefficients of thermal expansion between the stress compensation layer and the Si substrate depends on their relative thicknesses. When the ratio of the thickness of the stress compensation layer to the thickness of the Si substrate is greater than a threshold, the coefficient of thermal expansion of the stress compensation layer is greater than that of the Si substrate. For ease of description, this ratio will be referred to as the thickness ratio. When the thickness ratio is less than a threshold, the coefficient of thermal expansion of the stress compensation layer is less than that of the Si substrate. Figure 5 5a and Figure 7 As shown in 7a. Figure 5 This is a schematic diagram of the GaN device structure in the fabrication process when the thickness ratio is less than a threshold in an embodiment of this application. Figure 7These are schematic diagrams of the GaN device fabrication process when the thickness ratio is greater than a threshold value in the embodiments of this application. 5a and 7a are schematic diagrams of the GaN device after a stress compensation layer is fabricated on the back side of the Si substrate. The GaN device in 5a includes, in the vertical direction, a Si substrate 502 and a stress compensation layer 503. The GaN device in 7a includes, in the vertical direction, a Si substrate 702 and a stress compensation layer 703.

[0060] Optionally, a stress compensation layer can be prepared on the back side of a Si substrate using plasma-enhanced chemical vapor deposition (PECVD), low-pressure chemical vapor deposition (LPCVD), or sputtering. In methods that add a buffer layer, because the buffer layer serves to connect the Si substrate and the GaN layer, it requires good epitaxial growth quality. Therefore, epitaxial growth of the buffer layer requires metal-organic chemical vapor deposition (MOCVD) equipment, which is generally expensive. In the embodiments of this application, the stress compensation layer only needs to reduce the tensile stress on the GaN layer, thus improving the epitaxial growth quality. Using PECVD, LPCVD, or sputtering equipment can effectively reduce equipment costs. Furthermore, when epitaxially growing an epitaxial layer of the same thickness, MOCVD equipment requires more time; therefore, the embodiments of this application use PECVD, LPCVD, or sputtering equipment to effectively reduce time costs.

[0061] Optionally, the ratio of the stress compensation layer thickness to the Si substrate thickness is less than a threshold, and the coefficient of thermal expansion of the stress compensation layer is less than that of the Si substrate. The function of the stress compensation layer is to provide tensile stress on the front side of the Si substrate, and it does not need to bear the current load. Therefore, the thickness of the stress compensation layer does not affect the thickness of the Si substrate; that is, the thickness of the Si substrate can be assumed to be fixed while meeting the original design requirements. Here, the original design requirements refer to the design requirements for the Si substrate thickness of the GaN device without the stress compensation layer. When the Si substrate thickness is fixed, the thickness of the stress compensation layer in the GaN device needs to be designed. This application limits the ratio of the stress compensation layer thickness to the Si substrate thickness to a threshold. Under this limitation, the time required to generate the stress compensation layer can be reduced.

[0062] Optionally, the thickness of the stress compensation layer is from 5 μm to 70 μm. The thickness of the stress compensation layer is defined as 5 μm to 70 μm based on the thickness of the substrate in the actual application.

[0063] Optionally, the stress compensation layer is made of SiN.

[0064] Optionally, the substrate is a Si substrate, and the stress compensation layer can be made of SiO2. SiO2 has a lower coefficient of thermal expansion than Si, and it is heat-resistant, with a melting point of 1650 degrees Celsius. During the epitaxial growth of GaN, the growth temperature is typically 800 degrees Celsius, at which temperature SiO2 will not melt. Furthermore, compared to SiN, SiO2 is easier to etch and therefore easier to remove, thus reducing the cost of removing the stress compensation layer. Moreover, the coefficient of thermal expansion of SiO2 is lower than that of SiC, meaning that when the substrate is SiC, SiO2 can be used as a stress compensation layer, allowing multiple substrates to share SiO2 as a stress compensation layer, further reducing the cost of the stress compensation layer.

[0065] In step 402, after the stress compensation layer is prepared, a GaN layer is epitaxially grown on the front side of the Si substrate at a second temperature, which is higher than the first temperature.

[0066] When the temperature rises from the first temperature to the second temperature, the stress compensation layer applies stress to the Si substrate because their coefficients of thermal expansion differ. This stress manifests differently depending on the ratio of the stress compensation layer thickness to the Si substrate thickness. These differences are described below.

[0067] If the coefficient of thermal expansion of the stress compensation layer is less than that of the Si substrate, and the ratio of the thickness of the stress compensation layer to the thickness of the Si substrate is less than a threshold, then the stress manifests as tensile stress on one part of the Si substrate and compressive stress on another part. That is, the back side of the Si substrate experiences compressive stress, while the front side experiences tensile stress. Please refer to [link to relevant documentation]. Figure 5 Figure 5b shows another structural diagram of the GaN device at the second temperature. Because the coefficient of thermal expansion of the stress compensation layer is less than that of the Si substrate, the Si substrate applies a compressive stress to the stress compensation layer, causing the GaN device to warp in the negative vertical direction. To better understand the stress situation on the Si substrate, figure 5b is described in more detail below. Please refer to... Figure 6 , Figure 6 This is a schematic diagram of the forces acting on a GaN device according to an embodiment of this application. Figure 6In the figure, the ratio of the thickness d1 of the stress compensation layer 402 to the thickness d2 of the Si substrate is less than a threshold, and the coefficient of thermal expansion of the stress compensation layer 402 is less than that of the Si substrate. After the temperature rises from the first temperature to the second temperature, the stress compensation layer 402 applies a compressive stress to region 401b in the Si substrate. While region 401b experiences compressive stress, region 401a will instead experience tensile stress due to internal forces. Although not depicted in the figure, the stress compensation layer 402 should be subjected to tensile stress.

[0068] If the coefficient of thermal expansion of the stress compensation layer is greater than that of the Si substrate, and the ratio of the thickness of the stress compensation layer to the thickness of the Si substrate is greater than a threshold, then the stress manifests as tensile stress on the entire Si substrate, meaning that both the front and back sides of the Si substrate are subjected to tensile stress. Please refer to [link / reference]. Figure 7 Figure 7b shows a schematic diagram of the GaN device structure at the second temperature. Because the coefficient of thermal expansion of the stress compensation layer is greater than that of the Si substrate, the stress compensation layer applies a compressive stress to the Si substrate, causing the GaN device to warp in the positive vertical direction. For a clearer understanding of the stress on the Si substrate, figure 7b is described in more detail below. Please refer to... Figure 8 , Figure 8 This is another force diagram of a GaN device in an embodiment of this application. Figure 8 In the figure, the ratio of the thickness d1 of the stress compensation layer 802 to the thickness d2 of the Si substrate 801 is greater than a threshold, and the coefficient of thermal expansion of the stress compensation layer 802 is greater than that of the Si substrate 801. After the temperature rises from the first temperature to the second temperature, the stress compensation layer 802 applies a compressive stress to the Si substrate 801. Although not shown in the figure, the stress compensation layer 802 should be subjected to a tensile stress applied by the Si substrate.

[0069] The threshold is described below. The threshold is related to the materials of the stress compensation layer and the substrate, and also to their horizontal lengths. Without specifying the materials of the stress compensation layer and the substrate, or the horizontal length of the GaN device, this application does not specifically limit the threshold. This application illustrates two states and the stress on the Si substrate under different states by relating the ratio of the thickness of the stress compensation layer and the substrate to the threshold. Specifically, please refer to... Figure 6When the ratio of the thickness d1 of the stress compensation layer 402 to the thickness d2 of the Si substrate is less than a threshold, if the thickness d2 of the Si substrate remains unchanged, the thicknesses of the region 401a subjected to tensile stress and the region 402b subjected to compressive stress can be changed by adjusting the thickness d1 of the stress compensation layer 402. Specifically, increasing the thickness d1 of the stress compensation layer 402 increases the thickness of region 401a and decreases the thickness of region 401b; decreasing the thickness d1 of the stress compensation layer 402 decreases the thickness of region 401b and increases the thickness of region 401a, and the thickness of region 401a approaches d2.

[0070] Optionally, to ensure that the front side of the Si substrate is subjected to tensile stress and that the thickness of the stress compensation layer is not too large, the embodiment of this application defines the ratio of the thickness of region 401a to d2 as follows: Considering the impact of the stress compensation layer thickness or substrate thickness control on this ratio in practical applications, it is permissible to allow this ratio to be within a certain range. Based on this, fluctuations up and down

[0071] The above describes the stress conditions of the Si substrate in the GaN device under two conditions at the second temperature. The following describes the epitaxial growth of a GaN layer on the front side of the Si substrate at the second temperature. Please refer to [link to relevant documentation]. Figure 5 5c and Figure 7 Figures 7c, 5c, and 7c are schematic diagrams of GaN devices after epitaxial growth of GaN layers on the front side of a Si substrate at the second temperature. Figure 5c includes GaN layer 501, and Figure 7c includes GaN layer 701. The difference between 5c and 7c is that in 5c, the front side of the Si substrate 502 is warped in the negative direction of the vertical direction, while in 7c, the front side of the Si substrate 702 is warped in the positive direction of the vertical direction.

[0072] Optionally, a GaN layer can be epitaxially grown on the front side of the substrate using a two-step growth method or lateral epitaxy. The two-step growth method involves first growing a GaN nucleation layer at a low temperature, followed by high-temperature GaN growth, thereby improving the crystal quality of GaN and reducing dislocation density. Lateral epitaxy refers to improving GaN crystal quality and reducing dislocation density by introducing lateral growth using a mask. Both the two-step growth method and lateral epitaxy are epitaxial growth methods, and their use carries corresponding risks. The embodiments in this application overcome these risks and achieve the desired effects, as described below.

[0073] The lattice constant of Si is approximately 5.43 Å, and that of GaN is approximately 3.19 Å. In existing technologies, a Si substrate is assumed, with a buffer layer between the Si substrate and the GaN layer. The buffer layer has a lattice constant lower than that of GaN. Because the buffer layer has a lower lattice constant than GaN, epitaxial growth of the GaN layer on the buffer layer applies a compressive stress to the GaN layer. This compressive stress can be used to offset part or all of the tensile stress, which is the stress exerted by the Si substrate on the GaN layer during cooling due to the difference in thermal expansion coefficients. By offsetting part or all of the tensile stress, the risk of cracking in the GaN layer can be reduced. Therefore, this compressive stress is beneficial. Two-step growth methods or lateral epitaxy can reduce the dislocation density between the buffer layer and the GaN layer, but they reduce or even eliminate this compressive stress, thereby increasing the risk of cracking in the GaN layer.

[0074] This application reduces or even eliminates the tensile stress exerted by the substrate on the GaN layer by fabricating a stress compensation layer on the back side of a Si substrate. When the stress compensation layer eliminates the tensile stress exerted by the Si substrate on the GaN layer, it can be expressed by the following formula 1: F1 represents the tensile stress exerted by the stress compensation layer on the front side of the Si substrate, K is the elastic coefficient of the Si substrate, D2 is the third temperature, D1 is the first temperature, α1 is the thermal expansion coefficient of GaN, and α2 is the thermal expansion coefficient of the Si substrate. In the presence of a buffer layer, because the lattice constant of the buffer layer differs from that of GaN, the buffer layer applies a stress Y to the GaN layer. If, according to Formula 1 above, the stress compensation layer is to offset the tensile stress exerted by the Si substrate on the GaN layer, then F1 needs to be adjusted up or down due to the presence of stress Y. If the lattice constant of the buffer layer is greater than that of GaN, the stress Y is tensile stress, and F1 needs to be increased; if the lattice constant of the buffer layer is less than that of GaN, the stress Y is compressive stress, and F1 needs to be decreased. If there is no buffer layer between the Si substrate and the GaN layer, the stress Y can be understood as the stress exerted by the Si substrate on the GaN layer.

[0075] In this application, stress reduction and dislocation density reduction are decoupled by fabricating a stress compensation layer. The stress compensation layer is responsible for reducing stress, while the epitaxial growth method is responsible for reducing dislocation density. This eliminates the need to worry about stress issues preventing the use of two-step growth methods or lateral epitaxy. Therefore, reducing or even eliminating stress Y through two-step growth methods or lateral epitaxy not only avoids increasing the risk of GaN layer cracking but also reduces or eliminates the influence of stress Y on Equation 1, facilitating the determination of F1. Furthermore, the thickness and thermal expansion coefficient of the stress compensation layer can be derived from F1.

[0076] A schematic diagram of the GaN device structure after cooling following epitaxial growth of a GaN layer on a Si substrate is shown below. Figure 5 5d and Figure 7As shown in 7d, by introducing tensile stress on the front side of the Si substrate, the horizontal length of the front side of the Si substrate is increased. At the second temperature, assuming no tensile stress is introduced on the front side of the Si substrate, the length of the front side of the Si substrate is h2. After introducing tensile stress, the length of the front side of the Si substrate is h2+j, where h2 and j are both positive numbers. Regardless of whether tensile stress is introduced on the front side of the Si substrate, the length of the front side of the Si substrate should be the same after cooling from the second temperature to the first temperature. Therefore, it is assumed that the length of the front side of the Si substrate is h1 at the first temperature. When no tensile stress is introduced on the front side of the Si substrate, the shrinkage of the front side of the Si substrate is h2-h1. After introducing tensile stress on the front side of the Si substrate, the shrinkage of the front side of the Si substrate is (h2+j)-h1. Based on the above assumptions, it can be seen that the embodiments of this application increase the shrinkage of the front side of the Si substrate by introducing tensile stress on the front side of the Si substrate. Because the coefficient of thermal expansion of GaN is greater than that of Si, the shrinkage of the GaN layer should be greater than that of the Si substrate. By increasing the shrinkage of the front side of the Si substrate while keeping the shrinkage of the GaN layer constant, the difference between the two shrinkage values ​​can be reduced or even eliminated. This reduces or eliminates the tensile stress exerted by the Si substrate on the GaN layer, thus reducing the likelihood of GaN layer cracking. In particular, the stress compensation layer does not impede current flow between the GaN layer and the Si substrate, thus preparing the fabrication of vertical GaN devices.

[0077] Optionally, the shrinkage of the GaN layer should be greater than that of the Si substrate. Assuming the shrinkage of the GaN layer is (h2-h1)+g, in this embodiment, j is greater than g when the operating temperature of the GaN device is lower than the first temperature. Without considering other forces, such as the forces exerted on the Si substrate and GaN during epitaxial growth due to differences in lattice constants, the temperature of the GaN device on the mounting equipment should be taken into account. This temperature is generally room temperature. When using PECVD, LPCVD, or sputtering to prepare a stress compensation layer on the back side of the Si substrate in this embodiment, the first temperature is generally 300 degrees Celsius. When j equals g, even when the GaN device cools from the second temperature to room temperature, the Si substrate will still exert some tensile stress on the GaN layer. Therefore, by limiting j to be greater than g, the difference between j and g is used as a compensation for the difference between the first temperature and room temperature.

[0078] In step 403, after epitaxially growing a GaN layer on the front side of the Si substrate, the stress compensation layer is removed.

[0079] After epitaxially growing a GaN layer on the front side of the substrate, the stress compensation layer is removed. The function of the stress compensation layer is to provide tensile stress on the front side of the substrate during the epitaxial growth of the GaN layer. Removing the stress compensation layer after completing the epitaxial growth of the GaN layer reduces the thickness of the GaN device.

[0080] Optionally, the stress compensation layer is removed at a third temperature, where the third temperature is lower than the second temperature, the third temperature is lower than the first temperature, and the difference between the third temperature and the first temperature is less than 500 degrees Celsius. This application specifies the third temperature, which is generally room temperature. Removing the stress compensation layer at room temperature reduces the cost of removing the stress compensation layer.

[0081] Optionally, the stress compensation layer can be removed by mechanical polishing. Mechanical polishing is a common step in the GaN device fabrication process to reduce the overall chip thickness. This application removes the stress compensation layer during mechanical polishing, eliminating the need for an additional step to prepare the stress compensation layer and thus reducing the number of steps and production costs. It should be noted that heat is generated on the stress compensation layer during mechanical polishing. Therefore, when removing the stress compensation layer at the third temperature, the third temperature does not refer to the temperature of the stress compensation layer during mechanical polishing, but rather to the temperature of the space where the mechanical polishing equipment is located.

[0082] The fabrication process of the GaN device in this application has been described above. Specifically, before epitaxially growing the GaN layer on the front side of the Si substrate, a buffer layer is fabricated on the front side of the Si substrate. The buffer layer is used to prevent alloying reactions between the GaN layer and the Si substrate. In the prior art, the lattice constant of the buffer layer must be lower than the lattice constant of GaN for the buffer layer to reduce the tensile stress on the GaN layer. In this embodiment, the stress compensation layer performs the function of stress reduction, and the buffer layer does not need to perform this function; therefore, the lattice constant of the buffer layer does not need to be lower than the lattice constant of GaN. This increases the range of materials that can be selected for the buffer layer, providing conditions for using materials with lower cost and / or those that do not obstruct the vertical flow of current in the GaN device as buffer layers. Furthermore, the number of buffer layers is one. The interaction of multiple buffer layers is not required, and the tensile stress on the GaN layer is reduced layer by layer.

[0083] The method for fabricating GaN devices in the embodiments of this application has been described above. The GaN devices in the embodiments of this application will be described below.

[0084] Please see Figure 9 , Figure 9 This is a schematic diagram of a GaN device in an embodiment of this application.

[0085] GaN devices include: a 902 substrate;

[0086] A stress compensation layer 903 is formed on the back side of the substrate 902;

[0087] A GaN layer 901 is formed on the front side of the substrate 902.

[0088] In one possible implementation, the device further includes:

[0089] An AlGaN layer is formed on the front side of the GaN layer 901.

[0090] In one possible implementation, the device further includes:

[0091] The source, drain, and gate are formed on the front side of the AlGaN layer.

[0092] In one possible implementation, the material selection and thickness of the stress compensation layer 903 and the substrate 902 satisfy the following conditions:

[0093] The ratio of the thickness of the stress compensation layer 903 to the thickness of the substrate 902 is less than a preset threshold, and the coefficient of thermal expansion of the stress compensation layer 903 is less than the coefficient of thermal expansion of the substrate 902; or, the ratio of the thickness of the stress compensation layer 903 to the thickness of the substrate 902 is greater than a preset threshold, and the coefficient of thermal expansion of the stress compensation layer 903 is greater than the coefficient of thermal expansion of the substrate 902.

[0094] In one possible implementation, the thickness of the stress compensation layer 903 is 5 μm to 70 μm.

[0095] In one possible implementation, the substrate 903 is a Si substrate, and the stress compensation layer 902 is made of SiO2.

[0096] In one possible implementation, a buffer layer is further included between the substrate 902 and the GaN layer 901. In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection between devices or units through some interfaces, and may be electrical, mechanical, or other forms.

[0097] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0098] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0099] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A method for fabricating a GaN device, characterized in that, include: A stress compensation layer is formed on the back side of the substrate; The materials and thicknesses of the stress compensation layer and the substrate satisfy the following conditions: the ratio of the thickness of the stress compensation layer to the thickness of the substrate is less than a preset threshold, the coefficient of thermal expansion of the stress compensation layer is less than the coefficient of thermal expansion of the substrate, the back side of the substrate is subjected to compressive stress, and the front side of the substrate is subjected to tensile stress; wherein, the threshold is limited based on the materials of the stress compensation layer, the materials of the substrate, and their lengths along the horizontal direction; or, the ratio of the thickness of the stress compensation layer to the thickness of the substrate is greater than the preset threshold, the coefficient of thermal expansion of the stress compensation layer is greater than the coefficient of thermal expansion of the substrate, and both the back side and the front side of the substrate are subjected to tensile stress; A GaN layer is epitaxially grown on the front side of the substrate.

2. The method according to claim 1, characterized in that, The method further includes: An AlGaN layer is formed on the GaN layer.

3. The method according to claim 2, characterized in that, The method further includes: The source, drain, and gate are formed on the AlGaN layer.

4. The method according to any one of claims 1 to 3, characterized in that, The thickness of the stress compensation layer is 5 μm to 70 μm.

5. The method according to any one of claims 1 to 4, characterized in that, The substrate is a silicon substrate, and the material of the stress compensation layer is [material not specified]. .

6. The method according to any one of claims 1 to 5, characterized in that, The epitaxial growth of the GaN layer on the front side of the substrate includes: The GaN layer is epitaxially grown on the front side of the substrate using a two-step growth method or lateral epitaxy.

7. The method according to any one of claims 1 to 6, characterized in that, The process of generating a stress compensation layer on the back side of the substrate includes: At a first temperature, the stress compensation layer is formed on the back side of the substrate; The epitaxial growth of the GaN layer on the front side of the substrate includes: The GaN layer is epitaxially grown on the front side of the substrate at a second temperature, which is higher than the second temperature.

8. The method according to claim 7, characterized in that, After epitaxially growing the GaN layer on the front side of the substrate, the method further includes: Remove the stress compensation layer.

9. The method according to claim 8, characterized in that, The removal of the stress compensation layer includes: The stress compensation layer is removed at a third temperature, which is lower than the second temperature and lower than the first temperature, and the difference between the third temperature and the first temperature is less than 500 degrees.

10. The method according to claim 9, characterized in that, The removal of the stress compensation layer includes: The stress compensation layer is removed by mechanical grinding.

11. The method according to any one of claims 1 to 10, characterized in that, A buffer layer is also included between the substrate and the GaN layer to prevent an alloying reaction between the GaN layer and the substrate.

12. A GaN device, characterized in that, include: Substrate; A stress compensation layer is formed on the back side of the substrate; The materials and thicknesses of the stress compensation layer and the substrate satisfy the following conditions: the ratio of the thickness of the stress compensation layer to the thickness of the substrate is less than a preset threshold, the coefficient of thermal expansion of the stress compensation layer is less than the coefficient of thermal expansion of the substrate, the back side of the substrate is subjected to compressive stress, and the front side of the substrate is subjected to tensile stress; wherein, the threshold is limited based on the materials of the stress compensation layer, the materials of the substrate, and their lengths along the horizontal direction; or, the ratio of the thickness of the stress compensation layer to the thickness of the substrate is greater than the preset threshold, the coefficient of thermal expansion of the stress compensation layer is greater than the coefficient of thermal expansion of the substrate, and both the back side and the front side of the substrate are subjected to tensile stress; A GaN layer is formed on the front side of the substrate.

13. The GaN device according to claim 12, characterized in that, The device also includes: An AlGaN layer is formed on the front side of the GaN layer.

14. The GaN device according to claim 13, characterized in that, The device also includes: The source region, drain region, and gate region are formed on the front side of the AlGaN layer.

15. The GaN device according to claim 12, characterized in that, The thickness of the stress compensation layer is 5 μm to 70 μm.

16. The GaN device according to any one of claims 12 to 15, characterized in that, The substrate is a Si substrate, and the stress compensation layer is made of [material name missing]. .

17. The GaN device according to any one of claims 12 to 16, characterized in that, A buffer layer is also included between the substrate and the GaN layer.

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