用于固态硬盘的地址映射方法及控制系统
By dynamically switching the HMB access strategy in DRAM-Less solid-state drives according to the host operation command mode, caching the secondary mapping table of logical page sets to SRAM for sequential mode, and directly obtaining the address of a single physical page for random mode, the problems of high time overhead and low data transfer utilization in existing technologies are solved, thereby improving read performance and data transfer efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- MAXIO TECHNOLOGY (HANGZHOU) CO LTD
- Filing Date
- 2022-09-07
- Publication Date
- 2026-07-17
AI Technical Summary
In existing technologies, DRAM-Less solid-state drives suffer from high time overhead and low data transfer utilization when reading logical pages, especially in random or sequential read operations. Existing methods fail to effectively distinguish the continuity of logical page addresses, leading to resource waste.
By determining the mode of the host operation command, the access mode of the host memory buffer (HMB) is dynamically switched. In sequential mode, a secondary mapping table of the cached logical page set is sent to SRAM, while in random mode, the physical page address of a single logical page is directly obtained. By combining asynchronous access and callback functions, the access strategy is optimized to reduce the table lookup time overhead.
It improves data transmission utilization, reduces table lookup time overhead, and enhances random read performance. In particular, under high-pressure operation commands, it precisely adjusts the HMB access mode to improve control system performance.
Smart Images
Figure CN115878029B_ABST