Gatekeeper controller, system, control method, and storage medium
By using the same counter to implement the functions of both internal and external watchdogs, the problems of low module integration and complex configuration are solved, resulting in cost reduction and efficiency improvement.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BYD SEMICON CO LTD
- Filing Date
- 2021-09-28
- Publication Date
- 2026-07-14
AI Technical Summary
In the existing technology, the internal watchdog and the external watchdog use two separate modules, which results in low module integration, complex configuration methods and high overall cost.
A watchdog controller is adopted, which obtains the counting range of the counter, the internal signal monitoring time, and the external signal monitoring time, and uses the same counter to realize the functions of internal and external watchdog. The timing conditions of internal and external signals are set to determine whether to send a protection signal.
It simplifies the product structure, reduces costs, and improves the simplicity of configuration and work efficiency.
Smart Images
Figure CN115878353B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] This application relates to the field of chip technology, and in particular to a watchdog controller, system, control method and storage medium. BACKGROUND
[0002] Watchdog modules, used to monitor the normal operation of a chip's core, are widely used in chips. In existing technology, watchdogs are divided into internal and external watchdogs. Internal watchdogs are driven by an independent counting clock and respond to program-defined intervals for "feeding" the watchdog. If feeding is not performed within the specified time, the internal watchdog will perform a chip reset or other protection operation. External watchdogs have an external pin and detect level transitions on this pin within a specified time. If no transition occurs, the external watchdog will send a warning signal to the outside, used for resetting or protecting the target component. A common design module for both internal and external watchdogs features a maximum feed time configuration function and a counter function. When feeding is performed within the configured time value, the watchdog counter will reset; if feeding is not performed within the configured time value, the watchdog will trigger a protection operation. In the existing technology, the internal watchdog and the external watchdog are two independent modules, and the counters of the two watchdogs need to be configured separately during use. The module functions have low integration, the configuration method is complicated, and the overall cost is high. SUMMARY
[0003] The purpose of this application is to provide a watchdog controller, system, control method, and storage medium to solve the problems in the prior art where the internal watchdog and external watchdog use two independent modules, resulting in low module integration, complex configuration, and high overall cost.
[0004] This application is implemented as follows: The first aspect of this application provides a control method for a watchdog controller, characterized in that the control method includes:
[0005] Step S101. Obtain the counter's counting interval, internal signal monitoring time, and external signal monitoring time, and control the counter to start counting;
[0006] Step S102. Obtain the internal trigger signal count value and the external trigger signal count value;
[0007] Step S103. Set the internal signal timing conditions according to the internal signal monitoring time and the current internal trigger signal count value, and set the external signal timing conditions according to the external signal monitoring time and the current external trigger signal count value;
[0008] Step S104. Determine whether to send an internal protection signal based on the next internal trigger signal count value and the internal signal timing condition, and determine whether to send an external protection signal based on the next external trigger signal count value and the external signal timing condition.
[0009] A second aspect of this application provides a watchdog controller, the watchdog controller comprising:
[0010] The parameter acquisition unit is used to acquire the counter's counting range, internal signal monitoring time, and external signal monitoring time, and to control the counter to start counting, as well as to acquire the internal trigger signal count value and the external trigger signal count value.
[0011] The timing condition setting unit is used to set internal signal timing conditions according to the internal signal monitoring time and the current internal trigger signal count value, and to set external signal timing conditions according to the external signal monitoring time and the current external trigger signal count value.
[0012] An internal protection signal triggering unit is used to determine whether to send an internal protection signal based on the next internal trigger signal count value and the internal signal timing conditions.
[0013] An external protection signal triggering unit is used to determine whether to send an external protection signal based on the next external trigger signal count value and the external signal timing conditions.
[0014] The third aspect of this application provides a watchdog control system, which includes the watchdog controller described in the second aspect of this application. The watchdog control system further includes an internal monitoring time configuration unit, an external monitoring time configuration unit, a cycle counter, an internal dog feeding trigger unit, an external dog feeding trigger unit, and a protection signal output unit, all of which are connected to the watchdog controller.
[0015] A fourth aspect of the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method described in the first aspect of the present invention.
[0016] This application provides a watchdog controller, system, control method, and storage medium. The control method includes: acquiring the counter's counting interval, internal signal monitoring time, external signal monitoring time, internal trigger signal count value, and external trigger signal count value; setting internal signal timing conditions based on the internal signal monitoring time and the current internal trigger signal count value, and setting external signal timing conditions based on the external signal monitoring time and the current external trigger signal count value; sending an internal protection signal when the next internal trigger signal count value does not meet the internal signal timing conditions; and sending an external protection signal when the next external trigger signal count value does not meet the external signal timing conditions. This application's technical solution utilizes the characteristic of a counter that cycles through full counts, allowing the internal and external watchdogs to share a single counter to achieve their functions, with their operation independent of each other. This improves the product's functional integration, simplifies configuration and increases user efficiency, and saves product costs. BRIEF DESCRIPTION OF DRAWINGS
[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a flowchart of a control method for a watchdog controller provided in Embodiment 1 of this application;
[0019] Figure 2 This is another flowchart of a watchdog controller control method provided in Embodiment 1 of this application;
[0020] Figure 3 This is a schematic diagram of the structure of a watchdog controller provided in Embodiment 2 of this application;
[0021] Figure 4 This is a schematic diagram of a watchdog control system provided in Embodiment 3 of this application. DETAILED DESCRIPTION
[0022] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0023] To illustrate the technical solution of this application, specific embodiments are described below.
[0024] This application provides a control method for a watchdog controller, such as... Figure 1 As shown, the control method includes:
[0025] Step S101. Obtain the counter's counting interval, internal signal monitoring time, and external signal monitoring time, and control the counter to start counting.
[0026] The counter's counting range, internal signal monitoring time, and external signal monitoring time are all preset. For example, the counter's counting range is 0~100, and it counts to 100 when it is full. After it is full, it will automatically start counting again from 0. The internal monitoring time is 27 counts, and the external monitoring time is 49 counts. That is, the chip's internal program needs to feed the internal watchdog within 27 counts, and the external component needs to feed the external watchdog within 49 counts. Otherwise, the controller will trigger the output of internal or external protection signals.
[0027] Step S102. Obtain the internal trigger signal count value and the external trigger signal count value.
[0028] Specifically, after the control counter starts counting, it receives the count values of internal trigger signals and external trigger signals. Upon receiving the first count value of internal trigger signals and the first count value of external trigger signals, it directly executes step S103. Alternatively, it can compare the count value with the internal signal monitoring time and the external signal monitoring time. When the first count value of internal trigger signals is greater than or equal to the internal signal monitoring time, it outputs an internal protection signal. When the first count value of external trigger signals is greater than or equal to the external signal monitoring time, it outputs an external protection signal. When the first count value of internal trigger signals is less than the internal signal monitoring time and the first count value of external trigger signals is less than or equal to the external signal monitoring time, it executes step S103.
[0029] Step S103. Set the internal signal timing conditions according to the internal signal monitoring time and the current internal trigger signal count value, and set the external signal timing conditions according to the external signal monitoring time and the current external trigger signal count value.
[0030] The internal signal timing conditions are set based on the internal signal monitoring time and the current internal trigger signal count, including:
[0031] The new internal signal monitoring time is obtained by adding the internal signal monitoring time and the current internal trigger signal count value. The internal signal timing condition is that the next internal trigger signal count value is less than the new internal signal monitoring time.
[0032] For example, if the internal monitoring time is 27 and the current internal trigger signal count is 20, the internal monitoring time is added to the current internal trigger signal count to get 49, which is the internal signal monitoring time. The internal signal timing condition is that the condition is met when the next internal trigger signal count is less than 49.
[0033] The step of setting the external signal timing conditions based on the external signal monitoring time and the current internal trigger signal count value includes:
[0034] The new external signal monitoring time is obtained by adding the external signal monitoring time and the current external trigger signal count value. The external signal timing condition is that the next external trigger signal count value is less than the new external signal monitoring time.
[0035] For example, if the external monitoring time is 49 and the current external trigger signal count is 40, the external monitoring time is added to the current external trigger signal count to get 89, which is the external signal monitoring time. The external signal timing condition is that the condition is met when the next external trigger signal count is less than 89.
[0036] As can be seen from the two steps above, both the internal and external watchdogs use the same counter technology, eliminating the need for two separate technical devices, thus simplifying the overall product structure and saving costs.
[0037] Furthermore, the new internal signal monitoring time is obtained by adding the internal signal monitoring time and the current internal trigger signal count value, including:
[0038] When the new internal signal monitoring time is greater than the maximum value of the counting interval, the value in the new internal external signal monitoring time that is the same as the maximum value of the internal counting interval is set as the internal loop flag bit. The internal loop flag bit is valid within one cycle of the counter.
[0039] The maximum value of the counting interval is 100. When the new internal signal monitoring time is greater than the maximum value of the counting interval, the new internal signal monitoring time is 134. The 100 in 134 is set as the internal loop flag bit. For example, the internal loop flag bit changes from 0 to 1. After the setting is completed, the counter starts counting. Since the counter counts 100 times in one cycle, the internal loop flag bit is valid within this cycle. When the counter completes this cycle, the internal loop flag bit becomes invalid.
[0040] Furthermore, the step of adding the external signal monitoring time and the current external trigger signal count value to obtain the new external signal monitoring time includes:
[0041] When the new external signal monitoring time is greater than the maximum value of the counting interval, the value in the new external signal monitoring time that is the same as the maximum value of the counting interval is set as the external cycle flag. The external cycle flag is valid within one cycle counting period of the counter.
[0042] The maximum value of the counting interval is 100. When the new external signal monitoring time is greater than the maximum value of the counting interval, the new external signal monitoring time is 134. The 100 in 134 is set as the external loop flag bit. For example, the external loop flag bit changes from 0 to 1. After the setting is completed, the counter starts counting. Since the counter counts 100 times in one cycle, the external loop flag bit is valid within this cycle. When the counter completes this cycle, the external loop flag bit becomes invalid.
[0043] In the two steps above, the internal loop flag is set when the internal signal monitoring time is greater than the maximum value of the counting interval within one cycle of the counter, and the external loop flag is set when the external signal monitoring time is greater than the maximum value of the counting interval. When one cycle of the counter is completed, the internal loop flag and the external loop flag are cleared to avoid incorrectly comparing the count value of the previous cycle with the comparison value after the current cycle, thereby maintaining the synchronization of the comparison cycle.
[0044] Step S104. Determine whether to send an internal protection signal based on the next internal trigger signal count value and the internal signal timing condition, and determine whether to send an external protection signal based on the next external trigger signal count value and the external signal timing condition.
[0045] like Figure 2 As shown, step S104, which determines whether to send an internal protection signal based on the next internal trigger signal count value and the internal signal timing condition, includes: step S105. When the next internal trigger signal count value meets the internal signal timing condition, return to step S103; when the next internal trigger signal count value does not meet the internal signal timing condition, send an internal protection signal.
[0046] Specifically, when the next internal trigger signal count value meets the internal signal timing condition (i.e., the next internal trigger signal count value is less than the new internal signal monitoring time), the next internal signal monitoring time is obtained by adding the current internal trigger signal count value to the internal signal monitoring time, and then the remaining steps are executed. When the next internal trigger signal count value does not meet the internal signal timing condition (i.e., the next internal trigger signal count value is greater than or equal to the new internal signal monitoring time), an internal protection signal is sent for reset.
[0047] like Figure 2As shown, step S104, which determines whether to send an external protection signal based on the next external trigger signal count value and the external signal timing condition, further includes step S106: when the next external trigger signal count value meets the external signal timing condition, return to step S103; when the next external trigger signal count value does not meet the external signal timing condition, send an external protection signal.
[0048] Specifically, when the next external trigger signal count value meets the external signal timing condition (i.e., the next external trigger signal count value is less than the new external signal monitoring time), the next external signal monitoring time is obtained by adding the external signal monitoring time and the current external trigger signal count value, and then the remaining steps are executed. When the next external trigger signal count value does not meet the external signal timing condition (i.e., the next external trigger signal count value is greater than or equal to the new external signal monitoring time), an external protection signal is sent for reset.
[0049] Embodiment 1 of this application provides a control method for a watchdog controller. The control method includes: acquiring the counting interval of a counter, the internal signal monitoring time and the external signal monitoring time, the internal trigger signal count value and the external trigger signal count value; setting internal signal timing conditions based on the internal signal monitoring time and the current internal trigger signal count value, and setting external signal timing conditions based on the external signal monitoring time and the current external trigger signal count value; sending an internal protection signal when the next internal trigger signal count value does not meet the internal signal timing conditions; and sending an external protection signal when the next external trigger signal count value does not meet the external signal timing conditions. This technical solution utilizes the characteristic of a counter that cycles through full counts, allowing the internal and external watchdogs to share a single counter to achieve their functions, without affecting each other's operation. This improves the product's functional integration, simplifies configuration and increases user efficiency, and saves product costs.
[0050] The invention will now be illustrated using the example of an external component triggering an external watchdog timer:
[0051] In this scheme, the counter's counting range is 0~100, and it counts to 100 when it is full. The external signal monitoring time is 49, which means that the external component needs to feed the external watchdog within 49 counting cycles. Otherwise, the controller will trigger the external protection signal output.
[0052] When the controller starts running, the counter starts counting from 0;
[0053] At the first moment, when the external component triggers the external watchdog to feed, the counter value is 41 (first cycle). The count value is less than the external signal monitoring time, so the next external watchdog feed count comparison value is updated to: 41 + 49 = 90; the counter continues to count.
[0054] At the second moment, when the external component triggers the external watchdog to feed, the counter value is 85 (first cycle). The count value is less than the external signal monitoring time. At this time, the next external watchdog feed count comparison value is updated to: 85 + 49 = 134, and 100 in 134 is set as the external cycle flag bit, that is, the comparison value is 34, the external cycle flag bit is valid, and the counter continues to count.
[0055] At the third moment, when the external component triggers the external watchdog to feed, the counter value is 99 (first cycle). At this time, the count value appears to be greater than the external watchdog feed count comparison value of 34. However, the comparison logic automatically identifies this comparison value through the cycle flag. Since the external cycle flag is valid, the count value of 99 is still less than the external signal monitoring time of 134. The next external watchdog feed count comparison value will be updated to: 99 + 49 = 148, and the comparison value is 48. Since the counter has not yet completed a cycle, the external cycle flag remains valid, and the counter continues to count.
[0056] At the fourth moment, when the external component triggers the external watchdog to feed the dog, the counter value is 25 (the second cycle has been completed, and the cycle flag will be automatically cleared when counting again). At this time, the count value of 25 is less than the external monitoring time value of 48. The next external watchdog feeding count comparison value is updated to: 25 + 49 = 74, and the counter continues to count.
[0057] At the fifth moment, when the external component triggers the external watchdog to feed the dog, the counter value is 74 (second cycle). At this time, the count value is equal to the external monitoring time value, triggering the protection signal output logic and outputting a protection signal to the external component.
[0058] Embodiment 2 of this application provides a watchdog controller, such as Figure 3 As shown, the watchdog controller includes:
[0059] The parameter acquisition unit 201 is used to acquire the counter's counting range, internal signal monitoring time, and external signal monitoring time, and to control the counter to start counting, as well as to acquire the internal trigger signal count value and the external trigger signal count value.
[0060] The timing condition setting unit 202 is used to set internal signal timing conditions according to the internal signal monitoring time and the current internal trigger signal count value, and to set external signal timing conditions according to the external signal monitoring time and the current external trigger signal count value.
[0061] The internal protection signal triggering unit 203 is used to determine whether to send an internal protection signal based on the next internal trigger signal count value and the internal signal timing conditions.
[0062] The external protection signal triggering unit 204 is used to determine whether to send an external protection signal based on the next external trigger signal count value and the external signal timing conditions.
[0063] Furthermore, the internal protection signal triggering unit 203 is used to drive the timing condition setting unit to reset the internal signal timing condition when the next internal trigger signal count value meets the internal signal timing condition, and to send an internal protection signal when the next internal trigger signal count value does not meet the internal signal timing condition.
[0064] The external protection signal triggering unit 204 is used to drive the timing condition setting unit to reset the external signal timing condition when the next external trigger signal count value meets the external signal timing condition, and to send an external protection signal when the next external trigger signal count value does not meet the external signal timing condition.
[0065] Furthermore, the timing condition setting unit 202 is specifically used for:
[0066] The new internal signal monitoring time is obtained by adding the internal signal monitoring time and the current internal trigger signal count value. The internal signal timing condition is that the next internal trigger signal count value is less than the new internal signal monitoring time.
[0067] Furthermore, the timing condition setting unit 202 is specifically used for:
[0068] The new external signal monitoring time is obtained by adding the external signal monitoring time and the current external trigger signal count value. The external signal timing condition is that the next external trigger signal count value is less than the new external signal monitoring time.
[0069] The specific working methods of each module in the watchdog controller described above can be found in the steps of the watchdog control method described above, and will not be repeated here.
[0070] Embodiment 3 of this application provides a watchdog control system, such as Figure 4 As shown, the watchdog control system includes the watchdog controller 20 described in Embodiment 1 above. The watchdog control system also includes an internal monitoring time configuration unit 301, an external monitoring time configuration unit 302, a cycle counter 303, an internal dog feeding trigger unit 304, an external dog feeding trigger unit 305, and a protection signal output unit 306, all of which are connected to the watchdog controller 20.
[0071] The watchdog control system has the following functions for each module:
[0072] Cyclic counter 303: Used to provide counting operations for internal and external watchdog timers. This counter automatically restarts counting when it is full.
[0073] Internal monitoring time configuration unit 301: Used to configure the maximum feeding interval of the internal watchdog.
[0074] External monitoring time configuration unit 302: Used to configure the maximum feeding interval of the external watchdog.
[0075] Internal dog-feeding trigger unit 304: used to connect the internal program of this module to the dog-feeding signal and send it to the controller.
[0076] External dog feeding trigger unit 305: used to connect the external component of this module to the dog feeding signal and send it to the controller.
[0077] Protection signal output unit 306: Used to output watchdog protection signals when the dog is not fed in time, including internal protection signals and external protection signals.
[0078] Watchdog controller 20: As the core functional logic of this solution, this logic is used to compare the counter count value and the monitoring time configuration value in real time. When the counter count value at the time of the watchdog trigger is less than the monitoring time configuration value, the comparison value is updated to the sum of the counter value at the current time of the watchdog trigger and the monitoring signal time configuration value, and used as the comparison value for the next time. When the counter count value at the time of the watchdog trigger is greater than or equal to the monitoring signal time configuration value, the protection signal output logic will be triggered.
[0079] The specific working methods of each module in the watchdog controller described above can be found in the steps of the watchdog control method described above, and will not be repeated here.
[0080] In another embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the watchdog control method described in the above embodiments.
[0081] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0082] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.
[0083] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.
Claims
1. A control method for a watchdog controller, characterized in that, The control method includes: Step S101: Obtain the counter's counting interval, internal signal monitoring time, and external signal monitoring time, and control the counter to start counting; Step S102: Obtain the internal trigger signal count value and the external trigger signal count value; Step S103: Set internal signal timing conditions based on the internal signal monitoring time and the current internal trigger signal count value; and set external signal timing conditions based on the external signal monitoring time and the current external trigger signal count value. Step S104: Determine whether to send an internal protection signal based on the next internal trigger signal count value and the internal signal timing condition; and determine whether to send an external protection signal based on the next external trigger signal count value and the external signal timing condition. The step of setting internal signal timing conditions based on the internal signal monitoring time and the current internal trigger signal count includes: The internal signal monitoring time is added to the current internal trigger signal count value to obtain a new internal signal monitoring time. The internal signal timing condition is that the next internal trigger signal count value is less than the new internal signal monitoring time. When the new internal signal monitoring time is greater than the maximum value of the counting interval, the value in the new internal signal monitoring time that is the same as the maximum value of the counting interval is set as the internal loop flag. The internal loop flag is valid for one cycle of the counter. When one cycle of the counter is completed, the internal loop flag is cleared.
2. The control method as described in claim 1, characterized in that, The step of determining whether to send an internal protection signal based on the next internal trigger signal count value and the internal signal timing conditions includes: When the next internal trigger signal count value meets the internal signal timing condition, return to step S103; when the next internal trigger signal count value does not meet the internal signal timing condition, send an internal protection signal. The step of determining whether to send an external protection signal based on the count value of the next external trigger signal and the timing conditions of the external signal includes: When the next external trigger signal count value meets the external signal timing condition, return to step S103. When the next external trigger signal count value does not meet the external signal timing condition, send an external protection signal.
3. The control method as described in claim 1, characterized in that, The step of setting external signal timing conditions based on the external signal monitoring time and the current external trigger signal count value includes: The new external signal monitoring time is obtained by adding the external signal monitoring time and the current external trigger signal count value. The external signal timing condition is that the next external trigger signal count value is less than the new external signal monitoring time.
4. The control method as described in claim 3, characterized in that, The step of adding the external signal monitoring time and the current external trigger signal count value to obtain the new external signal monitoring time includes: When the new external signal monitoring time is greater than the maximum value of the counting interval, the value in the new external signal monitoring time that is the same as the maximum value of the counting interval is set as the external cycle flag. The external cycle flag is valid within one cycle counting period of the counter.
5. A watchdog controller, characterized in that, The watchdog controller includes: The parameter acquisition unit is used to acquire the counter's counting range, internal signal monitoring time, and external signal monitoring time, and to control the counter to start counting, as well as to acquire the internal trigger signal count value and the external trigger signal count value. The timing condition setting unit is used to set internal signal timing conditions according to the internal signal monitoring time and the current internal trigger signal count value, and to set external signal timing conditions according to the external signal monitoring time and the current external trigger signal count value. An internal protection signal triggering unit is used to determine whether to send an internal protection signal based on the next internal trigger signal count value and the internal signal timing conditions. An external protection signal triggering unit is used to determine whether to send an external protection signal based on the next external trigger signal count value and the external signal timing conditions. The step of setting internal signal timing conditions based on the internal signal monitoring time and the current internal trigger signal count includes: The internal signal monitoring time is added to the current internal trigger signal count value to obtain a new internal signal monitoring time. The internal signal timing condition is that the next internal trigger signal count value is less than the new internal signal monitoring time. When the new internal signal monitoring time is greater than the maximum value of the counting interval, the value in the new internal signal monitoring time that is the same as the maximum value of the counting interval is set as the internal loop flag. The internal loop flag is valid for one cycle of the counter. When one cycle of the counter is completed, the internal loop flag is cleared.
6. The watchdog controller as described in claim 5, characterized in that, The internal protection signal triggering unit is specifically used to drive the timing condition setting unit to reset the internal signal timing condition when the next internal trigger signal count value meets the internal signal timing condition, and to send an internal protection signal when the next internal trigger signal count value does not meet the internal signal timing condition. The external protection signal triggering unit is specifically used to drive the timing condition setting unit to reset the external signal timing condition when the next external trigger signal count value meets the external signal timing condition, and to send an external protection signal when the next external trigger signal count value does not meet the external signal timing condition.
7. A watchdog control system, characterized in that, The watchdog control system includes the watchdog controller as described in any one of claims 5 to 6, and further includes an internal monitoring time configuration unit, an external monitoring time configuration unit, a cycle counter, an internal dog feeding trigger unit, an external dog feeding trigger unit, and a protection signal output unit, all connected to the watchdog controller.
8. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 4.