Single photon avalanche diode device with shaped junction region

Abstract

A single photon avalanche diode device with shaped junction region. The invention relates to circuits. In particular embodiments, the invention provides a SPAD circuit including a junction region characterized by a waveform profile corresponding to a plurality of fill structures. The waveform profile is associated with both electric field and breakdown voltage uniformity. Other embodiments exist.

Description

Technical Field

[0001] This invention relates to the field of lidar ranging, and more particularly to a single-photon avalanche diode device with a shaped junction region. Background Technology

[0002] This invention generally relates to circuits.

[0003] Research and development in integrated microelectronics continues to make remarkable progress in sensor devices. Many examples exist of photodiodes. For instance, a photodiode is a pn junction or PIN structure. When a photon with sufficient energy strikes the diode, electron-hole pairs are generated. This mechanism is also known as the internal photoelectric effect. If absorption occurs in the depletion region of the junction or at a distance of one diffusion length from the depletion region, these carriers are swept out of the junction by the built-in electric field of the depletion region. Therefore, as holes move towards the anode (and electrons towards the cathode), a photocurrent is generated. The total current through a photodiode is the sum of the dark current (the current generated in the absence of light) and the photocurrent; therefore, the dark current must be minimized to maximize the device's sensitivity.

[0004] Another example of a photodiode is called an "avalanche photodiode." An avalanche photodiode is a photodiode whose structure is optimized to operate at a high reverse bias close to its reverse breakdown voltage. This allows each photogenerated carrier to multiply due to avalanche breakdown, creating internal gain within the photodiode, which improves the device's effective sensitivity. One type of photodiode—often called a single-photon avalanche diode (SPAD) device—has become increasingly popular and is used in a variety of applications, such as LiDAR systems, which have become a mainstream component in consumer electronics, automotive, and other applications. Among other characteristics, the uniformity of the electric field in the SPAD region and the SPAD breakdown voltage are also important aspects of SPAD devices, for reasons explained below. Unfortunately, current technology is insufficient. There is a high need for technologies to improve sensing devices. Summary of the Invention

[0005] This invention relates to circuits. In a particular embodiment, the invention provides a SPAD circuit comprising a junction region characterized by a waveform profile corresponding to a plurality of fill structures. The waveform profile is associated with the uniformity of the electric field and breakdown voltage. Other embodiments also exist.

[0006] According to various embodiments, a general aspect includes a single-photon avalanche diode (SPAD) image sensor comprising a first sidewall and a second sidewall. The SPAD image sensor further comprises silicon material disposed between the first and second sidewalls. The silicon material may comprise a top region and a bottom region. The SPAD image sensor further comprises a porous region located at the top region. The SPAD image sensor further comprises a plurality of fillers disposed at the bottom region, the plurality of fillers being arranged according to a first pattern. The SPAD image sensor further comprises a first doped region disposed within the silicon material. The first doped region may include a first boundary, the first boundary being characterized by a first wave shape corresponding to the first pattern. The SPAD image sensor further comprises a second doped region disposed within the silicon material, the second doped region may include a second boundary, the second boundary being characterized by a second wave shape corresponding to the first pattern. The SPAD image sensor further comprises a junction region disposed between the first and second doped regions, the junction region being characterized by a third wave shape corresponding to the first pattern.

[0007] The implementation may include one or more of the following features: The first sidewall of the SPAD image sensor may include a deep trench isolation structure. The SPAD image sensor may include a lens covering the aperture region. Multiple fillers may include a shallow trench isolation structure. Multiple fillers may include an oxide material. The multiple fillers are characterized by lower dopant penetration compared to silicon. The SPAD image sensor may include a lens covering the aperture region, the lens being configured to guide photons toward the junction region. The multiple fillers may include a reflective surface for guiding photons toward the junction region. The first sidewall may include a surface facing a second sidewall. The multiple fillers may include a first filler and a second filler, the first filler being characterized by a width of approximately 150-700 nm, and the first and second fillers sharing a spacing of approximately 400-900 nm. The width and spacing are optimized to achieve electric field optimization and reflection optimization at the junction region and to reflect photons to the junction region. The SPAD image sensor may include a pinning layer covering the multiple fillers. The pinning layer may include a p+ type material. The SPAD image sensor may include a passivation layer covering the multiple fillers.

[0008] One general aspect provides a back-side illumination (BIS) single-photon avalanche diode (SPAD) sensor device. The device includes silicon material having a front side and a back side. The device also includes a first deep trench structure positioned within the silicon material. The device further includes a second deep trench structure positioned within the silicon material. The device also includes a plurality of fillers disposed on the front side, the plurality of fillers being arranged according to a predetermined pattern. The device further includes an n-type material having a first top region and a first bottom region, the first bottom region being adjacent to the back side, the first top region possibly including a first sidewall and a second sidewall, the n-type material being characterized by a first width. The device further includes a p-type material having a second top region and a second bottom region, the second bottom region surrounding the first top region, the p-type material being characterized by a second width, the second width being greater than the first width. The back side also includes a junction region disposed at the interface between the first top region and the second bottom region, the junction region being characterized by a wave shape corresponding to the predetermined pattern.

[0009] The device may include an n-type contact that is directly coupled to an n-type material and positioned within a first bottom region.

[0010] One general aspect includes a method for fabricating a single-photon avalanche diode (SPAD) sensor. The method includes providing a silicon wafer characterized by a first dopant penetration level. The method further includes forming a plurality of cavities according to a predetermined pattern. The method further includes filling the plurality of cavities with a filling material to form a plurality of fillers, the filling material characterized by a second dopant penetration level higher than the first dopant penetration level. The method further includes doping the silicon wafer at a first depth through the plurality of fillers with the first dopant to form a first doped region. The method further includes doping the silicon wafer at a second depth through the plurality of fillers with a second dopant to form a second doped region. The method further includes forming a junction region between the first and second doped regions, the junction region characterized by a wave shape corresponding to the predetermined pattern.

[0011] In some embodiments, the multiple fillers may include shallow trench isolation structures.

[0012] It should be understood that embodiments of the present invention offer numerous advantages over conventional techniques. Among other things, the waveform profile of the SPAD region allows for a uniform electric field and breakdown voltage. Furthermore, operating at a lower breakdown voltage means that SPAD sensors can achieve higher levels of efficiency and better performance.

[0013] Embodiments of the present invention can be implemented in conjunction with existing systems and processes. For example, the waveform SPAD region can be manufactured using a standard STI forming process. This allows SPAD devices and systems according to embodiments of the present invention to be compatible with existing systems, such as various types of lidar systems and technologies. Other benefits also exist.

[0014] These and other benefits are achieved by the present invention within the context of known technologies. However, a further understanding of the nature and advantages of the invention can be achieved by referring to the latter part of this specification and the accompanying drawings. Attached Figure Description

[0015] The figures below are merely examples and should not unduly limit the scope of the claims herein. Those skilled in the art will recognize many other variations, modifications, and alternatives. It should also be understood that the examples and embodiments described herein are for illustrative purposes only, and various modifications or alterations made thereto will be conceived by those skilled in the art and will be included within the spirit and scope of this process and the appended claims.

[0016] Figure 1A This is a simplified side view showing a SPAD array 100 according to an embodiment of the present invention.

[0017] Figure 1B This is a simplified top view showing a SPAD array 100 according to an embodiment of the present invention.

[0018] Figure 2 This is a simplified diagram illustrating a patterned SPAD area corresponding to a trapezoidal fill pattern according to an embodiment of the present invention.

[0019] Figure 3 This is a simplified diagram illustrating a patterned SPAD area corresponding to a linear trapezoidal fill pattern according to an embodiment of the present invention.

[0020] Figure 4 This is a simplified diagram illustrating a patterned SPAD area corresponding to a triangle-filled pattern according to an embodiment of the present invention.

[0021] Figure 5 This is a simplified diagram illustrating the electric field and breakdown voltage of the shaped SPAD region according to an embodiment of the present invention.

[0022] Figure 6 This is a simplified diagram showing the electric field and breakdown voltage of a conventional SPAD region for comparison. Detailed Implementation

[0023] This invention relates to circuits. In a particular embodiment, the invention provides a SPAD circuit comprising a junction region characterized by a waveform profile corresponding to a plurality of fill structures. The waveform profile is associated with the uniformity of the electric field and breakdown voltage. Other embodiments also exist.

[0024] The following description is presented to enable those skilled in the art to make and use the invention and to incorporate it into the context of particular applications. Various modifications and multiple uses in different applications will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to a wide range of embodiments. Therefore, the invention is not intended to be limited to the presented embodiments, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0025] In the following detailed description, numerous specific details are set forth in order to provide a more thorough understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without being limited to these specific details. In other instances, well-known structures and devices are shown in block diagram form rather than in detail so as not to obscure the invention.

[0026] Readers should pay attention to all articles and documents filed concurrently with and made publicly available with this specification, the contents of which are incorporated herein by reference. Unless otherwise expressly stated, all features disclosed in this specification (including any appended claims, abstracts, and drawings) may be replaced by alternative features serving the same, equivalent, or similar purpose. Therefore, unless otherwise expressly stated, each disclosed feature is merely one instance of a general series of equivalent or similar features.

[0027] Please note that when using these terms, left, right, front, back, top, bottom, forward, reverse, clockwise, and counterclockwise are used solely for convenience and are not intended to imply any particular fixed direction. In fact, they are used to reflect the relative position and / or orientation between different parts of an object.

[0028] Figure 1A and 1B These are simplified diagrams illustrating a SPAD pixel array 100 according to an embodiment of the present invention. These diagrams are merely illustrative and should not unduly limit the scope of the claims. In various embodiments, the SPAD pixel array 100 comprises a large number of SPAD pixels (typically exceeding one thousand pixels), but for illustrative purposes, two SPAD pixel devices (100A and 100B) are shown. Figure 1A (and four are displayed in) Figure 1B(See figure). In various embodiments, the SPAD pixel array 100 is fabricated according to back-side illumination (BSI) technology, but other architectures—such as front-side illumination (FSI)—may also be used. As an example, the SPAD pixel array 100 is fabricated within a silicon material (e.g., silicon material 104A and silicon material 104B). For example, silicon material 104A can be formed by an epitaxial growth process. As shown, the thickness of the epitaxial material in the range of about 3 μm to about 12 μm is grown using high-temperature growth techniques, etc. In an example, epitaxial growth is performed using a chemical vapor deposition (CVD) process. In various embodiments, the SPAD pixel array 100 may be configured on a semiconductor substrate containing wiring and circuitry for interconnecting a plurality of SPAD pixel devices. Figure 1A As shown, the SPAD pixel array 100 also includes a dielectric layer 120. For example, p-contacts and n-contacts ( Figure 1A (Not shown) is coupled to interconnect 121. In various embodiments, interconnect 121 includes a data bus for fast readout to generate depth-mapped data, and the output of SPAD devices 100A and 100B is read in the same cycle.

[0029] As examples, the substrate can be a complementary metal-oxide-semiconductor (CMOS) substrate, a blank or unpatterned substrate, a patterned hybrid substrate, etc. In these examples, the semiconductor substrate has multiple CMOS cells for a logic circuit system and may also include multiple memory cells, interface cells, and other circuit elements. As shown, the substrate has bonding regions and logic circuitry, which can be configured as output, quench, recharge, etc. Of course, other variations, modifications, and alternatives are possible.

[0030] As an example, in Figure 1AIn this context, the top side of the silicon material is referred to as the "back side," and the bottom side of the silicon material is referred to as the "front side." The terms "front" and "back" refer to the front and back sides of a semiconductor wafer during the manufacturing process, during which various processes are performed on the front side of the wafer. BSI SPAD refers to the side from which light (e.g., photons) enters the SPAD device. Aperture regions 101 and 102 are located on the back sides of SPAD devices 100A and 100B, respectively. As described below, microlenses or other types of optical structures (e.g., nanostructures, anti-reflective coatings, color filters, bandpass filters, etc.) may be configured on the aperture regions. Microlens 101A covers aperture region 101; microlens 102A covers aperture region 102. Optical structures, such as microlenses 101A and 102A, help guide incident light and signal photons to a target region, which is the junction between n-type materials (106A and 106B) and p-type materials (105A and 105B). A passivation layer (not shown) may be disposed around the pore region. In examples, the passivation layer may comprise an oxide material, a high-k dielectric material (e.g., Al2O3, HfO2, Ta2O5, etc.), a nitride material (Si3N4, SiON, etc.), or a polyimide material, or a combination thereof.

[0031] SPAD pixel devices 100A and 100B are surrounded by isolation structures. SPAD pixel device 100A is surrounded by deep isolation structures 103A and 103B and shallow isolation structures 108A and 108B. SPAD pixel device 100B is surrounded by isolation structures 103C and 103B. Figure 1B As shown, the SPAD pixel array 100 also includes isolation structures 103D and 103E. In various embodiments, the isolation structures include deep trench isolation (DTI) structures. In embodiments, the DTI structure includes a filler material, a surrounding charge material, and a surrounding insulating material. In examples, the filler material includes a metallic material, a semiconductor material, and / or an insulating material. For example, the DTI structure may include a composite material. In a preferred embodiment, the filler material is tungsten. In an example, the surrounding charge material is Al2O3. Depending on the implementation, other materials may also be used. In examples, the surrounding insulating material comprises oxide or nitride materials, etc. In an example, the surrounding insulating material is SiO2.

[0032] The isolation structure may additionally include a p-well region 130. In various embodiments, the p-well region is characterized by p-type diffusion of boron. Depending on the implementation, other types of materials may also be used for p-type diffusion. For example, the p-well region can be formed by implantation at various energies on an epitaxial growth substrate rather than a substrate. Depending on the implementation, the isolation structure may be implemented as a DTI structure and / or a p-well region. In some embodiments, the isolation structure may include only the p-well region and not a DTI structure. In various embodiments, the p-well region can be formed by an implantation process that can use various energies from hundreds of keV to several MeV. The p-well region may extend across the entire epitaxial thickness to provide passivation and isolation.

[0033] Shallow trench isolation structures 108A, 108B, and 108C are configured below deep trench isolation. In examples, the shallow trench isolation (STI) may contain an oxide material as a filler. Depending on the implementation, the width and other dimensions of the STI structure are configured relative to the positions of the n-type regions 106A and 106B. For example, the STI structure is within the width relative to the DTI structure (i.e., approximately the same width or wider). In various embodiments, P-type contacts (or sometimes referred to as "P+" contacts) are configured on the bottom surfaces of the silicon materials 104A and 104B. n-type contacts (not shown) are coupled to the n-type regions 106A and 106B. For example, the n-type and p-type contacts can be configured using various types of implanted materials (e.g., implanted conductive silicon).

[0034] As shown, n-type regions 106A and 106B may contain n-wells. For example, n-type region 106A may be referred to as an "N-SPAD". The N-SPAD can be formed by an implantation process that can use various implantation energy levels. An important aspect of the n-type material 106A is its size, and in some embodiments, n-type region 106A is narrower than p-type region 105. The junction between p-type material 105A and n-type material 106A includes, for example, […]. Figure 1A The diagram shows both horizontal and vertical interfaces. More specifically, the bottom surface of the p-type material 105A interfaces with the top surface of the n-type material 106A. Because the p-type material 105A is wider and surrounds the n-type material 106A, the top sidewall of the n-type material 106A also interfaces with the p-type material 105A. Compared to conventional designs, the sidewall portions of the junction interface generate a transverse electric field and increase the total area used for collecting photons and generating charge carriers.

[0035] It should be noted that both the N-SPAD 106A and P-SPAD 105A fabricated using the implantation process have non-uniform doping concentrations. For example, the p-type material 104 is formed by the first implantation process, and the p-type material 105A is characterized by a radial concentration gradient around its center. In various embodiments, the P-SPAD 105A is implanted into the silicon from the front surface up to at least 200 nm, which is used to ensure that the avalanche region is far from the front surface and to reduce the undesirable dark count rate (DCR). That is, carriers generated from defects at the front surface will not enter the avalanche region. In various embodiments, the P-SPAD 105A may have a concentration gradient from the avalanche region 107A toward the back surface. This produces a wider P-SPAD region and a higher electric field. This configuration shortens the carrier travel time from the epitaxial region to the avalanche region 107A and reduces jitter. For example, the concentration gradient in the P-SPAD 105A can be generated by post-implantation annealing; the concentration gradient can also be generated by using multiple energies during implantation.

[0036] In various embodiments, the n-material 106A is also formed by an implantation process, and some n-type dopant is implanted into a portion of the p-type material. The n-type implantation is laterally spaced at least 1 µm from the p-well region (i.e., d1 > 1 µm) to avoid a direct carrier path from the p-well region to the n-type contact without traversing the avalanche region. The placement of the n-type material also prevents the avalanche region 107A from extending from the desired junction region to the front surface.

[0037] For example, the implanted p-type material includes boron material with a concentration density of 1E15 atoms / cm³ to 1E18 atoms / cm³. For example, the implanted n-type material includes phosphorus or arsenic entities with a concentration density of 1E17 atoms / cm³ to 1E19 atoms / cm³. Of course, other variations, modifications, and alternatives are possible. As shown, the implanted p-type and n-type materials are disposed near the semiconductor substrate or junction region of the pixel element.

[0038] The performance of a SPAD pixel device is largely measured by its ability to collect photons and generate carriers at avalanche regions 107A and 107B located between p-type regions (i.e., 105A and 105B) and n-type regions (i.e., 106A and 106B). For example, the term "avalanche region" refers to a region within a short distance of the junction defined by the interface between the p-type regions (105A and 105B) and the n-type regions (106A and 106B). In some embodiments, the p-type regions 105A and 105B (which may be referred to as "P-SPAD") as shown include retreated p-wells. For example, P-SPADs can be formed by an implantation process (e.g., with one or more implantation energies). The p-type regions 105A and 105B implemented as in various embodiments are associated with a non-uniform doping concentration distribution. For example, the doping concentration is highest near the active junction region where the p-type and n-type regions intersect.

[0039] Electric field uniformity is an important performance metric for SPAD devices. Besides electric field strength, the uniformity across the avalanche region (i.e., Figure 1A The uniformity of 107A and 107B in SPADs is also important. Unfortunately, the avalanche region of conventional SPAD devices typically has a strong non-uniform electric field towards the edges. This type of non-uniform electric field greatly degrades the performance and reliability of SPAD devices.

[0040] Breakdown voltage is another important characteristic of SPAD devices. Breakdown voltage (V) bd Both the magnitude and uniformity of the V (Voltage Spectrum) are important. As SPAD devices become increasingly popular in portable devices, the trend is towards lower power consumption and higher pixel density. For most applications, low V... bd This means lower power consumption, which, all other things being equal, promotes designs with high pixel density, small device area, and less heat generation. Conventional SPAD devices typically have poor V-band performance across their avalanche region. bd Uniformity, as explained below and Figure 6 As shown in the figure.

[0041] According to embodiments of the present invention, the avalanche region (or the junction region between the p-type and n-type regions) is waveformd to improve electric field and breakdown voltage uniformity and reduce breakdown voltage compared to conventional SPAD devices. It should be noted that the waveform profile of the avalanche region corresponds to the underlying filler. Although the side view of the SPAD array ( Figure 1A The image shown depicts a wavy pattern, but the avalanche zone in three-dimensional space includes multiple "ripples".

[0042] The wave patterns of avalanche zones 107A and 107B correspond to infill zones 109A-109B and 109C-109D, as shown by the dashed lines. From the top view, as... Figure 1BAs shown, the infill is configured as a two-dimensional array, and the wave pattern (or ripples) of the avalanche region corresponds to the infill. For example, the “crests” of the wave pattern correspond to the infill, and the “troughs” of the wave pattern correspond to the spaces between the infill. In various embodiments, the infill 109A-109B is narrower than the n-type region 106A, and the relative size is selected to produce the desired waveform 107C as shown.

[0043] In various embodiments, fillers 109A-109B and 109C-109D (containing unmarked fillers positioned therebetween) comprise oxide material. In various embodiments, these fillers are shallow trench isolation (STI) structures formed by etching and deposition processes. For example, p-type region 105A and n-type region 106A are formed by an implantation process in which one or more dopants penetrate silicon material 104A. During the implantation process, the dopants penetrate the fillers 109A-D (e.g., oxide material) deeper than silicon material 104A, and thus, avalanche region 107A (along with p-type region 105A and n-type region 106A) is formed with a wave pattern as shown. Because the dopants are implanted through the filler material, the filler material may be damaged. To reduce damage and better passivate the silicon interface, implantation-damaged oxide on top of the central STI can be removed; subsequently, thermal oxidation and oxide deposition processes fill the etched openings. Positive charges can be introduced into the thermal oxide, which helps passivate the oxide-silicon interface.

[0044] In some implementations, dopant implantation is performed after the etching process but before the deposition process, and the dopant penetrates deeper through the etched opening (compared to dopant penetrating unetched silicon). In such implementations, the dopant penetrates deeper—compared to dopant penetrating through deposited material—thus forming a wave pattern with a larger peak-to-peak value.

[0045] Fillers 109A-109B and 109C-109D are configured as light-trapping structures. In various embodiments, the SPAD array 100 is configured to trap infrared light that tends to pass through avalanche regions (primarily doped silicon material) without being detected or absorbed. The light-trapping structures (i.e., fillers 109A-109B and 109C-109D) reflect the infrared light back into the avalanche region and prevent infrared light from escaping to adjacent SPAD pixels.

[0046] Figure 2This is a simplified diagram illustrating a patterned SPAD area corresponding to a trapezoidal fill pattern according to an embodiment of the present invention. This diagram is merely an example and should not unduly limit the scope of the claims. Those skilled in the art will recognize many variations, alternatives, and modifications. SPAD area 530 is configured between areas 510 and 520, and the waveform profile of SPAD area 530 corresponds to... Figure 5 The fillers 501a-501h are shown. Region 510 is a p-type region and region 520 is an n-type region. In some embodiments, region 520 is a p-type region and region 510 is an n-type region. SPAD region 230 is located between first doped region 210 and second doped region 220. In some embodiments, first region 210 includes a p-type region and second region 220 includes an n-type region, and regions 210 and 220 may contain different doped materials or different concentrations of the same doped material. In some embodiments, first region 210 includes an n-type region and second region 210 includes a p-type region. First region 210, SPAD region 230 and second region 220 are characterized by a waveform profile as shown. The waveform profile corresponds to fillers 201a-201h as shown. For example, fillers 201a-201h are produced as STI. In manufacturing STI, openings are first etched according to a predetermined pattern, and then the openings are filled. Figure 2 The fillers 201a-201h shown are largely the same in size, shape, and distribution, but it should be understood that other shapes and arrangements may also be used. For example, the electric field tends to concentrate around the edge of the SPAD region, and to compensate for this, the fillers are smaller around the edge and their size increases toward the center, and other arrangements are also possible.

[0047] In various implementations, the predetermined pattern is specifically designed to produce the desired waveform profile for the SPAD region 230. For example, the width of each infill (i.e., the mark "w" above infill 201a) is approximately 150 to 700 nm, and the period (i.e., the mark "p" above infill 201a) is approximately 400 to 900 nm. Depending on the process, geometry, and distance from the SPAD region 230, the height of the infill (i.e., the mark "h" at infill 201a) can be configured to approximately 200-450 nm. In one embodiment, the infill height can exceed 600 nm (provided the infill is not too close to the SPAD region 230). Figure 2 As shown, the filler is configured in a trapezoidal shape, and depending on the implementation, the angle θ is approximately 73 to 83 degrees. For example, the trapezoidal shape is optimized for both performance and manufacturing processes. Compared to straight (i.e., 90-degree angle) sidewalls, the sloping sidewalls of the filler allow for a gradual transition of the wave profile of the SPAD area. Furthermore, the sidewall angle shown allows for more convenient etching and filling processes compared to straight sidewall angles.

[0048] As shown, the fillers correspond to the peaks of the waveform profile, while the spaces between the fillers correspond to the troughs of the waveform profile. The waveform profile and the filler pattern share the same "period". For example, the waveform pattern of the SPAD region is optimized for infrared wavelengths (i.e., approximately 780 nm to 1 mm, and in some embodiments between 900 nm and 950 nm).

[0049] As shown, the waveform profile is not limited to SPAD region 230. Regions 210 and 220 are also characterized by their own waveform profiles, which correspond to fillers 201a-201h. However, it should be noted that regions 210 and 220 do not share the same waveform profile. This is because regions 210 and 220 have different dopants (or doping concentrations). Although the waveform profiles of regions 210 and 220 are both attributed to fillers 201a-201h, different dopants and / or doping processes produce different waveform profiles.

[0050] The transition between the "crests" and "troughs" of the waveform profile depends on the geometry and pattern of the infill. As shown, the sidewall angle θ allows for a gradual transition between the crests and troughs of the waveform profile. Depending on the implementation, the sidewall angle θ is specifically selected based on the height and width of the infill to help produce the desired waveform profile.

[0051] According to various embodiments, the fillers 201a-201h also provide a light-trapping function, as explained above. For example, the top surface of the fillers 201a-201h is reflective, and the top surface is configured to guide photons toward the SPAD region 230.

[0052] Figure 3This is a simplified diagram illustrating a patterned SPAD region corresponding to a linear trapezoidal fill pattern according to an embodiment of the present invention. This diagram is merely an example and should not unduly limit the scope of the claims. Those skilled in the art will recognize many variations, alternatives, and modifications. SPAD region 330 is disposed between region 310 and region 320. For example, region 310 is a p-type region and region 320 is an n-type region. In some embodiments, region 320 is a p-type region and region 310 is an n-type region. As described above, the n-type and p-type regions can be formed by implanting different doped materials and / or implanting doped materials with different doping concentrations. The waveform profile of SPAD region 330 corresponds to fillers 301a-301h as shown. Fillers 301a-301h are characterized by a trapezoidal shape. Pinning layer 303 covers fillers 301a-h. For example, pinning layer 303 may be configured as a passivation layer to reduce undesirable DC resistance (DCR). In various embodiments, the pinning layer 303 comprises a P+ type material. The pinning layer 303 can be formed in a self-aligned implantation process before the etched opening is filled with fillers 301a-301h. The top surface of the pinning layer 303 can also be implanted in a later and separate step.

[0053] Figure 4 This is a simplified diagram illustrating a patterned SPAD region corresponding to a triangular fill pattern according to an embodiment of the present invention. This diagram is merely an example and should not unduly limit the scope of the claims. Those skilled in the art will recognize many variations, alternatives, and modifications. SPAD region 430 is configured between regions 410 and 420. For example, region 410 is a p-type region and region 420 is an n-type region. In some embodiments, region 420 is a p-type region and region 410 is an n-type region. As described above, the n-type and p-type regions can be formed by implanting different dopant materials and / or implanting dopant materials with different doping concentrations. The waveform profile of SPAD region 430 corresponds to fillers 401a-401h as shown. Figure 4From a side view, fillers 401a-401h are characterized by a generally triangular shape, but in three-dimensional form, fillers 401a-401h are generally pyramidal. In some embodiments, the triangular shape and geometry of fillers 401a-401h allow for continuous and wave-like profiles for the SPAD region 430. For example, the sidewall angle θ can be approximately 45-65 degrees. In contrast, fillers with straight sidewalls make it more difficult for dopants to reach the “crest” region of the wave-like profile, thus producing a stepped profile instead. In some embodiments, a wave-like profile may be preferred over a stepped profile because a wave-like profile promotes a lower breakdown voltage and a more uniform electric field and breakdown voltage. Depending on the embodiment, the shape, size, and uniformity of fillers 401a-401h can be varied to optimize performance. For example, fillers 401a and 401h positioned in the peripheral region can be shaped differently (e.g., shallower) compared to fillers 401d and 401e disposed in the intermediate region.

[0054] Figure 5 This is a simplified diagram illustrating the electric field and breakdown voltage of a shaped SPAD region according to an embodiment of the invention. This diagram is merely an example and should not unduly limit the scope of the claims. Those skilled in the art will recognize many variations, alternatives, and modifications. As shown, the electric field curve 540 is generally uniform (or flat), and slight variations in the electric field strength roughly correspond to the waveform profile of the SPAD region 530. In regions 541 and 542 (corresponding edge regions), the electric field curve can be seen to be steep. Due to the “ripples” of the waveform (except for regions 551 and 552 near the edges of the SPAD region), the breakdown voltage curve 550 shown is also substantially uniform. The small variations at the “ripples” are ideal, and they correspond to the peaks and troughs of the waveform profile of the SPAD region 530. For example, the electric field strength and breakdown voltage values ​​are related: the waveform profile provides a strong electric field that induces avalanches, thereby reducing the breakdown voltage compared to conventional SPAD devices. It should be understood that the electric field curve 540 and the breakdown voltage curve 550 provide a high level of performance as measured in terms of reliability, consistency, power efficiency, and other metrics.

[0055] Figure 6 This is a simplified diagram showing the electric field and breakdown voltage of a conventional SPAD region for comparison. (See diagram for reference.) Figure 6 As shown, electric field curve 640 illustrates the electric field distribution of a conventional SPAD region. SPAD region 630 serves as the junction between doped regions 610 and 620. (As shown...) Figure 6 As shown, zones 610, 620, and 630 are generally flat, and there is no filling material at zone 601. Figure 5Compared to regions 541 and 542, regions 641 and 642 are characterized by a smoother transition. As a result, the breakdown voltage Vbd at regions 651 and 652 is closer to the Vbd in the central region 653. When the edge Vbd is closer to the central Vbd, the overall Vbd is more likely to be affected by the edge. For SPAD pixels, low Vbd regions dominate, and it is desirable to have a much higher Vbd at the edges than at the center. Figure 5 In the middle, since the electric field decreases faster in regions 541 and 542, the corresponding Vbd in regions 551 and 552 is basically higher than that in the central region 553, where Vbd has a smaller impact on the overall SPAD Vbd level.

[0056] Figure 6 The SPAD region 630 in the diagram is shown to be generally flat and uniform. However, in practical implementations, conventional SPAD regions often exhibit slight angular differences across the wafer, which is typically cascaded with photoresist shading effects during the ion implantation step. Therefore, the implantation profile across the wafer can vary, and consistency can be affected. This variation often causes variations in breakdown voltage across the wafer, with one region having a higher breakdown voltage than the other. Figure 6 As shown in the diagram, breakdown curve 650 indicates that the breakdown voltage on the left side is higher than that on the right side. This angle change primarily affects the doping profile near the edge of the active region. Adding STI to the central active region allows the central region to dominate during avalanche. Therefore, the doping profile is unaffected by the angle change.

[0057] Although the foregoing is a complete description of specific embodiments, various modifications, alternative constructions, and equivalents may be used. Therefore, the above description and illustrations should not be construed as limiting the scope of the invention, which is defined by the appended claims.

Claims

1. A single-photon avalanche diode (SPAD) image sensor, comprising: First sidewall and second sidewall; A silicon material disposed between the first sidewall and the second sidewall, the silicon material comprising a top region and a bottom region; A porous region, located at the top region; A plurality of fillers are disposed in the bottom area, the plurality of fillers being arranged according to a first pattern; The multiple fillers include shallow trench isolation structures, and the multiple fillers include oxide materials, wherein the dopant penetration level of the fillers is higher than the dopant penetration level of the silicon material; A first doped region is disposed within the silicon material, the first doped region including a first boundary, the first boundary being characterized by a first wave shape corresponding to the first pattern; A second doped region, disposed within the silicon material, the second doped region including a second boundary, the second boundary being characterized by a second wave shape corresponding to the first pattern; and A junction region, disposed between the first doped region and the second doped region, is characterized by a third wave shape corresponding to the first pattern.

2. The SPAD image sensor according to claim 1, wherein the first sidewall includes a deep trench isolation structure.

3. The SPAD image sensor of claim 1, further comprising a lens covering the aperture region.

4. The SPAD image sensor of claim 1, further comprising a lens covering the aperture region, the lens being configured to guide photons toward the junction region.

5. The SPAD image sensor of claim 1, wherein the first sidewall comprises tungsten material.

6. The SPAD image sensor according to claim 1, wherein the plurality of fillers includes a first filler and a second filler, the first filler being characterized by a width of 150-700 nm, and the first filler and the second filler sharing a spacing of 400-900 nm.

7. The SPAD image sensor of claim 6, wherein the width and the spacing are optimized to achieve electric field optimization at the junction region and reflection optimization for reflecting photons to the junction region.

8. The SPAD image sensor of claim 1, further comprising a pinning layer covering the plurality of fillers.

9. The SPAD image sensor of claim 8, wherein the pinning layer comprises a p+ type material.

10. The SPAD image sensor of claim 1, further comprising a passivation layer covering the plurality of fillers.

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