A structure and method for characterizing silicon carbide minority carrier lifetime under direct current bias conditions

Abstract

The application belongs to the technical field of semiconductor material preparation, and discloses a structure and a method for characterizing the minority carrier lifetime of silicon carbide under a direct current bias state, which comprises a silicon carbide material, a first direct current bias voltage application layer and a second direct current bias voltage application layer. The silicon carbide material is a main body to be characterized, and the surface shape thereof is rectangular or square. The first direct current bias voltage application layer is at one side edge of the upper surface of the silicon carbide material to be measured, and the three edges of the two are aligned. The second direct current bias voltage application layer is at the other side edge of the upper surface of the silicon carbide material to be measured, and the three edges of the two are aligned, and the edge is opposite to the edge where the first direct current bias voltage application layer is located. The application designs a structure for characterizing the minority carrier lifetime of silicon carbide material under a charge transport ground state, and proposes an effective and simple test method, solves the problem of obtaining the key parameters of the minority carrier lifetime of silicon carbide material under a working state, and can fill the blank of key electrical performance parameters of silicon carbide.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor material preparation technology, and relates to a structure and method for characterizing the minority carrier lifetime of silicon carbide under DC bias. Background Technology

[0002] Silicon carbide (SiC), as a wide-bandgap semiconductor material, possesses properties such as a large bandgap, high saturated electron drift velocity, high critical displacement threshold energy, and breakdown electric field strength, making it crucial for applications in high-frequency, high-power, and radiation-resistant electronic devices. Compared to other wide-bandgap semiconductor materials, SiC is one of the few materials with commercially available large-size substrates. Currently, SiC crystal growth techniques include physical vapor transport (PVT), high-temperature chemical vapor deposition (CHPV), and liquid-phase methods. Meanwhile, significant progress has been made in SiC epitaxial growth technology in recent years, with a substantial reduction in the density of commonly understood "micropipe" defects. These advancements have laid a solid foundation for the fabrication and device applications of SiC materials.

[0003] Current systematic characterization analyses of silicon carbide (SiC) materials primarily focus on crystallinity, morphology, composition, and optical properties. Research on the electrical properties of SiC is still insufficient, generally limited to carrier concentration, mobility, and impurity concentration distribution, lacking in-depth studies and characterization methods for SiC carrier lifetime. In particular, current SiC minority carrier lifetime measurements are primarily conducted under "static" conditions, i.e., without charge transport within the SiC. The results obtained under these static conditions differ from the minority carrier lifetime observed when SiC devices are in operation (i.e., with some transport occurring). A novel detection method is needed to extract this crucial parameter, the minority carrier lifetime, under dynamic conditions. Summary of the Invention

[0004] The purpose of this invention is to address the numerous technical challenges in characterizing the minority carrier lifetime of silicon carbide under operating conditions by proposing a silicon carbide minority carrier lifetime characterization method based on DC bias.

[0005] The technical solution of this invention:

[0006] A structure characterizing the minority carrier lifetime of silicon carbide under DC bias conditions includes a silicon carbide material 1, a first DC bias voltage application layer 2, and a second DC bias voltage application layer 3.

[0007] The silicon carbide material 1 is the main body to be characterized, and its surface shape is rectangular or square;

[0008] The first DC bias voltage application layer 2 is located at one edge of the upper surface of the silicon carbide material 1 under test, with the three edges of the two layers aligned.

[0009] The second DC bias voltage application layer 3 is located on the other side edge of the upper surface of the silicon carbide material 1 under test, with the three edges of the two layers aligned, and this edge is opposite to the edge of the first DC bias voltage application layer 2.

[0010] A method for characterizing minority carrier lifetime in silicon carbide based on DC bias, comprising the following steps:

[0011] Step 1: Cut the silicon carbide material 1 to be tested into a rectangle or square, with the length of each side between 1cm and 10cm and the thickness between 100μm and 1cm;

[0012] Step 2: Prepare the first DC bias voltage application layer 2 and the second DC bias voltage application layer 3 by deposition or growth method;

[0013] The deposition methods include thermal evaporation, electron beam evaporation, magnetron sputtering, laser pulse deposition, and atomic layer deposition.

[0014] The growth methods include molecular beam epitaxy combined with etching and chemical vapor deposition combined with etching;

[0015] The thickness of the first DC bias voltage application layer 2 and the second DC bias voltage application layer 3 is 10 nm to 10 μm;

[0016] In the surface shape of the first DC bias voltage application layer 2 and the second DC bias voltage application layer 3, one side is aligned with one side of the silicon carbide material 1, and the lengths of the other two sides are 5% to 15% of the length of the corresponding overlapping side in the silicon carbide material 1.

[0017] The contact characteristics between the first DC bias voltage application layer 2 and the silicon carbide material 1 include ohmic contact characteristics, Schottky contact characteristics, and pn junction contact characteristics;

[0018] The contact characteristics between the second DC bias voltage application layer 3 and the silicon carbide material 1 include ohmic contact characteristics, Schottky contact characteristics, and pn junction contact characteristics;

[0019] Step 3: Apply DC bias voltage to the first DC bias voltage application layer 2 and the second DC bias voltage application layer 3 respectively, so that the silicon carbide material is in a working state with charge transport process, and its working current is between 1fA and 1A.

[0020] Step 4: Place the above structure in a microwave photoconductivity attenuation lifetime tester to characterize the minority carrier lifetime.

[0021] The beneficial effects of this invention are as follows: This invention designs a structure for characterizing the minority carrier lifetime of silicon carbide materials in the charge transport ground state and proposes an effective and simple testing method, which solves the problem of obtaining key parameters of the minority carrier lifetime of silicon carbide materials under working conditions and can fill the gap in key electrical performance parameters of silicon carbide. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the side structure for achieving DC bias based on silicon carbide material.

[0023] Figure 2 This is a schematic diagram of the top surface structure for achieving DC bias based on silicon carbide material.

[0024] In the figure: 1 Silicon carbide material; 2 First DC bias voltage application layer; 3 Second DC bias voltage application layer. Detailed Implementation

[0025] The specific embodiments of the present invention will be further described below in conjunction with the technical solutions and accompanying drawings.

[0026] Example 1

[0027] This embodiment provides a structure for characterizing the minority carrier lifetime of silicon carbide materials in the charge transport ground state, and proposes an effective and simple testing method, including the following steps:

[0028] Step 1: Cut the 300μm thick silicon carbide single crystal to be tested into a square with a side length of 2cm;

[0029] Step 2: Using electron beam evaporation and a photomask, an ohmic contact type aluminum-titanium DC bias voltage application layer with a length of 2cm, a width of 2mm, and a thickness of 100nm is prepared on two opposite sides of a silicon carbide single crystal.

[0030] Step 3: Apply a certain bias voltage to the DC bias voltage application layer so that the current value in the silicon carbide material is 1μA;

[0031] Step 4: Place the structure under the above DC bias conditions in a microwave photoconductivity attenuation lifetime tester to characterize the minority carrier lifetime.

Claims

1. A method for characterizing minority carrier lifetime of silicon carbide based on DC bias, characterized in that, A structure for characterizing the minority carrier lifetime of silicon carbide under DC bias includes silicon carbide material (1), a first DC bias voltage application layer (2), and a second DC bias voltage application layer (3). The silicon carbide material (1) is the main body to be characterized, and its surface shape is rectangular or square; The first DC bias voltage application layer (2) is located at one edge of the upper surface of the silicon carbide material (1) to be tested, with the three edges of the two aligned. The second DC bias voltage application layer (3) is located on the other side edge of the upper surface of the silicon carbide material (1) to be tested, with the three edges of the two aligned and this edge opposite to the edge of the first DC bias voltage application layer (2). The steps are as follows: Step 1: Cut the silicon carbide material (1) to be tested into a rectangle or square, with the length of each side between 1cm and 10cm and the thickness between 100μm and 1cm; Step 2: Prepare the first DC bias voltage application layer (2) and the second DC bias voltage application layer (3) by deposition or growth method; The thickness of the first DC bias voltage application layer (2) and the second DC bias voltage application layer (3) is 10nm~10μm; In the surface shape of the first DC bias voltage application layer (2) and the second DC bias voltage application layer (3), one side is aligned with one side of the silicon carbide material (1), and the lengths of the other two sides are 5% to 15% of the length of the corresponding overlapping side in the silicon carbide material (1); Step 3: Apply DC bias voltage to the first DC bias voltage application layer (2) and the second DC bias voltage application layer (3) respectively, so that the silicon carbide material is in a working state with charge transport process, and its working current is between 1fA and 1A. Step 4: Place the above structure in a microwave photoconductivity attenuation lifetime tester to characterize the minority carrier lifetime.

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