Photolithographic patterning method, apparatus, electronic device and readable storage medium

By splitting the semiconductor target pattern into multiple sub-patterns and performing photolithography trimming operations, combined with the alternating use of positive and negative resists and plasma trimming, the photolithography quality problem was solved, and the photolithography defects and rework probability were reduced.

CN115903398BActive Publication Date: 2026-07-31CHANGXIN MEMORY TECH INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHANGXIN MEMORY TECH INC
Filing Date
2022-11-18
Publication Date
2026-07-31

AI Technical Summary

Technical Problem

As semiconductor device dimensions shrink, the impact of the contour, linewidth roughness, and edge roughness of photolithography on pattern quality becomes increasingly significant, leading to increased difficulty in fabricating photolithographic defects and complex patterns.

Method used

By splitting the target pattern of the photolithography layer into multiple sub-patterns and performing multiple sets of photolithography trimming operations on each sub-pattern, and by using positive and negative resists alternately, combined with plasma trimming technology, the photolithography process window is optimized to reduce the probability of defects.

Benefits of technology

It reduces the probability of defects in the photolithography process, improves the quality of the contour and line width roughness of the photolithography, and reduces the probability of rework due to substandard dimensions.

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Abstract

This disclosure provides a method, apparatus, electronic device, and readable storage medium for forming photolithographic patterns, relating to the field of integrated circuit technology. The method includes: configuring multiple sets of photolithographic trimming operations based on the graphic features of the target pattern to be drawn on the photolithographic layer; executing the multiple sets of photolithographic trimming operations to obtain multiple sets of photolithographic patterns, which constitute the target pattern, wherein at least two sets of the multiple sets of photolithographic patterns are photolithographically etched onto the surface of the layer to be photolithographic. Through the technical solution of this disclosure, a complex target pattern can be decomposed into multiple simpler sub-patterns. Simpler sub-patterns help reduce the limiting requirements of the process window, thereby ensuring the quality of parameters such as the contour, linewidth roughness, and edge roughness of the photolithographically formed pattern, and reducing the probability of defects occurring during the photolithography process.
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Description

Technical Field

[0001] This disclosure relates to the field of integrated circuit technology, and in particular to a photolithographic pattern forming method, a photolithographic pattern forming apparatus, a photolithographic pattern, an electronic device, and a computer-readable storage medium. Background Technology

[0002] Semiconductors are devices whose conductivity at room temperature is between that of conductors and insulators. With the development of semiconductor technology and the increasing demand for miniaturization of semiconductors, the size of semiconductor devices has gradually decreased.

[0003] The reduction in the target size of semiconductors has led to increasingly complex design of target images. In order to meet the photolithography requirements of the target images, the process window of the design and manufacturing process needs to be increased. The increase in the process window will make the influence of the contour, line width roughness, edge roughness and other factors of photolithography on the pattern quality more and more obvious.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this disclosure is to provide a method for forming a photolithographic pattern, an apparatus for forming a photolithographic pattern, a photolithographic pattern, an electronic device, and a readable storage medium, which helps to reduce the probability of defects occurring during the photolithography process.

[0006] Other features and advantages of this disclosure will become apparent from the following detailed description, or may be learned in part by practice of this disclosure.

[0007] According to one aspect of this disclosure, a method for forming a photolithographic pattern is provided, comprising: configuring a plurality of corresponding photolithographic trimming operations based on the graphic features of a target pattern to be drawn on a photolithographic layer; executing the plurality of photolithographic trimming operations to obtain a plurality of corresponding photolithographic patterns, wherein the plurality of photolithographic patterns constitute the target pattern, wherein at least two of the plurality of photolithographic patterns are photolithographically etched on the surface of the photolithographic layer.

[0008] In one exemplary embodiment of this disclosure, the graphic features include at least one of the distribution features of the target graphic, the line direction constituting the target graphic, and the graphic type in the target graphic.

[0009] In an exemplary embodiment of this disclosure, performing the multiple sets of photolithography trimming operations includes: in each set of photolithography trimming operations, performing a trimming operation on the initial photolithography pattern obtained based on the photolithography operation to obtain the corresponding photolithography pattern.

[0010] In an exemplary embodiment of this disclosure, the plurality of photolithographic patterns includes a first photolithographic pattern. The step of performing a trimming operation on the initial photolithographic pattern obtained based on the photolithographic operation to obtain the corresponding photolithographic pattern includes: coating the surface of the layer to be photolithographically etched with a first photoresist, and performing a photolithographic operation on the first photoresist based on a first direction sub-pattern in the target pattern until reaching the surface of the layer to be photolithographically etched, to obtain the first initial photolithographic pattern; and performing the trimming operation on the first initial photolithographic pattern to obtain the first photolithographic pattern.

[0011] In an exemplary embodiment of this disclosure, the plurality of photolithographic patterns further includes a second photolithographic pattern, and the step of performing a trimming operation on the initial photolithographic pattern obtained based on the photolithographic operation to obtain the corresponding photolithographic pattern further includes: coating a second photoresist on the first photolithographic pattern; performing a photolithographic operation on the second photoresist based on a second direction sub-pattern in the target pattern until reaching the surface of the layer to be photolithographicated, to obtain a second initial photolithographic pattern; and performing the trimming operation on the second initial photolithographic pattern to obtain the second photolithographic pattern.

[0012] In one exemplary embodiment of this disclosure, before coating the first photolithographic pattern with the second photoresist, the method further includes: forming a sacrificial material layer on the first photolithographic pattern, wherein the sacrificial material layer includes at least one of spin-coated carbon layer, silicon oxide layer, metal oxide layer, organic dielectric layer and advanced patterning layer.

[0013] In one exemplary embodiment of this disclosure, both the first photoresist and the second photoresist are positive photoresists; or both the first photoresist and the second photoresist are negative photoresists; or one of the first photoresist and the second photoresist is the positive photoresist and the other is the negative photoresist.

[0014] In an exemplary embodiment of this disclosure, one of the first photoresist and the second photoresist is a positive photoresist and the other is a negative photoresist. Before coating the surface of the layer to be photolithographically processed with the first photoresist, the method further includes: performing a simulation operation on the process of the photolithography operation, and determining, based on the simulation results, that the first photoresist is a positive photoresist and the second photoresist is a negative photoresist, or the first photoresist is a negative photoresist and the second photoresist is a positive photoresist.

[0015] In one exemplary embodiment of this disclosure, the plurality of photolithographic patterns further includes a third photolithographic pattern, which is photolithographically etched on the surface of the layer to be photolithographically etched, or the photolithographic bottom surface of the third photolithographic pattern is higher than the surface of the layer to be photolithographically etched.

[0016] In an exemplary embodiment of this disclosure, the step of performing a trimming operation on the initial photolithographic pattern obtained based on the photolithography operation to obtain the corresponding photolithographic pattern includes: performing the trimming operation on the initial photolithographic pattern to obtain a trimmed photolithographic pattern; and performing hardening processing on the trimmed photolithographic pattern to obtain the corresponding photolithographic pattern.

[0017] In an exemplary embodiment of this disclosure, the step of performing the trimming operation on the initial photolithography pattern to obtain a trimmed photolithography pattern includes: measuring the key dimensions of the initial photolithography pattern, determining the pattern pre-compensation amount of the initial photolithography pattern based on the measurement results, and trimming the initial photolithography pattern based on the pattern pre-compensation amount to obtain the trimmed photolithography pattern.

[0018] In an exemplary embodiment of this disclosure, the step of trimming the initial photolithographic pattern based on the pattern pre-compensation amount to obtain the trimmed photolithographic pattern includes: performing a gas trimming operation on the initial photolithographic pattern based on the pattern pre-compensation amount and the trimming duration; and performing plasma activation on the introduced trimming gas to generate plasma, wherein the plasma is used to oxidize the photoresist of the pattern pre-compensation amount in the initial photolithographic pattern into a volatile gas to trim the initial photolithographic pattern. The trimming duration is configured based on a trimming formula, wherein the trimming formula is t = C / k, where t is the trimming duration, C is the pattern pre-compensation amount, and k is the trimming coefficient.

[0019] In one exemplary embodiment of this disclosure, the method further includes: collecting the process window of the photolithography trimming operation, and feeding the process window back to the design end or the process end of the photolithography pattern, so that the design end adjusts the design parameters of the photolithography pattern based on the process window, or the process end adjusts the process parameters of the photolithography pattern based on the process window.

[0020] According to another aspect of this disclosure, a photolithographic pattern is provided, the photolithographic pattern comprising multiple sets, at least two of the multiple sets of photolithographic patterns being photolithographically etched onto the surface of a layer to be photolithographically etched, wherein the multiple sets of photolithographic patterns are generated by photolithographically etching multiple sets of photoresist, the multiple sets of photoresist being all positive photoresist, or the multiple sets of photoresist being all negative photoresist, or the multiple sets of photoresist including both positive and negative photoresist.

[0021] According to another aspect of this disclosure, a photolithography pattern forming apparatus is provided, comprising: a configuration module, configured to configure a plurality of corresponding photolithography trimming operations based on the graphic features of a target graphic to be drawn on a photolithography layer; and a photolithography trimming module, configured to execute the plurality of photolithography trimming operations to obtain a plurality of corresponding photolithography patterns, wherein the target graphic is constituted by the plurality of photolithography patterns, wherein at least two of the plurality of photolithography patterns are photolithographically etched on the surface of the photolithography layer.

[0022] According to another aspect of this disclosure, an electronic device is provided, comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to perform the photolithographic patterning method described in any of the preceding claims by executing the executable instructions.

[0023] According to another aspect of this disclosure, a computer-readable medium is provided having a computer program stored thereon, which, when executed by a processor, implements the photolithographic patterning method as described in the above embodiments.

[0024] The lithography pattern formation scheme provided in the embodiments of this disclosure targets a target pattern to be lithographically patterned on a lithographic layer. By automatically analyzing the graphic features of the target pattern, the target pattern is divided into multiple sub-patterns based on the analysis results. Each sub-pattern corresponds to a set of lithographic trimming operations. By executing multiple sets of lithographic trimming operations, the target pattern is lithographically patterned on the lithographic layer. By configuring multiple sets of lithographic trimming operations, complex target patterns can be divided into multiple simpler sub-patterns. The simpler sub-patterns help to reduce the limiting requirements of the process window, thereby ensuring the quality of parameters such as the contour, linewidth roughness, and edge roughness of the lithographically formed pattern, and reducing the probability of defects generated in the lithography process.

[0025] Furthermore, applying this photolithography patterning scheme to the mass production process of semiconductor devices can also help reduce the probability of rework due to substandard product dimensions.

[0026] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0028] Figure 1 A schematic diagram of a photolithographic target pattern provided in one embodiment of the present disclosure is shown;

[0029] Figure 2 A flowchart of a photolithographic patterning method provided in one embodiment of the present disclosure is shown;

[0030] Figure 3 A schematic diagram of a photolithographic target pattern provided in another embodiment of this disclosure is shown;

[0031] Figure 4 A schematic diagram of a lithographic target pattern provided in another embodiment of the present disclosure is shown;

[0032] Figure 5 A flowchart of a photolithographic patterning method provided in another embodiment of this disclosure is shown;

[0033] Figure 6 A top view of an intermediate process of a photolithographic patterning scheme provided in an embodiment of the present disclosure is shown;

[0034] Figure 7 A top view of an intermediate process of a photolithographic patterning scheme provided in another embodiment of this disclosure is shown;

[0035] Figure 8 A top view of an intermediate process of a photolithographic patterning scheme provided in another embodiment of the present disclosure is shown;

[0036] Figure 9 A top view of an intermediate process of a photolithographic patterning scheme provided in yet another embodiment of the present disclosure is shown;

[0037] Figure 10 A side view of an intermediate process of a photolithographic patterning scheme provided in an embodiment of the present disclosure is shown;

[0038] Figure 11 A side view of an intermediate process of a photolithographic patterning scheme provided in another embodiment of the present disclosure is shown;

[0039] Figure 12 A flowchart of a photolithographic patterning method provided in another embodiment of the present disclosure is shown;

[0040] Figure 13 A flowchart of a photolithographic patterning method provided in yet another embodiment of the present disclosure is shown;

[0041] Figure 14 A side view of an intermediate process of a photolithographic patterning scheme provided in another embodiment of the present disclosure is shown;

[0042] Figure 15 A side view of an intermediate process of a photolithographic patterning scheme provided in yet another embodiment of the present disclosure is shown;

[0043] Figure 16 A side view of an intermediate process of a photolithographic patterning scheme provided in yet another embodiment of the present disclosure is shown;

[0044] Figure 17 A schematic block diagram of a photolithographic pattern forming apparatus provided for one embodiment of the present disclosure;

[0045] Figure 18This is a schematic diagram of the structure of a computer system suitable for implementing an electronic device according to an embodiment of the present disclosure. Detailed Implementation

[0046] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0047] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0048] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and steps, nor do they necessarily need to be performed in the described order. For example, some steps may be broken down, while others may be combined or partially combined; therefore, the actual execution order may change depending on the actual situation. The terms "a," "one," and "the above" are used to indicate the presence of one or more elements / components / etc. The terms "comprising," "including," and "having" are used to indicate an open-ended inclusion and mean that additional elements / components / etc. may exist besides those listed.

[0049] In the semiconductor industry, as device sizes shrink, increasing the design and process window is a future development trend. With the gradual reduction in semiconductor device size, the corresponding process window needs to be increased. Currently, in semiconductor imaging processes, to ensure that the critical dimensions (minimum feature size) of the pattern meet design requirements, the photolithography process needs to guarantee a sufficient process window and precise process conditions to achieve the target size. If the target size is not achieved, the photoresist (a photosensitive material) needs to be removed and the process restarted.

[0050] As target dimensions gradually shrink, the impact of photoresist molding contours, linewidth roughness, and edge roughness on image quality becomes increasingly apparent (short circuits between images, image breakage), and can easily lead to defects in subsequent processes. Furthermore, the reduction in target size results in increasingly complex image designs. Figure 1 However, complex pattern settings cannot be directly fabricated by current lithography machines and photoresist limits. Therefore, in order to fabricate images with small size and complex structure, certain improvements need to be made to the process to meet the requirements of complex pattern fabrication.

[0051] Reference Figure 2 The photolithographic pattern forming method according to embodiments of the present disclosure includes:

[0052] Step S202: Based on the graphic features of the target graphic to be drawn on the lithography layer, configure multiple sets of corresponding lithography trimming operations.

[0053] The layers to be lithographically etched include, but are not limited to, oxide layers, nitride layers, metal layers, and hard mask layers.

[0054] In addition, the target graphic is divided into multiple sub-graphics based on graphic features. Each sub-graphic corresponds to a set of lithographic trimming operations. Specifically, the multiple sets of lithographic trimming operations are greater than or equal to 2 sets.

[0055] Step S204: Perform multiple sets of photolithography trimming operations to obtain multiple sets of corresponding photolithography patterns, so as to form a target pattern from multiple sets of photolithography patterns, wherein at least two sets of photolithography patterns are photolithographically etched on the surface of the layer to be photolithographically etched.

[0056] The photolithography trimming operation includes photolithography operation and trimming operation.

[0057] Trimming operations include, but are not limited to, trimming the width of a graphic and trimming its height.

[0058] In addition, at least two of the multiple sets of lithographic patterns are lithographically applied to the surface of the layer to be lithographically applied, which means that at least two sets of sub-patterns are drawn on the layer to be lithographically applied.

[0059] In this embodiment, for the target pattern to be lithographically patterned on the lithography layer, the graphic features of the target pattern are automatically analyzed, and the target pattern is divided into multiple sub-patterns based on the analysis results. Each sub-pattern corresponds to a set of lithography trimming operations. Then, by executing multiple sets of lithography trimming operations, the target pattern is lithographically patterned on the lithography layer. By configuring multiple sets of lithography trimming operations, the complex target pattern can be divided into multiple simpler sub-patterns. The simpler sub-patterns help to reduce the limit requirements of the process window, thereby ensuring the quality of parameters such as the contour, line width roughness, and edge roughness of the lithographically formed pattern, and reducing the probability of defects in the lithography process.

[0060] Furthermore, applying this photolithography patterning scheme to the mass production process of semiconductor devices can also help reduce the probability of rework due to substandard product dimensions.

[0061] In one exemplary embodiment of this disclosure, the graphic features include at least one of the distribution features of the target graphic, the line direction constituting the target graphic, and the graphic type in the target graphic.

[0062] As the first type of target pattern, the distribution characteristics of the target pattern can be defined as the concentration of the pattern's distribution on the layer to be lithographically processed. Figure 3 The target pattern shown includes 5 sub-patterns. Among them, the three sub-patterns in region 302 are more concentrated than the three sub-patterns in region 304. Therefore, the photolithography process of the target pattern can be configured as two sets of photolithography trimming operations.

[0063] Specifically, based on the distribution characteristics of the target pattern to be drawn on the lithographic layer, multiple sets of corresponding lithographic trimming operations can be configured. This can be achieved by cluster analysis. By performing clustering operations on the target pattern, multiple sets of sub-patterns are obtained. The patterns in each set of sub-patterns are relatively close to each other, while the relative distance between multiple sets of sub-patterns is relatively far.

[0064] As the second type of target graphic, such as Figure 1 As shown, the direction of the lines constituting the target graphic refers to the direction of extension of different lines in the graphic. It is understood by those skilled in the art that, with the horizontal and vertical directions as reference directions respectively, 90° is divided into multiple angular regions, such as [0,30], (30,60), [60,90]. Lines whose angle with the horizontal direction is in the same angular region can be regarded as lines in the same direction.

[0065] In addition, curves with lower volatility can be approximated as straight lines to identify the direction of the lines.

[0066] Specifically, based on the difference of each pixel in the target graphic, the grayscale image of the target graphic is binarized, the pixels in non-line areas are set to 0, and the pixel values ​​in line areas are set to 255. Then, the pixels are summed column by column. If the sum of each column is greater than 0, it indicates that a line has been detected. By scanning column by column, the line trajectory of the target image is obtained, so as to further detect the direction of the line based on the line trajectory, and configure the corresponding multiple sets of photolithography trimming operations based on the detection results.

[0067] As the third type of target graphic, the graphic types in the target graphic include, but are not limited to, rectangles, parallelograms, triangles, trapezoids, circles, ellipses, etc. Figure 4 As shown, the target lithography pattern includes two pattern types: 402 and 404. The corresponding lithography trimming operations are configured based on these two pattern types.

[0068] Specifically, the graphic categories in the target graphic can be intelligently identified, and the target graphic can be automatically split into multiple sub-graphics based on the identification results, with corresponding photolithography trimming operations configured for each sub-graphic.

[0069] Furthermore, those skilled in the art will understand that, for any target graphic, any graphic feature can be pre-set as a specific configuration condition to configure the corresponding lithographic trimming operation based on the splitting result, or different priorities can be set for the above-mentioned different graphic features, and the target graphic can be identified based on the corresponding priority to split the graphic based on the identification result.

[0070] In this embodiment, by configuring different types of graphic features, the target graphic to be lithographically split is realized based on at least one type of graphic feature, and the corresponding lithographic trimming operation is further configured. By ensuring the reliability and rationality of the target image splitting, the process reliability of each group of lithographic trimming operations can be further guaranteed to reduce process defects.

[0071] In one exemplary embodiment of this disclosure, performing multiple sets of photolithography trimming operations includes: in each set of photolithography trimming operations, performing a trimming operation on the initial photolithography pattern obtained based on the photolithography operation to obtain the corresponding photolithography pattern.

[0072] In this embodiment, a larger initial lithographic pattern is obtained by first performing a photolithography operation on the photoresist, and then the lithographic pattern is further modified to obtain a smaller lithographic pattern. This satisfies the fabrication requirements of target patterns with small linewidths. Especially in situations where design rules cannot meet design size requirements, or where the lithography machine and photoresist limits cannot directly process the target pattern, or where the process window is extremely small, an initial lithographic pattern can be generated by exposure first, and then the pattern can be reduced in size through modification operations. This can achieve a high-fidelity effect, reduce defects caused by exposure, and increase the design window.

[0073] like Figure 5 As shown, in an exemplary embodiment of this disclosure, multiple sets of photolithographic patterns include a first photolithographic pattern, and the process of modifying the initial photolithographic pattern obtained based on the photolithographic operation to obtain the corresponding photolithographic pattern includes:

[0074] Step S502: Coat the surface of the layer to be photolithographically ...

[0075] The first initial photolithographic pattern 602 obtained after coating the first photoresist is as follows: Figure 6 As shown.

[0076] Step S504: Perform a trimming operation on the first initial photolithography pattern to obtain the first photolithography pattern.

[0077] The first lithographic pattern 702 after modification Figure 7 As shown.

[0078] like Figure 5 As shown, in an exemplary embodiment of this disclosure, the multiple sets of photolithographic patterns further include a second photolithographic pattern, and the process of modifying the initial photolithographic pattern obtained based on the photolithographic operation to obtain the corresponding photolithographic pattern further includes:

[0079] Step S506: Coat the first photolithographic pattern with a second photoresist.

[0080] Step S508: Perform photolithography on the second photoresist based on the second direction sub-image in the target pattern until the surface of the layer to be photolithographically etched is reached, and the initial second photolithography pattern is obtained.

[0081] Figure 8 A schematic diagram of the combination of the first photolithographic pattern 702 and the second initial photolithographic pattern 802 is shown.

[0082] Step S510: Perform a trimming operation on the initial second lithography pattern to obtain the second lithography pattern.

[0083] Figure 9 A schematic diagram of the combination of the first lithographic pattern 702 and the second lithographic pattern 902 is shown.

[0084] Furthermore, such as Figure 10 and Figure 11 As shown, an anti-reflection layer 1004 is coated on the hard mask 1002. The anti-reflection layer 1004 can be BARC (Bottom Anti-Reflection Coating) or DBARC (Developable Bottom Anti-Reflection Coating).

[0085] like Figure 10 As shown, after coating the first photolithographic pattern 1006A with the second photoresist, a photolithography operation is performed to generate the second initial photolithographic pattern 1006B.

[0086] like Figure 11 As shown, the second initial lithography pattern 1006B is trimmed to obtain the target pattern 1006.

[0087] In this embodiment, for a target pattern including at least a first lithographic pattern and a second lithographic pattern, the first lithographic pattern is obtained by sequentially coating a first photoresist, photolithographically generating a first initial lithographic pattern, and trimming the first initial lithographic pattern. The second lithographic pattern is then obtained by coating a second photoresist on the first lithographic pattern, photolithographically generating a second initial lithographic pattern, and trimming the second initial lithographic pattern. The lithography depth of the corresponding first and second lithography operations reaches the surface of the layer to be lithographicated, thereby enabling the first and second lithographic patterns to meet the target size requirements of the target pattern. This allows for the acquisition of a high-quality target lithographic pattern without requiring extreme design and process conditions.

[0088] In one exemplary embodiment of this disclosure, before coating the first photoresist onto the first photolithographic pattern, the method further includes: forming a sacrificial material layer on the first photolithographic pattern.

[0089] The sacrificial material layer includes at least one of spin-coated carbon layer, silicon oxide layer, metal oxide layer, organic dielectric layer and advanced patterning layer.

[0090] In this embodiment, a sacrificial material layer is used to protect the first photolithographic pattern. The sacrificial material layer is first formed on the first photolithographic pattern, and then the second photoresist is coated. This allows the first photolithographic pattern and the second photoresist to be separated. After the second photolithographic pattern is formed, the sacrificial material layer is etched away to protect the first photolithographic pattern. In addition, the material of the sacrificial material layer is reasonably selected so that the sacrificial material layer is easy to form and easy to remove.

[0091] Regarding the photolithographic properties of the first and second photoresists, in the first exemplary embodiment of this disclosure, both the first and second photoresists are positive resists.

[0092] In a second exemplary embodiment of this disclosure, both the first photoresist and the second photoresist are negative photoresists.

[0093] In a third exemplary embodiment of this disclosure, one of the first photoresist and the second photoresist is a positive photoresist and the other is a negative photoresist.

[0094] Specifically, negative photoresist forms an insoluble substance after light exposure, while positive photoresist is insoluble in some solvents but becomes soluble after light exposure. Because negative photoresist undergoes cross-linking or hardening during ultraviolet exposure, it cannot dissolve in the developer, while exposed positive photoresist is more easily soluble in the developer. Therefore, by using positive and negative photoresist as the first and second photoresists respectively, the probability of the formed first photolithographic pattern being affected by the formation process of the second photolithographic pattern can be reduced, thereby ensuring the reliability and stability of the first photolithographic pattern.

[0095] In one exemplary embodiment of this disclosure, one of the first photoresist and the second photoresist is a positive photoresist and the other is a negative photoresist. Before coating the surface of the layer to be photolithographically applied with the first photoresist, the method further includes: performing a simulation operation on the photolithography process, and determining, based on the simulation results, that the first photoresist is a positive photoresist and the second photoresist is a negative photoresist, or the first photoresist is a negative photoresist and the second photoresist is a positive photoresist.

[0096] Preferably, the first photoresist is a negative photoresist and the second photoresist is a positive photoresist.

[0097] Specifically, based on process simulation operations, if the initial photolithography pattern is prepared using positive photoresist for the first time, and the corresponding light-transmitting area of ​​the photomask is a non-pattern area, and a positive development operation is used, then the initial photolithography pattern is prepared using negative photoresist for the second time, and the corresponding light-transmitting area of ​​the photomask is a pattern area, and a negative development operation is used.

[0098] In one exemplary embodiment of this disclosure, the plurality of photolithographic patterns further includes a third photolithographic pattern, which is photolithographically etched on the surface of the layer to be photolithographically etched, or the photolithographic bottom surface of the third photolithographic pattern is higher than the surface of the layer to be photolithographically etched.

[0099] In this embodiment, the third lithographic pattern can be formed directly on the surface of the layer to be lithographically patterned, that is, the lithography operation is performed in the area that is neither the first lithographic pattern nor the second lithographic pattern. Alternatively, the third lithographic pattern can be drawn on the upper surface of the first lithographic pattern and / or the second lithographic pattern. In addition, a new lithographic layer can be added on the layer to be lithographically patterned so that the third lithographic pattern can be drawn on the new lithographic layer.

[0100] In one exemplary embodiment of this disclosure, the process of modifying the initial photolithographic pattern obtained based on the photolithographic operation to obtain the corresponding photolithographic pattern includes: modifying the initial photolithographic pattern to obtain a modified photolithographic pattern.

[0101] In one exemplary embodiment of this disclosure, such as Figure 12 As shown, a specific implementation method for trimming the initial photolithographic pattern to obtain a trimmed photolithographic pattern includes:

[0102] Step S1202: Determine the initial target value of the critical dimension of the lithographic pattern based on the target critical dimension, allowable error, and line edge roughness of the target pattern.

[0103] Among them, the target critical dimension refers to the final critical specification dimension of the target graphic.

[0104] The initial target value is the size of the initial photolithographic pattern.

[0105] Step S1204: Perform photolithography exposure operation based on the initial target value to obtain the initial photolithography pattern.

[0106] Step S1206: Measure the critical dimensions of the initial photolithography pattern and determine the pattern pre-compensation amount based on the measurement results.

[0107] In one exemplary embodiment of this disclosure, step S1206, which involves measuring the critical dimensions of the initial photolithography pattern and determining the pattern pre-compensation amount based on the measurement results, includes the following specific implementation:

[0108] The critical dimensions of the initial photolithographic pattern are measured to obtain the actual measured dimensions. Based on the actual measured dimensions and the pre-compensation calculation formula, the pattern pre-compensation amount is determined. The pre-compensation calculation formula is as follows: C represents the pre-complementary dimension of the graphic, V represents the actual measured dimension, and A represents the target critical dimension.

[0109] Step S1208: The initial lithography pattern is trimmed based on the pattern pre-compensation amount to obtain the trimmed lithography pattern.

[0110] In one exemplary embodiment of this disclosure, step S1208, which involves trimming the initial photolithographic pattern based on the pattern pre-compensation amount to obtain a trimmed photolithographic pattern, includes the following specific implementation:

[0111] Based on the pattern pre-compensation amount and trimming time, a gas trimming operation is performed on the initial photolithography pattern. The introduced trimming gas is activated by plasma to generate plasma. The plasma is used to oxidize the photoresist in the pattern pre-compensation amount of the initial photolithography pattern into volatile gas to trim the initial photolithography pattern.

[0112] The dressing gas is generated by combining inert gas and process gas.

[0113] Alternatively, an integrated trimming device can be used to introduce trimming gas onto the surface of the exposed pattern. The integrated trimming device is a lithography device that integrates trimming gas introduction function.

[0114] Specifically, the trimming duration is configured based on the trimming formula;

[0115] The execution time of the gas trimming operation is controlled based on the trimming duration, so as to oxidize the photoresist pre-patch amount in the initial photolithography pattern into volatile gas.

[0116] The trimming formula is t = C / k, where t is the trimming time, C is the pre-compensation amount of the graphic, and k is the trimming coefficient.

[0117] The trimming factor k is determined based on the photoresist material parameters of the lithographic image, the electrical parameters of the trimming gas, and the trimming test results for different trimming gases.

[0118] In this embodiment, by calculating the initial target value of the photolithography pattern, a photolithography operation is performed on the photoresist after coating the photoresist based on the initial target value to obtain the initial photolithography pattern. Furthermore, a photoresist trimming gas that can be activated by plasma and exposed on the surface of the photoresist is used to trim the initial photolithography pattern. Specifically, by detecting the pattern pre-compensation amount of the initial photolithography pattern, the flow rate and number of seconds are controlled based on the pattern pre-compensation amount to trim the photoresist layer, thereby completing the trimming process and ensuring the trimming accuracy of the trimming operation.

[0119] In one exemplary embodiment of this disclosure, the photolithographic pattern forming method according to an embodiment of this disclosure further includes:

[0120] The process adjustment time is obtained by adjusting the process parameters based on the height of the target pattern. The height of the lithographic pattern is then adjusted based on the process adjustment time. If the height of the adjusted lithographic pattern is found to be inconsistent, the detection result is fed back to the next lithographic adjustment process to perform gas adjustment operation in a loop until the height of the adjusted exposure image is the same.

[0121] In this embodiment, by obtaining the height process parameters of the target pattern, the consistency of the height of the obtained target pattern can be ensured, which is beneficial to ensuring the consistency of height in subsequent etching processes.

[0122] In one exemplary embodiment of this disclosure, the process of modifying the initial photolithographic pattern obtained based on the photolithographic operation to obtain the corresponding photolithographic pattern further includes: performing hardening processing on the modified photolithographic pattern to obtain the corresponding photolithographic pattern.

[0123] In this embodiment, the obtained photolithographic pattern is subjected to hardening treatment to improve the adhesion of the photoresist to the photolithographic layer, thereby ensuring the smooth execution of subsequent processes.

[0124] In one exemplary embodiment of this disclosure, the method further includes: collecting the process window of the photolithography trimming operation and feeding the process window back to the design end or the process end of the photolithography pattern, so that the design end can adjust the design parameters of the photolithography pattern based on the process window, or the process end can adjust the process parameters of the photolithography pattern based on the process window.

[0125] In this embodiment, the photolithography process window during each photolithography trimming operation is fed back to the design end and / or the process end to optimize the relevant parameters of the photolithography pattern during the product design stage and / or process design stage, so as to continuously improve the semiconductor product including the photolithography pattern through reverse optimization.

[0126] like Figure 13 As shown, a photolithographic pattern forming method according to another embodiment of the present disclosure specifically includes:

[0127] Step S1302: Based on the graphic features of the target graphic to be drawn on the lithography layer, configure multiple sets of corresponding lithography trimming operations.

[0128] Step S1304: For each set of photolithography trimming operations, first determine the initial target value of the key dimension of the photolithography pattern based on the target key dimension A, allowable error B, and line edge roughness C of the target pattern.

[0129] Where, target≥A+B+2C(nm).

[0130] Among them, the line edge roughness C is related to the exposure energy, photoresist thickness, and photoresist material.

[0131] like Figure 14 As shown, the linewidth of the first initial lithography pattern or the second initial lithography pattern 1008A formed satisfies target≥A+B+2C(nm).

[0132] Step S1306: Apply photoresist and perform photolithography based on the initial target value to obtain the initial photolithographic pattern.

[0133] Step S1308: The initial photolithography pattern is measured by key dimension CD to obtain the linewidth value of the initial photolithography pattern, and the pattern pre-compensation amount is calculated based on the linewidth value.

[0134] Wherein, the linewidth value is V nm, and the calculated graphic pre-compensation amount is... (V–A)nm.

[0135] like Figure 15 As shown, CD measurement is performed on the first initial lithography pattern or the second initial lithography pattern 1008A to obtain the linewidth value V.

[0136] Step S1310: Configure one or more trimming gases that can be activated by plasma and exposed to the photoresist surface, and trim the initial photolithography pattern by controlling the flow rate and the number of seconds to obtain the photolithography pattern.

[0137] like Figure 16 As shown, a trimming operation is performed on the first initial lithography pattern or the second initial lithography pattern 1008A to obtain the first lithography pattern or the second lithography pattern 1008B. Through the trimming operation, the line width reaches the target critical dimension A.

[0138] The conditioning gases include, but are not limited to, argon, helium, neon, nitrogen, and some process gases such as plasma gases composed of carbon, hydrogen, oxygen, and nitrogen elements.

[0139] Based on the measured and calculated pre-compensation value, and the coherence coefficient k between the photoresist linewidth and the number of seconds for trimming gas, the required processing time for trimming gas is obtained and the process is completed.

[0140] Step S1312 involves continuous collaborative optimization of DTCO through process and design technology, optimizing the process window and design window based on multiple sets of lithography trimming operations.

[0141] In this embodiment, to prevent rework in semiconductor products, the fabrication of the target pattern to be lithographicated is broken down into multiple sets of lithographic trimming operations. This reduces the complexity of a single lithography operation and, combined with the trimming operations after lithography, lowers the process requirements of the lithography process, thereby reducing rework costs.

[0142] Furthermore, through continuous collaboration and optimization between Process and DTCO, the design / process window can be improved simultaneously, enabling continuous improvement of product design and processes.

[0143] It should be noted that the above figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Furthermore, it is readily understood that these processes may, for example, be executed synchronously or asynchronously in multiple modules.

[0144] Those skilled in the art will understand that various aspects of the present invention can be implemented as systems, methods, or program products. Therefore, various aspects of the present invention can be specifically implemented in the following forms: entirely hardware implementations, entirely software implementations (including firmware, microcode, etc.), or implementations combining hardware and software aspects, collectively referred to herein as “circuits,” “modules,” or “systems.”

[0145] The following reference Figure 17 The photolithographic pattern forming apparatus 1700 according to this embodiment of the present invention will be described. Figure 17 The photolithography pattern forming apparatus 1700 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of the present invention.

[0146] The photolithography pattern forming apparatus 1700 is represented in the form of a hardware module. The components of the photolithography pattern forming apparatus 1700 may include, but are not limited to: a configuration module 1702, used to configure a number of corresponding photolithography trimming operations based on the graphic features of the target graphic to be drawn on the photolithography layer; and a photolithography trimming module 1704, used to execute the number of photolithography trimming operations to obtain a number of corresponding photolithography patterns, so that the target graphic is composed of the number of photolithography patterns, wherein at least two of the number of photolithography patterns are photolithographically etched on the surface of the photolithography layer.

[0147] The following is for reference. Figure 18 It shows a schematic diagram of the structure of a computer system 1800 suitable for implementing electronic devices according to embodiments of the present disclosure. Figure 18 The computer system 1800 of the electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.

[0148] like Figure 18 As shown, the computer system 1800 includes a central processing unit (CPU) 1801, which can perform various appropriate actions and processes based on programs stored in read-only memory (ROM) 1802 or programs loaded from storage section 1808 into random access memory (RAM) 1803. The RAM 1803 also stores various programs and data required for system operation. The CPU 1801, ROM 1802, and RAM 1803 are interconnected via bus 1804. An input / output (I / O) interface 1809 is also connected to bus 1804.

[0149] The following components are connected to I / O interface 1805: an input section 1806 including a keyboard, mouse, etc.; an output section 1807 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 1808 including a hard disk, etc.; and a communication section 1809 including a network interface card such as a LAN card, modem, etc. The communication section 1809 performs communication processing via a network such as the Internet. A drive 1810 is also connected to I / O interface 1805 as needed. Removable media 1818, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., are installed on drive 1810 as needed so that computer programs read from them can be installed into storage section 1808 as needed.

[0150] In another aspect, this application also provides a computer-readable medium, which may be included in the electronic device described in the above embodiments; or it may exist independently and not assembled into the electronic device. The computer-readable medium carries one or more programs that, when executed by the electronic device, cause the electronic device to implement the photolithographic pattern formation method as described in the above embodiments.

[0151] For example, electronic devices can achieve such Figure 2As shown: Step S202, based on the graphic features of the target graphic to be drawn on the lithography layer, configure a corresponding set of lithography trimming operations; Step S204, execute the set of lithography trimming operations to obtain a corresponding set of lithography patterns, so as to form the target graphic from the set of lithography patterns, wherein at least two of the set of lithography patterns are lithographically etched on the surface of the lithography layer.

[0152] In particular, according to embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication component, and / or installed from a removable medium. When the computer program is executed by a central processing unit (CPU), it performs the functions defined above in the system of this application.

[0153] It should be noted that the computer-readable medium disclosed herein may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable medium other than computer-readable storage media, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0154] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0155] The units described in the embodiments of this disclosure can be implemented in software or hardware, and the described units can also be located in a processor. The names of these units do not necessarily limit the unit itself.

[0156] It should be noted that although several modules or units for the device used to perform actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0157] Furthermore, although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps.

[0158] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, mobile terminal, or network device, etc.) to execute the methods according to the embodiments of this disclosure.

[0159] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

Claims

1. A lithographic patterning process, characterized by, include: Based on the graphic features of the target graphic to be drawn on the lithographic layer, multiple sets of corresponding lithographic trimming operations are configured. Performing the multiple sets of photolithography trimming operations yields multiple sets of corresponding photolithographic patterns, which together constitute the target pattern. In each set of photolithography trimming operations, a trimming operation is performed on the initial photolithographic pattern obtained based on the photolithography operation to obtain the corresponding photolithographic pattern, including: A first photoresist is coated on the surface of the layer to be photolithographically etched, and the first photoresist is photolithographically etched based on the first direction sub-pattern in the target pattern until it reaches the surface of the layer to be photolithographically etched, thereby obtaining the first initial photolithographic pattern. The trimming operation is performed on the first initial photolithography pattern to obtain the first photolithography pattern. A second photoresist is coated onto the first photolithographic pattern; Based on the second direction sub-pattern in the target pattern, the second photoresist is photolithographically ... The trimming operation is performed on the second initial lithographic pattern to obtain a second lithographic pattern, which is at least composed of the first lithographic pattern and the second lithographic pattern to form the target pattern; In this process, at least two of the multiple sets of photolithographic patterns are photolithographically etched onto the surface of the layer to be photolithographically etched. The trimming operation includes trimming the photoresist surface using a photoresist trimming gas activated by plasma. The trimming operation includes: adjusting the trimming time based on the height process parameters of the target pattern to obtain a process adjustment time, and trimming the height of the photolithographic pattern based on the process adjustment time; if the height of the trimmed photolithographic pattern is detected to be inconsistent, the detection result is fed back to the next photolithographic trimming process to perform the trimming operation cyclically until the height of the trimmed target pattern is the same.

2. The photoetching pattern forming method according to claim 1, wherein Before coating the second photoresist onto the first photolithographic pattern, the process further includes: A sacrificial material layer is formed on the first photolithographic pattern. The sacrificial material layer includes at least one of spin-coated carbon layer, silicon oxide layer, metal oxide layer, organic dielectric layer and advanced patterning layer.

3. The photolithographic pattern formation method according to claim 1, characterized in that, Both the first photoresist and the second photoresist are positive photoresists; or Both the first photoresist and the second photoresist are negative photoresists; or One of the first photoresist and the second photoresist is the positive photoresist, and the other is the negative photoresist.

4. The photoetching pattern forming method according to claim 3, wherein One of the first photoresist and the second photoresist is the positive photoresist, and the other is the negative photoresist. Before coating the surface of the layer to be photolithographically etched with the first photoresist, the following steps are also included: The process of the photolithography operation is simulated, and based on the simulation results, it is determined that the first photoresist is a positive photoresist and the second photoresist is a negative photoresist, or the first photoresist is a negative photoresist and the second photoresist is a positive photoresist.

5. The photoetching pattern forming method according to claim 1, wherein The multiple sets of photolithographic patterns also include a third photolithographic pattern. The third lithographic pattern is lithographically etched on the surface of the layer to be lithographically etched, or the bottom surface of the third lithographic pattern is higher than the surface of the layer to be lithographically etched.

6. The photo-lithography patterning method according to any one of claims 1 to 5, characterized in that, The step of trimming the initial photolithographic pattern obtained based on the photolithographic operation to obtain the corresponding photolithographic pattern includes: The trimming operation is performed on the initial photolithography pattern to obtain a trimmed photolithography pattern. The photolithographic pattern is subjected to hard film processing to obtain the corresponding photolithographic pattern.

7. The photoetching pattern forming method according to claim 6, wherein The process of performing the trimming operation on the initial photolithography pattern to obtain the trimmed photolithography pattern includes: The key dimensions of the initial photolithography pattern are measured, and the pattern pre-compensation amount of the initial photolithography pattern is determined based on the measurement results. The initial lithographic pattern is modified based on the pre-compensation amount to obtain the modified lithographic pattern.

8. The photoetching pattern forming method according to claim 7, wherein The step of trimming the initial photolithography pattern based on the pre-compensation amount to obtain the trimmed photolithography pattern includes: Based on the pre-patch amount and trimming time, a gas trimming operation is performed on the initial photolithography pattern. The introduced trimming gas is activated by plasma to generate plasma. The plasma is used to oxidize the photoresist in the pre-patch amount of the initial photolithography pattern into a volatile gas to trim the initial photolithography pattern. The trimming duration is configured based on a trimming formula, which is t=C / k, where t is the trimming duration, C is the graphic pre-compensation amount, and k is the trimming coefficient.

9. The photolithographic pattern formation method according to claim 1, characterized in that, Also includes: The process window of the photolithography trimming operation is collected and fed back to the design end or process end of the photolithography pattern, so that the design end can adjust the design parameters of the photolithography pattern based on the process window, or the process end can adjust the process parameters of the photolithography pattern based on the process window.

10. A lithographic pattern, characterized in that, The photolithographic pattern is formed according to the photolithographic pattern forming method according to claims 1-9; The photolithographic pattern comprises multiple sets, and at least two sets of the photolithographic patterns are photolithographically etched onto the surface of the layer to be photolithographically etched. The multiple sets of photolithographic patterns are generated by photolithography on multiple sets of photoresists, wherein all of the multiple sets of photoresists are positive photoresists, or all of the multiple sets of photoresists are negative photoresists, or the multiple sets of photoresists include both positive and negative photoresists.

11. A lithographic patterning device, characterized in that, include: The configuration module is used to configure multiple sets of lithography trimming operations based on the graphic features of the target graphic to be drawn on the lithography layer. A photolithography trimming module is used to perform the multiple sets of photolithography trimming operations to obtain corresponding multiple sets of photolithography patterns, so that the multiple sets of photolithography patterns constitute the target pattern. In each set of photolithography trimming operations, a trimming operation is performed on the initial photolithography pattern obtained based on the photolithography operation to obtain the corresponding photolithography pattern, including: coating a first photoresist on the surface of the layer to be lithographicated, and performing a photolithography operation on the first photoresist based on a first direction sub-pattern in the target pattern until it reaches the surface of the layer to be lithographicated, to obtain a first initial photolithography pattern; performing the trimming operation on the first initial photolithography pattern to obtain a first photolithography pattern; coating a second photoresist on the first photolithography pattern; performing a photolithography operation on the second photoresist based on a second direction sub-pattern in the target pattern until it reaches the surface of the layer to be lithographicated, to obtain a second initial photolithography pattern; performing the trimming operation on the second initial photolithography pattern to obtain a second photolithography pattern, wherein the target pattern is composed of at least the first photolithography pattern and the second photolithography pattern; the second initial photolithography pattern is in contact with the first photolithography pattern; In this process, at least two of the multiple sets of photolithographic patterns are photolithographically etched onto the surface of the layer to be photolithographically etched. The trimming operation includes trimming the photoresist surface using a photoresist trimming gas activated by plasma. The trimming operation includes: adjusting the trimming time based on the height process parameters of the target pattern to obtain a process adjustment time, and trimming the height of the photolithographic pattern based on the process adjustment time; if the height of the trimmed photolithographic pattern is detected to be inconsistent, the detection result is fed back to the next photolithographic trimming process to perform the trimming operation cyclically until the height of the trimmed target pattern is the same.

12. An electronic device, comprising: include: processor; as well as Memory for storing the executable instructions of the processor; The processor is configured to execute the photolithographic patterning method according to any one of claims 1 to 9 by executing the executable instructions.

13. A computer readable storage medium having stored thereon a computer program, characterized in that, When the computer program is executed by the processor, it implements the photolithographic pattern formation method according to any one of claims 1 to 9.