A method of managing a peripheral component interconnect express (PCIe) device and related apparatuses

Abstract

The application provides a method for managing a peripheral component interconnect express (PCIe) device and a related device. The PCIe device includes a communication interface, a processor and a memory. The memory is configured to store firmware of the PCIe device, and the firmware includes capability attribute information of the PCIe device. The processor is configured to load the firmware. The communication interface is configured to send the capability attribute information. The application opens a storage space in the firmware of the PCIe device, and the storage space is configured to store the capability attribute information. Therefore, the PCIe device includes the capability attribute information, and the application provides a basis and convenience for a computing device to manage the PCIe device.

Description

Technical Field

[0001] This application relates to the field of information technology, and in particular to a method and related apparatus for managing PCIe devices for Fast Peripheral Component Interconnect. Background Technology

[0002] Peripheral Component Interconnect Express (PCIe) devices, such as network cards and accelerator cards, are increasingly performing more and more functions as PCIe peripherals of computing device processor systems. As a result, the types of PCIe devices are also increasing, and their interaction with computing devices is becoming more and more complex, which makes the configuration and management requirements of computing devices for PCIe devices increasingly higher.

[0003] The computing device manages different PCIe devices based on their attribute information. Therefore, the computing device needs to obtain the attribute information of each PCIe device currently connected to it. Currently, the attribute information of PCIe devices is pre-stored in the computing device, allowing it to manage each device based on this pre-stored information. However, this method requires updating the stored attribute information in the computing device every time a PCIe device connected to it changes, which is inconvenient for the computing device to manage and maintain each PCIe device. Summary of the Invention

[0004] This application discloses a method and related apparatus for managing PCIe devices for high-speed peripheral component interconnection. The PCIe devices store firmware, which includes capability attribute information of the PCIe devices, thus laying the foundation for the management of PCIe devices.

[0005] In a first aspect, this application provides a PCIe device for rapid peripheral component interconnection, including a communication interface, a processor, and a memory, wherein the memory is used to store the firmware of the PCIe device, the firmware including capability attribute information of the PCIe device; the processor is used to load the firmware; and the communication interface is used to send the capability attribute information.

[0006] As can be seen, this application allocates a space in the firmware of the PCIe device's memory to store the PCIe device's capability attribute information, thus enabling the PCIe device to contain capability attribute information and laying the foundation for the management of the PCIe device.

[0007] Capability attribute information refers to the attribute information used to represent the capabilities of a PCIe device, which are used to implement a certain function of the PCIe device. The value of this capability attribute information generally represents the maximum or limit value that the PCIe device can achieve. When the PCIe device is in working state, the working state value may not reach the value of the capability attribute information. If the working state value exceeds the value of the capability attribute information for a long time, the PCIe device will stop working, work slowly, or even shut down, and may even be damaged.

[0008] Based on the first aspect, in a possible implementation, the communication interface is further configured to receive a command request; the command request is configured to instruct the acquisition of the capability attribute information; the communication interface is further configured to send response information; the response information includes the capability attribute information.

[0009] It is understandable that, given that the PCIe device stores capability attribute information, the PCIe device can receive command requests through the communication interface to instruct the acquisition of capability attribute information, and can also send response information including capability attribute information through the communication interface.

[0010] Based on the first aspect, in possible implementations, the communication interface includes an out-of-band interface; the out-of-band interface is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0011] As can be seen, the communication interface used to receive command requests for acquiring capability attribute information and to send capability attribute information can be an out-of-band interface, such as an SMBus interface, an NC-SI interface, or a UART interface. The out-of-band interface can also be other interfaces, which are not specifically limited in this application.

[0012] Based on the first aspect, in possible implementations, the communication interface includes an in-band interface; the in-band interface is a PCIe interface or an Ethernet interface.

[0013] As can be seen, the communication interface used to receive command requests for acquiring capability attribute information and to send capability attribute information can also be an in-band interface, such as a PCIe interface or an Ethernet interface. The in-band interface can also be other interfaces, which are not specifically limited in this application.

[0014] Based on the first aspect, in a possible implementation, when the out-of-band interface is the NC-SI interface, the custom command field in the command request carries an instruction to obtain the capability attribute information; the custom response field in the response information carries the capability attribute information.

[0015] It is understood that when the communication interface is an out-of-band NC-SI interface, the communication protocol supported by the NC-SI interface includes the NC-SI protocol. The NC-SI protocol defines the format of the command request (i.e., the first command request message) and the format of the response information (i.e., the first command response message). This application extends the custom command field in the first command request message and the custom response field in the first command response message, so that the custom command field in the first command request message carries an instruction to obtain capability attribute information, and the custom response field in the first command response message carries the capability attribute information of the PCIe device. Therefore, when the PCIe device communicates with other devices, it can receive the first command request message through the NC-SI interface, which includes an instruction to obtain capability attribute information, and send the first command response message through the NC-SI interface, which includes capability attribute information.

[0016] Based on the first aspect, in a possible implementation, when the communication interface is the PCIe interface, the platform-level data model (PLDM) protocol data field in the command request carries an instruction to obtain the capability attribute information; the PLDM protocol data field in the response information carries the capability attribute information.

[0017] It is understood that when the communication interface is an in-band PCIe interface, the communication protocols supported by the PCIe interface include the PLDM protocol. The PLDM protocol defines the format of the command request (i.e., the second command request message) and the format of the response information (i.e., the second command response message). This application extends the PLDM protocol data fields in the second command request message and the second command response message, so that the PLDM protocol data fields in the second command request message carry an instruction to obtain capability attribute information, and the PLDM protocol data fields in the second command response message carry the capability attribute information of the PCIe device. Therefore, when the PCIe device communicates with other devices, it can receive the second command request message through the PCIe interface, which includes an instruction to obtain capability attribute information, and send the second command response message through the PCIe interface, which includes capability attribute information.

[0018] Based on the first aspect, in possible implementations, the capability attribute information includes one or more of the following: port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

[0019] It is understood that capability attribute information may be one or more of the following: port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level. Capability attribute information may also be other information, which is not limited in this application.

[0020] Secondly, this application provides a system including a computing device and at least one Fast Peripheral Component Interconnect (PCIe) device, wherein the at least one PCIe device is connected to the computing device via a Fast Peripheral Component Interconnect (PCIe) bus, and the PCIe device stores firmware including capability attribute information of the PCIe device.

[0021] It is understood that a computing device can connect to at least one PCIe device, where the firmware of each PCIe device stores the device's capability attribute information, laying the foundation and providing convenient conditions for the computing device to manage at least one PCIe device. Based on the second aspect, in a possible implementation, the computing device is used to send a command request to the at least one PCIe device; the command request is used to instruct the acquisition of the PCIe device's capability attribute information; the at least one PCIe device is used to send response information to the computing device respectively; the response information includes the PCIe device's capability attribute information; the computing device is also used to manage the at least one PCIe device based on the received response information from the at least one PCIe device.

[0022] Based on the second aspect, in a possible implementation, the computing device communicates with the at least one PCIe device via an out-of-band interface; the out-of-band interface includes one or more of a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), and a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0023] Based on the second aspect, in a possible implementation, the computing device communicates with the at least one PCIe device via an in-band interface; the in-band interface includes the PCIe interface and / or an Ethernet interface.

[0024] Based on the second aspect, in a possible implementation, when the out-of-band interface includes the NC-SI interface, the custom command field in the command request carries an instruction to obtain capability attribute information; the custom response field in the response information carries the capability attribute information.

[0025] Based on the second aspect, in a possible implementation, when the in-band interface includes the PCIe interface, the platform-level data model (PLDM) protocol data field in the command request carries an instruction to obtain capability attribute information; the PLDM protocol data field in the response information carries the capability attribute information.

[0026] Based on the second aspect, in possible implementations, the capability attribute information includes one or more of the following: port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

[0027] Thirdly, this application provides a method for managing PCIe devices for Rapid Peripheral Component Interconnect, applied to a computing device side, comprising: the computing device sending a command request; the command request instructing the acquisition of capability attribute information of the PCIe device; receiving response information; the response information including the capability attribute information of the PCIe device; and managing the PCIe device according to the capability attribute information of the PCIe device.

[0028] As can be seen, the computing device can send a command request to instruct the acquisition of the capability attribute information of the PCIe device, and can also receive response information including the capability attribute information. The computing device manages the PCIe based on the received capability attribute information of the PCIe device.

[0029] Based on the third aspect, in a possible implementation, the computing device communicates with the PCIe device via an out-of-band interface; the out-of-band interface is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0030] Based on the third aspect, in a possible implementation, the computing device communicates with the PCIe device via an in-band interface; the in-band interface is a PCIe interface for Rapid Peripheral Component Interconnect or an Ethernet interface.

[0031] Based on the third aspect, in a possible implementation, when the out-of-band interface is the NC-SI interface, the custom command field in the command request carries an instruction to obtain capability attribute information; the custom response field in the response information carries the capability attribute information.

[0032] Based on the third aspect, in a possible implementation, when the in-band interface is the PCIe interface, the platform-level data model (PLDM) protocol data field in the command request carries an instruction to obtain capability attribute information; the PLDM protocol data field in the response information carries the capability attribute information.

[0033] Based on the third aspect, in possible implementations, the capability attribute information includes one or more of the following: port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

[0034] Fourthly, this application provides a method for managing PCIe devices for rapid peripheral component interconnection, applied to the PCIe device side, comprising: the PCIe device receiving a command request; the command request instructing the acquisition of capability attribute information of the PCIe device; the capability attribute information being stored in the firmware of the PCIe device; and sending response information based on the command request; the response information including the capability attribute information of the PCIe device.

[0035] As can be seen from this application, the firmware of the PCIe device stores the device's capability attribute information, laying the foundation for the management of the PCIe device. Furthermore, the PCIe device can receive command requests instructing the acquisition of capability attribute information, and can also send response information including capability attribute information.

[0036] Based on the fourth aspect, in a possible implementation, the PCIe device communicates with the computing device via an out-of-band interface; the out-of-band interface is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0037] Based on the fourth aspect, in a possible implementation, the PCIe device communicates with the computing device via an in-band interface; the in-band interface is a PCIe interface for rapid peripheral component interconnection or an Ethernet interface.

[0038] Based on the fourth aspect, in a possible implementation where the out-of-band interface is the NC-SI interface, the PCIe device receiving the command request includes: the PCIe device receiving the command request sent by the computing device through the NC-SI interface; the custom command field in the command request carries an instruction to obtain capability attribute information; sending response information based on the command request includes: sending the response information to the computing device through the NC-SI interface based on the command request; the custom response field in the response information carries the capability attribute information.

[0039] Based on the fourth aspect, in a possible implementation where the in-band interface is the PCIe interface, the PCIe device receiving the command request includes: the PCIe device receiving the command request sent by the computing device through the PCIe interface, wherein the platform-level data model (PLDM) protocol data field in the command request carries an instruction to obtain capability attribute information; the step of sending response information based on the command request includes: sending response information to the computing device through the PCIe interface based on the command request; wherein the PLDM protocol data field in the response information carries the capability attribute information.

[0040] Based on the fourth aspect, in possible implementations, the capability attribute information includes one or more of the following: port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

[0041] Fifthly, this application provides a computing device, comprising: a sending module for sending a command request; the command request instructing the acquisition of capability attribute information of the PCIe device; a receiving module for receiving response information; the response information including the capability attribute information of the PCIe device; and a management module for managing the PCIe device according to the capability attribute information of the PCIe device.

[0042] Based on the fifth aspect, in a possible implementation, the computing device communicates with the PCIe device via an out-of-band interface; the out-of-band interface is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0043] Based on the fifth aspect, in a possible implementation, the computing device communicates with the PCIe device via an in-band interface; the in-band interface is a PCIe interface for Rapid Peripheral Component Interconnect or an Ethernet interface.

[0044] Based on the fifth aspect, in a possible implementation, when the out-of-band interface is the NC-SI interface, the custom command field in the command request carries an instruction to obtain capability attribute information; the custom response field in the response information carries the capability attribute information.

[0045] Based on the fifth aspect, in a possible implementation, when the in-band interface is the PCIe interface, the platform-level data model (PLDM) protocol data field in the command request carries an instruction to obtain capability attribute information; the PLDM protocol data field in the response information carries the capability attribute information.

[0046] Based on the fifth aspect, in possible implementations, the capability attribute information includes one or more of the following: port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

[0047] The functional modules of the fifth aspect are specifically used to implement the methods described in the third aspect or any possible implementation of the third aspect.

[0048] Sixthly, this application provides a PCIe device, comprising: a storage module for storing capability attribute information of the PCIe device; a receiving module for receiving a command request; the command request instructing the acquisition of the capability attribute information of the PCIe device; and a sending module for sending response information based on the command request; the response information including the capability attribute information of the PCIe device.

[0049] Based on the sixth aspect, in a possible implementation, the PCIe device communicates with the computing device via an out-of-band interface; the out-of-band interface is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0050] Based on the sixth aspect, in a possible implementation, the PCIe device communicates with the computing device via an in-band interface; the in-band interface is a PCIe interface for Rapid Peripheral Component Interconnect or an Ethernet interface.

[0051] Based on the sixth aspect, in a possible implementation where the out-of-band interface is the NC-SI interface, the receiving module is used to receive the command request sent by the computing device through the NC-SI interface; the custom command field in the command request carries an instruction to obtain capability attribute information; the sending module is used to send the response information to the computing device through the NC-SI interface based on the command request; the custom response field in the response information carries the capability attribute information.

[0052] Based on the sixth aspect, in a possible implementation where the in-band interface is the PCIe interface, the receiving module is used to receive the command request sent by the computing device through the PCIe interface; the platform-level data model (PLDM) protocol data field in the command request carries an instruction to obtain capability attribute information; the sending module is used to send response information to the computing device through the PCIe interface based on the command request; the PLDM protocol data field in the response information carries the capability attribute information.

[0053] Based on the sixth aspect, in possible implementations, the capability attribute information includes one or more of the following: port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

[0054] The various functional modules in the sixth aspect are specifically used to implement the methods described in the fourth aspect or any possible implementation of the fourth aspect.

[0055] In a seventh aspect, this application provides yet another computing device, including a memory, a processor, and a communication interface, wherein the communication interface is used to receive or send instructions, the memory is used to store instructions, and the processor is used to execute the instructions stored in the memory to perform the methods described in the third aspect or any possible implementation thereof.

[0056] Eighthly, this application provides a computer-readable storage medium including program instructions that, when executed by a computing device, cause the computing device to perform the method described in the third aspect or any possible implementation thereof.

[0057] Ninthly, this application provides a computer-readable storage medium including program instructions that, when executed by a computing device, cause the computing device to perform the method described in the fourth aspect or any possible implementation thereof. Attached Figure Description

[0058] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0059] Figure 1 A schematic diagram of a system architecture is provided for this application;

[0060] Figure 2 A flowchart illustrating a method for managing PCIe devices provided in this application;

[0061] Figure 3 A schematic diagram illustrating the connection relationship between a computing device and a PCIe device provided in this application;

[0062] Figure 4 This is a schematic diagram of the SMBus interface protocol specification provided in this application;

[0063] Figure 5 A schematic diagram of a response information format provided in this application;

[0064] Figure 6 A schematic diagram illustrating the connection relationship between a computing device and a PCIe device provided in this application;

[0065] Figure 7A A schematic diagram of the first command request message provided for this application;

[0066] Figure 7B A schematic diagram of the first command response message provided for this application;

[0067] Figure 8 A schematic diagram illustrating the connection relationship between a computing device and a PCIe device provided in this application;

[0068] Figure 9A A schematic diagram of the second command request message provided for this application;

[0069] Figure 9B A schematic diagram of the second command response message provided in this application;

[0070] Figure 10 A schematic diagram of a computing device provided in this application;

[0071] Figure 11 This application provides a schematic diagram of a PCIe device.

[0072] Figure 12 A schematic diagram of another computing device provided in this application;

[0073] Figure 13 A schematic diagram of another PCIe device provided in this application. Detailed Implementation

[0074] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0075] In the embodiments of this application, the terms "first" and "second" are used only to distinguish different things and are not used to indicate important or secondary content. In the embodiments of this application, "at least one" means one or more, and "more than one" means two or more.

[0076] To facilitate understanding of this application, the terminology used in this application will be introduced first.

[0077] Out-of-band management refers to the management and control of the network through a dedicated management channel, separating management data from service data. An independent channel is established for management data, transmitting only management data, statistical information, and billing information, thus separating management data from service data. The out-of-band management channel can be a system management bus (SMBus) interface, a network controller sideband interface (NC-SI) interface, or a universal asynchronous receiver / transmitter (UART) interface, etc. These out-of-band management channels are referred to as out-of-band interfaces. In this application, the out-of-band interface can be an SMBus interface, an NC-SI interface, a UART interface, etc., or other interfaces; this application does not specifically limit it.

[0078] In-band management refers to transmitting management data and service data using the same network channel. The in-band management channel can be a PCIe interface or an Ethernet interface; these in-band management channels are referred to as in-band interfaces. In this application, the in-band interface can be a PCIe interface, an Ethernet interface, or any other type of interface; this application does not impose specific limitations.

[0079] The system architecture involved in this application is described below.

[0080] See Figure 1 , Figure 1 This is a schematic diagram of a system architecture involved in this application. Figure 1 In computing, the PCIe interface serves as a bridge for communication between computing devices and PCIe devices.

[0081] A computing device is a host device with a PCIe interface. Computing devices can be terminal devices, such as various types of servers, desktop computers, user equipment (UE), mobile phones, tablets, speakers, etc.; they can be machine intelligence devices, such as self-driving devices, transportation safety devices, virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, machine type communication (MTC) devices, industrial control devices, remote medical devices, smart grid devices, smart city devices, etc.; they can be automotive cockpit devices, or a module within automotive cockpit devices, such as one or more modules like cockpit domain controllers (CDC), cameras, screens, microphones, speakers, electronic keys, keyless entry or start system controllers, etc.; they can be data relay devices, such as routers, repeaters, bridges, or switches, etc.; they can be wearable devices (such as smartwatches, smart bracelets, pedometers, etc.), etc. In some scenarios, the name of a master device with a similar PCIe interface may not be called a computing device. However, for ease of description, in this embodiment, master devices with PCIe interfaces are collectively referred to as computing devices.

[0082] PCIe devices are slave devices with PCIe interfaces. Examples include network interface cards (NICs), redundant array of independent disks (RAID) cards, graphics processing units (GPUs), solid-state drives (SSDs), accelerator cards, Fibre Channel (FC) cards, and InfiniBand (IB) cards. PCIe devices store identification information, which identifies the device. This information can be one or more of the following: a four-tuple, part number (PN), serial number (SN), etc. The four-tuple includes: vendor identity (VID), device identity (DID), sub-vendor identity (SVID), and sub-system identity (SSID). This four-tuple uniquely identifies the PCIe device.

[0083] A computing device is connected to one or more PCIe devices. To facilitate the management of these PCIe devices, the computing device needs to obtain their capability attribute information to manage each device. However, PCIe devices only store identification information and not capability attribute information. Therefore, regardless of whether in-band or out-of-band communication is used, the computing device cannot directly obtain the capability attribute information from the PCIe devices.

[0084] Capability attribute information refers to the attribute information used to represent the capabilities of a PCIe device, which are used to implement a specific function of the PCIe device. The value of this capability attribute information generally represents the maximum or limit that the PCIe device can achieve. When the PCIe device is in an operational state, the operational state value may not reach the value of the capability attribute information. However, in some cases, if the operational state value exceeds the value of the capability attribute information for an extended period, it may lead to damage to the PCIe device. For example, capability attribute information may be one or more of the following: port speed, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level. Among these, port rate indicates the maximum transmission rate that the PCIe device port can achieve; cache capacity indicates the maximum cache capacity of the PCIe device; temperature threshold indicates the maximum temperature the PCIe device can reach. If the temperature of the PCIe device reaches or exceeds this temperature threshold while in operation, cooling measures must be taken to lower the temperature. If the temperature remains at or exceeds the temperature threshold for an extended period, the PCIe device may stop working, operate slowly, or even shut down, and may even be damaged. The network controller sideband interface characteristics include whether the PCIe device supports NC-SI features. The system includes supported commands and parameters, allowing for parameter configuration of PCIe devices based on the characteristics of the network controller's sideband interface; thermal resistance represents the ratio between the device's temperature difference (temperature rise) and power consumption difference (the unit of thermal resistance is °C / W), i.e., how many °C the temperature rises for every 1W increase in power consumption. Based on the thermal resistance value, the operating temperature that the PCIe device may reach under increased power consumption can be calculated; size information indicates the allowed size of the PCIe device, including full height, full length, half height, and half length; latency level indicates the time consumed in processing information within the PCIe device; and power consumption level indicates the power consumption of the PCIe device.

[0085] This application provides a method for a computing device to obtain capability attribute information of a PCIe device, as follows:

[0086] S101: The computing device pre-stores the mapping relationship between the identification information and capability attribute information of the PCIe device.

[0087] In one embodiment, the mapping relationship between the identification information and capability attribute information of a PCIe device can be as shown in Table 1. Table 1 only lists the mapping relationship between the identification information and capability attribute information of a PCIe device, and the identification information uses a quadruple of information that can uniquely identify the PCIe device: VID, DID, SVID and SSID.

[0088] Optionally, Table 1 may also include the name of the device, i.e. the correspondence between the identification information, the name of the device, and the capability attribute information. For example, the name of the device corresponding to the identification information VID1 / DID1 / SVID1 / SSID1 is device 1, and the corresponding capability attribute information includes capability attribute 1, capability attribute 2, capability attribute 3, and capability attribute 4.

[0089] Table 1. Mapping relationship between PCIe device identification information and capability attribute information

[0090]

[0091] It is understood that Table 1 here is merely an example. In actual applications, the content of the PCIe device identification information and capability attribute information in Table 1, as well as the mapping relationship between the identification information and capability attribute information of each PCIe device, may be different. For example, the identification information of different PCIe devices may have some identical capability attribute information. Table 1 may also include more or fewer mapping relationships. Furthermore, the correspondence may be stored in other forms, which are not specifically limited here.

[0092] S102: The computing device obtains the identification information of the PCIe device through in-band communication or out-of-band communication.

[0093] S103: The computing device determines the capability attribute information corresponding to the PCIe device's identification information based on the obtained PCIe device identification information and the mapping relationship between the PCIe device's identification information and capability attribute information.

[0094] In a specific embodiment, Table 1 will be used as an example for further explanation. Assuming that the obtained PCIe device identification information is the PCIe device quadruple information VID1 / DID1 / SVID1 / SSID1, it can be found from Table 1 that the capability attribute information corresponding to this quadruple information is capability attribute 1, capability attribute 2, capability attribute 3 and capability attribute 4.

[0095] After determining the capability attribute information of the PCIe device, the computing device manages the PCIe device based on the capability attribute information.

[0096] In the aforementioned method for a computing device to obtain the capability attribute information of a PCIe device and manage the PCIe device based on the obtained capability attribute information, the computing device needs to pre-store the mapping relationship between the identification information and capability attribute information of each PCIe device. In other words, the capability attribute information of the PCIe device is stored externally, while in the above method it is stored in the computing device. Therefore, when a new PCIe device is added or a PCIe device is upgraded, the computing device needs to update the pre-stored information. This method is cumbersome and makes it difficult to manage and maintain PCIe devices.

[0097] This application provides a method for managing PCIe devices, which is applied to computing devices. See [link to relevant documentation]. Figure 2 , Figure 2 This application provides a flowchart illustrating a method for managing PCIe devices, which includes, but is not limited to, the following description.

[0098] S201. The computing device sends a command request to the PCIe device, and the PCIe device receives the command request sent by the computing device, wherein the command request is used to instruct the acquisition of the capability attribute information of the PCIe device.

[0099] S202. The PCIe device returns response information to the computing device. Accordingly, the computing device receives the response information returned by the PCIe device, wherein the response information includes the capability attribute information of the PCIe device.

[0100] In this application, capability attribute information is stored in a storage space within the firmware of the PCIe device's memory. The firmware is used to implement the functions of the PCIe device; for example, network interface card (NIC) firmware enables network connectivity, packet transmission and reception, and protocol offloading. The meaning and examples of capability attribute information have been described in the aforementioned related content and will not be repeated here for the sake of brevity.

[0101] For example, see Table 2, which is a schematic table illustrating the storage of capability attribute information in firmware according to this application. Capability attribute 1 can be the port speed of the PCIe device, capability attribute 2 can be the port linewidth of the PCIe device, capability attribute 3 can be the cache capacity of the PCIe device, capability attribute 4 can be the NC-SI characteristic, and so on. It is understood that Table 2 is merely an example; in actual applications, the content and storage format of the PCIe device capability attribute information in Table 2 can be different. This application does not limit the storage format of capability attribute information in firmware.

[0102] Table 2. Schematic diagram of capability attribute information storage in firmware

[0103]

[0104] In one implementation, see Figure 3 As shown, the computing device connects to the SMBus interface on the PCIe device. More specifically, the interface of the computing device's device management module connects to the SMBus interface of the PCIe device, using the SMBus protocol to communicate with the PCIe device. Additionally, the computing device also connects to the PCIe device via a PCIe interface, which is a service interface used for communication between the PCIe device and the computing device's service systems (such as the CPU system and OS system).

[0105] The SMBus protocol specification defines the Address Resolution Protocol (ARP), which defines the special address "1100001" to implement certain functions. For example... Figure 4 As shown, Figure 4 This is a functional diagram illustrating the special address "1100001" defined in the ARP protocol of the SMBus protocol specification. Figure 4 As can be seen, the ARP protocol only defines the meanings of command words "0x01" to "0x04". Among them, "0x01" means "Prepare to ARP", that is, prepare to execute an ARP operation; "0x02" means "ResetDevice", that is, reset the device; "0x03" means "Get UDID", that is, obtain a unique device identifier; "0x04" means "Assign Address", that is, assign an address; "0x00" and "0x05" to "0x1F" are reserved command words with no defined meaning.

[0106] This application extends the SMBus interface protocol specification by defining any reserved command word in the ARP protocol as a command to obtain capability attribute information. For example, the command word "0x00" can be defined as a command to obtain capability attribute information, or any command word from "0x05" to "0x1F" can be defined as a command to obtain capability attribute information.

[0107] After the SMBus interface protocol specification was extended, the computing device sends a command request to the PCIe device through the SMBus interface. This command request instructs the computing device to retrieve the PCIe device's capability attribute information. Upon receiving the command request, the PCIe device returns a response message to the computing device, which includes the PCIe device's capability attribute information. The response message takes the following form: Figure 5 As shown, Figure 5In this code, "Slave Node Address" is "1100001", indicating the use of a command word from the special address "1100001". "Command" represents the instruction to retrieve capability information. The content of "Command" is the specific command word that indicates the instruction to retrieve capability information. For example, if the command word "0x05" is defined as the instruction to retrieve capability attribute information, then the content of "Command" is 0x05. If the command word "0x1F" is defined as the instruction to retrieve capability attribute information, then the content of "Command" is 0x1F. "Data 1" to "Data N" are used to store capability attribute information. Figure 5 The format of the response information shown is merely an example, and this application does not specifically limit the format of the response information or the format of the capability attribute information.

[0108] In another implementation, see Figure 6 As shown, the computing device connects to the NC-SI interface on the PCIe device. Specifically, the interface of the device management module on the computing device connects to the NC-SI interface of the PCIe device. Additionally, the computing device also connects to the PCIe device via a PCIe interface, which is a service interface used for data transfer between the PCIe device and the computing device's service system (e.g., CPU system, OS system).

[0109] The NC-SI interface supports the NC-SI protocol, which defines the format of the first command message, including the format of the first command request message and the format of the first command response message. This application extends the first command request message and the first command response message; see details below. Figure 7A and Figure 7B , Figure 7A The format of the first command request message provided for this application, Figure 7B The format of the first command response message provided for this application. Figure 7A In this application, the destination address is FF-FF-FF-FF-FF-FF, which is a broadcast address with all Fs. The source address is the address of the device management module interface on the computing device. The type is Ethernet (NC-SI interface is the interface on the Ethernet card). The command header indicates that the message is a command request message. In this application, the "custom command" field in the first command request message is used to carry the instruction to obtain capability attribute information. Figure 7B In this application, both the destination address and the source address are FF-FF-FF-FF-FF-FF as defined in the NC-SI protocol specification, and the type is Ethernet. The command header indicates that the message is a command response message. In this application, the "custom response" field in the first command response message is used to carry capability attribute information.

[0110] After extending the first command request message and the first command response message in the NC-SI protocol specification, the computing device sends a first command request message to the PCIe device through the NC-SI interface. The first command request message includes a command to obtain capability attribute information. After receiving the message, the PCIe device parses the message and returns a first command response message to the computing device. The first command response message includes the capability attribute information of the PCIe device.

[0111] In another implementation, see Figure 8 As shown, the computing device connects to the PCIe interface on the PCIe device. Specifically, the computing device's device management module connects and communicates with the PCIe device through the CPU system's PCIe interface. Although this connection method uses a PCIe interface, the communication is initiated by the computing device's device management module, and is considered out-of-band communication. In addition, the PCIe interface, as a service interface, is also used for data transfer between the computing device's CPU system or OS system and the PCIe device.

[0112] The PCIe interface carries the Management Component Transport Protocol (MCTP), also known as MCTP over PCIe. MCTP is a management protocol framework that supports out-of-band management protocols, including the Platform Level Data Model (PLDM) protocol. This embodiment uses the PLDM protocol structure, i.e., PLDM over MCTP over PCIe. The PLDM protocol defines the format of the second command message, including the format of the second command request message and the format of the second command response message. This application extends the second command request message and the second command response message; see details below. Figure 9A and Figure 9B , Figure 9A A schematic diagram illustrating the format of the second command request message provided in this application. Figure 9B The diagram below illustrates the format of the second command response message provided in this application. Both the second command request message and the second command response message consist of a PCIe protocol header, an MCTP protocol header, a PLDM protocol header, a checksum, a protocol type, and PLDM protocol data (payload). The protocol type refers to the protocol type carried by MCTP, which is PLDM protocol in this case.

[0113] This application extends the second command request message and the second command response message by adding a "retrieve capability attribute information instruction" to the "PLDM protocol data" field in the second command request message, and using the "PLDM protocol data" field in the second command response message to carry capability attribute information. After extending the PLDM protocol, the computing device sends a second command request message to the PCIe device via the PCIe interface. The second command request message includes a command to retrieve capability attribute information. Upon receiving the second command request message, the PCIe device parses the message and returns a second command response message to the computing device. The second command response message includes the PCIe device's capability attribute information. This application does not limit the format of the capability attribute information.

[0114] It should be noted that the out-of-band management protocols supported by the MCTP protocol also include the NC-SI protocol, i.e., NC-SI over MCTP over PCIe. This application can also utilize the NC-SI over MCTP over PCIe protocol structure to extend the request and response messages, allowing a field in the request message to carry an instruction to obtain capability attribute information, and a field in the response message to carry capability attribute information. The computing device sends the instruction to obtain capability attribute information to the PCIe device by sending a request message. After receiving the request message, the PCIe device parses the request message and returns a response message, which carries the capability attribute information.

[0115] It should be noted that this application extends the functionality of computing devices and PCIe devices, including: the computing device has the permission and ability to request access to the capability attribute information of the PCIe device, can send a command to the PCIe device to obtain capability attribute information, and also has the ability to parse capability attribute information; the PCIe device has the ability to recognize and interpret the command to obtain capability attribute information, and the PCIe device defines the operations to be performed after receiving the command to obtain capability attribute information. For example, it can be defined that when the device receives the command to obtain capability attribute information, it reads its own capability attribute information, writes it into the response information, and sends the capability attribute information to the sending device in the form of response information. The specific definition form and content regarding how to send the command request to obtain capability attribute information and what operations the device needs to perform when it receives the command request are not specifically limited.

[0116] S203. The computing device manages the PCIe device based on the PCIe device's capability attribute information.

[0117] In one embodiment, the PCIe device is managed based on its capability attribute information. For example, the obtained capability attribute information includes port speed, and the computing device displays the port speed on the interface. Another example is that the capability attribute information obtained by the computing device includes NC-SI characteristics, and the computing device configures the parameters of the PCIe device based on the NC-SI characteristics; and so on.

[0118] In another embodiment, the computing device can also obtain the status information of the PCIe device through in-band or out-of-band communication, and manage the PCIe device based on the status information and capability attribute information. The status information includes information indicating the current operating status of the PCIe device, such as the current operating speed of the PCIe device port, the current temperature of the PCIe device, etc. For example, the capability attribute information obtained by the computing device includes a temperature threshold, and it also obtains the current temperature of the PCIe device (status information). The computing device determines whether to start the fan based on the current temperature and the temperature threshold, and controls and adjusts the fan speed or level based on the difference between the current temperature and the temperature threshold. As another example, the capability attribute information obtained by the computing device includes cache capacity, and it also obtains the currently occupied capacity of the PCIe device. When the occupied capacity is close to the cache capacity, the operating efficiency of the PCIe device may decrease. Certain functions of the PCIe device can be disabled to reduce occupied capacity and improve operating efficiency.

[0119] The computing device can obtain the status information of the PCIe device through in-band communication or through out-of-band interface; this application does not make any specific limitation.

[0120] As can be seen, this application allocates a storage space in the firmware of the PCIe device's memory to store capability attribute information, providing a foundation and convenience for the computing device to obtain this information. Furthermore, the computing device communicates with the PCIe device through an out-of-band interface or an in-band interface. The out-of-band interface can be, for example, an SMBus interface, an NC-SI interface, or a UART interface, while the in-band interface can be, for example, a PCIe interface or an Ethernet interface. By extending the communication protocol, the communication protocol supports the transmission of capability attribute information. This is manifested in the following: the computing device can send a command to the PCIe device to obtain capability attribute information through the out-of-band interface; the PCIe device can recognize the command, respond, and return the capability attribute information to the computing device. This allows the computing device to receive the capability attribute information and configure and manage the PCIe device based on it. By implementing the embodiments of this application, whenever a new PCIe device is added to the computing device, or when a PCIe device connected to the computing device is upgraded, the computing device can directly obtain the capability attribute information from the PCIe device. There is no need to pre-store the information of the PCIe device, nor is it necessary to update the information frequently. The method of this application is easy to operate, highly adaptable, and convenient for managing and maintaining PCIe devices.

[0121] See Figure 10 , Figure 10 This application provides a schematic diagram of a computing device 100, which includes:

[0122] The sending module 101 is used to send a command request; the command request indicates the acquisition of the capability attribute information of the PCIe device; the receiving module 102 is used to receive response information; the response information includes the capability attribute information of the PCIe device; the management module 103 is used to manage the PCIe device according to the capability attribute information of the PCIe device.

[0123] In possible implementations, the computing device communicates with the PCIe device via an out-of-band interface; the out-of-band interface is either a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0124] In a possible implementation, the computing device communicates with the PCIe device via an in-band interface; the in-band interface is either a PCIe interface for Fast Peripheral Component Interconnect or an Ethernet interface.

[0125] In possible implementations, when the out-of-band interface is an NC-SI interface, the custom command field in the command request carries an instruction to obtain capability attribute information; the custom response field in the response information carries capability attribute information.

[0126] In possible implementations, when the in-band interface is a PCIe interface, the platform-level data model (PLDM) protocol data field in the command request carries an instruction to obtain capability attribute information; the PLDM protocol data field in the response information carries capability attribute information.

[0127] In possible implementations, capability attribute information includes one or more of the following: port rate, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

[0128] The functional modules of the aforementioned computing device 100 are used to implement Figure 2 The method described in the embodiments can be found in the following details: Figure 2 For the sake of brevity, the descriptions in the relevant content of the embodiments will not be repeated here.

[0129] See Figure 11 , Figure 11 This application provides a schematic diagram of a PCIe device 200, which includes:

[0130] The storage module 201 is used to store the capability attribute information of the PCIe device; the receiving module 202 is used to receive command requests; the command requests indicate the acquisition of the capability attribute information of the PCIe device; the sending module 203 is used to send response information based on the command requests; the response information includes the capability attribute information of the PCIe device.

[0131] In possible implementations, PCIe devices communicate with computing devices via an out-of-band interface; the out-of-band interface is either a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface.

[0132] In possible implementations, PCIe devices communicate with computing devices via an in-band interface; the in-band interface is either a PCIe interface for rapid peripheral component interconnection or an Ethernet interface.

[0133] In a possible implementation, when the out-of-band interface is an NC-SI interface, the receiving module 202 is used to receive a first command request message sent by the computing device through the NC-SI interface; the custom command field in the first command request message carries an instruction to obtain capability attribute information; the sending module 203 is used to send a first command response message to the computing device through the NC-SI interface based on the first command request message; the custom response field in the first command response message carries capability attribute information.

[0134] In a possible implementation, when the in-band interface is the PCIe interface, the receiving module 202 is used to receive a second command request message sent by the computing device through the PCIe interface; the platform-level data model (PLDM) protocol data field in the second command request message carries an instruction to obtain capability attribute information; the sending module 203 is used to send a second command response message to the computing device through the PCIe interface based on the second command request message; the PLDM protocol data field in the second command response message carries capability attribute information.

[0135] In possible implementations, capability attribute information includes one or more of the following: port rate, buffer capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level.

[0136] The functional modules of the aforementioned PCIe device 200 are used to implement Figure 2 The method described in the embodiments can be found in the following details: Figure 2 For the sake of brevity, the descriptions in the relevant content of the embodiments will not be repeated here.

[0137] See Figure 12 , Figure 12 This application provides a schematic diagram of the hardware structure of a computing device 300. The computing device 300 includes a processor 310, a communication interface 320, and a memory 330. The processor 310, the communication interface 320, and the memory 330 can be interconnected via an internal bus 340, or they can communicate via wireless transmission or other means.

[0138] Taking a connection via bus 340 as an example, bus 340 can be a PCI bus or an EISA bus, etc. Bus 340 can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 12 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0139] Processor 310 may consist of at least one general-purpose processor, such as a CPU, or a combination of a CPU and a hardware chip. The hardware chip may be an ASIC, a PLD, or a combination thereof. The PLD may be a CPLD, an FPGA, a GAL, or any combination thereof. Processor 310 executes various types of digital storage instructions, such as software or firmware programs stored in memory 330, enabling computing device 300 to provide a wide range of services.

[0140] The memory 330 is used to store program code, and its execution is controlled by the processor 310 to perform the above-mentioned tasks. Figure 2 The steps described in the embodiments can be referred to the relevant descriptions of the embodiments shown above, and will not be repeated here.

[0141] The memory 330 may include volatile memory, such as RAM; the memory 330 may also include non-volatile memory, such as ROM or flash memory; the memory 330 may also include a combination of the above types.

[0142] The communication interface 320 can be a wired interface (e.g., an Ethernet interface), an internal interface (e.g., a peripheral component interconnect express (PCIe) bus interface), a wired interface (e.g., an Ethernet interface), or a wireless interface (e.g., a cellular network interface or a wireless LAN interface), for communicating with other devices or modules.

[0143] It needs to be explained that, Figure 12 This is merely one possible implementation of an embodiment of this application. In practical applications, the computing device may include more or fewer components, and this is not a limitation. For any content not shown or described in the embodiments of this application, please refer to the relevant descriptions in the foregoing method embodiments; they will not be repeated here.

[0144] See Figure 13 , Figure 13 This application provides a schematic diagram of the hardware structure of a PCIe device 400. The PCIe device 400 includes a processor 410, a communication interface 420, and a memory 430. The processor 410, the communication interface 420, and the memory 430 can be interconnected via an internal bus 440, or they can communicate via wireless transmission or other means.

[0145] Taking a connection via bus 440 as an example, bus 440 can be a PCI bus or an EISA bus, etc. Bus 440 can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 13 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0146] Processor 410 may consist of at least one general-purpose processor, such as a CPU, or a combination of a CPU and hardware chips. The hardware chips may be ASICs, PLDs, or combinations thereof. The PLDs may be CPLDs, FPGAs, GALs, or any combination thereof. Processor 410 executes various types of digital storage instructions, such as software or firmware programs stored in memory 430, enabling PCIe device 400 to provide a wide range of services.

[0147] The memory 430 stores program code, which is executed by the processor 410 to perform the above-mentioned tasks. Figure 2The steps described in the embodiments can be specifically referred to in the relevant descriptions of the embodiments shown above, and will not be repeated here. In this application, the memory 430 also includes firmware, which includes capability attribute information. The processor 410 is used to load the firmware, and the communication interface 420 is used to send the capability attribute information.

[0148] The memory 430 may include volatile memory, such as RAM; the memory 430 may also include non-volatile memory, such as ROM or flash memory; the memory 430 may also include a combination of the above types.

[0149] The communication interface 420 can be a wired interface (e.g., an Ethernet interface), an internal interface (e.g., a peripheral component interconnect express (PCIe) bus interface), a wired interface (e.g., an Ethernet interface), or a wireless interface (e.g., a cellular network interface or a wireless LAN interface), for communicating with other devices or modules.

[0150] It needs to be explained that, Figure 13 This is merely one possible implementation of an embodiment of this application. In practical applications, PCIe devices may include more or fewer components, and this is not a limitation. For any content not shown or described in the embodiments of this application, please refer to the relevant descriptions in the foregoing method embodiments; they will not be repeated here.

[0151] This application also provides a system comprising a computing device and at least one PCIe device, wherein the computing device may be computing device 100 or computing device 300 as described above, and the PCIe device may be PCIe device 200 or PCIe device 400 as described above. The computing device is electrically connected to the at least one PCIe device. Optionally, the computing device may be connected to the at least one PCIe device via one or more of an out-of-band interface SMBus interface, NC-SI interface, and UART interface, or via an in-band interface PCIe interface or Ethernet interface.

[0152] This application provides a computer program product that, when run on a computing device, causes the computing device to execute the above-described embodiments of this application. Figure 2 The method described in this embodiment; when the computer program product runs on a PCIe device, it causes the PCIe device to perform the above-described procedure of this application. Figure 2 Examples of the methods described.

[0153] This application provides a readable storage medium including program instructions. When a computing device executes the program instructions, the computing device performs the above-described... Figure 2Examples of the methods described.

[0154] This application provides a readable storage medium including program instructions. When a PCIe device executes the program instructions, the PCIe device performs the above-mentioned... Figure 2 Examples of the methods described.

[0155] Those skilled in the art will recognize that the method steps and units described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the steps and components of each embodiment have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0156] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be found in the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0157] In the several embodiments provided in this application, the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, or it may be an electrical, mechanical, or other form of connection.

[0158] The unit described as a separate component may or may not be physically separate. The component shown as a unit may or may not be a physical unit; that is, it may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of the embodiments of this application, depending on actual needs.

[0159] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0160] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0161] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. This computer program product includes one or more computer program instructions. When these computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., digital video disc (DVD), or a semiconductor medium (e.g., solid-state drive), etc.

[0162] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A PCIe device for rapid peripheral component interconnection, characterized in that, Includes communication interface, processor, and memory; among which, The memory is used to store the firmware of the PCIe device. The firmware includes a storage space for storing the capability attribute information of the PCIe device. The capability attribute information includes multiple parameters such as port speed, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level. The processor is used to load the firmware; the communication interface is used to send the capability attribute information; The communication interface is used to receive command requests sent by the device management module in the computing device; the command request is used to instruct the acquisition of the capability attribute information; The communication interface is used to send response information to the device management module; the response information includes the capability attribute information; The communication interface is an out-of-band interface for connecting to the device management module. The out-of-band interface is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface. Alternatively, the communication interface is a PCIe interface for connecting to the CPU system in the computing device; wherein the PCIe interface transmits the command request and the response information through an out-of-band management protocol supported by the MCTP over PCIe protocol, so that after the device management module sends the command request, it can obtain the capability attribute information through the response information.

2. The PCIe device according to claim 1, characterized in that, When the out-of-band interface is the NC-SI interface The custom command field in the command request carries an instruction to obtain the capability attribute information; The custom response field in the response information carries the capability attribute information.

3. The PCIe device according to claim 1, characterized in that, When the communication interface is the PCIe interface and the out-of-band management protocol is the Platform Level Data Model (PLDM) protocol, The PLDM protocol data field in the command request carries an instruction to obtain the capability attribute information; The capability attribute information is carried in the PLDM protocol data field of the response information.

4. A system for managing PCIe (High-Speed ​​Peripheral Component Interconnect) devices, characterized in that, The device includes a computing device and at least one PCIe device for interconnecting high-speed peripheral components, wherein the computing device includes a CPU system and a device management module; The at least one PCIe device is connected to the CPU system via a PCIe interface. The PCIe device stores firmware, which includes a storage space for storing the capability attribute information of the PCIe device. The capability attribute information includes multiple parameters such as port speed, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level. The device management module is used to send command requests to the at least one PCIe device; The command request is used to instruct the retrieval of PCIe device capability attribute information; The at least one PCIe device is used to send response information to the device management module respectively; the response information includes the capability attribute information of the PCIe device; The device management module is also used to manage the at least one PCIe device based on the response information received from the at least one PCIe device; The device management module communicates with the PCIe device through an out-of-band interface to obtain the capability attribute information. The out-of-band interface is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface. or, The device management module sends the command request to the PCIe interface through the out-of-band management protocol supported by the MCTP over PCIe protocol, and receives the response information from the PCIe interface to communicate with the PCIe device, thereby obtaining the capability attribute information stored in the PCIe device.

5. The system according to claim 4, characterized in that, When the out-of-band interface is the NC-SI interface The custom command field in the command request carries an instruction to obtain capability attribute information; The custom response field in the response information carries the capability attribute information.

6. The system according to claim 4, characterized in that, When the out-of-band management protocol is a platform-level data model (PLDM) protocol. The PLDM protocol data field in the command request carries an instruction to obtain capability attribute information; The capability attribute information is carried in the PLDM protocol data field of the response information.

7. A method for managing PCIe (High-Speed ​​Peripheral Component Interconnect) devices, characterized in that, include: The device management module of the computing device sends a command request to the PCIe device; The command request indicates the acquisition of the capability attribute information of the PCIe device; The computing device includes a CPU system and the device management module; The device management module of the computing device receives response information; the response information includes the capability attribute information of the PCIe device; the capability attribute information includes multiple of the following: port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level; The device management module of the computing device manages the PCIe device according to the PCIe device's capability attribute information; The firmware of the PCIe device includes a storage space for storing the capability attribute information of the PCIe device. The device management module communicates with the PCIe device through an out-of-band interface to obtain the capability attribute information. The out-of-band interface is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface. or, The device management module sends the command request to the PCIe interface of the PCIe device through the out-of-band management protocol supported by the MCTP over PCIe protocol, and receives the response information from the PCIe interface to communicate with the PCIe device through the PCIe interface, thereby obtaining the capability attribute information stored in the PCIe device; wherein, the PCIe interface is the interface on the PCIe device used to connect to the CPU system of the computing device.

8. The method according to claim 7, characterized in that, When the out-of-band interface is the NC-SI interface The custom command field in the command request carries an instruction to obtain capability attribute information; The custom response field in the response information carries the capability attribute information.

9. The method according to claim 7, characterized in that, The out-of-band management protocol is the Platform-Level Data Model (PLDM) protocol. The PLDM protocol data field in the command request carries an instruction to obtain capability attribute information; The capability attribute information is carried in the PLDM protocol data field of the response information.

10. A method for managing PCIe (High-Speed ​​Peripheral Component Interconnect) devices, characterized in that, include: The PCIe device receives command requests sent by the device management module in the computing device through the communication interface; The command request indicates the acquisition of the capability attribute information of the PCIe device; The capability attribute information is stored in a storage space included in the firmware of the PCIe device; the capability attribute information includes multiple parameters such as port rate, cache capacity, temperature threshold, network controller sideband interface characteristics, size information, thermal resistance, latency level, and power consumption level. The PCIe device sends a response to the device management module via the communication interface based on the command request; The response information includes the capability attribute information of the PCIe device; The communication interface is an out-of-band interface, which is a System Management Bus (SMBus) interface, a Network Controller Sideband Interface (NC-SI), or a Universal Asynchronous Receiver / Transmitter (UART) interface. Alternatively, the communication interface is a PCIe interface for connecting to the CPU system in the computing device; wherein the PCIe interface transmits the command request and the response information through an out-of-band management protocol supported by the MCTP over PCIe protocol, so that after the device management module sends the command request, it can obtain the capability attribute information through the response information.

11. The method according to claim 10, characterized in that, When the out-of-band interface is the NC-SI interface The PCIe device receives command requests sent by the device management module in the computing device through a communication interface, including: The PCIe device receives the command request sent by the device management module in the computing device through the NC-SI interface; the custom command field in the command request carries an instruction to obtain capability attribute information; The PCIe device sends a response message to the device management module via a communication interface based on the command request, including: Based on the command request, the response information is sent to the device management module in the computing device through the NC-SI interface; the custom response field in the response information carries the capability attribute information.

12. The method according to claim 10, characterized in that, When the communication interface is the PCIe interface and the out-of-band management protocol is the Platform Level Data Model (PLDM) protocol, The PCIe device receives command requests from the device management module in the computing device via a communication interface, including: The PCIe device receives the command request sent by the device management module in the computing device through the PCIe interface. The PLDM protocol data field in the command request carries an instruction to obtain capability attribute information. The PCIe device sends a response message to the device management module via a communication interface based on the command request, including: Based on the command request, the response information is sent to the device management module in the computing device through the PCIe interface; the capability attribute information is carried in the PLDM protocol data field of the response information.

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