An adapter plate structure, forming method and package structure

Abstract

The present application relates to a kind of adapter plate structure, forming method and package structure, wherein the adapter plate structure includes first adapter plate and second adapter plate connected by hybrid bonding, wherein the size of first adapter plate is less than the size of second adapter plate, and the adapter plate structure is L-shaped. Two L-shaped adapter plate structures can be used in package structure to bridge chips, chips can also be arranged between the two adapter plate structures, and chips can also be stacked above, increasing the number of stacked chips and increasing the density of packaging.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and in particular to an adapter board structure, a method for forming it, and a packaging structure. Background Technology

[0002] Through-Silicon Via (TSV) adapters based on technologies such as vertical through-hole interconnects are currently defined as the most clearly defined, mature, and widely accepted means of surpassing Moore's Law due to their advantages such as short global interconnect length, low latency, low power consumption, high bandwidth, and high integration.

[0003] Currently, most existing TSV adapter boards are vertically interconnected. They are generally used to form 2.5D packages, package chips onto the TSV adapter board, and use the redistribution on the TSV adapter board for interconnection. It is difficult to achieve a multi-layer chip stacking structure through traditional TSV adapter boards. Summary of the Invention

[0004] To address at least some of the aforementioned problems in the prior art, the present invention provides an adapter board structure, a method for forming the adapter board, and a packaging structure. The adapter board structure is L-shaped. In the packaging structure, two L-shaped adapter board structures can be used to bridge chips. Chips can also be arranged between the two adapter board structures, and chips can be stacked on top of each other, increasing the number of stacked chips and increasing the packaging density.

[0005] In a first aspect, the present invention provides an adapter plate structure comprising a first adapter plate and a second adapter plate connected by hybrid bonding, wherein the size of the first adapter plate is smaller than the size of the second adapter plate, and the adapter plate structure is L-shaped.

[0006] Furthermore, the first adapter plate includes a first substrate and a first conductive silicon via located in the first substrate;

[0007] The second adapter plate includes a second substrate and a second conductive silicon via located in the second substrate.

[0008] Furthermore, it also includes:

[0009] A first interconnect structure is connected to the back side of a first adapter board. The first interconnect structure includes a first dielectric layer and a first redistribution layer, wherein the first redistribution layer is electrically connected to the first conductive through-silicon via (TSV). The first redistribution layer is located in the first dielectric layer and its surface is exposed above the first dielectric layer.

[0010] The second interconnect structure is connected to the front side of the second adapter board. The second interconnect structure includes a second dielectric layer and a second rewiring layer, wherein the second rewiring layer is electrically connected to the second conductive through-silicon via, the second rewiring layer is located in the second dielectric layer, and its surface is exposed above the second dielectric layer.

[0011] Furthermore, the first interconnect structure and the second interconnect structure are connected in a hybrid manner, so that the first adapter board and the second adapter board are connected, wherein the first redistribution layer is bonded to the second redistribution layer, and the first dielectric layer is bonded to the second dielectric layer.

[0012] Furthermore, the first interconnect structure, the second interconnect structure, and the second adapter board have the same size, all of which are larger than the size of the first adapter board.

[0013] In a second aspect, the present invention provides a method for forming an adapter plate structure, comprising:

[0014] A first through-silicon via is formed on the front side of the first substrate by etching;

[0015] An insulating layer is deposited, a seed layer film is sputtered, and metal is electroplated in the first through-silicon via to form a first conductive through-silicon via. Then, a wafer is bonded to the front side of the first substrate.

[0016] The back side of the first substrate is thinned to expose the first conductive silicon via, and then a first interconnect structure is arranged on the back side of the first substrate to obtain the first module layer. The first interconnect structure includes a first dielectric layer and a first redistribution layer.

[0017] A second module layer is formed, wherein the second module layer includes a second substrate, a second conductive through-silicon via (TSV), and a second interconnect structure, the second substrate includes an interconnect region and a blank region, and the second interconnect structure includes a second dielectric layer and a second redistribution layer;

[0018] The first module layer is connected to the second module layer by hybrid bonding;

[0019] The back side of the second substrate is thinned to expose the second conductive silicon via. Then, photoresist is applied to the back side of the second substrate, and the photoresist above the blank area is removed to form an opening region.

[0020] The second substrate below the opening area is etched until the second wiring layer is exposed, forming a dicing groove;

[0021] Remove the photoresist, then remove the wafer to obtain the overall adapter board structure;

[0022] The entire adapter plate structure is cut along the cutting groove to obtain an L-shaped adapter plate structure.

[0023] Furthermore, a first dielectric layer is first arranged on the back side of the thinned first substrate, the first dielectric layer is etched to form a circuit pattern, and then metal is filled into the circuit pattern to form a first redistribution layer.

[0024] Furthermore, the formation of the second module layer includes:

[0025] The second substrate is divided into interconnect regions and blank regions, and a second through-silicon via is formed on the front side of the interconnect region of the second substrate by etching.

[0026] An insulating layer is deposited, a seed layer film is sputtered, and metal is electroplated sequentially in the second through-silicon via to form a second conductive through-silicon via.

[0027] A second dielectric layer is disposed on the front side of the second substrate, the second dielectric layer is etched to form a circuit pattern, and then metal is filled into the circuit pattern to form a second redistribution layer.

[0028] In a third aspect, the present invention provides a packaging structure comprising:

[0029] substrate;

[0030] At least two of the above-mentioned adapter plate structures are disposed opposite to each other on the substrate, and a space is left between the two adapter plate structures;

[0031] The first chip is arranged on the substrate and located between the two adapter board structures;

[0032] The second chip is electrically connected to both of the aforementioned adapter board structures.

[0033] Furthermore, it also includes a third chip, which is disposed on the adapter board structure and electrically connected to the adapter board structure.

[0034] The present invention has at least the following beneficial effects: The present invention discloses an adapter board structure, a method for forming the adapter board and a packaging structure in which different adapter boards are mixed and bonded to form an L-shaped adapter board structure. Two L-shaped adapter board structures can be used to bridge chips. Chips can also be arranged between the two adapter board structures and stacked on top of each other, thereby increasing the number of stacked chips, reducing space and increasing packaging density. Attached Figure Description

[0035] To further illustrate the above and other advantages and features of the various embodiments of the present invention, a more specific description of the various embodiments of the invention will be presented with reference to the accompanying drawings. It is to be understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, identical or corresponding parts will be indicated by identical or similar reference numerals for clarity.

[0036] Figure 1 A schematic diagram of an adapter plate structure according to an embodiment of the present invention is shown;

[0037] Figure 2A and 2B A schematic diagram of a packaging structure according to an embodiment of the present invention is shown; and

[0038] Figures 3A to 3I A cross-sectional schematic diagram of the process of forming an adapter plate structure according to an embodiment of the present invention is shown. Detailed Implementation

[0039] It should be noted that the components in the accompanying drawings may be shown exaggerated for illustrative purposes and may not be to scale.

[0040] In this invention, the various embodiments are merely intended to illustrate the solutions of the invention and should not be construed as limiting.

[0041] In this invention, unless otherwise specified, the quantifiers “a” and “one” do not exclude scenarios involving multiple elements.

[0042] It should also be noted that, in the embodiments of the present invention, only a portion of the parts or components may be shown for clarity and simplicity. However, those skilled in the art will understand that, under the teachings of the present invention, the required parts or components can be added as needed for specific scenarios.

[0043] It should also be noted that within the scope of this invention, the terms "same", "equal", and "equal to" do not mean that the two values ​​are absolutely equal, but allow for a certain reasonable error. In other words, the terms also cover "substantially the same", "substantially equal", and "substantially equal to".

[0044] It should also be noted that in the description of this invention, the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not explicitly or implicitly suggest that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0045] Furthermore, the embodiments of the present invention describe the process steps in a specific order. However, this is only for the convenience of distinguishing each step, and is not a limitation on the order of each step. In different embodiments of the present invention, the order of each step can be adjusted according to the process.

[0046] Figure 1 A schematic diagram of an adapter plate structure according to an embodiment of the present invention is shown.

[0047] like Figure 1As shown, an adapter plate structure includes a first adapter plate and a second adapter plate connected by hybrid bonding, wherein the size of the first adapter plate is smaller than the size of the second adapter plate, and the adapter plate structure is L-shaped.

[0048] The first adapter plate includes a first substrate 101 and a first conductive silicon via 102 located in the first substrate 101.

[0049] The second adapter plate includes a second substrate 103 and a second conductive silicon via 104 located in the second substrate 103.

[0050] The aforementioned adapter board structure also includes a first interconnect structure and a second interconnect structure. The first interconnect structure is connected to the back of the first adapter board, and the second interconnect structure is connected to the front of the second adapter board. The first and second interconnect structures are connected by a hybrid connection, thereby enabling the first and second adapter boards to be connected.

[0051] The first interconnect structure includes a first dielectric layer 105 and a first redistribution layer 106. The first redistribution layer 106 is electrically connected to a first conductive through-silicon via 102. The first redistribution layer 106 is located within the first dielectric layer 105, and its surface is exposed above the first dielectric layer 105.

[0052] The second interconnect structure includes a second dielectric layer 107 and a second rewiring layer 108. The second rewiring layer 108 is electrically connected to a second conductive through-silicon via 104. The second rewiring layer 108 is located within the second dielectric layer 107, and its surface is exposed above the second dielectric layer 107.

[0053] The first adapter board and the second adapter board are connected by bonding the first wiring layer 106 to the second wiring layer 108 and the first dielectric layer 105 to the second dielectric layer 107.

[0054] The first interconnect structure, the second interconnect structure, and the second adapter board are all the same size, and all are larger than the size of the first adapter board. Therefore, the adapter board structure is L-shaped. Part of the first interconnect structure is not connected to the first adapter board and is exposed. The first redistribution layer 106 of this part of the first interconnect structure can be connected to the chip.

[0055] Figure 2A and 2B A schematic diagram of a packaging structure according to an embodiment of the present invention is shown.

[0056] like Figure 2AAs shown, a packaging structure includes an adapter board structure, a substrate 201, a first chip 202, and a second chip 203. The adapter board structure includes a first adapter board, a second adapter board, a first interconnect structure, and a second interconnect structure. The first adapter board includes a first substrate 204 and a first conductive silicon via 205. The second adapter board includes a second substrate 206 and a second conductive silicon via 207. The first interconnect structure includes a first dielectric layer 208 and a first redistribution layer 209. The second interconnect structure includes a second dielectric layer 210 and a second redistribution layer 211.

[0057] At least two adapter plate structures are disposed opposite each other on the substrate 201, with a space between the two adapter plate structures. The adapter plate structures are electrically connected to the substrate.

[0058] The first chip 202 is disposed on the substrate 201 and located between the two adapter board structures. The first chip 202 is electrically connected to the substrate 201.

[0059] The second chip 203 is electrically connected to the two adapter board structures.

[0060] like Figure 2B As shown, it can also be found in Figure 2A A third chip 212 is stacked on top of the shown package structure. The third chip 212 is positioned above the two adapter board structures and is electrically connected to them. The third chip 212 is located above the second chip 203.

[0061] By using an L-shaped adapter board structure, functional chips are bridged together, and additional functional chips can be stacked on top of each other. Functional chips can be arranged between two L-shaped adapter board structures, increasing the number of stacked chips and thus increasing package density. Compared to directly placing chips on the adapter board, using an L-shaped adapter board structure can increase package density while reducing package size.

[0062] Figures 3A to 3I A cross-sectional schematic diagram of the process of forming an adapter plate structure according to an embodiment of the present invention is shown.

[0063] Step 1, as follows Figure 3A As shown, a first through-silicon via 302 is formed on the front side of the first substrate 301 by etching.

[0064] Step 2, as follows Figure 3B As shown, an insulating layer is deposited, a seed layer film is sputtered, and metal is electroplated in the first through-silicon via 302 to form a first conductive through-silicon via 303. Then, a wafer 400 is bonded on the front side of the first substrate 301.

[0065] Step 3, as follows Figure 3CAs shown, the back side of the first substrate 301 is thinned to expose the first conductive silicon via 303. Then, a first interconnect structure is arranged on the back side of the first substrate 301 to obtain the first module layer. The first interconnect structure includes a first dielectric layer 304 and a first redistribution layer 305. First, the first dielectric layer 304 is arranged on the back side of the thinned first substrate 301, the first dielectric layer 304 is etched to form a circuit pattern, and then metal is filled into the circuit pattern to form the first redistribution layer 305. The first module layer includes a first adapter plate, a first interconnect structure, and a wafer 400. The first adapter plate includes the first substrate 301 and the first conductive silicon via 303 penetrating the first substrate 301.

[0066] Step 4, as follows Figure 3D As shown, a second module layer is formed, comprising a second substrate 306, a second conductive through-silicon via (TSV) 307, and a second interconnect structure. The second interconnect structure comprises a second dielectric layer 308 and a second redistribution layer 309. Forming the second module layer includes: dividing the second substrate 306 into interconnect regions and blank regions; forming the second TSV by etching on the front side of the interconnect regions of the second substrate 306; sequentially performing insulating layer deposition, seed layer thin film sputtering, and metal electroplating in the second TSV to form the second conductive TSV 307; and arranging the second dielectric layer 308 and the second redistribution layer 309 on the front side of the second substrate 306. The second dielectric layer 308 is arranged on the front side of the second substrate 306, etched to form a circuit pattern, and then filled with metal to form the second redistribution layer 309.

[0067] Step 5, as follows Figure 3E As shown, the first module layer and the second module layer are connected by hybrid bonding. The first redistribution layer 305 is bonded to the second redistribution layer 309, and the first dielectric layer 304 is bonded to the second dielectric layer 308 to connect the first module layer and the second module layer.

[0068] Step 6, as follows Figure 3F As shown, the back side of the second substrate 306 is thinned to expose the second conductive silicon via 307. Then, photoresist 310 is arranged on the back side of the second substrate 306, and the photoresist above the blank area is removed to form an opening region 311.

[0069] Step 7, as follows Figure 3G As shown, the second substrate 306 below the opening region 311 is etched by dry etching until the second redistribution layer 309 is exposed, forming a dicing groove 312.

[0070] Step 8, as follows Figure 3H As shown, the photoresist 310 is removed, and then the wafer 400 is removed by a debonding process to obtain the overall adapter board structure 500.

[0071] Step 9, as follows Figure 3IAs shown, the overall adapter plate structure 500 is cut along the cutting groove 312 to obtain an L-shaped adapter plate structure 501.

[0072] The present invention has at least the following beneficial effects: The present invention discloses an adapter board structure, a method for forming the adapter board and a packaging structure in which different adapter boards are mixed and bonded to form an L-shaped adapter board structure. Two L-shaped adapter board structures can be used to bridge chips. Chips can also be arranged between the two adapter board structures and stacked on top of each other, thereby increasing the number of stacked chips, reducing space and increasing packaging density.

[0073] While some embodiments of the present invention have been described in this application, those skilled in the art will understand that these embodiments are merely illustrative. Numerous variations, alternatives, and improvements will arise in those skilled in the art under the teachings of this invention without departing from its scope. The appended claims are intended to define the scope of the invention and thereby cover methods and structures within the scope of the claims themselves and their equivalents.

Claims

1. A transition plate structure, characterized in that, It includes a first adapter plate and a second adapter plate connected by hybrid bonding, wherein the size of the first adapter plate is smaller than the size of the second adapter plate, and the adapter plate structure is L-shaped; The first adapter plate includes a first substrate and a first conductive silicon via located in the first substrate; The second adapter plate includes a second substrate and a second conductive silicon via located in the second substrate; A first interconnect structure is connected to the back side of the first adapter board and electrically connected to the first conductive silicon via. The second interconnect structure is connected to the front side of the second adapter board and electrically connected to the second conductive silicon via. The first interconnect structure, the second interconnect structure, and the second adapter board have the same size, all of which are larger than the size of the first adapter board.

2. The adapter plate structure according to claim 1, characterized in that, The first interconnect structure includes a first dielectric layer and a first redistribution layer, wherein the first redistribution layer is electrically connected to the first conductive through-silicon via, the first redistribution layer is located in the first dielectric layer, and its surface is exposed above the first dielectric layer; The second interconnect structure includes a second dielectric layer and a second rewiring layer, wherein the second rewiring layer is electrically connected to the second conductive through-silicon via, the second rewiring layer is located in the second dielectric layer, and its surface is exposed above the second dielectric layer.

3. The adapter plate structure according to claim 2, characterized in that, The first adapter board is connected to the second adapter board by a hybrid connection of the first interconnect structure and the second interconnect structure, wherein the first redistribution layer is bonded to the second redistribution layer and the first dielectric layer is bonded to the second dielectric layer.

4. A method for forming a transition plate structure, characterized in that, include: A first through-silicon via is formed on the front side of the first substrate by etching; An insulating layer is deposited, a seed layer film is sputtered, and metal is electroplated in the first through-silicon via to form a first conductive through-silicon via. Then, a wafer is bonded to the front side of the first substrate. The back side of the first substrate is thinned to expose the first conductive silicon via, and then a first interconnect structure is arranged on the back side of the first substrate to obtain the first module layer. The first interconnect structure includes a first dielectric layer and a first redistribution layer. A second module layer is formed, wherein the second module layer includes a second substrate, a second conductive through-silicon via (TSV), and a second interconnect structure, the second substrate includes an interconnect region and a blank region, and the second interconnect structure includes a second dielectric layer and a second redistribution layer; The first module layer is connected to the second module layer by hybrid bonding; The back side of the second substrate is thinned to expose the second conductive silicon via. Then, photoresist is applied to the back side of the second substrate, and the photoresist above the blank area is removed to form an opening area. The second substrate below the opening area is etched until the second wiring layer is exposed, forming a dicing groove; Remove the photoresist, then remove the wafer to obtain the overall adapter board structure; The entire adapter plate structure is cut along the cutting groove to obtain an L-shaped adapter plate structure.

5. The method for forming the adapter plate structure according to claim 4, characterized in that, First, a first dielectric layer is arranged on the back side of the thinned first substrate, the first dielectric layer is etched to form a circuit pattern, and then metal is filled into the circuit pattern to form a first redistribution layer.

6. The method for forming the adapter plate structure according to claim 4, characterized in that, The formation of the second module layer includes: The second substrate is divided into interconnect regions and blank regions, and a second through-silicon via is formed on the front side of the interconnect region of the second substrate by etching. An insulating layer is deposited, a seed layer film is sputtered, and metal is electroplated sequentially in the second through-silicon via to form a second conductive through-silicon via. A second dielectric layer is disposed on the front side of the second substrate, the second dielectric layer is etched to form a circuit pattern, and then metal is filled into the circuit pattern to form a second redistribution layer.

7. A packaging structure, characterized in that, include: substrate; At least two of the adapter plate structures described in any one of claims 1 to 3 are disposed opposite each other on the substrate, and a space is left between the two adapter plate structures; The first chip is arranged on the substrate and located between the two adapter board structures; The second chip is electrically connected to both of the aforementioned adapter board structures.

8. The packaging structure according to claim 7, characterized in that, It also includes a third chip, which is disposed on the adapter board structure and electrically connected to the adapter board structure.

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