A digital switching power supply pulse load feedforward control method

Abstract

The digital pulse load feedforward control method provided by the application does not affect the frequency feedback compensation scheme which has been designed, does not affect the pre-defined loop gain characteristics and system stability when the load feedforward control is performed; the load feedforward control can adapt to different pulse signal conditions; since it is a digital power supply, various registers and parameters can be easily set without hardware modification.

Description

Technical Field

[0001] This invention belongs to the field of DC-DC switching power supply converter control, and specifically relates to a pulse load feedforward control method for digital switching power supplies. Background Technology

[0002] In some power supply applications, the load is controlled by a pulse signal (PRF: Pulse Repetition Frequency, duty cycle typically ≤10%): during the pulse, the load requires a large current output from the switching power supply; while between pulses, the power supply outputs almost no current. For loads with these characteristics, from the perspectives of cost, size, and efficiency, the power supply is generally designed based on average power, rather than the instantaneous power during the pulse. During the pulse, the instantaneous power output mainly relies on the energy stored in the capacitor, so a large capacitor is usually connected to the output terminal. The load pulse operation causes the power supply to output a step current, resulting in a transient voltage drop, which degrades the load's performance between pulses. Voltage feedforward control adjusts the duty cycle of the switching power supply according to changes in the input voltage, reducing input disturbances to the output. Load feedforward, on the other hand, requires capturing the parameters of the first two pulse signals and changing the duty cycle of the switching power supply in advance from the third pulse signal.

[0003] Therefore, a load feedforward control method is needed to address the impact of pulses on power supply applications. Summary of the Invention

[0004] To address the aforementioned problems, the present invention aims to provide a digital switching power supply pulse load feedforward control method, which significantly improves the load's performance and transient response under load feedforward control operating mode.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a pulse load feedforward control method for a digital switching power supply, the control method comprising the following steps:

[0006] S1: Interrupts are triggered by the rising or falling edge of the load pulse signal;

[0007] S2: Calculate the pulse width, pulse period, and pulse duty cycle of the pulse signal using the count value when the interrupt is triggered;

[0008] S3: Determine the pulse width obtained in S2. If it is less than the set value, do nothing; if it is greater than the set value, proceed to S4.

[0009] S4: Several switching cycles before the next pulse signal rising edge arrives, the duty cycle of the switching power supply is forced to the maximum. After the output duty cycle of the PID or 3P3Z frequency compensation module of the digital power supply also reaches the maximum, the forced widening is exited.

[0010] S5: Determine the duty cycle of the pulse signal obtained in S2. If it is less than the set value, do nothing; if it is greater than the set value, proceed to S6.

[0011] S6: Repeat S5. If the value is greater than the set value n times consecutively, it is confirmed that the pulse signal has exceeded the duty cycle and an overload fault has occurred. Overload protection is then implemented, and the switching power supply is shut down.

[0012] The digital pulse load feedforward control method provided by the present invention also has the following feature: in S2, the count value when the interrupt is triggered is captured by a high-precision timer containing a capture unit.

[0013] The digital pulse load feedforward control method provided by the present invention also has the feature that the set value in S3 is 50μs.

[0014] The digital pulse load feedforward control method provided by the present invention also has the feature that the set value in S5 is 15%-50%.

[0015] The digital pulse load feedforward control method provided by the present invention also has the feature that n≥5 in S6.

[0016] Beneficial effects

[0017] The digital pulse load feedforward control method provided by this invention does not affect the pre-designed frequency feedback compensation scheme, nor does it affect the predefined loop gain characteristics and system stability when performing load feedforward control; the load feedforward control can adapt to different pulse signal conditions; since it is a digital power supply, various registers and parameters can be easily set without hardware modifications. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is for setting the external event register in the embodiments of the present invention;

[0020] Figure 2 Interrupt settings for the timer in the HRTIM in this embodiment of the invention;

[0021] Figure 3 This is a simulation diagram of voltage drop under PRF pulse load in an embodiment of the present invention;

[0022] Figure 4 This is a flowchart of the switching power supply cycle interruption in an embodiment of the present invention;

[0023] Figure 5 This is a flowchart illustrating the interrupt capture process of a switching power supply in an embodiment of the present invention. Detailed Implementation

[0024] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. However, it should be noted that these embodiments are not intended to limit the present invention. Equivalent changes or substitutions in function, method, or structure made by those skilled in the art based on these embodiments are all within the protection scope of the present invention.

[0025] In the description of the embodiments of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting the invention.

[0026] Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0027] The terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art will understand the specific meaning of these terms in this invention based on the specific circumstances.

[0028] like Figure 1-5 As shown, this embodiment of the invention provides a pulse load feedforward control method for a digital switching power supply, the control method comprising the following steps:

[0029] S1: Interrupts are triggered by the rising or falling edge of the load pulse signal;

[0030] S2: Calculate the pulse width, pulse period, and pulse duty cycle of the pulse signal using the count value when the interrupt is triggered;

[0031] S3: Determine the pulse width obtained in S2. If it is less than the set value, do nothing; if it is greater than the set value, proceed to S4.

[0032] S4: Several switching cycles before the next pulse signal rising edge arrives, the duty cycle of the switching power supply is forced to the maximum. After the output duty cycle of the PID or 3P3Z frequency compensation module of the digital power supply also reaches the maximum, the forced widening is exited.

[0033] S5: Determine the duty cycle of the pulse signal obtained in S2. If it is less than the set value, do nothing; if it is greater than the set value, proceed to S6.

[0034] S6: Repeat S5. If the value is greater than the set value n times consecutively, it is confirmed that the pulse signal has exceeded the duty cycle and an overload fault has occurred. Overload protection is then implemented, and the switching power supply is shut down.

[0035] In the aforementioned embodiments, the number of switching cycles must be kept within the allowable overshoot range of the load. Before each wide pulse arrives, the duty cycle of the switching power supply is widened in advance, so that when the pulse load is output, the voltage drop deviates from the reference value, thereby improving the working performance of the load.

[0036] In some embodiments, the count value when an interrupt is triggered is captured by a high-precision timer containing a capture unit.

[0037] In some embodiments, the setting value in S3 is 50 μs.

[0038] In some embodiments, the set value in S5 is 15%-50%.

[0039] In some embodiments, n ≥ 5 in S6.

[0040] In some embodiments, STMicroelectronics' STM32G474 digital power supply chip is used. By adjusting the hardware settings of the on-chip registers and the software settings of various thresholds, the digital power supply can cope with different pulse load conditions and improve the power output quality.

[0041] Table 1 Classification of PRF (Pulse Repetition Frequency)

[0042] Pulse types pulse frequency Pulse width High repetition rate PRF 80-200kHz 150-500ns Medium repetition rate PRF 10-25kHz 1-3us Low repetition rate PRF ≤10kHz 5-50us

[0043] Furthermore, due to the use of a large capacitor at the output, the overall bandwidth of the switching power supply is much lower than its switching frequency. When the pulse frequency exceeds the bandwidth of the switching power supply, the loop of the switching power supply can be considered unresponsive, effectively acting as a constant load from the perspective of the entire power supply. Most importantly, when operating under high and medium PRF conditions, the output voltage does not drop significantly, having little impact on load performance. However, for low PRF conditions, the output voltage drops considerably, so load feedforward control only needs to focus on the low PRF situation.

[0044] like Figure 1 The diagram shows the external event settings for the High-Precision Timer (HRTIM) within the STM32G474. The PRF signal is input to the positive terminal of the comparator and compared with a fixed value at the negative terminal. When the rising or falling edge of the PRF signal arrives, an event is generated internally, triggering an interrupt.

[0045] like Figure 2 The settings show that two interrupts are enabled in the high-precision timer HRTIM:

[0046] One is the timer's periodic interrupt. In this interrupt routine, the error between the output voltage sample value and the reference value is calculated to update the duty cycle value of the switching power supply for the next cycle. In the use of load feedforward, the pulse width of low repetition frequency is generally greater than the switching cycle. After the capture interrupt is triggered, several or dozens of cycle interrupts are needed before the next capture interrupt will occur. Therefore, the switching cycle can be counted in the periodic interrupt to help calculate the pulse width value.

[0047] Another is the capture interrupt, in which the current counter value of the timer can be read, and then the pulse width, pulse frequency and other parameters of the PRF can be calculated.

[0048] like Figure 3 The figure shows a simulation diagram of voltage drop when a PRF pulse load is applied. The first pulse has no load feedforward, resulting in a deeper voltage drop; the second pulse has load feedforward, which raises the output voltage in advance before the load pulse arrives, so that the voltage drop deviates less from the reference value when the pulse arrives.

[0049] The STM32G474's high-precision timer HRTIM has a minimum counting interval of 184 ps. With the switching frequency period set to 54400, the resulting switching power supply period is TSW = 10 μs, and the switching frequency is 100 kHz. Load feedforward compensation is enabled only when the low-repetition-rate pulse width is ≥50 μs. The following implementations are all based on this setting.

[0050] (1) Capture the period, frequency and duty cycle of the pulse signal

[0051] After the output voltage stabilizes, it operates primarily in no-load mode, waiting for the PRF pulse load signal to arrive. When the rising edge of the first pulse signal triggers an interrupt, the switching cycle count value n = 0.

[0052] When the HRTIM counter counts from 0 to 54400, it enters a switching cycle interrupt. In the interrupt, the value of n is incremented by 1, and then the counter automatically resets to 0 and starts counting again.

[0053] When the first pulse signal falls and interrupts, read the value of n and record it as N1. From this, the pulse width of PRF can be roughly obtained as N1*10us (the pulse width and frequency can be accurately calculated by reading the value of the corresponding counter when the interrupt is captured, but it is not advisable to perform a large number of calculations in the interrupt. Unless there is a special need, the rough method should be preferred).

[0054] When n≥5, it can be considered that the working state has entered the low repetition frequency pulse. The width of the pulse signal will affect the load output quality, and load feedforward should be enabled (status flag Flag=1); otherwise, it means that the working state is at high or medium repetition frequency, and feedforward control does not need to be enabled (status flag Flag=0).

[0055] During the periodic interruption, the value of n continues to increment by 1.

[0056] When the pulse signal's rising edge triggers another interrupt, the value of n has accumulated to N2. From this, the pulse signal period N2 * 10µs can be roughly obtained. The duty cycle of the pulse signal can be roughly calculated within the interrupt: D = (N1 / N2) * 100%.

[0057] When D>20%, the over-duty cycle fault value F+1 is applied; otherwise, it is F-1. When the fault value F≥5, it can be confirmed that the input pulse signal has an over-duty cycle fault, which is equivalent to overload. In order to protect the load, the power supply should be turned off.

[0058] Once one pulse cycle is captured, n is set to 0, and the count starts again. At the same time, the value of N1 is assigned to N3, and the value of N2 is assigned to N4.

[0059] (2) Implementation of load feedforward

[0060] Based on the above principles, the duty cycle of the switching power supply is pre-widened starting before the rising edge of the third PRF pulse. That is, when the switching cycle count reaches N2-A (A is an integer value, determined by the load's allowable overshoot voltage and pulse width), the duty cycle of the switching power supply can be forced to its maximum width, forcing energy transfer and storage in the capacitor to cope with instantaneous high-power output. Once the pulse signal arrives and the output voltage drops below the reference value, and the duty cycle of the digital power supply's PID or 3P3Z frequency compensation module also reaches its maximum, the forced widening can be deactivated.

[0061] (3) Switching of pulse signals

[0062] The key to load feedforward is capturing the pulse width. When the width is insufficient, feedforward is disabled; when the width is ≥50µs, feedforward is enabled. Therefore, this section focuses on the switching between low repetition rate (PRF) pulses.

[0063] When the new pulse width N1 ≠ N3, the pulse signal can be considered to have changed, and feedforward is disabled in the current cycle. When N1 = N3, load feedforward is enabled when the switching cycle count reaches N2-A, but N2 ≠ N4, indicating that the pulse width has changed. This means that an additional A switching cycles' worth of energy has been transmitted, which can be absorbed by subsequent cycles. Generally, the pulse signal does not change in every cycle; it only changes after tens or hundreds of repetitions.

[0064] The interrupt flowchart for two switching cycles is as follows: Figure 4 and Figure 5 As shown.

[0065] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention. The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the protection scope of the present invention.

Claims

1. A method for pulse load feedforward control of a digital switching power supply, characterized in that, The control method includes the following steps: S1: Interrupts are triggered by the rising or falling edge of the load pulse signal; S2: Calculate the pulse width, pulse period, and pulse duty cycle of the pulse signal using the count value when the interrupt is triggered; S3: Determine the pulse width obtained in S2. If it is less than the set value, do nothing; if it is greater than the set value, proceed to S4. S4: Several switching cycles before the next pulse signal rising edge arrives, the duty cycle of the switching power supply is forced to the maximum. After the output duty cycle of the PID or 3P3Z frequency compensation module of the digital power supply also reaches the maximum, the forced widening is exited. S5: Determine the duty cycle of the pulse signal obtained in S2. If it is less than the set value, do nothing; if it is greater than the set value, proceed to S6. S6: Repeat S5. If the value is greater than the set value n times consecutively, it is confirmed that the pulse signal has exceeded the duty cycle and an overload fault has occurred. Overload protection is then implemented, and the switching power supply is shut down.

2. The digital switching power supply pulse load feedforward control method according to claim 1, characterized in that, In S2, the count value when an interrupt is triggered is captured by a high-precision timer containing a capture unit.

3. The digital switching power supply pulse load feedforward control method according to claim 1, characterized in that, The setting value in S3 is 50 μs.

4. The digital switching power supply pulse load feedforward control method according to claim 1, characterized in that, The set value in S5 is 15%-50%.

5. The digital switching power supply pulse load feedforward control method according to claim 1, characterized in that, In S6, n≥5.

Images