An amplification circuit and a control method thereof

Abstract

The application relates to an amplification circuit and a control method thereof, comprising the steps that a sampling output switch group and a feedback output switch group are controlled to be disconnected, a sampling switch group and a signal input switch group are controlled to be connected, an input signal of an n-th cycle is collected by a sampling circuit, and an output signal of an (n-1)-th cycle of an amplifier is collected by a feedback circuit; the sampling switch group and the signal input switch group are controlled to be disconnected, the sampling output switch group and the feedback output switch group are controlled to be connected, the collected input signal of the n-th cycle is sent to the amplifier by the sampling circuit, and the collected output signal of the (n-1)-th cycle is sent to the amplifier in an inverted mode by the feedback circuit; the input signal of the n-th cycle is amplified by the amplifier, an output signal of the n-th cycle is output, the output signal of the n-th cycle is fed back to the feedback circuit, and the above steps are repeated to continuously output an output signal of each cycle.

Description

Technical Field

[0001] This invention relates to the field of sampling signal processing technology, and in particular to an amplifier circuit and its control method. Background Technology

[0002] Traditional switched-capacitor amplifiers have good matching and excellent common-mode interference immunity, making them well-suited for sampling and fixed-gain amplification. However, because traditional switched-capacitor amplifiers often require both sampling and amplification states to process signals properly, the amplifier output must be reset to zero during the sampling state. This makes it difficult for the amplifier to operate in the continuous-time domain.

[0003] For example, please see Figure 6 Traditional switched-capacitor amplifiers can only achieve discrete-domain amplification: during the sampling phase, the amplifier's output VOP and VON are shorted to clear the charge accumulated during the previous amplification. This results in the amplifier output being 0 for half the time, thus preventing continuous-domain amplification. Furthermore, the amplifier's output needs to be built up from 0 during the amplification phase, placing stringent requirements on the amplifier's bandwidth. Summary of the Invention

[0004] The purpose of this invention is to prevent the amplifier from having a zero output voltage for half of its operating time, thereby achieving continuous domain amplification, and to provide an amplifier circuit and its control method.

[0005] To achieve the above-mentioned objectives, the embodiments of the present invention provide the following technical solutions: An amplifier circuit includes an amplifier, a sampling circuit connected to the input terminal of the amplifier, and a feedback circuit connected to both the output terminal and the input terminal of the amplifier. The sampling circuit includes a sampling switch group, a sampling output switch group, and a sampling capacitor. The sampling switch group is used to connect the sampling capacitor to the signal input terminal to acquire the input signal. The sampling output switch group is used to connect the sampling capacitor to the input terminal of the amplifier to transmit the input signal acquired by the sampling capacitor to the amplifier. The feedback circuit includes a signal input switch group, a feedback output switch group, a non-inverting feedback capacitor, and a cross-feedback capacitor. The signal input switch group connects the output terminal of the amplifier to the cross-feedback capacitor to acquire the output signal of the amplifier. The feedback output switch group connects the cross-feedback capacitor to the input terminal of the amplifier to feed back the output signal of the amplifier acquired by the cross-feedback capacitor to the input terminal of the amplifier. The first terminal of the non-inverting feedback capacitor is connected to the output terminal of the amplifier, and the second terminal of the non-inverting feedback capacitor is connected to the input terminal of the amplifier.

[0006] Furthermore, the signal input terminal includes a non-inverting signal input terminal and an inverting signal input terminal, the amplifier includes a non-inverting input terminal and an inverting input terminal, the sampling switch group includes a first sampling switch, a second sampling switch, a third sampling switch and a fourth sampling switch, the sampling output switch group includes a first sampling output switch, a second sampling output switch and a third sampling output switch, and the sampling capacitor includes a first sampling capacitor and a second sampling capacitor; The in-phase signal input terminal is connected to the first terminal of the first sampling switch. The second terminal of the first sampling switch is connected to the first terminal of the first sampling capacitor and the first terminal of the first sampling output switch. The second terminal of the first sampling capacitor is connected to the first terminal of the second sampling switch and the first terminal of the second sampling output switch. The second terminal of the second sampling switch is connected to the common-mode voltage. The second terminal of the second sampling output switch is connected to the in-phase input terminal of the amplifier. The inverting signal input terminal is connected to the first terminal of the third sampling switch. The second terminal of the third sampling switch is connected to the first terminal of the second sampling capacitor and the second terminal of the first sampling output switch. The second terminal of the second sampling capacitor is connected to the first terminal of the fourth sampling switch and the first terminal of the third sampling output switch. The second terminal of the fourth sampling switch is connected to the common-mode voltage. The second terminal of the third sampling output switch is connected to the inverting input terminal of the amplifier.

[0007] Furthermore, the amplifier includes a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal; the signal input switch group includes a first signal input switch, a second signal input switch, a third signal input switch, and a fourth signal input switch; the feedback output switch group includes a first feedback output switch, a second feedback output switch, and a third feedback output switch; and the cross feedback capacitor includes a first cross feedback capacitor and a second cross feedback capacitor. The inverting output terminal of the amplifier is connected to the first terminal of the first signal input switch. The second terminal of the first signal input switch is connected to the first terminal of the first cross feedback capacitor and the first terminal of the first feedback output switch. The second terminal of the first cross feedback capacitor is connected to the first terminal of the second signal input switch and the first terminal of the second feedback output switch. The second terminal of the second signal input switch is connected to the common-mode voltage. The second terminal of the second feedback output switch is connected to the non-inverting input terminal of the amplifier. The non-inverting output terminal of the amplifier is connected to the first terminal of the third signal input switch. The second terminal of the third signal input switch is connected to the first terminal of the second cross-feedback capacitor and the second terminal of the first feedback output switch. The second terminal of the second cross-feedback capacitor is connected to the first terminal of the fourth signal input switch and the first terminal of the third feedback output switch. The second terminal of the fourth signal input switch is connected to the common-mode voltage. The second terminal of the third feedback output switch is connected to the inverting input terminal of the amplifier.

[0008] Furthermore, the capacitance values ​​of the same-direction feedback capacitor and the cross-feedback capacitor are equal.

[0009] Furthermore, the non-inverting feedback capacitor includes a first non-inverting feedback capacitor and a second non-inverting feedback capacitor, and the amplifier includes a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal; The first terminal of the first non-inverting feedback capacitor is connected to the non-inverting output terminal of the amplifier, and the second terminal of the first non-inverting feedback capacitor is connected to the non-inverting input terminal of the amplifier. The first terminal of the second non-inverting feedback capacitor is connected to the inverting output terminal of the amplifier, and the second terminal of the second non-inverting feedback capacitor is connected to the inverting input terminal of the amplifier.

[0010] Furthermore, it also includes a buffer switch group, which includes a first buffer switch and a second buffer switch, and the amplifier includes a non-inverting input terminal and an inverting input terminal; The first end of the first buffer switch is connected to the output end of the sampling circuit and the output end of the feedback circuit, respectively, and the second end of the first buffer switch is connected to the non-inverting input end of the amplifier. The first end of the second buffer switch is connected to the output of the sampling circuit and the output of the feedback circuit, respectively, and the second end of the second buffer switch is connected to the inverting input of the amplifier.

[0011] Furthermore, the capacitance of the sampling capacitor is adjustable.

[0012] A method for controlling an amplifier circuit includes the following steps: Step 1: Disconnect the control sampling output switch group and the feedback output switch group, and close the sampling switch group and the signal input switch group. The sampling circuit acquires the input signal of the nth cycle, and the feedback circuit acquires the output signal of the amplifier of the (n-1)th cycle. Step 2: Disconnect the control sampling switch group and signal input switch group, and close the sampling output switch group and feedback output switch group. The sampling circuit sends the input signal of the nth cycle to the amplifier, and the feedback circuit sends the output signal of the (n-1)th cycle inverted to the amplifier. Step 3: The amplifier amplifies the input signal of the nth cycle, outputs the output signal of the nth cycle, and feeds the output signal of the nth cycle back to the feedback circuit. The above steps are repeated to continuously output the output signal of each cycle.

[0013] Furthermore, when performing step 1, after the sampling output switch group and the feedback output switch group are disconnected, the sampling switch group and the signal input switch group are closed again after a first time threshold interval. When performing step 2, after the sampling switch group and the signal input switch group are disconnected, the sampling output switch group and the feedback output switch group are closed after a second time threshold interval. The first time threshold may be equal to or not equal to the second time threshold.

[0014] Furthermore, in step 3, after the amplifier amplifies the input signal of the nth cycle, the output signal of the nth cycle is: VO(n)=k2*VO(n-1)+k1*[INP(n)-INN(n)]-k2*VO(n-1) Where VO(n) represents the output signal of the amplifier in the nth cycle, VO(n-1) represents the output signal of the amplifier in the (n-1)th cycle, and INP(n) and INN(n) represent the input signals to the non-inverting and inverting input terminals of the amplifier in the nth cycle, respectively. k1 = C2 / C1, where C1 is the capacitance of the sampling capacitor and C2 is the capacitance of the feedback capacitor. k2 = C2 / C2`, where C2` is the capacitance of the cross-feedback capacitor, and C2 = C2`.

[0015] Furthermore, when controlling the sampling output switch group and the feedback output switch group to disconnect in step 1, the buffer switch group should also be controlled to disconnect. When controlling the closing of the sampling output switch group and the feedback output switch group in step 2, it is also necessary to control the closing of the buffer switch group.

[0016] Furthermore, when the sampling output switch group and the feedback output switch group are disconnected in step 1, the buffer switch group is also disconnected at the same time. After controlling the sampling output switch group and the feedback output switch group to close in step 2, the buffer switch group is controlled to close after a third time threshold interval.

[0017] Furthermore, before performing step 1, the method further includes the step of adding chopper switches to the input terminals of the sampling circuit, the feedback circuit, the amplifier, and inside the amplifier, respectively, to eliminate the offset voltage of the amplifier circuit.

[0018] Furthermore, while controlling the closing of the sampling switch group and the signal input switch group in step 1, the capacitance value of the sampling capacitor is adjusted by controlling the closing of switch SW.

[0019] Compared with the prior art, the beneficial effects of the present invention are as follows: (1) The present invention no longer requires the amplifier output to be reset to 0 to achieve a fixed or controllable ratio continuous domain amplification function; and the amplifier circuit has a certain oversampling rate, and the output fluctuation between each sampling period is very small, so that the amplifier does not need to have strict bandwidth requirements when it meets the accuracy requirements.

[0020] (2) In this invention, a buffer switch S2X is added to the input terminal of the amplifier. The buffer switch S2X is closed after the sampling output switch S2 and the feedback output switch S2 are closed. The current will be partially or completely canceled before the buffer switch S2X is closed, so as to reduce or eliminate the input fluctuation of the amplifier when the buffer switch S2X is open, thereby reducing or eliminating the fluctuation at the output terminal of the amplifier.

[0021] (3) When the sampling switch S1 and the signal input switch S1 are closed, the present invention can control the switch SW connected in parallel with the sampling capacitor to close, so that the input capacitor group is connected in parallel with the sampling capacitor, thereby adjusting the capacitance value of the sampling capacitor, thereby changing the magnitude of the gain k1 and adjusting the amplification factor of the input signal.

[0022] (4) The present invention adds a chopper switch (globe chopping technology) to the amplifier circuit, which can eliminate the offset voltage generated by the circuit over time and temperature. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the amplifier circuit in Embodiment 1 of the present invention; Figure 2 This is a schematic diagram of the amplifier circuit in Embodiment 2 of the present invention; Figure 3 This is a schematic diagram of the amplifier circuit in Embodiment 3 of the present invention; Figure 4 This is a timing control diagram of each switch group in the control method of Embodiment 4 of the present invention; Figure 5 This is a schematic diagram of adding a chopper switch to the sampling circuit in Embodiment 5 of the present invention; Figure 6 Background technology: Traditional amplifier circuit schematic. Detailed Implementation

[0025] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0026] It should be noted that similar reference numerals and letters in the following figures denote similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, the terms "first," "second," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance, or suggesting any such actual relationship or order between these entities or operations.

[0027] Example 1: This invention is achieved through the following technical solutions, such as... Figure 1 As shown, an amplifier circuit includes an amplifier, a sampling circuit connected to the input terminal of the amplifier, and a feedback circuit connected to both the output terminal and the input terminal of the amplifier. The sampling circuit acquires the input signal and transmits it to the amplifier, where it is amplified and output as an output signal. The feedback circuit acquires the output signal from the amplifier and feeds it back to the amplifier to cancel out the output signal from the previous cycle within the amplifier.

[0028] The sampling circuit includes a sampling switch group, a sampling output switch group, and a sampling capacitor. The sampling switch group is used to connect the sampling capacitor to the signal input terminal to acquire the input signal. The sampling output switch group is used to connect the sampling capacitor to the input terminal of the amplifier to transmit the input signal acquired by the sampling capacitor to the amplifier.

[0029] For more details, please continue reading. Figure 1 The signal input terminal includes a non-inverting signal input terminal INP and an inverting signal input terminal INN; the amplifier includes a non-inverting input terminal and an inverting input terminal; the sampling switch group includes a first sampling switch S1, a second sampling switch S1, a third sampling switch S1, and a fourth sampling switch S1; the sampling output switch group includes a first sampling output switch S2, a second sampling output switch S2, and a third sampling output switch S2; and the sampling capacitor includes a first sampling capacitor C1 and a second sampling capacitor C2. The in-phase signal input terminal INP is connected to the first terminal of the first sampling switch S1. The second terminal of the first sampling switch S1 is connected to the first terminal of the first sampling capacitor C1 and the first terminal of the first sampling output switch S2. The second terminal of the first sampling capacitor C1 is connected to the first terminal of the second sampling switch S1 and the first terminal of the second sampling output switch S2. The second terminal of the second sampling switch S1 is connected to the common-mode voltage Vcm. The second terminal of the second sampling output switch S2 is connected to the in-phase input terminal of the amplifier. The inverting signal input terminal INN is connected to the first terminal of the third sampling switch S1. The second terminal of the third sampling switch S1 is connected to the first terminal of the second sampling capacitor C2 and the second terminal of the first sampling output switch S2. The second terminal of the second sampling capacitor C2 is connected to the first terminal of the fourth sampling switch S1 and the first terminal of the third sampling output switch S2. The second terminal of the fourth sampling switch S1 is connected to the common-mode voltage Vcm. The second terminal of the third sampling output switch S2 is connected to the inverting input terminal of the amplifier.

[0030] The feedback circuit includes a signal input switch group, a feedback output switch group, a non-inverting feedback capacitor, and a cross-feedback capacitor. The signal input switch group connects the output terminal of the amplifier to the cross-feedback capacitor to acquire the output signal of the amplifier. The feedback output switch group connects the cross-feedback capacitor to the input terminal of the amplifier to feed back the output signal of the amplifier acquired by the cross-feedback capacitor to the input terminal of the amplifier. The first terminal of the non-inverting feedback capacitor is connected to the output terminal of the amplifier, and the second terminal of the non-inverting feedback capacitor is connected to the input terminal of the amplifier.

[0031] For details, please see Figure 1 The amplifier further includes a non-inverting output terminal VOP and an inverting output terminal VON; the signal input switch group includes a first signal input switch S1, a second signal input switch S1, a third signal input switch S1, and a fourth signal input switch S1; the feedback output switch group includes a first feedback output switch S2, a second feedback output switch S2, and a third feedback output switch S2; the cross feedback capacitor includes a first cross feedback capacitor C2 and a second cross feedback capacitor C2. The inverting output terminal VON of the amplifier is connected to the first terminal of the first signal input switch S1. The second terminal of the first signal input switch S1 is connected to the first terminal of the first cross-feedback capacitor C2 and the first terminal of the first feedback output switch S2. The second terminal of the first cross-feedback capacitor C2 is connected to the first terminal of the second signal input switch S1 and the first terminal of the second feedback output switch S2. The second terminal of the second signal input switch S1 is connected to the common-mode voltage Vcm. The second terminal of the second feedback output switch S2 is connected to the non-inverting input terminal of the amplifier. The non-inverting output terminal VOP of the amplifier is connected to the first terminal of the third signal input switch S1. The second terminal of the third signal input switch S1 is connected to the first terminal of the second cross-feedback capacitor C2 and the second terminal of the first feedback output switch S2. The second terminal of the second cross-feedback capacitor C2 is connected to the first terminal of the fourth signal input switch S1 and the first terminal of the third feedback output switch S2. The second terminal of the fourth signal input switch S1 is connected to the common-mode voltage Vcm. The second terminal of the third feedback output switch S2 is connected to the inverting input terminal of the amplifier.

[0032] The non-inverting feedback capacitor includes a first non-inverting feedback capacitor C2 and a second non-inverting feedback capacitor C2; the first terminal of the first non-inverting feedback capacitor C2 is connected to the non-inverting output terminal VOP of the amplifier, and the second terminal of the first non-inverting feedback capacitor C2 is connected to the non-inverting input terminal of the amplifier; the first terminal of the second non-inverting feedback capacitor C2 is connected to the inverting output terminal VON of the amplifier, and the second terminal of the second non-inverting feedback capacitor C2 is connected to the inverting input terminal of the amplifier.

[0033] It is easy to understand that the capacitance value of the same-direction feedback capacitor C2 is equal to the capacitance value of the cross-feedback capacitor C2.

[0034] In the above scheme, the sampling circuit acquires the input signal of the nth cycle and inputs it to the amplifier. After being amplified by the amplifier with a gain of k1, the output signal of the nth cycle is output to the outside. Here, the gain k1 is the ratio of the in-phase feedback capacitor C2 to the sampling capacitor C1. The output signal of the nth cycle is simultaneously fed back to the feedback circuit. The output signal of the nth cycle and the input signal of the (n+1)th cycle acquired by the sampling circuit are simultaneously input to the amplifier. Here, the input signal of the (n+1)th cycle is also amplified by the amplifier with a gain of k1 and output to the outside. The output signal of the nth cycle is amplified by the amplifier with a gain of k2. Here, the gain k2 is the ratio of the in-phase feedback capacitor C2 to the cross-feedback capacitor C2. Since the capacitance values ​​of the in-phase feedback capacitor C2 and the cross-feedback capacitor C2 are equal, they can cancel out the output signal of the nth cycle inside the amplifier. Thus, the amplifier directly outputs the output signal of the (n+1)th cycle.

[0035] This scheme adds a feedback circuit between the input and output terminals of the amplifier to cancel the output signal of the previous cycle inside the amplifier, so that the amplifier no longer has a zero output voltage for half of the working time, thereby realizing continuous domain amplification.

[0036] Example 2: As a further embodiment of Example 1, please refer to Figure 2This amplifier circuit also includes a buffer switch group for reducing or eliminating fluctuations at the amplifier input. The buffer switch group includes a first buffer switch S2X and a second buffer switch S2X; the first terminal of the first buffer switch S2X is connected to the output terminal of the sampling circuit and the output terminal of the feedback circuit, respectively, and the second terminal of the first buffer switch S2X is connected to the non-inverting input terminal of the amplifier; the first terminal of the second buffer switch S2X is connected to the output terminal of the sampling circuit and the output terminal of the feedback circuit, respectively, and the second terminal of the second buffer switch S2X is connected to the inverting input terminal of the amplifier.

[0037] Example 3: As a further embodiment of Example 1 and / or Example 2, please refer to Figure 3 The sampling capacitors include multiple capacitors, and each sampling capacitor is connected to the other via a switch SW. The capacitance value of the sampling capacitor is adjusted by opening and closing the switch SW, thereby adjusting the amplification gain k1 of the input signal through the amplifier.

[0038] Please continue reading Figure 3 In this embodiment, the sampling circuit includes sampling capacitors C1, C3, and C4, with two of each sampling capacitor connected to the lines connecting the inverting signal input terminal and the non-inverting signal input terminal, respectively. Specifically, the second terminal of the first sampling switch S1 at the signal input terminal is connected to the first terminal of sampling capacitor C1, the first terminal of switch SW1, and the first terminal of switch SW2, respectively. The second terminal of switch SW1 is connected to the first terminal of sampling capacitor C3, the second terminal of sampling capacitor C3 is connected to the second terminal of sampling capacitor C1, the second terminal of switch SW2 is connected to the first terminal of sampling capacitor C4, and the second terminal of sampling capacitor C4 is connected to the second terminal of sampling capacitor C1.

[0039] By controlling the opening and closing of switches SW1 and SW2, the capacitance value of the sampling capacitor can be adjusted, thereby changing the gain k1 and thus changing the amplification factor of the input signal after passing through the amplifier.

[0040] Example 4: Based on the amplifier circuits described in Examples 1-3, this example proposes a control method for the front-end circuit of sampling amplification. Please refer to [link to relevant documentation]. Figure 2 This includes the following steps: Step 1: Disconnect the control sampling output switch group and the feedback output switch group, and close the sampling switch group and the signal input switch group. The sampling circuit acquires the input signal of the nth cycle, and the feedback circuit acquires the amplifier output signal of the (n-1)th cycle.

[0041] Please see Figure 4 This is a timing control diagram for each switching group in the amplifier circuit, where the sampling switching group and the signal input switching group receive the same clock signal, i.e. Figure 4The timing diagram corresponding to S1; the sampling output switch group and the feedback output switch group receive the same clock signal, i.e. Figure 4 The timing diagram corresponding to S2; the clock signal received by the buffer switch group is Figure 4 The timing diagram corresponding to S2X.

[0042] It should be noted that, for ease of combination Figure 4 The control principle of this amplifier circuit is explained. In this embodiment, the first sampling switch S1, the second sampling switch S1, the third sampling switch S1, and the fourth sampling switch S1 of the sampling switch group, and the first signal input switch S1, the second signal input switch S1, the third signal input switch S1, and the fourth signal input switch S1 of the signal input switch group are collectively referred to as switch S1; the first sampling output switch S2, the second sampling output switch S2, and the third sampling output switch S2 of the sampling output switch group, and the first feedback output switch S2, the second feedback output switch S2, and the third feedback output switch S2 of the feedback output switch group are collectively referred to as switch S2; and the first buffer switch S2X and the second buffer switch S2X of the buffer switch group are collectively referred to as switch S2X.

[0043] When switch S2 is open and switch S2X is open, control switch S1 is closed, and the common-mode voltage Vcm charges the sampling capacitor C1 and the cross-feedback capacitor C2. The sampling circuit acquires the input signal of the nth cycle, and the feedback circuit acquires the output signal of the amplifier of the (n-1)th cycle.

[0044] It is important to note that after control switch S2 is opened, control switch S1 is closed again after a first time threshold t1. This is to reduce clock feedthrough and charge injection introduced by the sampling switch.

[0045] Step 2: Disconnect the control sampling switch group and signal input switch group, and close the sampling output switch group and feedback output switch group. The sampling circuit sends the input signal of the nth cycle to the amplifier, and the feedback circuit sends the output signal of the (n-1)th cycle inverted to the amplifier.

[0046] When control switch S1 is open, switch S2 is closed, and switch S2X is closed, the common-mode voltage Vcm stops charging the sampling capacitor C1 and the cross-feedback capacitor C2. The sampling circuit pauses the acquisition of the input signal and sends the acquired input signal of the nth cycle to the amplifier. The input signal of the nth cycle is amplified by the amplifier by a gain of k1 to form the output signal of the nth cycle. At the same time, the feedback circuit sends the acquired output signal of the (n-1)th cycle to the amplifier.

[0047] After control switch S1 is opened, control switch S2 is closed after a second time threshold t2; after control switch S2 is closed, control switch S2X is closed after a third time threshold t3. This prevents switches S1 and S2 from overlapping, reducing the effects of clock feedthrough and charge injection introduced by the switches, thereby reducing the sampling error introduced by the switches.

[0048] This design incorporates a switch S2X at the amplifier input. Without switch S2X, a current is injected into the amplifier input the instantaneously when switch S2 closes, creating a momentary voltage difference and causing input and output fluctuations. Therefore, by adding switch S2X and closing it after switch S2 closes, the current is partially or completely canceled out before switch S2X closes, thus reducing or eliminating the amplifier input fluctuations when switch S2X is open. Consequently, the output fluctuations are also reduced or eliminated.

[0049] Of course, if fluctuations at the amplifier input are acceptable, the buffer switch group can be omitted to simplify timing control.

[0050] Step 3: The amplifier amplifies the input signal of the nth cycle, outputs the output signal of the nth cycle, and feeds the output signal of the nth cycle back to the feedback circuit. The above steps are repeated to continuously output the output signal of each cycle.

[0051] After receiving the input signal [INP(n)-INN(n)] of the nth cycle from the sampling circuit and the output signal VO(n-1) of the (n-1)th cycle from the feedback circuit, the amplifier amplifies the input signal [INP(n)-INN(n)] by a gain of k1 and the output signal VO(n-1) by a gain of k2. Since the capacitance values ​​of the in-direction feedback capacitor C2 and the cross-feedback capacitor C2 are equal, k2=1. The output signal VO(n-1) sent by the feedback circuit cancels out the output signal of the (n-1)th cycle inside the amplifier. Therefore, in the nth cycle, the amplifier directly outputs the output signal VO(n) of the nth cycle to the external circuit. VO(n)=k2*VO(n-1)+k1*[INP(n)-INN(n)]-k2*VO(n-1) Where k1 = C2 / C1, C1 is the capacitance of the sampling capacitor, and C2 is the capacitance of the in-direction feedback capacitor; k2 = C2 / C2`, C2` is the capacitance of the cross-feedback capacitor, and C2 = C2`, so k2 = 1.

[0052] If it is necessary to change the value of gain k1, when control switch S1 is closed in step 1, control switch SW connected in parallel with sampling capacitor C1 is closed, so that other sampling capacitors are connected in parallel with sampling capacitor C1, and the capacitance value at sampling capacitor C1 can be changed, thereby changing the value of gain k1 and adjusting the amplification factor of the input signal.

[0053] After the amplifier outputs the nth cycle output signal VO(n) to the external circuit, it repeats the above steps: closing switch S1, opening switch S2, and opening switch S2X. This allows the sampling circuit to acquire the (n+1)th cycle input signal [INP(n+1)-INN(n+1)], and the feedback circuit to acquire the nth cycle output signal VO(n) from the amplifier. When opening switch S2, switch S2X can also be opened simultaneously. Then, the amplifier directly outputs the (n+1)th cycle output signal VO(n+1).

[0054] Repeating the steps of this control method eliminates the need to reset the amplifier output to 0, thus achieving a continuous domain amplification function with a fixed or controllable ratio. Furthermore, with a certain oversampling rate, the output fluctuation between each sampling period is very small, allowing the amplifier to achieve the required accuracy without strict bandwidth requirements.

[0055] Example 5: Based on Examples 1-4, please refer to Figure 5 By adding chopper switches (globe chopping technology) to the input terminals of the sampling circuit, feedback circuit, amplifier, and inside the amplifier, the offset voltage generated by the circuit over time and temperature can be eliminated.

[0056] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An amplifier circuit, comprising an amplifier, a sampling circuit connected to the input terminal of the amplifier, and a feedback circuit connected to the output terminal and the input terminal of the amplifier respectively, characterized in that: The sampling circuit includes a sampling switch group, a sampling output switch group, and a sampling capacitor. The sampling switch group is used to connect the sampling capacitor to the signal input terminal to acquire the input signal of the nth cycle. The sampling output switch group is used to connect the sampling capacitor to the input terminal of the amplifier to transmit the input signal of the nth cycle acquired by the sampling capacitor to the amplifier. The feedback circuit includes a signal input switch group, a feedback output switch group, a non-inverting feedback capacitor, and a cross-feedback capacitor. The signal input switch group is used to connect the output terminal of the amplifier to the cross-feedback capacitor to collect the output signal of the amplifier in the (n-1)th cycle. The feedback output switch group connects the cross-feedback capacitor to the input terminal of the amplifier to feed back the output signal of the amplifier in the (n-1)th cycle collected by the cross-feedback capacitor to the input terminal of the amplifier. The first terminal of the non-inverting feedback capacitor is connected to the output terminal of the amplifier, and the second terminal of the non-inverting feedback capacitor is connected to the input terminal of the amplifier. The amplifier includes a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal; the signal input switch group includes a first signal input switch, a second signal input switch, a third signal input switch, and a fourth signal input switch; the feedback output switch group includes a first feedback output switch, a second feedback output switch, and a third feedback output switch; the cross feedback capacitor includes a first cross feedback capacitor and a second cross feedback capacitor. The inverting output terminal of the amplifier is connected to the first terminal of the first signal input switch. The second terminal of the first signal input switch is connected to the first terminal of the first cross feedback capacitor and the first terminal of the first feedback output switch. The second terminal of the first cross feedback capacitor is connected to the first terminal of the second signal input switch and the first terminal of the second feedback output switch. The second terminal of the second signal input switch is connected to the common-mode voltage. The second terminal of the second feedback output switch is connected to the non-inverting input terminal of the amplifier. The non-inverting output terminal of the amplifier is connected to the first terminal of the third signal input switch. The second terminal of the third signal input switch is connected to the first terminal of the second cross-feedback capacitor and the second terminal of the first feedback output switch. The second terminal of the second cross-feedback capacitor is connected to the first terminal of the fourth signal input switch and the first terminal of the third feedback output switch. The second terminal of the fourth signal input switch is connected to the common-mode voltage. The second terminal of the third feedback output switch is connected to the inverting input terminal of the amplifier.

2. The amplifier circuit according to claim 1, characterized in that: The signal input terminal includes a non-inverting signal input terminal and an inverting signal input terminal; the amplifier includes a non-inverting input terminal and an inverting input terminal; the sampling switch group includes a first sampling switch, a second sampling switch, a third sampling switch, and a fourth sampling switch; the sampling output switch group includes a first sampling output switch, a second sampling output switch, and a third sampling output switch; and the sampling capacitor includes a first sampling capacitor and a second sampling capacitor. The in-phase signal input terminal is connected to the first terminal of the first sampling switch. The second terminal of the first sampling switch is connected to the first terminal of the first sampling capacitor and the first terminal of the first sampling output switch. The second terminal of the first sampling capacitor is connected to the first terminal of the second sampling switch and the first terminal of the second sampling output switch. The second terminal of the second sampling switch is connected to the common-mode voltage. The second terminal of the second sampling output switch is connected to the in-phase input terminal of the amplifier. The inverting signal input terminal is connected to the first terminal of the third sampling switch. The second terminal of the third sampling switch is connected to the first terminal of the second sampling capacitor and the second terminal of the first sampling output switch. The second terminal of the second sampling capacitor is connected to the first terminal of the fourth sampling switch and the first terminal of the third sampling output switch. The second terminal of the fourth sampling switch is connected to the common-mode voltage. The second terminal of the third sampling output switch is connected to the inverting input terminal of the amplifier.

3. The amplifier circuit according to claim 1, characterized in that: The capacitance values ​​of the same-direction feedback capacitor and the cross-feedback capacitor are equal.

4. An amplifier circuit according to claim 1, characterized in that: The non-inverting feedback capacitor includes a first non-inverting feedback capacitor and a second non-inverting feedback capacitor; the amplifier includes a non-inverting input terminal, an inverting input terminal, a non-inverting output terminal, and an inverting output terminal. The first terminal of the first non-inverting feedback capacitor is connected to the non-inverting output terminal of the amplifier, and the second terminal of the first non-inverting feedback capacitor is connected to the non-inverting input terminal of the amplifier. The first end of the second non-inverting feedback capacitor is connected to the inverting output terminal of the amplifier, and the second end of the second non-inverting feedback capacitor is connected to the inverting input terminal of the amplifier.

5. An amplifier circuit according to claim 1, characterized in that: It also includes a buffer switch group, which includes a first buffer switch and a second buffer switch, and the amplifier includes a non-inverting input terminal and an inverting input terminal; The first end of the first buffer switch is connected to the output end of the sampling circuit and the output end of the feedback circuit, respectively, and the second end of the first buffer switch is connected to the non-inverting input end of the amplifier. The first end of the second buffer switch is connected to the output of the sampling circuit and the output of the feedback circuit, respectively, and the second end of the second buffer switch is connected to the inverting input of the amplifier.

6. An amplifier circuit according to claim 1, characterized in that: The capacitance of the sampling capacitor is adjustable.

7. A control method for an amplifier circuit according to any one of claims 1-6, characterized in that: Includes the following steps: Step 1: Disconnect the control sampling output switch group and the feedback output switch group, and close the sampling switch group and the signal input switch group. The sampling circuit acquires the input signal of the nth cycle, and the feedback circuit acquires the output signal of the amplifier of the (n-1)th cycle. Step 2: Disconnect the control sampling switch group and signal input switch group, and close the sampling output switch group and feedback output switch group. The sampling circuit sends the input signal of the nth cycle to the amplifier, and the feedback circuit sends the output signal of the (n-1)th cycle inverted to the amplifier. Step 3: The amplifier amplifies the input signal of the nth cycle, outputs the output signal of the nth cycle, and feeds the output signal of the nth cycle back to the feedback circuit. The above steps are repeated to continuously output the output signal of each cycle.

8. The control method for an amplifier circuit according to claim 7, characterized in that: When performing step 1, after the sampling output switch group and the feedback output switch group are disconnected, the sampling switch group and the signal input switch group are closed again after a first time threshold interval. When performing step 2, after the sampling switch group and the signal input switch group are disconnected, the sampling output switch group and the feedback output switch group are closed after a second time threshold interval. The first time threshold may be equal to or not equal to the second time threshold.

9. The control method for an amplifier circuit according to claim 7, characterized in that: In step 3, after the amplifier amplifies the input signal of the nth cycle, the output signal of the nth cycle is: VO(n)=k2*VO(n-1)+k1*[INP(n)-INN(n)]-k2*VO(n-1) Where VO(n) represents the output signal of the amplifier in the nth cycle, VO(n-1) represents the output signal of the amplifier in the (n-1)th cycle, and INP(n) and INN(n) represent the input signals to the non-inverting and inverting input terminals of the amplifier in the nth cycle, respectively. k1 = C2 / C1, where C1 is the capacitance of the sampling capacitor and C2 is the capacitance of the feedback capacitor. k2 = C2 / C2`, where C2` is the capacitance of the cross-feedback capacitor, and C2 = C2`.

10. The control method for an amplifier circuit according to claim 7, characterized in that: When controlling the sampling output switch group and the feedback output switch group to disconnect in step 1, the buffer switch group should also be controlled to disconnect. When controlling the closing of the sampling output switch group and the feedback output switch group in step 2, it is also necessary to control the closing of the buffer switch group.

11. The control method for an amplifier circuit according to claim 10, characterized in that: When the sampling output switch group and the feedback output switch group are disconnected in step 1, the buffer switch group is also disconnected. After controlling the sampling output switch group and the feedback output switch group to close in step 2, the buffer switch group is controlled to close after a third time threshold interval.

12. The control method for an amplifier circuit according to claim 7, characterized in that: Before performing step 1, the method further includes the step of adding chopper switches to the input terminals of the sampling circuit, the feedback circuit, the amplifier, and inside the amplifier, respectively, to eliminate the offset voltage of the amplifier circuit.

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