Analog-to-digital converter nonlinearity correction method, device, apparatus, and storage medium

Abstract

The application provides an analog-to-digital converter nonlinear correction method, device and equipment and a storage medium, and relates to an analog-to-digital converter nonlinear processing method. The method comprises the following steps: obtaining a transfer function curve of an analog-to-digital converter; determining whether a conversion result output by the analog-to-digital converter needs to be corrected according to the transfer function curve and a standard curve; if the conversion result needs to be corrected, determining a correction amount by using a preset correction model, and correcting the conversion result according to the correction amount, so as to realize nonlinear correction of the analog-to-digital converter. In this way, when any conversion result output by the analog-to-digital converter needs to be corrected, the conversion result can be corrected based on the correction amount, so as to realize nonlinear correction of the analog-to-digital converter. By replacing analog compensation in the prior art with digital operation, power consumption and cost in the nonlinear correction process of the analog-to-digital converter can be reduced.

Description

Technical Field

[0001] This application relates to a nonlinear processing method for analog-to-digital converters, and more particularly to a nonlinear correction method, apparatus, device, and storage medium for analog-to-digital converters. Background Technology

[0002] An analog-to-digital converter (ADC) is one of the most important modules in a System-on-Chip (SoC). It converts analog signals from the real world into digital signals for processing by digital systems. Currently, ADCs typically use switched-capacitor circuits for sampling and integration. However, because switched-capacitor circuits are non-linear, this leads to significant non-linearity errors in the digital signals obtained after the ADC converts the analog signals. Therefore, how to correct the non-linearity of the switched-capacitor circuits in ADCs and reduce the non-linearity errors in the conversion results has become an urgent problem to be solved. Summary of the Invention

[0003] In view of the above problems, embodiments of this application provide a method, apparatus, device, and storage medium for nonlinear correction of analog-to-digital converters, which has the effect of correcting the nonlinearity of analog-to-digital converters by using digital operations to reduce the nonlinearity error of the conversion results of analog-to-digital converters.

[0004] A first aspect of this application provides a method for correcting nonlinearity in an analog-to-digital converter, the method comprising:

[0005] Obtain the transfer function curve of the analog-to-digital converter;

[0006] Based on the transfer function curve and the standard curve, determine whether the conversion result output by the analog-to-digital converter needs to be corrected;

[0007] If the conversion result needs to be corrected, the correction amount is determined using a preset correction model, and the conversion result is corrected according to the correction amount.

[0008] In the above scheme, based on the transfer function curve and the standard curve, it is determined whether the conversion result output by the analog-to-digital converter needs correction, including:

[0009] Determine the comparison threshold based on the transfer function curve and the standard curve;

[0010] By comparing the conversion results with the comparison threshold, a comparison result is obtained;

[0011] Determine whether the conversion results need to be corrected based on the comparison results.

[0012] In the above scheme, when the comparison threshold is configured to be one, the determination of whether the conversion result needs to be corrected is based on the comparison result, including:

[0013] If the absolute value of the conversion result is greater than or equal to the comparison threshold, the conversion result needs to be corrected.

[0014] In the above scheme, the modified model includes:

[0015] Δ i =k×[D(V i )-D(V t )],D(V i )>0;

[0016] or

[0017] Δ i =k×[D(V i )+D(V t )],D(V i )<0;

[0018] Where, Δ i D(V) is the correction amount corresponding to the i-th transformation result. i Let ) be the i-th transformation result, D(V) t ) is the comparison threshold, k is the correction coefficient, V is the voltage corresponding to the conversion result, and i is a positive integer that is less than or equal to the number of conversion results.

[0019] In the above scheme, when multiple comparison thresholds are configured, the conversion result is determined based on the comparison results to determine whether correction is needed, including:

[0020] If the absolute value of the conversion result is greater than or equal to the first comparison threshold and less than the second comparison threshold, the conversion result needs to be corrected; wherein the first comparison threshold and the second comparison threshold are any two adjacent comparison thresholds among a plurality of comparison thresholds, and the second comparison threshold is greater than the first comparison threshold.

[0021] In the above scheme, the modified model includes:

[0022] Δ i =k n ×[D(V i )-D(V tn )],D(V i )>0;

[0023] or

[0024] Δ i =k n ×[D(V i )+D(V tn )],D(V i )<0;

[0025] Where, Δ iD(V) is the correction amount corresponding to the i-th transformation result. i Let ) be the i-th transformation result, D(V) tn ) is the first comparison threshold, k is the correction coefficient, n is the comparison threshold number, V is the voltage of the conversion result, and i is a positive integer, which is less than or equal to the number of conversion results.

[0026] The above scheme, which determines whether the conversion result needs to be corrected based on the comparison results, also includes:

[0027] If the absolute value of the conversion result is greater than or equal to the second comparison threshold, the conversion result needs to be corrected.

[0028] In the above scheme, the modified model includes:

[0029] Δ i =k n ×[D(V i )-D(V tn )]+k n+1 ×[D(V i )-D(V t(n+1) )],D(V i )>0;

[0030] or

[0031] Δ i =k n ×[D(V i )+D(V tn )]+k n+1 ×[D(V i )+D(V t(n+1) )],D(V i )<0;

[0032] Where, Δ i D(V) is the correction amount for the i-th transformation result. i Let ) be the i-th transformation result, D(V) tn D(V) is the first comparison threshold. t(n+1) ) is the second comparison threshold; k is the correction coefficient; n is the number of the comparison threshold; i is a positive integer, less than or equal to the number of conversion results; and V is the voltage of the conversion result.

[0033] In the above scheme, obtaining the transfer function curve of the analog-to-digital converter includes:

[0034] The bandgap reference voltage of the target chip is converted from analog to digital using an analog-to-digital converter to obtain the transfer function curve.

[0035] In the above scheme, the conversion result is corrected according to the correction amount, including:

[0036] Add or subtract the correction amount to the conversion result to complete the correction of the conversion result.

[0037] A second aspect of this application provides an analog-to-digital converter nonlinearity correction device, the device comprising:

[0038] The acquisition module is used to acquire the transfer function curve of the analog-to-digital converter;

[0039] The processing module is used to determine whether the conversion result output by the analog-to-digital converter needs to be corrected based on the transfer function curve and the standard curve; it is also used to determine the correction amount using a preset correction model if the conversion result needs to be corrected.

[0040] The correction module is used to correct the conversion results based on the correction amount.

[0041] A third aspect of the present application provides a computer device, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the analog-to-digital converter nonlinear correction method as described in any of the above embodiments.

[0042] A fourth aspect of the embodiments of this application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the analog-to-digital converter nonlinearity correction method as described in any of the above embodiments.

[0043] This application provides a method for nonlinear correction of an analog-to-digital converter (ADC). The method obtains the transfer function curve of the ADC; based on the transfer function curve and a standard curve, it determines whether the conversion result output by the ADC needs correction; if correction is required, a preset correction model is used to determine the correction amount, and the conversion result is corrected according to the correction amount. Thus, when any conversion result output by the ADC needs correction, it can be corrected based on the correction amount to achieve nonlinear correction of the analog converter. By replacing analog compensation in the prior art with digital computation, the power consumption and cost in the nonlinear correction process of the ADC can be reduced.

[0044] The above description is merely an overview of the technical solutions of the embodiments of this application. In order to better understand the technical means of the embodiments of this application and to implement them in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the embodiments of this application more obvious and understandable, specific implementation methods of this application are described below. Attached Figure Description

[0045] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 A schematic diagram of the architecture of an analog-to-digital converter nonlinear correction system provided in this application embodiment;

[0047] Figure 2 A flowchart illustrating a nonlinear correction method for an analog-to-digital converter provided in an embodiment of this application;

[0048] Figure 3 A schematic diagram of the unmodified transfer function curve and standard curve provided for embodiments of this application;

[0049] Figure 4 One of the schematic diagrams of the modified transfer function curve and standard curve provided for embodiments of this application;

[0050] Figure 5 A second schematic diagram of the modified transfer function curve and standard curve provided for embodiments of this application;

[0051] Figure 6 A flowchart illustrating another analog-to-digital converter nonlinearity correction method provided in this application embodiment;

[0052] Figure 7 A flowchart illustrating another analog-to-digital converter nonlinearity correction method provided for embodiments of this application;

[0053] Figure 8 This is a schematic diagram of the structure of an analog-to-digital converter nonlinear correction device provided in an embodiment of this application;

[0054] Figure 9 This is a schematic diagram of the physical structure of a computer device provided in an embodiment of this application. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0056] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims and drawings of this application are intended to cover non-exclusive inclusion.

[0057] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of the phrase "embodiment" in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0058] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists, A and B exist simultaneously, or B exists. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0059] Furthermore, the terms "first," "second," etc., in the specification and claims of this application or in the aforementioned drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.

[0060] In the description of this application, unless otherwise stated, "multiple" means two or more (including two), and similarly, "multiple groups" means two or more (including two groups).

[0061] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings.

[0062] In this embodiment, the analog-to-digital converter uses a sampling circuit in a switched capacitor to sample the analog signal. The capacitance value of the sampling capacitor is affected by the manufacturing process. For example, assuming the ideal capacitance value is C = C0, the actual capacitance value may be C = C0 + C1v + C2v. 2 +C3v 3 Therefore, the digital signal obtained after the analog-to-digital converter (ADC) performs analog-to-digital conversion on the acquired analog signal will have nonlinear errors. In an optional embodiment, if the ADC samples the analog signal through the aforementioned actual capacitor, the charge stored on the actual capacitor will be Q = C0v + C1v. 2 +C2v 3+C3v 4 When the analog-to-digital converter converts the above input signal, it needs to convert the charge stored on the actual capacitor into a differential signal. That is, it performs even-order term cancellation and odd-order term retention on the charge stored on the actual capacitor, resulting in the charge 2Q = 2C0v + 2C2v. 3 The conversion result, where 2C2v 3 This refers to the nonlinear error in the conversion result. The embodiments of this application perform nonlinear correction on the conversion result of the analog-to-digital converter, that is, to eliminate or reduce 2C2v. 3 .

[0063] Figure 1 This application provides an embodiment of an analog-to-digital converter nonlinear correction system architecture diagram, as shown below. Figure 1 As shown, this application provides an analog-to-digital converter (ADC) nonlinearity correction system, which is applicable to scenarios where the nonlinearity of the sampling capacitor in the switched capacitor circuit is corrected before the ADC uses a switched capacitor circuit for sampling.

[0064] For example, the aforementioned analog-to-digital converter nonlinearity correction system includes a bandgap reference circuit, a multiplexer (Mux), and an analog-to-digital converter (ADC). The system includes an analog-to-digital converter (A / D converter), a memory, and a digital correction module. A multiplexer is coupled between the A / D converter and the bandgap reference circuit. The bandgap reference circuit outputs a bandgap reference voltage Vbg to the multiplexer, which then transmits the bandgap reference voltage Vbg to the analog converter. The A / D converter converts analog signals into digital signals, that is, it converts the analog quantity corresponding to the analog signal into a digital quantity to obtain the conversion result. The A / D converter is electrically connected to the positive and negative terminals of the analog signal source through the AIN+ and AIN- pins, and electrically connected to the positive and negative terminals of the reference voltage through the REFP+ and AEFN- pins. Since the digital signal itself does not have practical meaning and only represents a relative magnitude, the A / D converter needs to convert the analog quantity corresponding to the analog signal according to the reference voltage. It should be noted that the reference voltage is usually the maximum convertible signal size of the A / D converter. The digital correction module is coupled between the memory and the A / D converter. The memory stores correction coefficients, and the digital correction module is used to correct the digital quantity obtained by the A / D converter according to the correction coefficients stored in the memory.

[0065] In practical applications, after receiving an analog signal through a multiplexer, the analog-to-digital converter (ADC) converts the analog signal into a corresponding digital signal based on a reference voltage and outputs it. When converting the analog signal to the corresponding digital signal, the analog quantity corresponding to the analog signal is first converted into a digital quantity. Then, a correction value corresponding to each digital quantity is obtained based on correction coefficients stored in memory. Finally, each digital quantity is digitally corrected based on the correction value to obtain the digital signal. In this embodiment, by correcting the digital quantity converted by the ADC according to the correction coefficients, the nonlinearity error of the ADC output conversion result (digital signal) can be reduced, thus achieving nonlinearity correction of the ADC.

[0066] The following are several specific implementation methods, which describe in detail the technical solutions for nonlinear correction of analog-to-digital converters.

[0067] Figure 2 This is a flowchart illustrating a nonlinear correction method for an analog-to-digital converter provided in an embodiment of this application, as shown below. Figure 2 As shown, the analog-to-digital converter nonlinearity correction method provided in this application includes:

[0068] S101. Obtain the transfer function curve of the analog-to-digital converter.

[0069] In this embodiment of the application, the transfer function curve is used to represent the input-output characteristics of the analog-to-digital converter. That is, the nonlinearity index of the sampling capacitor in the analog-to-digital converter can be determined by the transfer function curve.

[0070] It is understandable that the current input-output characteristics of the analog-to-digital converter (ADC) can be obtained through its transfer function curve, providing a data basis for subsequent nonlinear correction of the ADC.

[0071] As a specific description of one possible implementation of S101, the following is an example:

[0072] The bandgap reference voltage of the target chip is converted from analog to digital using an analog-to-digital converter to obtain the transfer function curve.

[0073] For example, an analog-to-digital converter (ADC) can be used to convert the bandgap reference voltage of the target chip to digital, and the corresponding transfer function curve can be obtained based on the input and output signals of the ADC. The input-output characteristics of the ADC can be fitted using a matrix laboratory (MATLAB) to obtain the corresponding transfer function curve.

[0074] In some embodiments of this application, since the power supply, temperature or process parameters of the target chip have little effect on the bandgap reference voltage circuit, the bandgap reference voltage is relatively stable. By using an analog-to-digital converter to perform analog-to-digital conversion on the bandgap reference voltage of the target chip, it can be ensured that the conversion result is not affected by the power supply, temperature or process reference of the target chip, thereby ensuring the reference value of the obtained transfer function curve.

[0075] It is understandable that using an analog-to-digital converter (ADC) to convert the bandgap reference voltage into an analog-to-digital converter (ADC) ensures the reliability of the obtained transfer function curve. This ensures the accuracy of the conclusions when determining the nonlinearity of the ADC based on the transfer function curve, thereby improving the accuracy of subsequent nonlinearity corrections to the ADC.

[0076] S102. Based on the transfer function curve and the standard curve, determine whether the conversion result output by the analog-to-digital converter needs to be corrected.

[0077] In this embodiment, the standard curve and the transfer function curve are based on the same target chip. The standard curve represents the connection of conversion results without nonlinear errors. The standard curve can be provided by the target chip manufacturer at the time of shipment, or it can be obtained by performing analog-to-digital conversion on the bandgap reference voltage of the target chip using an analog-to-digital converter without nonlinear errors. The conversion result is the digital quantity obtained after the analog converter converts the analog quantity corresponding to the analog signal. It should be noted that since the analog-to-digital converter can receive analog signals through multiple input channels, after converting the analog quantities corresponding to multiple analog signals, multiple conversion results will be obtained. The purpose of executing S102 is to obtain the conversion result that needs correction from the multiple conversion results.

[0078] It is understood that the embodiments of this application obtain the conversion result that needs to be corrected through S102, and then correct the conversion result that needs to be corrected, so as to realize the nonlinear correction of the analog-to-digital converter. In this way, the amount of calculation can be reduced, power consumption can be reduced and correction efficiency can be improved.

[0079] A specific description of one possible implementation of S102 is as follows:

[0080] S1021. Determine the comparison threshold based on the transfer function curve and the standard curve.

[0081] In some embodiments of this application, the nonlinear error corresponding to each conversion result can be determined based on the transfer function curve and the standard curve. The comparison threshold is the sum of the conversion result and the nonlinear error that meets a preset requirement. The preset requirement can be the average of all nonlinear errors, or it can be a conversion accuracy requirement for the analog-to-digital converter; this application does not limit the specific requirements.

[0082] For example, Figure 3 A schematic diagram of the unmodified transfer function curve and standard curve provided for embodiments of this application, as shown below. Figure 3 As shown, a coordinate system is established with the input channel (Ain) of the analog-to-digital converter (ADC) as the x-axis and the digital value (Dout) obtained after the ADC performs analog-to-digital conversion on the analog signal as the y-axis. That is, the coordinate system is established with the conversion result as the y-axis. The transfer function curve will be as follows: Figure 3 The standard curve is shown as an odd-symmetric curve (dashed line). Figure 3 The line (solid line) in the figure shows that point A on the standard curve and point B on the transfer function curve have the same x-coordinate, while the difference between their y-coordinates (the distance between points A and B) is the integral nonlinearity (INL) corresponding to point A (point B), which is the nonlinear error.

[0083] Understandably, the nonlinear error corresponding to the conversion result can be determined by the distance between any two points with the same x-coordinate on the transfer function curve and the standard curve. Then, based on the nonlinear error, a comparison threshold can be determined to provide reference data for subsequent judgment on whether the conversion result needs to be corrected.

[0084] S1022. Compare the conversion result with the comparison threshold to obtain the comparison result.

[0085] In some embodiments of this application, the absolute value of the conversion result is compared with a comparison threshold to obtain a comparison result; wherein, the comparison threshold can be one or more.

[0086] For example, when the comparison threshold is configured to be one, the comparison results include: the absolute value of the conversion result is less than the comparison threshold, the absolute value of the conversion result is greater than the comparison threshold, and the absolute value of the conversion result is equal to the comparison threshold; when the comparison threshold is configured to be multiple, let any two adjacent comparison thresholds be the first comparison threshold and the second comparison threshold, and the first comparison threshold is less than the second comparison threshold. In this case, the comparison results include: the absolute value of the conversion result is less than the first comparison threshold, the absolute value of the conversion result is equal to the first comparison threshold, the absolute value of the conversion result is greater than the first comparison threshold and less than the second comparison threshold, the absolute value of the conversion result is equal to the second comparison threshold, and the absolute value of the conversion result is greater than the second comparison threshold.

[0087] Understandably, determining the comparison threshold based on actual needs can control the degree of nonlinearity correction in analog-to-digital converters.

[0088] S1023. Determine whether the conversion result needs to be corrected based on the comparison results.

[0089] In some embodiments of this application, when the comparison threshold is configured to be one, determining whether the conversion result needs to be corrected based on the comparison result includes: if the absolute value of the conversion result is greater than or equal to the comparison threshold, determining that the conversion result needs to be corrected; and if the absolute value of the conversion result is less than the comparison threshold, determining that the conversion result does not need to be corrected. When the comparison threshold is configured to be multiple, determining whether the conversion result needs to be corrected based on the comparison result includes: if the absolute value of the conversion result is greater than or equal to a first comparison threshold and less than a second comparison threshold, determining that the conversion result needs to be corrected; if the absolute value of the conversion result is greater than or equal to the second comparison threshold, determining that the conversion result needs to be corrected; and if the absolute value of the conversion result is less than the first comparison threshold, determining that the conversion result does not need to be corrected. Wherein, the first comparison threshold and the second comparison threshold, as described in S1022, are any two adjacent comparison thresholds among the multiple comparison thresholds, and the second comparison threshold is greater than the first comparison threshold.

[0090] Understandably, by comparing the absolute value of the transformation result with the threshold, the transformation result that needs to be corrected can be determined, providing a correction target for subsequent nonlinear correction. This method is not only simple but also reduces costs.

[0091] S103. If the conversion result needs to be corrected, the correction amount is determined using the preset correction model, and the conversion result is corrected according to the correction amount.

[0092] In this embodiment, after obtaining the conversion result that needs correction, the comparison threshold and the conversion result are substituted into a preset correction model to calculate the correction amount corresponding to the conversion result that needs correction. Based on the correction amount, the conversion result is corrected, thus completing the nonlinear correction of the analog-to-digital converter. The calculation of the correction amount is related to the correction coefficient, which is determined empirically and is not limited in this embodiment.

[0093] Understandably, by correcting the conversion result through a correction amount, the nonlinearity of the analog-to-digital converter is corrected through digital operations, thereby reducing power consumption.

[0094] A specific description of one possible implementation of S103 is as follows:

[0095] Add or subtract the correction amount to the conversion result to complete the correction of the conversion result.

[0096] For example, if the conversion result is negative, the conversion result will be subtracted from the correction amount to complete the correction of the conversion result; if the conversion result is positive, the conversion result will be added to the correction amount to complete the correction of the conversion result.

[0097] In some embodiments of this application, at least one preset correction model is provided. When a comparison threshold is configured to be one, and the absolute value of the comparison result is greater than or equal to the comparison threshold, the correction model is as shown in Formula 1-1 or Formula 1-2, which are shown below:

[0098] Δ i =k×[D(V i )-D(V t )],D(V i )>0 1-1

[0099] Δ i =k×[D(V i )+D(V t )],D(V i )<0 1-2 where, Δ i D(V) is the correction amount corresponding to the i-th transformation result. i Let ) be the i-th transformation result, D(V) t ) is the comparison threshold, k is the correction coefficient, V is the voltage corresponding to the conversion result, and i is a positive integer that is less than or equal to the number of conversion results.

[0100] For example, based on Figure 3 , Figure 4 One of the schematic diagrams of the modified transfer function curve and standard curve provided in the embodiments of this application, such as Figure 4 As shown, the transformation results corresponding to points B1 and B2 on the transfer function curve are +D(V t ) and -D(V t The absolute value of ) is used as the comparison threshold D(V) t Then, the transformation result D(V) of point C is... i ) and the comparison threshold D(V) mentioned above t By comparing the results, we can see that the transformation result of point C is D(V). i ) greater than the comparison threshold D(V) t According to the conversion result D(V) i Determine the sign of V, and use either Formula 1-1 or Formula 1-2 to calculate the conversion result D(V). i The corresponding correction amount is used, and the conversion result D(V) is adjusted based on the obtained correction amount. i The correction process is performed, and once all necessary transformation results have been corrected, the transfer function curve will appear as follows: Figure 4 As shown by the dashed line, the transformation result of point C is D(V). i )+Δ i .from Figure 4It can be seen that the distance between the transfer function curve and the points on the standard curve whose y-coordinates are greater than the comparison threshold is reduced, and the maximum distance between the transfer function curve and the standard curve is also reduced. In this way, the maximum nonlinear error of the analog-to-digital converter can be reduced, thereby reducing the nonlinearity index of the analog-to-digital converter and realizing the nonlinearity correction of the analog-to-digital converter.

[0101] In some embodiments of this application, when multiple comparison thresholds are configured, and the absolute value of the comparison result is greater than or equal to the first comparison threshold and less than the second comparison threshold, the correction model is as shown in Formula 1-3 or Formula 1-4, as follows:

[0102] Δ i =k n ×[D(V i )-D(V tn )],D(V i )>0 1-3

[0103] Δ i =k n ×[D(V i )+D(V tn )],D(V i )<0 1-4

[0104] Where, Δ i D(V) is the correction amount corresponding to the i-th transformation result. i Let ) be the i-th transformation result, D(V) tn ) is the first comparison threshold, k is the correction coefficient, n is the comparison threshold number, V is the voltage of the conversion result, and i is a positive integer, which is less than or equal to the number of conversion results.

[0105] When the absolute value of the transformation result is greater than or equal to the second comparison threshold, the correction model is shown in Equation 1-5 or Equation 1-6, as shown below:

[0106] Δ i =k n ×[D(V i )-D(V tn )]+k n+1 ×[D(V i )-D(V t(n+1) )],D(V i )>0 1-5

[0107] Δ i =k n ×[D(V i )+D(V tn )]+k n+1 ×[D(Vi )+D(V t(n+1) )],D(V i )<0 1-6 where, Δ i D(V) is the correction amount for the i-th transformation result. i Let ) be the i-th transformation result, D(V) tn D(V) is the first comparison threshold. t(n+1) ) is the second comparison threshold; k is the correction coefficient; n is the number of the comparison threshold; i is a positive integer, less than or equal to the number of conversion results; and V is the voltage of the conversion result.

[0108] For example, based on Figure 3 , Figure 5 This is a second schematic diagram of the modified transfer function curve and standard curve provided for embodiments of this application, as shown below. Figure 5 As shown, the transformation results corresponding to points D1 and D2 on the transfer function curve are +D(V tn ) and -D(V tn The absolute value of ) is used as the first comparison threshold D(V) tn ), add D(V) to the transformation results corresponding to points E1 and E2. t(n+1) ) and -D(V t(n+1) The absolute value of ) is used as the second comparison threshold D(V) t(n+1) Then, the transformation result D(V) of point C is... i The absolute value of ) and the first comparison threshold D(V) tn ), second comparison threshold D(V) t(n+1) By comparing the results, we can see that the transformation result of point C is D(V). i The absolute value of ) is greater than the first comparison threshold D(V) tn And less than the second comparison threshold D(V) t(n+1) At this point, according to the conversion result D(V) i Based on the sign of V and the comparison results obtained through S102, select the corresponding formulas from formulas 1-3 to 1-6 to calculate the transformation result D(V). i The corresponding correction amount is calculated and corrected; once all the necessary conversion results have been corrected, the transfer function curve will appear as shown. Figure 5 As shown by the dashed line, the transformation result of point C is D(V). i )+Δ i .from Figure 5 From this, we can see that the distance between the transfer function curve and the points on the standard curve whose y-coordinates are greater than the comparison threshold is further reduced, and the maximum distance between the transfer function curve and the standard curve is also further reduced. That is, the more comparison thresholds there are, the better the nonlinear correction result of the analog-to-digital converter, and the higher the conversion accuracy of the corrected analog-to-digital converter.

[0109] Understandably, when any conversion result output by the analog-to-digital converter needs correction, the conversion result can be corrected based on the correction amount to achieve nonlinear correction of the analog converter. In this way, replacing analog compensation in the existing technology with digital calculation can reduce the power consumption and cost in the nonlinear correction process of the analog-to-digital converter, and avoid increasing the size of the analog-to-digital converter by not adding additional analog circuits.

[0110] Figure 6 A flowchart illustrating another analog-to-digital converter nonlinearity correction method provided in this application embodiment is shown below. Figure 6 As shown in the embodiments of this application, a possible implementation of an analog-to-digital converter nonlinearity correction method is also provided, including:

[0111] S201: Analog-to-digital converter power-on reset.

[0112] S202: After power-on reset, an analog-to-digital conversion is performed based on the internal bandgap reference voltage of the chip to obtain the conversion result of the bandgap reference voltage, and D(V) is obtained based on the conversion result. t ).

[0113] S203: Analog-to-digital converter for input signal V i Perform analog-to-digital conversion to obtain D(V) i ).

[0114] S204: D(V) i ) and D(V t Comparison, if |D(V) i )|-D(V t If )>0, then execute step S205 on D(V) i If the number is corrected, proceed to step S207.

[0115] S205: Calculate the correction amount to obtain Δ i =k n ×[D(V i )-D(V tn )],D(V i )>0 or Δ i =k n ×[D(V i )+D(V tn )],D(V i )<0.

[0116] S206: Based on the correction amount Δ i For the transformation result D(V) i After correction, the final result is Dout = D(V). i )+Δ i .

[0117] S207: D(V) i As the final result, we get Dout = D(V) i ).

[0118] S208: The analog-to-digital converter outputs the final result.

[0119] Understandably, this digital calculation method can correct the conversion result, reduce the nonlinear error of the final output of the analog-to-digital converter, and not only has low power consumption and low cost, but also improves the conversion accuracy of the digital converter.

[0120] Figure 7 A flowchart illustrating another analog-to-digital converter nonlinearity correction method provided in this application embodiment is shown below. Figure 7 As shown in the embodiments of this application, a possible implementation of an analog-to-digital converter nonlinearity correction method is also provided, including:

[0121] S301: Analog-to-digital converter power-on reset.

[0122] S302: After power-on reset, an analog-to-digital conversion is performed based on the internal bandgap reference voltage of the chip to obtain the conversion result of the bandgap reference voltage, and D(V) is obtained based on the conversion result. t1 ) and D(V t2 ).

[0123] S303: Analog-to-digital converter for input signal V i Perform analog-to-digital conversion to obtain D(V) i ).

[0124] S304: D(V) i ) and D(V t1 ), D(V t2 Comparison, if |D(V) i )| <D(V t1 If the condition is not met, proceed to step S310; otherwise, proceed to step S305.

[0125] S305: Set the judgment condition D(V) t2 )>|D(V i )|>D(V t1 If the condition is met, proceed to step S306; otherwise, proceed to step S308.

[0126] S306: Calculate the correction amount to obtain Δ i1 =k1×[D(V i )-D(V t1 )],D(V i )>0; or Δ i1 =k1×[D(V1)+D(V t1)],D(V i )<0.

[0127] S307: Based on the correction amount Δ i1 For the transformation result D(V) i After correction, the final result is Dout = D(V). i )+Δ i1 .

[0128] S308: Calculate the correction amount to obtain Δ i2 =k1×[D(V i )-D(V t1 )]+k2×[D(V i )-D(V t2 )],D(V i )>0 or Δ i2 =k1×[D(V i )+D(V t1 )]+k2×[D(V i )+D(V t2 )],D(V i )<0.

[0129] S309: Based on the correction amount Δ i2 For the transformation result D(V) i After correction, the final result is Dout = D(V). i )+Δ i2 .

[0130] S310: D(V) i As the final result, we get Dout = D(V) i ).

[0131] S311: The analog-to-digital converter outputs the final result.

[0132] Understandably, this digital calculation method can correct the conversion result, reduce the nonlinear error of the final output of the analog-to-digital converter, and not only has low power consumption and low cost, but also improves the conversion accuracy of the digital converter.

[0133] Figure 8 A schematic diagram of another analog-to-digital converter nonlinear correction device provided in this application embodiment is shown below. Figure 8 As shown in the figure, this application embodiment also provides an analog-to-digital converter nonlinearity correction device, the device comprising:

[0134] The acquisition module 51 is used to acquire the transfer function curve of the analog-to-digital converter;

[0135] The processing module 52 is used to determine whether the conversion result output by the analog-to-digital converter needs to be corrected based on the transfer function curve and the standard curve; and if the conversion result needs to be corrected, it is used to determine the correction amount using a preset correction model.

[0136] The correction module 53 is used to correct the conversion result according to the correction amount.

[0137] In some embodiments of this application, the processing module 52 is further configured to determine a comparison threshold based on the transfer function curve and the standard curve; to compare the conversion result with the comparison threshold to obtain a comparison result; and to determine whether the conversion result needs to be corrected based on the comparison result.

[0138] In some embodiments of this application, when the comparison threshold is configured to be one, the processing module 52 is further configured to determine that the conversion result needs to be corrected if the absolute value of the conversion result is greater than or equal to the comparison threshold. In this case, the correction model includes:

[0139] Δ i =k×[D(V i )-D(V t )],D(V i )>0;

[0140] or

[0141] Δ i =k×[D(V i )+D(V t )],D(V i )<0;

[0142] Where, Δ i D(V) is the correction amount corresponding to the i-th transformation result. i Let ) be the i-th transformation result, D(V) t ) is the comparison threshold, k is the correction coefficient, V is the voltage corresponding to the conversion result, and i is a positive integer that is less than or equal to the number of conversion results.

[0143] In some embodiments of this application, when multiple comparison thresholds are configured, the processing module 52 is further configured to determine that the conversion result needs correction if the absolute value of the comparison result is greater than or equal to a first comparison threshold and less than a second comparison threshold; wherein the first comparison threshold and the second comparison threshold are any two adjacent comparison thresholds among multiple comparison thresholds, and the second comparison threshold is greater than the first comparison threshold; in this case, the correction model includes:

[0144] Δ i =k n ×[D(V i )-D(V tn )],D(Vi )>0;

[0145] or

[0146] Δ i =k n ×[D(V i )+D(V tn )],D(V i )<0;

[0147] Where, Δ i D(V) is the correction amount corresponding to the i-th transformation result. i Let ) be the i-th transformation result, D(V) tn ) is the first comparison threshold, k is the correction coefficient, n is the comparison threshold number, V is the voltage of the conversion result, and i is a positive integer, which is less than or equal to the number of conversion results.

[0148] In some embodiments of this application, when multiple comparison thresholds are configured, the processing module 52 is further configured to determine that the conversion result needs to be corrected if the absolute value of the comparison result is greater than or equal to a second comparison threshold. In this case, the correction model includes:

[0149] Δ i =k n ×[D(V i )-D(V tn )]+k n+1 ×[D(V i )-D(V t(n+1) )],D(V i )>0;

[0150] or

[0151] Δ i =k n ×[D(V i )+D(V tn )]+k n+1 ×[D(V i )+D(V t(n+1) )],D(V i )<0;

[0152] Where, Δ i D(V) is the correction amount for the i-th transformation result. i Let ) be the i-th transformation result, D(V) tn D(V) is the first comparison threshold. t(n+1) ) is the second comparison threshold; k is the correction coefficient; n is the number of the comparison threshold; i is a positive integer, less than or equal to the number of conversion results; and V is the voltage of the conversion result.

[0153] In some embodiments of this application, the acquisition module 51 is further configured to perform analog-to-digital conversion on the bandgap reference voltage of the target chip using an analog-to-digital converter to obtain the transfer function curve.

[0154] In some embodiments of this application, the correction module 53 is further configured to add or subtract the correction amount from the conversion result to complete the correction of the conversion result.

[0155] Figure 9 This is a schematic diagram of the physical structure of the computer device provided in the embodiments of this application, such as... Figure 9 As shown, the electronic device provided in this application may include: a processor 810, a communication interface 820, a memory 830, and a communication bus 840, wherein the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call logic instructions in the memory 830 to implement the analog-to-digital converter nonlinearity correction method provided in the above embodiments.

[0156] Furthermore, the logical instructions in the aforementioned memory 830 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0157] In another aspect, this application also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the analog-to-digital converter nonlinear correction method provided in the above embodiments.

[0158] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0159] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0160] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A method for correcting nonlinearity in an analog-to-digital converter, characterized in that, The method includes: Obtain the transfer function curve of the analog-to-digital converter; Based on the transfer function curve and the standard curve, determine whether the conversion result output by the analog-to-digital converter needs to be corrected; If the conversion result needs to be corrected, a preset correction model is used to determine the correction amount, and the conversion result is corrected according to the correction amount. The step of determining whether the conversion result output by the analog-to-digital converter needs correction based on the transfer function curve and the standard curve includes: Determine the comparison threshold based on the transfer function curve and the standard curve; By comparing the conversion result with the comparison threshold, a comparison result is obtained. Determine whether the conversion result needs to be corrected based on the comparison results; When the comparison threshold is configured to be one, the step of determining whether the conversion result needs to be corrected based on the comparison result includes: If the absolute value of the comparison result is greater than or equal to the comparison threshold, the conversion result is determined to need correction; the correction model includes: , >0; or , <0; where, This is the correction amount corresponding to the i-th conversion result. For the i-th transformation result, The comparison threshold is k, the correction coefficient is V, the voltage corresponding to the conversion result is V, and i is a positive integer less than or equal to the number of conversion results.

2. The method according to claim 1, characterized in that, When multiple comparison thresholds are configured, determining whether the conversion result needs correction based on the comparison result includes: If the absolute value of the conversion result is greater than or equal to the first comparison threshold and less than the second comparison threshold, it is determined that the conversion result needs to be corrected; wherein the first comparison threshold and the second comparison threshold are any two adjacent comparison thresholds among a plurality of comparison thresholds, and the second comparison threshold is greater than the first comparison threshold.

3. The method according to claim 2, characterized in that, The modified model includes: ， >0； or ， <0； in, This is the correction amount corresponding to the i-th conversion result. For the i-th transformation result, Let k be the first comparison threshold, k be the correction coefficient, n be the comparison threshold number, V be the voltage of the conversion result, and i be a positive integer less than or equal to the number of conversion results.

4. The method according to claim 2, characterized in that, The step of determining whether the conversion result needs to be corrected based on the comparison result further includes: If the absolute value of the comparison result is greater than or equal to the second comparison threshold, it is determined that the conversion result needs to be corrected.

5. The method according to claim 4, characterized in that, The modified model includes: ， >0； or ， <0； in, This is the correction amount for the i-th conversion result. For the i-th transformation result, The first comparison threshold, is the second comparison threshold; k is the correction coefficient, n is the number of the comparison threshold, i is a positive integer less than or equal to the number of conversion results, and V is the voltage of the conversion result.

6. The method according to claim 1, characterized in that, The acquisition of the transfer function curve of the analog-to-digital converter includes: The bandgap reference voltage of the target chip is converted from analog to digital using the analog-to-digital converter to obtain the transfer function curve.

7. The method according to claim 1, characterized in that, The step of correcting the conversion result according to the correction amount includes: The conversion result is added to or subtracted from the correction amount to complete the correction of the conversion result.

8. A nonlinear correction device for an analog-to-digital converter, characterized in that, The device includes: The acquisition module is used to acquire the transfer function curve of the analog-to-digital converter; The processing module is used to determine whether the conversion result output by the analog-to-digital converter needs to be corrected based on the transfer function curve and the standard curve; and is also used to determine the correction amount using a preset correction model if the conversion result needs to be corrected. A correction module is used to correct the conversion result according to the correction amount; Specifically, the processing module is used for: Determine the comparison threshold based on the transfer function curve and the standard curve; By comparing the conversion result with the comparison threshold, a comparison result is obtained. Determine whether the conversion result needs to be corrected based on the comparison results; When the comparison threshold is configured to be one, the processing module is specifically used for: If the absolute value of the comparison result is greater than or equal to the comparison threshold, the conversion result is determined to need correction; the correction model includes: , >0; or , <0; where, This is the correction amount corresponding to the i-th conversion result. For the i-th transformation result, The comparison threshold is k, the correction coefficient is V, the voltage corresponding to the conversion result is V, and i is a positive integer less than or equal to the number of conversion results.

9. A computer device, characterized in that, It includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the analog-to-digital converter nonlinear correction method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the analog-to-digital converter nonlinear correction method as described in any one of claims 1 to 7.

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