Semiconductor device and method of manufacturing the same

Abstract

The present application provides a semiconductor device and a manufacturing method thereof, in which the connection reliability between an electronic component and a substrate is improved in a semiconductor device in which the electronic component is fixed to the substrate. The semiconductor device is configured to include: a substrate (10) provided with a wiring and a wiring connection portion (12) connected to the wiring; an electronic component (20, 30, 40, 50) electrically connected to the wiring connection portion (12) and fixed to the substrate (10); and a resin film (60) stacked on one face of the substrate (10) while following the shape of the electronic component (20, 30, 40, 50) and covering the electronic component (20, 30, 40, 50).

Description

Technical Field

[0001] This invention relates to a semiconductor device and a method for manufacturing the same. Background Technology

[0002] In recent years, the concept of the Internet of Things (IoT) has been promoted, envisioning everything being equipped with sensors and the foreseeable arrival of a networked society. This IoT society requires low-cost and mass-producible devices, and organic thin-film transistors (OTFTs) using organic semiconductors (OSCs) are considered promising core components. Compared to silicon semiconductors, which require vacuum processes, OSCs, which can be fabricated using low-cost printing methods, offer superior processability. Furthermore, OSCs can operate on ultrathin films of just a few molecular layers, thus reducing material costs. Moreover, in addition to maintaining strong flexibility to mechanical stresses such as bending and strain, it is known that minute changes in transistor characteristics accompanying these stresses can be applied to sensing. Based on these cost and functional advantages, OTFTs are expected to make a significant contribution to realizing the IoT society.

[0003] Semiconductor devices are configured to fix various electronic components, such as OTFTs, onto a substrate and electrically connect them via wiring. The typical process for electrically connecting electronic components on a substrate includes: a first stage, patterning wiring on the substrate through vapor deposition, plating, printing, etc.; a second stage, printing solder paste; a third stage, mounting electronic components; and a fourth stage, melting the solder by heating to establish conductivity between the electronic components and the wiring.

[0004] Patent Document 1 discloses a method for forming a solder paste layer on the upper surface of an electrode formed on a substrate by screen printing.

[0005] Patent document 2 discloses a method for applying solder paste by screen printing within through-holes of a flexible printed circuit board.

[0006] Existing technical documents

[0007] Patent documents

[0008] Patent Document 1: Japanese Patent Application Publication No. 2019-051667

[0009] Patent Document 2: Japanese Patent Application Publication No. 2016-127205 Summary of the Invention

[0010] The problem the invention aims to solve

[0011] Furthermore, in semiconductor devices where electronic components are fixed on the aforementioned substrate, the electrical connection between the electronic components and the substrate can be damaged when the substrate is bent, when vibration is applied to the substrate, or when the electronic components are scratched by external forces. In particular, when the substrate is a flexible substrate, it is easily affected by substrate bending and substrate vibration.

[0012] In this specification, the reliability of the connection between the electronic component and the substrate when the substrate is bent, when vibration is applied to the substrate, and when the electronic component is scratched are referred to as bending resistance, vibration resistance, and scratch resistance, respectively.

[0013] The present invention was made in view of the above circumstances, and its object is to provide a semiconductor device and a method for manufacturing the same, which can improve the connection reliability between the electronic components and the substrate in a semiconductor device in which electronic components are fixed on a substrate.

[0014] Technical solution

[0015] The semiconductor device of the present invention is configured as follows: a substrate having wiring and a wiring connection portion connected to the wiring; an electronic component electrically connected to the wiring connection portion and fixed to the substrate; and a resin film that follows the shape of the electronic component and covers the electronic component and is laminated on one side of the substrate.

[0016] The semiconductor device manufacturing method of the present invention includes: a step of providing wiring and wiring connection portions connected to the wiring on a substrate; a step of electrically connecting an electronic component to the wiring connection portions and fixing it to the substrate; and a step of laminating a resin film that follows the shape of the electronic component and covers the electronic component onto one side of the substrate.

[0017] Invention Effects

[0018] According to the present invention, in a semiconductor device in which electronic components are fixed on a substrate, the connection reliability between the electronic components and the substrate can be improved. Attached Figure Description

[0019] Figure 1 This is a top view of the semiconductor device according to the first embodiment.

[0020] Figure 2 yes Figure 1 A sectional view in A-A'.

[0021] Figure 3 This is a cross-sectional view showing the process of manufacturing a semiconductor device according to the first embodiment.

[0022] Figure 4 It means Figure 3 A cross-sectional view of the subsequent processes.

[0023] Figure 5 It means Figure 4 A cross-sectional view of the subsequent processes.

[0024] Figure 6 It means Figure 5 A cross-sectional view of the subsequent processes.

[0025] Figure 7 This is a cross-sectional view of the semiconductor device according to the second embodiment.

[0026] Figure 8 This is a cross-sectional view showing the process of manufacturing a semiconductor device according to the second embodiment.

[0027] Figure 9 This is a cross-sectional view showing the process of manufacturing a semiconductor device according to a first modified example.

[0028] Figure 10 This is a cross-sectional view showing the process of manufacturing a semiconductor device according to the second improved example. Detailed Implementation

[0029] [First Implementation Method]

[0030] (Overall structure of a semiconductor device)

[0031] Figure 1 This is a top view of the semiconductor device according to the first embodiment. Figure 2 yes Figure 1 A cross-sectional view along line A-A'. The semiconductor device 1 includes: a substrate 10; electronic components 20, 30, 40, and 50; and a resin film 60.

[0032] (Substrate)

[0033] The substrate 10 has wiring 11 and wiring connection portions 12 formed thereon. The substrate 10 is, for example, a flexible substrate. The thickness of the substrate 10 is, for example, 10 μm or more and 300 μm or less. The substrate 10 is, for example, formed of polyimide (PI). Alternatively, the substrate 10 is formed of a general resin film such as polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polylactic acid (PLA), epoxy resin, acrylic resin, etc., which have lower heat resistance than polyimide. Here, the substrate 10 is not limited to a single-layer substrate. As the substrate 10, a multilayer wiring substrate formed by stacking multiple flexible substrates having at least the wiring 11 formed thereon can be used. Furthermore, as the substrate 10, a multilayer wiring substrate formed by alternately stacking multiple conductive layers and insulating layers on a single-layer substrate can be used instead of stacking multiple flexible substrates. When using a multilayer wiring substrate as substrate 10, it is preferable to form wiring connection portions 12 on the uppermost flexible substrate among at least a plurality of stacked flexible substrates, in addition to forming wiring 11.

[0034] (Wiring and wiring connections)

[0035] Wiring 11 and wiring connection portion 12 connected to wiring 11 are provided on substrate 10. Wiring 11 and wiring connection portion 12 are formed of the same material, and further, for example, are formed with the same thickness (height). Wiring 11 and wiring connection portion 12 are formed simultaneously, for example, in one manufacturing process. In the case where wiring 11 and wiring connection portion 12 are formed simultaneously in one manufacturing process, wiring 11 and wiring connection portion 12 are formed of the same material and have the same thickness (height). Wiring 11 and wiring connection portion 12 are obtained, for example, by printing and curing a conductive paste with a specified thickness of 1 μm or more and 300 μm or less according to a specified wiring pattern. The conductive paste is formed by dispersing conductive filler in an organic dispersion medium such as an adhesive resin or an aqueous dispersion medium such as a silicate aqueous solution, and the conductive paste can be cured by firing, light exposure or drying to serve as a conductive layer. As conductive filler, metal particles such as silver, copper, and nickel; carbon black such as carbon flakes, carbon particles or carbon nanotubes, etc. can be used. The particle size of the conductive filler is, for example, 0.1 μm or more and tens of μm or less. The precision of line width / space (L / S) in screen printing is, for example, 50μm / 50μm.

[0036] The conductive paste used in the wiring 11 and wiring connection portion 12 in this embodiment is not particularly limited, and the curing temperature is 130°C or less, more preferably 100°C or less. By adopting this configuration, even when a flexible substrate is used as the substrate 10, or when an organic semiconductor element is mounted as the electronic element 50, the wiring connection portion 12 can be connected to the electronic element 50 without damaging the substrate 10 or the electronic element 50.

[0037] (Electronic components)

[0038] Electronic components 20, 30, 40, and 50 are electrically connected to the wiring connection portion 12 and fixed to the substrate 10. Electronic components 20, 30, 40, and 50 can be any of the following: active components such as transistors and integrated circuits; and passive components such as resistors and sensors. Electronic components 20, 30, 40, and 50 may also include both active and passive components. Figure 1 and Figure 2 In the diagram, electronic components 20, 40, and 50 represent active components, while electronic component 30 represents a passive component. Examples include... Figure 1 and Figure 2 The configuration shown includes multiple electronic components, but it can also be a configuration that includes only one electronic component.

[0039] Electronic components 20, 30, 40, and 50 can be any type of inorganic semiconductor component formed from silicon or the like, or an organic semiconductor component formed from organic materials. Figure 1 and Figure 2 In the diagram, electronic components 20, 30, and 40 represent inorganic semiconductor components, while electronic component 50 represents an organic semiconductor component.

[0040] (Inorganic semiconductor components)

[0041] Electronic component 20 includes semiconductor component 21. Semiconductor component 21 is an inorganic semiconductor component including active components, such as a MOS (Metal-Oxide-Semiconductor) transistor configured such that a gate electrode is stacked on an active region of a silicon semiconductor through a gate insulating film, and source / drain regions are formed in the silicon semiconductor region sandwiching the active region between the two sides of the gate electrode. It may also be configured as a thin-film transistor (TFT) including a thin-film transistor where the silicon semiconductor region is formed as a thin film semiconductor layer on a support substrate. Electrodes 22 and 23, in a protruding shape such as bumps, are connected to semiconductor component 21. An example of six electrodes 22 and 23 is shown in the drawings, but the number of electrodes is arbitrary. The outermost layer of conductor component 21, except for the portions of electrodes 22 and 23, is sealed with a sealing layer (not shown) formed of epoxy resin or the like. Electrodes 22 and 23 are electrically connected to wiring connection portion 12 and fixed thereto.

[0042] Electronic component 30 includes semiconductor component 31. Semiconductor component 31 is an inorganic semiconductor component that includes passive components, such as a resistive component having a resistive region located in a silicon semiconductor region. Electrodes 32 and 33 are formed by connecting to semiconductor component 31. Two electrodes 32 and 33 are shown in the drawings, but the number of electrodes is arbitrary. The outermost layer of semiconductor component 31, except for the portions of electrodes 32 and 33, is sealed with a sealing layer (not shown) formed of epoxy resin or the like. Electrodes 32 and 33 are electrically connected to wiring connection portion 12 and fixed thereto.

[0043] Electronic component 40 includes semiconductor component 41. Semiconductor component 41 is an inorganic semiconductor component including active elements, and for example, it is configured such that a semiconductor chip having a MOS transistor or the like is mounted on a lead frame, the semiconductor chip and leads are connected by bonding wires, and the semiconductor chip and bonding wires are covered by a sealing layer (not shown) formed of epoxy resin or the like. Semiconductor component 41 may also be configured to include a TFT. Figure 2 As shown, the semiconductor element 41 extends outward from the lead electrodes 42 and 43. An example of six lead electrodes 42 and 43 is shown in the drawing, but the number of lead electrodes is arbitrary. The lead electrodes 42 and 43 are electrically connected to and fixed to the wiring connection portion 12.

[0044] (Organic semiconductor device)

[0045] Electronic component 50 includes a semiconductor element 52 disposed on substrate 51. Semiconductor element 52 is an organic semiconductor element, which includes any of the following: active elements such as transistors and integrated circuits, and passive elements such as resistors and sensors. Semiconductor element 52 may also include both active and passive elements. For example, semiconductor element 52 includes an organic thin-film transistor (OTFT) configured such that a gate electrode is stacked across an active region disposed on an organic semiconductor film, with a gate insulating film separating the active region from the gate electrode, and source / drain regions are formed sandwiching the active region between the two sides of the gate electrode. Protruding electrodes 53 and 54, such as bumps, are connected to semiconductor element 52. Six electrodes 53 and 54 are shown in the figures, but the number of electrodes is arbitrary. The outermost layer of semiconductor element 52, except for the portions of electrodes 53 and 54, is sealed with a sealing layer (not shown) made of a barrier film or fluororesin, etc. Electrodes 53 and 54 are electrically connected to wiring connection portion 12 and fixed thereto.

[0046] Semiconductor element 52 is a semiconductor element in which a thin-film transistor is formed, and the active region of the thin-film transistor is further formed by an organic semiconductor film. Unlike existing silicon semiconductors, semiconductor elements in which the active region is formed by an organic semiconductor film can be manufactured using an atmospheric coating / printing process. Thus, using the active region of the thin-film transistor as a component of an organic semiconductor can be manufactured using a very simple process, thus enabling small-batch, multi-variety production and facilitating device adoption at a very low cost.

[0047] Methods for forming organic semiconductor films using organic semiconductors include: physical vapor deposition (PVD), represented by vacuum vapor deposition; plate printing and plateless printing using inks containing organic semiconductor materials; and edge casting and continuous edge casting using solutions containing dissolved organic semiconductor materials. Edge casting is described in detail in, for example, Japanese Patent Application Publication No. 2015-185620, and continuous edge casting is described in detail in, for example, Japanese Patent Application Publication No. 2017-147456. When using PVD or continuous edge casting, the organic semiconductor film can be formed over the entire upper surface of an insulating film, and then the shape of the organic semiconductor film can be patterned using photolithography or similar methods. Alternatively, a mask can be used to form the film while it is patterned into the shape of the organic semiconductor film. The organic semiconductor film is preferably a single-crystal film of an organic semiconductor.

[0048] Materials used as n-type organic semiconductor films include: PDI1MPCN2 (N,N'-bis((S)-1-methylpentyl)-1,7(6)-dicyano-perylene-3,4:9,10-bis-(dicarboximide)), PDI-FCN2 (N-fluoroalkylated dicyanoperylene-3,4:9,10-bis(dicarboximide)), PDI-C8 (N,N'-dioctylperylene diimide), PDI-C13 (N,N'-di(tetrazyl)perylene diimide), PDI-8CN2 (N,N'-bis-n-octyl-1,6-dicyanoperylene-3,4:9,10-bis(dicarboximide)), PBI-F2, PBI-F4 (fluorinated PBI (perylenetetracarboxylate diimide) derivatives), F 16 CuPc (copper hexadecyl phthalocyanine), TC-PTCDI (tetrachloroperyl tetracarboxylate diimide), BPE-PTCDI (N,N'-bis(2-phenylethyl)peryl-3,4:9:10-bis-(dicarboxyimide)), 2,9-diphenylethyl anthracene [9,1,2-cde:10,5,6-c'd'e']bis([2,7]naphthidine)-1,3,8,10(2H,9H)-tetraone, etc.

[0049] In addition, materials that can be formed into p-type organic semiconductor films by vapor deposition include pentacene and copper phthalocyanine. Furthermore, examples of materials that can be formed into p-type organic semiconductor films by lithographic or non-lithographic printing methods, or edge casting methods, include: Tips-pentacene (6,13-bis(triisopropylsilylethynyl)pentacene), NSFAAP (13,6-N-sulfinylacetamidopentacene), DMP (6,13-dihydro-6,13-methanopentacene-15-one), and pentacene-N-sulfinyl-n-butylcarbamate adduct. Pentacene precursors, such as adduct, pentacene-N-sulfinyl-tert-butylcarbamate, and others; BTBT ([1]benzothiophene[3,2-b]benzothiophene), C10-DNBDT (3,11-dicepyldinaphtho[2,3-d:2',3'-d']benzo[1,2-b:4,5-b']dithiophene) Low molecular weight compounds or oligomers represented by C9-DNBDT with different side chain lengths, substances with a benzobisthiadiazole skeleton, porphyrin, benzoporphyrin, and oligothiophenes with alkyl groups as soluble groups; high molecular weight compounds represented by polythiophene, fluorene copolymers, or IDT-BT (indacenodithiophene benzothiadiazole) and CDT-BT (cyclopentadithiophene benzothiadiazole) with a DA structure.

[0050] Organic semiconductor films, preferably formed from semiconductors such as carbon nanotubes, graphene, oxide semiconductors, or metal compounds such as black phosphorus, are preferred as active regions. Thin-film transistors using carbon nanotubes as active regions are described in detail in the following documents: Japanese Patent No. 6005204, “Dong-ming Sun et al., ‘Flexible high-performance carbon nanotube integrated circuits’, Nature Nanotechnology volume 6, pages 156-161 (2011)”, “Donglai Zhong et al., ‘Gigahertz integrated circuits based on carbon nanotube films’, Nature Electronics volume 1, pages 40-45 (2018)”, and “Jianshi Tang et al., ‘Flexible CMOS integrated circuits based on carbon nanotubes with sub-10ns stage delays’, Nature Electronics volume 1, pages 191-196 (2018)”.

[0051] Regarding the use of graphene to fabricate thin-film transistors with active regions, detailed descriptions can be found in the following publications: Japanese Patent Application Publication No. 2013-253010, “Seunghyun Lee et al., 'Flexible and Transparent All-Graphene Circuits for Quaternary Digital Modulations' Nature Communications volume 3, Article number: 1018 (2012)”, “Shu-Jen Han1 et al., 'Graphene radiofrequency receiver integrated circuit' Nature Communications volume 5, Article number: 3086 (2014)”, and “Yu-Ming Lin et al., 'Wafer-Scale Graphene Integrated Circuit' Science 10 Jun 2011, Vol. 332, Issue 6035, pp. 1294-1297”.

[0052] Thin-film transistors that utilize oxide semiconductors to fabricate active regions are detailed in, for example, in the following publications: Japanese Patent Application Publication No. 2017-76789, Japanese Patent Application Publication No. 2018-50043, “Hiroaki Ozaki et al., 'Wireless operations for 13.56-MHz band RFID tag using amorphous oxide TFTs', IEICE Electronics Express Volume 8 (2011) Issue 4 Pages 225-231”, “Ming-Hao Hung et al., 'Ultra Low Voltage I-V RFID Tag Implement in a IGZO TFT Technology on Plastic', 2017 IEEE International Conference on RFID (RFID)”, “Byung-Do Yang et al., 'A Transparent Logic Circuit for RFID Tag in a-IGZO TFT Technology', ETRI Journal Volume 35, Issue 4 August 2013 Pages 610-616”.

[0053] Thin-film transistors (TFTs) using semiconductors composed of metal compounds of black phosphorus to form active regions are described in detail in the following documents: Japanese Patent Application Publication No. 2018-14359, Japanese Patent Application Publication No. 2018-98338, “Xuewei Feng et al., 'Complementary Black Phosphorus Nanoribbons Field-Effect Transistors and Circuits' IEEE Transactions on Electron Devices Volume 65, Issue 10, Oct. 2018, Page(s): 4122-4128”, and “Peng Wu et al., 'High Performance Complementary Black Phosphorus FETs and Inverter Circuits Operating at Record-Low VDD downto 0.2V', 2018 76th Device Research Conference (DRC)”.

[0054] The electronic components 20, 30, 40, and 50 in this embodiment are not particularly limited thereto, but are preferably electrically connected to the wiring connection portion in such a way that no other material (e.g., a conductive paste different from the conductive paste constituting the wiring connection portion 12) is sandwiched between the wiring connection portion 12 and the respective electrodes of the electronic components 20, 30, 40, and 50, other than solder and the material constituting the wiring connection portion 12 (e.g., a specified conductive paste).

[0055] (Resin film)

[0056] In the semiconductor device 1 of this embodiment, the resin film 60 is composed of two resin films 60A and 60B. Resin film 60A is stacked on one side of the substrate 10, conforming to the shape of electronic components 20, 30, 40, and 50 and covering them. Resin film 60B is further stacked on the other side of the substrate 10. The thickness of resin films 60A and 60B is, for example, 10 μm or more and 300 μm or less. Resin films 60A and 60B are formed, for example, from materials such as polyethylene terephthalate (PET), polystyrene (PS), polyamide (PA), polyethylene (PE), polypropylene (PP), polyvinyl chloride (PVC), and polymethyl methacrylate (PMMA). The resin film 60A follows the shape of the electronic components 20, 30, 40, and 50 and covers them. However, gaps may remain between the substrate 10 and the electronic components 20, 30, 40, and 50. Here, a gap refers to a space that exists between the substrate 10 and the electronic components 20, 30, 40, and 50, and is viewed from the resin film 60A as the back side of the electronic components 20, 30, 40, and 50, making it difficult to fill with the resin film 60A. Some air bubbles may also remain between the substrate 10 and the resin films 60A and 60B, but fewer air bubbles result in better adhesion between the substrate 10 and the resin films 60A and 60B, which is preferred. Here, "bubble" refers to the space between the substrate 10 and the resin films 60A and 60B that cannot be filled by the resin films 60A and 60B. The higher the mobility of the resin films 60A and 60B, the fewer bubbles remain between the substrate 10 and the resin films 60A and 60B. As will be described later, the amount of bubbles remaining between the substrate 10 and the resin films 60A and 60B can be controlled to a certain extent depending on the lamination method and lamination conditions of the resin films 60A and 60B.

[0057] (Semiconductor device manufacturing method)

[0058] The following is for reference Figures 3-6 The method for manufacturing the semiconductor device according to this embodiment will be described. Figures 3-6 This refers to the various steps in the manufacturing method of the semiconductor device according to this embodiment. Figure 2 The corresponding sectional view. First, as... Figure 3 As shown, a substrate 10 is prepared. Here, for example, a flexible substrate is prepared as substrate 10.

[0059] Next, as Figure 4 As shown, for example, an uncured wiring 11A and an uncured wiring connection portion 12A connected to the wiring 11A are formed on a substrate 10 by printing a conductive paste, such as by screen printing. The wiring 11A and the wiring connection portion 12A are preferably formed of the same material, and more preferably, for example, of the same thickness. Thus, the wiring 11A and the wiring connection portion 12A can be formed simultaneously in a single manufacturing process. For example, the conductive paste that will become the wiring 11A and the wiring connection portion 12A is printed with a predetermined thickness of 1 μm or more and 300 μm or less. The conductive paste printed according to a predetermined wiring pattern is cured to form a conductive layer with a predetermined pattern, i.e., the wiring 11 and the wiring connection portion 12 are formed. Here, a conductive paste with high viscosity and viscoelasticity is used. The viscosity is, for example, 20 Pa·s or more, more preferably 100 Pa·s or more. When the conductive paste is printed by other printing methods such as spray printing, a viscosity suitable for each printing method is adopted. For example, in spray printing, the viscosity is preferably below 5 Pa·s, such as 0.5 Pa·s.

[0060] In the semiconductor device manufacturing method of this embodiment, before the conductive paste printed as described above is cured, such as Figure 5 As shown, electronic components 20, 30, 40, and 50 are disposed on the wiring connection portion 12A. For example, electronic components 20, 30, 40, and 50 are respectively adsorbed by adsorption clamps, and are disposed in predetermined positions such that the electrodes of each electronic component 20, 30, 40, and 50 are in contact with the upper surface of the wiring connection portion 12A. Due to the viscosity and viscoelasticity of the conductive paste, each electronic component 20, 30, 40, and 50 is temporarily fixed to the wiring connection portion 12A.

[0061] Next, curing treatments such as firing, light irradiation, or drying are performed to cure the wiring 11A and wiring connection portion 12A formed from the uncured conductive paste. In the case of thermosetting conductive paste, for example, the entire assembly is fired at 130°C or below (100°C or below depending on the type of conductive paste). In the case of photocurable conductive paste, light in the visible to ultraviolet wavelength range is irradiated. Thus, the conductive paste can be cured to form a conductive layer, and the conductive paste can be cured while electronic components 20, 30, 40, and 50 are electrically connected to the cured wiring connection portion 12 and fixed.

[0062] Next, as Figure 6 As shown, a resin film 60A, which follows the shape of electronic components 20, 30, 40, and 50 and covers them, is laminated onto one side of the substrate 10. Simultaneously, a resin film 60B is laminated onto the other side of the substrate 10. In this embodiment, the lamination of resin films 60A and 60B onto the substrate 10 is performed in a vacuum or depressurized space, denoted by pressure P1. When resin films 60A and 60B are laminated in a vacuum or depressurized space, the pressure difference when removed at atmospheric pressure can be utilized to improve the adhesion between the substrate 10 and the resin films 60A and 60B. As a result, when resin films 60A and 60B are laminated in a vacuum or depressurized space, compared with the case where resin films 60A and 60B are laminated in the atmosphere, the residual air bubbles between the substrate 10 and the resin films 60A and 60B can be reduced, and the adhesion between the substrate 10 and the resin films 60A and 60B can be improved.

[0063] In the areas where the substrate 10 faces the resin film 60A, excluding the areas where electronic components 20, 30, 40, and 50 are mounted—that is, in the areas where the resin film 60A can adhere to the substrate 10 due to its mobility—the proportion of the area actually adhering to the substrate 10 is defined as the proportion of the adhering area. As the number of air bubbles remaining between the substrate 10 and the resin films 60A and 60B decreases, the proportion of the adhering area increases. The proportion of the adhering area is preferably 80% or more, and more preferably 90% or more. On the back side of the substrate 10 where electronic components 20, 30, 40, and 50 are not mounted, the proportion of the adhering area between the resin film 60B and the substrate 10 is approximately 100%, depending on the presence or absence of wiring patterns.

[0064] (Function / Effect)

[0065] In the semiconductor device of this embodiment, the resin film, which conforms to the shape of the electronic component and is stacked on one side of the substrate, covering the electronic component, can improve the connection reliability between the electronic component and the substrate. In particular, when the substrate is a flexible substrate, the connection reliability can easily decrease due to the influence of substrate bending and substrate vibration. However, in the semiconductor device of this embodiment, the bending resistance, vibration resistance, and scratch resistance can be improved, thereby improving the connection reliability.

[0066] When a flexible substrate is used as the substrate, it can reduce weight and cost compared to using a rigid substrate, but sometimes the rigidity of the semiconductor device is reduced. As in this embodiment, by laminating resin films, the overall rigidity of the semiconductor device can be improved. In addition, flexible substrates are thinner than rigid substrates, thus having advantages such as high heat dissipation and high thermal conductivity. Especially when electronic components that consume high current are installed, the one with high heat dissipation is preferred. Furthermore, for example, when a temperature sensor is installed, the one with high thermal conductivity is preferred in terms of measuring the temperature of the object.

[0067] Furthermore, in the semiconductor device manufacturing method of this embodiment, a conductive paste is printed, electronic components are arranged, and the conductive paste is cured. This allows for the simultaneous formation of wiring and wiring connections, and the electronic components are fixed while being electrically connected to the cured wiring connections.

[0068] In the semiconductor device manufacturing method of this embodiment, the solder printing process is omitted, thus reducing the number of processes. Furthermore, the alignment adjustment between the wiring pattern and solder printing can be eliminated, simplifying the process. Moreover, since solder is not used, bonding problems between the wiring metal material and the solder caused by oxide coating are avoided. Furthermore, electronic components can be fixed and turned on at low temperatures below 130°C. By eliminating high-temperature processes, materials with low heat resistance can be selected as substrates. That is, general-purpose resin films such as PEN, PET, PLA, epoxy resin, and acrylic resin, which have lower heat resistance than polyimide, can be used. Therefore, they can be used as low-cost, colorless, and transparent flexible substrates. In addition, the risk of thermal damage to organic semiconductor components such as OTFTs caused by the mounting process is reduced.

[0069] Wiring 11 and wiring connection 12 can be formed by applying conductive paste according to a specified pattern using inkjet printing, spray printing, screen printing, or other printing methods. Screen printing is a low-cost and simple method for patterning conductive paste, and it has the following advantages in circuit wiring. Therefore, it is preferred to form wiring 11 and wiring connection 12 by screen printing.

[0070] Screen printing allows for printed patterns with thicknesses exceeding 10 μm, reducing wiring resistance. Furthermore, the equipment and printing plates are inexpensive, and the paste used in printing can be recycled, resulting in minimal loss and cost reduction. A wide range of conductive fillers with particle sizes from 0.1 μm to several tens of μm can be used, offering a broad selection of conductive pastes. Screen printing can be applied to films, fabrics, glass, metals, and other materials, providing a wide range of printing options. The curing process for conductive pastes can be carried out at temperatures below 130°C, and depending on the type of paste, at temperatures below 100°C. Multiple layers of conductive paste can be laminated, allowing for multi-layer wiring and the creation of intersecting wiring patterns. Line width / spacing accuracy can reach 50 μm / 50 μm, providing practical precision for electronic circuit wiring. Printing can be performed on scales from mm to m, accommodating various sizes.

[0071] In screen printing, there are two methods: using metal masks and using grid printing. Either method can be used. The grid printing method has the following advantages: Higher pattern precision than metal masks; ability to print densely lined and stenciled patterns; and high plate durability, allowing for repeated use and making it suitable for mass production.

[0072] [Second Implementation]

[0073] Figure 7 This is a cross-sectional view of the semiconductor device according to this embodiment. In the semiconductor device 2 of this embodiment, the resin film 60A is stacked only on the side of the substrate 10 on which the electronic components 20, 30, 40, and 50 are mounted, conforming to the shape of the electronic components 20, 30, 40, and 50 and covering them. The resin film is not stacked on the other side of the substrate 10. Except as described above, it is the same as in the first embodiment.

[0074] Figure 8 This is a cross-sectional view showing the process of manufacturing a semiconductor device according to this embodiment. Similar to the first embodiment, a conductive paste is printed on a substrate to form wiring and wiring connections. Electronic components are then placed on the substrate. After the conductive paste is cured, in the resin film lamination process, the resin film 60A is laminated only on the side of the substrate 10 where the electronic components 20, 30, 40, and 50 are mounted, conforming to the shape of the electronic components 20, 30, 40, and 50 and covering them. The resin film is not laminated on the other side of the substrate 10. Except as described above, it is the same as the first embodiment.

[0075] In the semiconductor device of this embodiment, the resin film, which conforms to the shape of the electronic component and is stacked on one side of the substrate, covering the electronic component, can improve the connection reliability between the electronic component and the substrate. In particular, when the substrate is a flexible substrate, the connection reliability can easily decrease due to the influence of substrate bending and substrate vibration. However, in the semiconductor device of this embodiment, the bending resistance, vibration resistance, and scratch resistance can be improved, thereby improving the connection reliability.

[0076] [First Improved Example]

[0077] Figure 9 This is a cross-sectional view illustrating the process of manufacturing a semiconductor device according to this improved example. (e.g.) Figure 9 As shown, in the process of laminating resin film 60A onto one side of substrate 10 and resin film 60B onto the other side of substrate 10, the resin films 60A and 60B are laminated onto one side and the other side of substrate 10 when the pressure P1 of the space on the substrate 10 side of resin films 60A and 60B is lower than the pressure P2 of the space on the opposite side of resin films 60A and 60B from substrate 10. That is, the pressure of each space divided by resin films 60A and 60B is adjusted by the Three-Dimensional Overlay Method (TOM). For example, the space on the substrate 10 side of resin films 60A and 60B is a vacuum or depressurized atmosphere, and the space on the opposite side of resin films 60A and 60B from substrate 10 is atmospheric pressure or a pressurized atmosphere. Except as described above, it is the same as in the first embodiment.

[0078] When resin films 60A and 60B are laminated using the TOM method as described above, that is, when resin films 60A and 60B are laminated under conditions where the pressure in the space on the substrate side of resin films 60A and 60B is lower than the pressure in the space on the opposite side of resin films 60A and 60B, residual air bubbles between the substrate 10 and resin films 60A and 60B can be almost eliminated. The proportion of the adhesive area between the substrate 10 and the resin film 60A is increased to 95% or more. The responsiveness of resin film 60A to electronic components 20, 30, 40, and 50 is improved, and the adhesiveness of resin film 60A to electronic components 20, 30, 40, and 50 and the substrate 10 is improved. On the back side of the substrate 10 where electronic components 20, 30, 40, and 50 are not mounted, the proportion of the adhesive area between resin film 60B and the substrate 10 is approximately 100%, depending on the presence or absence of wiring patterns.

[0079] [Second Improved Example]

[0080] Figure 10 This is a cross-sectional view illustrating the process of manufacturing a semiconductor device according to this improved example. (e.g.) Figure 10As shown, in the process of laminating the resin film 60A onto one side of the substrate 10, the resin film 60A is laminated onto one side of the substrate 10 while the pressure P1 of the space on the substrate 10 side of the resin film 60A is lower than the pressure P2 of the space on the opposite side of the resin film 60A from the substrate 10. Similar to the first improved example, the pressure of each space divided by the resin film 60A is adjusted using the TOM method. For example, the space on the substrate 10 side of the resin film 60A is a vacuum or depressurized atmosphere, while the space on the opposite side of the resin film 60A from the substrate 10 is atmospheric pressure or a pressurized atmosphere. Except as described above, it is the same as the second embodiment.

[0081] When the resin film 60A is laminated using the TOM method as described above, that is, when the pressure of the space on the substrate side of the resin film 60A is set to be lower than the pressure of the space on the opposite side of the resin film 60A from the substrate, the air bubbles remaining between the substrate 10 and the resin film 60A can be almost eliminated. The responsiveness of the resin film 60A to the electronic components 20, 30, 40, and 50 is improved, and the adhesion between the resin film 60A and the electronic components 20, 30, 40, and 50 and the substrate 10 is enhanced.

[0082] [First Embodiment]

[0083] Using a metal mask (50 μm thick), a thermosetting silver paste (viscosity 130 Pa·s) was screen-printed onto a polyimide (PI) film substrate (50 μm thick) to form uncured wiring and wiring connections. Resistors were placed in the uncured wiring connections, and the substrate was cured at 130°C for 30 minutes. By forming wiring and wiring connections on the substrate as described above, an assembly equipped with resistors was fabricated.

[0084] Regarding the accuracy of the wiring linewidth / spacing, an L / S accuracy of 200μm / 200μm was achieved. The resistance value on the circuit was measured using a tester to confirm that it met the specified resistance value of the resistor, ensuring continuity between the resistor and the wiring and wiring connections. Even after various load tests, including bending tests with a 10mm radius of curvature on the substrate (hereinafter referred to as "bending test"); tests using a vibrator to generate a 100Hz sine wave and apply approximately 10G acceleration vibration to the substrate for two hours (hereinafter referred to as "vibration test"); and tests involving scratching the resistor (specifically, pressing the resistor with the tip of tweezers) (hereinafter referred to as "scratching test"), the resistor did not detach. Furthermore, a cross-cut test of the wiring section, used to evaluate the adhesion of the silver paste, was performed, and no detachment was found.

[0085] Wiring and wiring connections are formed on the aforementioned substrate. For a component housing a resistor, a 50 μm thick PET film is laminated on both sides of the component in a vacuum. On the resistor mounting surface, the PET film follows the shape of the resistor and is laminated to cover the resistor. This further improves the reliability of the connection between the resistor and the wiring and wiring connections.

[0086] [Second Embodiment]

[0087] Using a metal mask (50 μm thick), a thermosetting silver paste (viscosity 130 Pa·s) was screen-printed onto a 125 μm thick substrate made of polyethylene naphthalate (PEN) to form uncured wiring and wiring connections. Seven temperature sensors were placed on the uncured wiring connections, and the substrate was cured at 130°C for 30 minutes. Wiring and wiring connections were formed on the substrate as described above to fabricate an assembly equipped with seven temperature sensors.

[0088] Regarding the accuracy of the wiring line width / spacing, an L / S accuracy of 350μm / 150μm was achieved. It was confirmed that the output of the temperature sensor on the circuit changes with the ambient temperature, and that continuity between the temperature sensor and the wiring and wiring connections was ensured. Even under various load tests, including bending tests, vibration tests, and scratch tests, the temperature sensor did not detach.

[0089] Wiring and wiring connections are formed on the aforementioned substrate. For a component housing a temperature sensor, a 50 μm thick PET film is laminated on both sides of the component in a vacuum. On the temperature sensor mounting surface, the PET film conforms to the shape of the temperature sensor and is laminated to cover the temperature sensor. This further improves the reliability of the connection between the temperature sensor and the wiring and wiring connections.

[0090] [Third Embodiment]

[0091] Using a metal mask (50 μm thick), a thermosetting carbon paste (viscosity 0.5 Pa·s) is spray-printed onto a polyimide (PI) film substrate (50 μm thick) to form wiring and wiring connections. The resistor is connected to the wiring connections by supplying the carbon paste through other means, thus creating an assembly with a resistor mounted on a substrate having wiring and wiring connections.

[0092] Regarding the component obtained as described above, the accuracy of the wiring line width / spacing was achieved at 200μm / 200μm. The resistance value on the circuit was measured using a tester and confirmed to be the resistance value specified for the resistor, ensuring continuity between the resistor and the wiring and wiring connections. Even when subjected to bending tests or vibration tests, the resistor did not detach. However, when subjected to scratch tests or tests where the resistor was bonded with tape (adhesive strength 3.93N / 10mm), the resistor detached.

[0093] Wiring and wiring connections are formed on the aforementioned substrate. For the assembly with a resistor, a 50 μm thick PET film is laminated on both sides of the assembly in a vacuum. On the resistor mounting surface, the PET film follows the shape of the resistor and covers it. When the PET film is laminated in a vacuum atmosphere as shown in this embodiment, compared to laminating the PET film in the atmosphere, air bubbles between the substrate, resistor, and PET film are reduced. Therefore, the adhesion between the PET film and the substrate and resistor is improved. Even when the assembly with the PET film laminated in this embodiment is subjected to bending tests or vibration tests, the resistor does not detach. Furthermore, in the assembly with the PET film laminated in this embodiment, even when the resistor is scratched or bonded with tape (adhesive strength 3.93 N / 10 mm), the resistor does not detach. Thus, the connection reliability between the resistor and the wiring and wiring connections can be further improved.

[0094] [Fourth Embodiment]

[0095] For the assembly described in the third embodiment, which has wiring and wiring connections formed on a substrate and a resistor mounted thereon, a 50 μm thick PET film is laminated on both sides of the assembly. Here, in the PET film lamination process, the space on the assembly side of the PET film is set to a vacuum atmosphere, and the space on the opposite side of the PET film is set to atmospheric pressure. On the resistor mounting surface, the PET film is laminated following the shape of the resistor and covering it. Here, as described above, the space on the assembly side of the PET film is set to a vacuum atmosphere, and the space on the opposite side of the PET film is set to atmospheric pressure, thereby virtually eliminating air bubbles between the substrate and the resistor and the PET film. On the resistor mounting surface side of the substrate, the proportion of the adhesive area between the substrate and the PET film is increased to 95%. Therefore, the adhesion between the PET film and the substrate and the resistor is further improved. In the assembly with the PET film of this embodiment laminated, even after bending tests, vibration tests, resistor scratching tests, or tests where the resistor is bonded using tape (adhesive strength 3.93 N / 10 mm), the resistor does not detach. This can further improve the reliability of the connection between the resistor and the wiring and wiring connection.

[0096] In the above embodiments and improvements, a semiconductor device incorporating multiple electronic components has been described, but it is not limited to this; a semiconductor device incorporating only one electronic component may also be described. Regarding the electronic components, electronic components including active components such as transistors and passive components such as resistors have been described, but an electronic component that includes both active and passive components within a single chip may also be described.

[0097] Explanation of reference numerals in the attached figures

[0098] 1, 2 Semiconductor Devices

[0099] 10 substrates

[0100] 11 wiring

[0101] 12 Wiring Connection Part

[0102] 20, 30, 40, 50 electronic components

[0103] 21, 31, 41, 52 semiconductor components

[0104] Electrodes 22, 23, 32, 33, 53, and 54

[0105] 42, 43 lead electrodes

[0106] 51 substrate

[0107] 60, 60A, 60B resin films

Claims

1. A semiconductor device, the semiconductor device comprising: A flexible substrate is provided with wiring and a wiring connection portion connected to the wiring; Electronic components are electrically connected to the wiring connection portion and fixed to the flexible substrate; and A resin film, conforming to the shape of the electronic component and covering the electronic component, is laminated on one side of the flexible substrate. The wiring and the wiring connection portion are formed from the same material and with the same thickness, and are obtained by printing and curing a thermosetting conductive paste with a curing temperature below 130°C. The electronic component is electrically connected to the wiring connection without sandwiching any material other than the material constituting the wiring connection between the wiring connection and the electrodes of the electronic component.

2. The semiconductor device according to claim 1, wherein, The electronic components include organic semiconductor components.

3. The semiconductor device according to claim 1, wherein, The flexible substrate is a multilayer wiring substrate.

4. The semiconductor device according to any one of claims 1 to 3, wherein, The resin film is further laminated on the other side of the flexible substrate.

5. A method for manufacturing a semiconductor device, the method comprising: The process of setting wiring and wiring connection portions connected to the wiring on a flexible substrate; The process of electrically connecting electronic components to the wiring connection portion and fixing them to the flexible substrate; as well as The process of laminating a resin film that follows the shape of the electronic component and covers the electronic component onto one side of the flexible substrate. In the process of setting the wiring and the wiring connection, a thermosetting conductive paste with a curing temperature of 130°C or lower is printed to simultaneously form uncured wiring and uncured wiring connection. In the process of fixing the electronic component to the flexible substrate, the electronic component is placed at the wiring connection portion before the conductive paste cures. Then, a curing process is performed to cure the wiring and the wiring connection portion formed by the uncured conductive paste. While the conductive paste is curing, the electronic component is electrically connected to the cured wiring connection portion and fixed in place. In the process of laminating the resin film onto one side of the flexible substrate, the pressure of each space divided by the resin film is adjusted by a three-dimensional surface finishing method. The resin film is laminated onto one side of the flexible substrate when the pressure of the space on the flexible substrate side of the resin film is lower than the pressure of the space on the opposite side of the flexible substrate.

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