Methods, apparatuses, and media for layout processing

Abstract

Example embodiments according to the present disclosure provide methods, devices and media for layout processing. In the method, a perturbation pattern of a layout is divided into a plurality of sub-patterns. The method also includes determining, for each sub-pattern, a perturbation signal component. The perturbation signal component is used to simulate a change in an optical signal caused by the sub-pattern in a wafer in a case where photolithography is performed based on the layout. The method further includes optimizing the layout based on the plurality of perturbation signal components respectively determined for the plurality of sub-patterns. In this way, the quality of the layout can be improved by analyzing the impact of each sub-pattern of the perturbation pattern on the change in the optical signal.

Description

Technical Field

[0001] The embodiments of this disclosure relate primarily to the field of integrated circuits, and more specifically, to methods, apparatus, and media for layout processing. Background Technology

[0002] A circuit layout (or simply layout) is a series of geometric figures derived from a designed and simulated optimized circuit. It contains physical information data related to the device, such as integrated circuit dimensions and layer topology definitions. Integrated circuit manufacturers use this data to create masks. The layout pattern on the mask determines the dimensions of the devices or interconnecting physical layers on the chip.

[0003] As the technology node of integrated circuit manufacturing processes shrinks, the distance between target patterns in integrated circuits decreases, while the density of the corresponding layout patterns on the mask increases. Because light waves diffract at the layout patterns on the mask, the actual formed pattern is distorted compared to the layout pattern. To address this, Optical Proximity Correction (OPC) has been proposed to adjust the mask layout pattern to form the desired target pattern. Determining the position of each pattern in the layout adjusted by OPC is a crucial issue. Summary of the Invention

[0004] In a first aspect of this disclosure, a method for layout processing is provided. In this method, a perturbation pattern of a layout is divided into multiple sub-patterns. The method further includes determining a perturbation signal component for each sub-pattern. The perturbation signal component is used to simulate the optical signal variation caused by that sub-pattern in the wafer during photolithography based on the layout. The method also includes optimizing the layout based on the multiple perturbation signal components determined separately for each of the multiple sub-patterns. In this way, the quality of the layout can be improved by analyzing the influence of each sub-pattern of the perturbation pattern on the optical signal variation.

[0005] In a second aspect of this disclosure, an electronic device is provided. The electronic device includes a processor and a memory coupled to the processor. The memory has instructions stored therein, which, when executed by the processor, cause the electronic device to perform a method for layout processing according to a first aspect of this disclosure.

[0006] In a third aspect of this disclosure, a computer-readable storage medium is provided. A computer program is stored on the computer-readable storage medium. When executed by a processor, the computer program implements a method for layout processing according to a first aspect of this disclosure.

[0007] According to embodiments of this disclosure, the perturbation pattern of a layout is divided into multiple sub-patterns. In some embodiments, each sub-pattern is sufficiently small. Multiple sufficiently small sub-patterns can be used to jointly simulate the perturbation pattern. According to embodiments of this disclosure, the optical signal changes caused by each sub-pattern in the wafer during the simulation of layout-based photolithography are determined. The optical signal changes caused by the corresponding sub-pattern are represented by perturbation signal components. The layout is optimized based on the multiple perturbation signal components determined for each sub-pattern. By considering multiple perturbation signal components during layout optimization, subsequent OPC convergence is easier, ultimately improving the overall photolithography yield. Specifically, the patterns in the layout can be moved according to the multiple perturbation signal components to ensure that the pattern formed on the wafer after photolithography is as consistent as possible with the desired wafer pattern obtained from the layout.

[0008] It should be understood that the content described in this summary section is not intended to limit the key or essential features of the embodiments of this disclosure, nor is it intended to restrict the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0009] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. In the drawings, the same or similar reference numerals denote the same or similar elements, wherein:

[0010] Figure 1 A schematic diagram of an example environment in which the various embodiments of this disclosure can be implemented is shown;

[0011] Figure 2 A flowchart of a method for layout processing according to some embodiments of the present disclosure is shown;

[0012] Figure 3 A schematic diagram illustrating the division of a perturbation pattern into multiple sub-patterns according to some embodiments of the present disclosure is shown;

[0013] Figure 4 A schematic diagram illustrating the result of processing a layout according to some embodiments of the present disclosure is shown;

[0014] Figure 5 A block diagram of an electronic device / server in which one or more embodiments of the present disclosure may be implemented is shown. Detailed Implementation

[0015] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0016] In the description of embodiments of this disclosure, the term "comprising" and similar terms should be understood as open-ended inclusion, i.e., "including but not limited to". The term "based on" should be understood as "at least partially based on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0017] As integrated circuit manufacturing technology nodes shrink, the three-dimensional effect (M3D) of masks needs to be considered due to their inherent thickness. Specifically, the interaction between the mask and incident light cannot be ignored; for example, the electromagnetic interaction between the incident light and the mask material, and the influence of the mask on the polarization properties of the incident light. Currently, OPC (Optical Process Control) has been proposed to adjust the mask layout for M3D. However, determining the optimal positions of each pattern within the layout remains a significant challenge. Current OPC methods for M3D are still not entirely satisfactory.

[0018] Therefore, embodiments of this disclosure propose a method for layout processing. According to embodiments of this disclosure, a perturbation pattern of the layout is divided into multiple sub-patterns. In some embodiments, each sub-pattern is sufficiently small. Multiple sufficiently small sub-patterns can be used to jointly simulate the perturbation pattern. According to embodiments of this disclosure, the optical signal changes caused by each sub-pattern in the wafer under simulated layout-based photolithography are determined. The optical signal changes caused by the corresponding sub-pattern are represented by perturbation signal components. The layout is optimized based on the multiple perturbation signal components determined for each sub-pattern. By considering multiple perturbation signal components during layout optimization, subsequent OPC convergence is easier, ultimately improving the overall photolithography yield. Specifically, the patterns in the layout can be moved according to the multiple perturbation signal components to ensure that the pattern formed on the wafer after photolithography is as consistent as possible with the desired wafer pattern obtained from the layout.

[0019] The following will describe in detail various example implementations of this scheme with reference to the accompanying drawings.

[0020] First see Figure 1The illustration shows a schematic diagram of an example environment 100 in which the various embodiments of the present disclosure can be implemented. Example environment 100 may generally include an electronic device 110. In some embodiments, electronic device 110 may be a computing device such as a personal computer, workstation, server, etc. The scope of the present disclosure is not limited in this respect.

[0021] Electronic device 110 receives a layout 120 (also called a "mask layout") as input. The layout 120 includes a pattern 122 to be processed (also called a target pattern to be processed) and a first perturbation pattern 124. It is desired that a pattern corresponding to the target pattern 122 can be obtained on the wafer after photolithography. The first perturbation pattern 124 is applied to the layout 120 to perform perturbation signal analysis to adjust the target pattern 122 in the layout 120. The first perturbation pattern 124 typically has a smaller size than the target pattern 122. It should be understood that... Figure 1 The shapes, sizes, and numbers of the various layouts, masks, target graphics, and perturbation graphics shown are merely exemplary and not limiting. The scope of this disclosure is not limited in this respect.

[0022] Electronic device 110 processes layout 120 to obtain processed layout 130. Processed layout 130 includes processed graphic 132 (also referred to as processed target graphic). Compared to the graphic 122 in layout 120, the size and / or position of processed graphic 132 in processed layout 130 has changed. For example, processed graphic 132 in processed layout 130 is the output graphic after OPC, which can also be referred to as the "OPC-post-graphic". The aforementioned changes in size and / or position of processed graphic 132 compared to graphic 122 can be determined by electronic device 110. In other words, the displacement during the OPC process can be determined by electronic device 110. This will be discussed in conjunction with... Figures 2 to 3 The process of adjusting the graphic to be processed in the layout or the OPC process is described in further detail.

[0023] Figure 2 A flowchart of a method 200 for layout processing according to some embodiments of the present disclosure is shown. In some embodiments, method 200 may be performed by, for example... Figure 1 The illustrated electronic device 110 performs this action. It should be understood that method 200 may also include additional boxes not shown and / or some (or some) of the boxes shown may be omitted, and the scope of this disclosure is not limited in this respect.

[0024] In box 210, electronic device 110 divides the perturbation pattern of the layout into multiple sub-patterns. For example, electronic device 110 acquires a layout 120 to be processed. Electronic device 110 divides the first perturbation pattern 124 in the layout 120 to be processed into multiple sub-patterns. Figure 1 In the example of the first perturbation pattern 124 of the rectangular shape, the multiple sub-patterns can be multiple smaller rectangles, multiple smaller squares, or other sub-patterns of appropriate shapes.

[0025] Figure 3 A schematic diagram illustrating the division of a perturbation pattern into multiple sub-patterns according to some embodiments of the present disclosure is shown. Figure 3 The first version 300 is shown in the figure. The first version 300 is... Figure 1 An example of the layout 120 to be processed is shown in the first layout 300. Multiple target graphics are shown, namely, first target graphic 302-1, second target graphic 302-2, ..., third target graphic 302-N, where N is any positive integer. In this document, first target graphic 302-1, second target graphic 302-2, ..., third target graphic 302-N can be collectively referred to as "target graphic 302," or simply as "target graphic 302." Target graphic 302 can be... Figure 1 An example of the pattern 122 to be processed is shown. It is expected that the first layout 300, after photolithography, will produce patterns on the wafer corresponding to a plurality of target patterns 302. A second perturbation pattern 310 is also presented in the first layout 300. The second perturbation pattern 310 may be an example of the first perturbation pattern 124. The size of the second perturbation pattern 310 is smaller than the size of the target patterns 302. The second perturbation pattern 310 may be applied to any location in the first layout 300. The second perturbation pattern 310 may have any suitable shape and size. In some embodiments, the shape and size of the second perturbation pattern 310, and the location where the second perturbation pattern 310 is applied in the first layout 300, may be determined by the user. The scope of this disclosure is not limited in this respect.

[0026] As an example, the electronic device 110 may divide the second perturbation pattern 310 into multiple sub-patterns, including a first sub-pattern 311-1, a second sub-pattern 311-2, a third sub-pattern 311-3, a fourth sub-pattern 311-4, and a fifth sub-pattern 311-5. For illustrative purposes, the first sub-pattern 311-1, the second sub-pattern 311-2, the third sub-pattern 311-3, the fourth sub-pattern 311-4, and the fifth sub-pattern 311-5 may be collectively referred to as sub-pattern 311, or individually referred to as sub-pattern 311. It should be understood that the above division is merely exemplary and not restrictive. The second perturbation pattern 310 may be divided into more or fewer sub-patterns. The shape of the sub-patterns may also be other suitable shapes besides rectangles, such as arbitrary polygons. The dimensions of the individual sub-patterns 311 may be the same or different.

[0027] In some embodiments, the individual sub-patterns 311 of the second perturbation pattern 310 are sufficiently small. As an example, a threshold size can be set for the sub-patterns 311 of the second perturbation pattern 310. The threshold size can be predefined by the user or entered by the user in real time. The electronic device 110 can divide the second perturbation pattern 310 according to the threshold size, such that the size of each sub-pattern 311 of the second perturbation pattern 310 is smaller than the threshold size. By dividing the second perturbation pattern 310 into multiple sub-patterns 311 smaller than the threshold size, the optical signal variation caused by the entire second perturbation pattern 310 in the wafer during photolithography can be estimated from these sufficiently small sub-patterns 311. The analysis process of the optical signal variation caused by the second perturbation pattern 310 will be described in detail below.

[0028] By setting a smaller threshold size, the second perturbation pattern 310 can be divided into more sub-patterns. Dividing the second perturbation pattern 310 into more sub-patterns allows for a more precise simulation of the optical signal impact of the second perturbation pattern 310 on the layout. Conversely, dividing the second perturbation pattern 310 into fewer sub-patterns simplifies calculations. The same threshold size or different threshold sizes can be set for different layouts. An appropriate threshold size can be set based on the graphic characteristics and constraints of the layout, thereby dividing the second perturbation pattern 310 into a suitable number of sub-patterns. For example, a relatively large threshold size can be set for layouts with larger sizes or less stringent constraints, while a smaller threshold size can be set for layouts with smaller sizes or more stringent constraints. This approach ensures both a more precise simulation of the optical signal impact of the second perturbation pattern 310 and simplified calculations.

[0029] Continue to refer to Figure 2In block 220, electronic device 110 determines a perturbation signal component for each sub-pattern. The perturbation signal component is used to simulate the change in optical signal caused by that sub-pattern in the wafer during layout-based photolithography. As an example, the optical signal can be the light intensity itself. Alternatively, the optical signal can be other forms of light intensity, such as the square of the light intensity, the logarithm of the light intensity, or other parameters related to light intensity. In some embodiments, electronic device 110 determines a perturbation signal component for each sub-pattern 311 of the second perturbation pattern 310 in the first layout 300.

[0030] In some embodiments, if the size of the sub-pattern 311 is sufficiently small (e.g., smaller than a threshold size), the sub-pattern 311 can be represented by feature points. The feature points of the sub-pattern 311 can be points that can represent the sub-pattern 311, such as the center point of the sub-pattern 311, a vertex of the sub-pattern 311, or other points associated with the sub-pattern 311. The electronic device 110 can determine the perturbation signal components for each sub-pattern 311 of the second perturbation pattern 310 in the first layout 300 based on the feature points of that sub-pattern 311.

[0031] As an example, the feature point of the first sub-figure 311-1 can be the first center point 321-1 of the first sub-figure 311-1; the feature point of the second sub-figure 311-2 can be the second center point 321-2 of the second sub-figure 311-2; the feature point of the third sub-figure 311-3 can be the third center point 321-3 of the third sub-figure 311-3; the feature point of the fourth sub-figure 311-4 can be the fourth center point 321-4 of the fourth sub-figure 311-4; and the feature point of the fifth sub-figure 311-5 can be the fifth center point 321-5 of the fifth sub-figure 311-5. The first center point 321-1, the second center point 321-2, the third center point 321-3, the fourth center point 321-4, and the fifth center point 321-5 can be collectively referred to as "center point 321" or individually referred to as "center point 321".

[0032] It should be understood that Figure 3 The selection of feature points for the sub-figures shown is merely exemplary and not restrictive. Feature points for the sub-figures can also be selected as any points capable of representing the sub-figure, and the scope of this disclosure is not limited in this respect. Furthermore, the number of feature points for the sub-figures can also be arbitrary. For example, one or more of the four vertices of the first sub-figure 311-1 can be determined as feature points of the first sub-figure 311-1. The scope of this disclosure is not limited in this respect.

[0033] Taking the first sub-figure 311-1 as an example, the coordinates of the feature point of the first sub-figure 311-1, namely the first center point 321-1, are represented as (x... p y pThe optical signal caused by the first sub-pattern 311-1 can be expressed as equation (1) (also known as the kernel convolution formula):

[0034]

[0035] Where I(x, y) represents the optical signal; m represents the target graphic in the first layout 300; δ(x p y p ) represents the mathematical representation of the first subfigure 311-1, in (x p y p ) at δ(x p y p ) can be 1, and δ can be 0 at other coordinate positions; k i This represents the i-th reference convolution kernel (also known as the model kernel), where i = 1, 2, ..., N, and N represents the number of reference convolution kernels. The reference convolution kernel is used to describe the imaging of the optical system. Re represents the convolution operation; Re{} represents the operation of extracting the real part.

[0036] In some embodiments, m may represent a target graphic in the first layout 300, such as a first target graphic 302-1. The optical signal associated with the first target graphic 302-1 caused by the first sub-graphic 311-1 can be calculated according to equation (1). For other target graphics 302, a similar calculation can be performed. By adding the optical signals caused by the first sub-graphic 311-1 associated with each target graphic 302, the optical signal caused by the first sub-graphic 311-1 on the first layout 300 can be obtained. It should be understood that in some embodiments, m may also represent a set of multiple target graphics 302 in the first layout 300. In the example where m represents a set of multiple target graphics 302, the optical signal caused by the first sub-graphic 311-1 on the first layout 300 can be determined by equation (1).

[0037] In some embodiments, electronic device 110 determines three-dimensional structural information related to a mask used for photolithography. As an example, the three-dimensional structural information may include the mask's geometry, mask thickness, etc. Electronic device 110 may query a convolution kernel from a reference library about optical signals based on the three-dimensional structural information. Phase shift with light Therefore, I(x, y) is determined according to equation (1). The reference library for the optical signal can be pre-calculated considering the three-dimensional structural information related to the mask.

[0038] In some embodiments, the first two terms in equation (1) are taken into account. and The value is usually small, and can be calculated by the third term. This is used to characterize optical signals. In this way, the calculation of optical signals can be simplified.

[0039] By employing equation (1) above, the optical signals caused by each sub-pattern 311 of the second perturbation pattern 310 can be obtained, and these optical signals can be used as perturbation signal components of the sub-pattern 311. By summing or weighted summing the perturbation signal components caused by each sub-pattern 311, the optical signal change caused by the second perturbation pattern 310 can be obtained. By dividing the perturbation pattern into sufficiently small sub-patterns, the optical signal change caused by the perturbation pattern in the wafer can be determined using the feature points of each sub-pattern. Therefore, by dividing the perturbation pattern into multiple sufficiently small sub-patterns, optical signal change analysis can be performed, which can then be used to optimize the layout in subsequent processes.

[0040] In some embodiments, measurement points are provided on the layout. These measurement points can be user-specified coordinate points on the layout. The electronic device 110 shares the optical signal at the wafer location corresponding to the measurement point. For example, the user can pre-set one or more measurement points on the layout based on its graphic features, constraints, etc. Figure 3 In the example, measurement point 330 is set on the first layout 300. It should be understood that... Figure 3 The locations and number of measurement points shown are merely exemplary and not limiting. Measurement points can be placed at any suitable location in the first layout 300. The first layout 300 may include any number of measurement points. Measurement points can be located inside or outside the target graphic 302 in the first layout 300. The scope of this disclosure is not limited in this respect.

[0041] In an embodiment where a measurement point 330 is provided in the first layout 300, the perturbation signal component of the sub-pattern 311 of the second perturbation pattern 310 may include a measurement point component corresponding to the measurement point 330 in the first layout 300. The measurement point component is used to simulate the optical signal change caused by the sub-pattern 311 at the wafer position corresponding to the measurement point when photolithography is performed based on the first layout 300. Specifically, the sub-pattern 311 at any coordinate point in the first layout 300 will cause a change in the optical signal at the corresponding position on the wafer. This solution focuses on the change in the optical signal at the corresponding position on the wafer caused by the sub-pattern 311 at the measurement point 330 in the first layout 300.

[0042] In some embodiments, for sub-pattern 311, electronic device 110 can determine a convolution kernel corresponding to measurement point 330. This convolution kernel is a quantitative representation of optical properties associated with photolithography.

[0043] In some embodiments, electronic device 110 determines three-dimensional structural information related to a mask used for photolithography. As an example, the three-dimensional structural information may include the mask's geometry, thickness, etc. Electronic device 110 can then determine the optical phase shift caused by the three-dimensional structure of the mask based on the three-dimensional structural information. Based on the optical phase shift and a reference convolutional kernel, electronic device 110 can determine a convolutional kernel corresponding to measurement point 330. In some embodiments, the optical phase shift is read from an optical phase shift offset library. The reference convolutional kernel may also be read from a convolutional kernel library. The optical phase shift offset library and the convolutional kernel library may be pre-computed considering the three-dimensional structural information related to the mask. The optical phase shift offset library may be pre-computed or pre-determined considering the three-dimensional structural information related to the mask. Similarly, the convolutional kernel library may also be pre-computed or pre-determined considering the three-dimensional structural information related to the mask.

[0044] Next, the electronic device 110 can determine the measurement point components based on the convolution kernel, the first coordinate information of the measurement point 330 in the first layout 300, and the second coordinate information of the sub-graphic 311 in the first layout 300.

[0045] As an example, the first coordinate information of measurement point 330 in the first layout 300 can be the specific coordinates of measurement point 330 in the first layout 300, in terms of (x... e y e The first coordinate information of the measurement point 330 in the first layout 300 may also be the relative coordinate information of the measurement point 330 with respect to a target graphic 302 in the first layout 300. The scope of this disclosure is not limited in this respect.

[0046] As an example, the second coordinate information of sub-graphic 311 in the first version 300 can be the feature points of sub-graphic 311, such as the specific coordinates (x, y, y) of the center point 321. p y p In other embodiments, the second coordinate information of the sub-graphic 311 in the first layout 300 may also be the relative coordinate information of the feature point or center point 321 with respect to a target graphic 302 in the first layout 300. In embodiments where the sub-graphic 311 has multiple feature points, the second coordinate information of the sub-graphic 311 in the first layout 300 may be the specific coordinates or relative coordinates of each feature point. The scope of this disclosure is not limited in this respect.

[0047] In some embodiments, the electronic device 110 may use the following formula (2) to determine the measurement point components of the sub-graphic 311 based on the convolution kernel, the first coordinate information of the measurement point 330 in the first layout 300, and the second coordinate information of the sub-graphic 311 in the first layout 300.

[0048]

[0049] Where P represents the measurement point component of sub-graphic 311; (x e y e () represents the first coordinate information of measurement point 330; x p and y p This indicates the second coordinate information of sub-graphic 311; This represents the convolution kernel corresponding to measurement point 330, k. i This represents the i-th reference convolution kernel, where i = 1, 2, ..., N, and N represents the number of reference convolution kernels. The reference convolution kernels are used to describe the imaging of the optical system. Re represents the convolution operation; Re{} represents the operation of taking the real part. In some embodiments, the electronic device 110 can determine the convolution kernel from a library related to the convolution kernel based on the three-dimensional structural information related to the mask used for photolithography. The aforementioned libraries of convolution kernels can be pre-computed, taking into account the three-dimensional structural information related to the mask.

[0050] The above describes several determination processes for the perturbation signal components of the sub-pattern 311 by the electronic device 110. In block 230, the electronic device 110 optimizes the first layout 300 based on the multiple perturbation signal components determined for each of the multiple sub-patterns 311. By considering multiple perturbation signal components during the optimization process of the first layout 300, subsequent OPC convergence is easier, ultimately improving the overall lithography process yield.

[0051] In some embodiments, the electronic device 110 may determine a perturbation signal caused by a perturbation pattern based on multiple perturbation signal components. The perturbation signal is used to simulate the optical signal change caused by the second perturbation pattern 310 in the wafer when photolithography is performed based on the first pattern 300. In some embodiments, the electronic device 110 may add multiple perturbation signal components of multiple sub-patterns 311 as a perturbation signal. As an example, the electronic device 110 may add multiple perturbation signal components determined using equation (1) as a perturbation signal.

[0052] In some embodiments, at least two of the plurality of sub-patterns 311 have different sizes. In such embodiments, the weights of the plurality of sub-patterns 311 can be determined based on their respective sizes. The electronic device 110 can then determine a weighted sum of the plurality of perturbation signal components as a perturbation signal based on these weights.

[0053] Alternatively or additionally, in embodiments where measurement points 300 are provided on the first layout 300, after determining the measurement point components of each sub-pattern 311, the electronic device 110 can determine the measurement point perturbation signal of the entire second perturbation pattern 310 at measurement point 330 based on these measurement point components, as a perturbation signal. The measurement point perturbation signal is used to simulate the change in optical signal caused by the second perturbation pattern 310 at the wafer position corresponding to the measurement point 330 when photolithography is performed based on the first layout 300.

[0054] In some embodiments, the electronic device 110 can determine the disturbance signal of the second disturbance pattern 310 at measurement point 330 by summing the measurement point components of each sub-pattern. For example, such a constant summation rate can be expressed as the following equation (3):

[0055]

[0056] in, This represents the disturbance signal of the second disturbance pattern 310 at measurement point 330.

[0057] Similarly, in embodiments where multiple sub-patterns 311 have different sizes, the electronic device 110 can determine the disturbance signal of the second disturbance pattern 310 at measurement point 330 by weighted summation of the measurement point components of each sub-pattern 311 or other appropriate calculations. This disclosure does not limit the method of calculating the disturbance signal.

[0058] By employing various reference libraries that are pre-calculated or pre-determined considering the three-dimensional structural information related to the mask to determine the perturbation signal of the perturbation pattern, the determined perturbation signal can characterize the M3D effect of the mask. It should be understood that the various libraries shown herein can be pre-determined or pre-calculated in any suitable manner. The libraries can be saved in any data format or form. The libraries can store various calculation results at different coordinate positions for the three-dimensional structural information of different masks. The electronic device 110 can query the required results in various libraries using the three-dimensional structural information of the mask. The scope of this disclosure is not limited in this respect.

[0059] The above describes the process of analyzing the impact of a perturbation pattern on changes in the optical signal (i.e., the perturbation signal of the perturbation pattern) by dividing the perturbation pattern into multiple sub-patterns. Next, in box 230, the electronic device 110 can optimize the first layout 300 based on the perturbation signal of the perturbation pattern.

[0060] As an example, electronic device 110 can calculate the direction and magnitude of the displacement of the target pattern 302 during the OPC process based on a perturbation signal. OPC is a layout optimization process that optimizes a mask layout to make the obtained wafer pattern as close as possible to a target pattern, such as target pattern 302. Electronic device 110 can calculate the displacement of the OPC process based on a perturbation signal to make the obtained wafer pattern as close as possible to target pattern 302. Any existing or future developed method can be used to determine the direction and magnitude of the displacement of the target pattern 302 based on the perturbation signal. The scope of this disclosure is not limited in this respect.

[0061] As a general example, electronic device 110 can determine an imaging cost function for the first pattern 300. The imaging cost can be used to represent the cost of the photolithography process. For example, the imaging cost can represent the difference between a pattern formed on a wafer using a mask under photolithography process parameters and the pattern expected to be formed on the wafer. A perturbation signal of the second perturbation pattern 310 can be used as a parameter of the imaging cost function.

[0062] As an example, the following equation (4) can be used as the imaging cost function:

[0063] Cost(x,y)=(I(x,y)-threshold) 2 (4)

[0064] Where (x,y) refers to the coordinate position on the map, for example (x,y) can include the coordinate positions of various measurement points; Cost(x,y) refers to the imaging cost at that coordinate position; I(x,y) refers to the light signal at that position, which can be determined by the light signal caused by the target pattern on the map at that position and the perturbation signal of the second perturbation pattern 310 at that position; threshold refers to the expected light signal at that coordinate position. It should be understood that equation (4) is merely exemplary, and the imaging cost can also be determined using other appropriate functions.

[0065] In some embodiments, the electronic device 110 can determine the direction and / or magnitude of the displacement of the target pattern 302 by minimizing the imaging cost function or obtaining a smaller value than a predetermined cost threshold. That is, during the OPC process, a perturbation signal can be considered in the imaging cost function to obtain a displacement of the target pattern 302 that reduces the imaging cost. In the example using Equation (4) as the example imaging cost function, by minimizing the imaging cost function, the optical signal, such as the light intensity, corresponding to each measurement point on the wafer can be made as close as possible to the optical signal expected at the corresponding measurement point.

[0066] By adjusting the position of the target pattern 302 based on the perturbation signal, the imaging cost of the first pattern 300 can be reduced. By reducing the imaging cost of the first pattern 300, the difference between the pattern formed on the wafer and the desired pattern formed on the wafer is reduced. In other words, the quality of the first pattern 300 and the mask is improved.

[0067] The above describes several examples of determining the perturbation signal of the second perturbation pattern 310 based on each perturbation signal component and optimizing the first layout 300 based on the perturbation signal. In some embodiments, the electronic device 110 can optimize the first layout 300 based on each perturbation signal component without determining the perturbation signal of the second perturbation pattern 310 based on each perturbation signal component.

[0068] As an example, electronic device 110 can determine the displacement vector components of the target pattern 302 based on each disturbance signal component. The displacement vector can represent the direction and magnitude of the displacement. Electronic device 110 can then sum, weighted sum, or perform other calculations on the determined multiple displacement vector components to determine the displacement vector of the target pattern 302. Electronic device 110 then adjusts the position of the target pattern 302 in the first layout 300 based on the displacement vector.

[0069] Similarly, the electronic device 110 can use multiple perturbation signal components of multiple sub-patterns 311 of the second perturbation pattern 310 as parameters of the imaging cost function. The electronic device 110 can determine the direction and / or magnitude of the displacement of the target pattern 302 by minimizing the imaging cost function or obtaining a smaller value less than a predetermined cost threshold. That is, multiple perturbation signal components can be considered in the imaging cost function during the OPC process to obtain the displacement of the target pattern 302 that reduces the imaging cost.

[0070] By adjusting the position of the target pattern 302 based on the perturbation signal components, the imaging cost of the first pattern 300 can be reduced. By reducing the imaging cost of the first pattern 300, the difference between the pattern formed on the wafer and the desired pattern formed on the wafer is reduced. In other words, the quality of the first pattern 300 and the mask is improved.

[0071] On the other hand, by employing various reference libraries that are pre-calculated or pre-determined considering the three-dimensional structural information related to the mask to determine the perturbation signal or perturbation signal component of the perturbation pattern, it is possible to make the determined perturbation signal or perturbation signal component characterize the M3D effect of the mask. Therefore, the layout optimized based on the perturbation signal or perturbation signal component takes into account the M3D effect of the mask, thereby forming a satisfactory pattern on the wafer.

[0072] The above combination Figure 2 and Figure 3Several examples of layout processing according to embodiments of the present disclosure are described. In this manner, by considering multiple perturbation signal components during layout optimization, subsequent OPC convergence is easier, ultimately improving the overall lithography yield. Specifically, during OPC, the target pattern in the layout can be moved based on the analysis of multiple perturbation signal components of multiple sub-patterns of the perturbation pattern. Alternatively, the target pattern in the layout can be moved during OPC based on the analysis of perturbation signals of the perturbation pattern. By moving the target pattern in this way, the imaging cost of the layout can be reduced, and satisfactory patterns can be formed on the wafer.

[0073] Figure 4 A schematic diagram illustrating the result of processing a layout according to some embodiments of the present disclosure is shown. Figure 4 The diagram illustrates a first original graphic 410, a second original graphic 420, a third original graphic 430, and a fourth original graphic 440. Original graphics, also referred to as original target graphics, are used to refer to graphics on an unprocessed layout. After processing the various original graphics on the layout according to embodiments of this disclosure, multiple optimized graphics can be obtained. For example, the first original graphic 410 can be adjusted to a first optimized graphic 415, the second original graphic 420 can be adjusted to a second optimized graphic 425, the third original graphic 430 can be adjusted to a third optimized graphic 435, and the fourth original graphic 440 can be adjusted to a fourth optimized graphic 445.

[0074] By comparing and optimizing the original graphics in the layout, the imaging cost of the layout can be reduced. In other words, by moving or adjusting the graphics in the layout according to the embodiments of this disclosure, the quality of the layout can be improved.

[0075] Figure 5 A block diagram is shown in which an electronic device / server 500 in which one or more embodiments of the present disclosure may be implemented. This electronic device / server 500 may, for example, be used to implement... Figure 1 The electronic device 110 shown. It should be understood that, Figure 5 The electronic device / server 500 shown is merely exemplary and should not be construed as limiting the functionality and scope of the embodiments described herein.

[0076] like Figure 5As shown, the electronic device / server 500 is in the form of a general-purpose electronic device. Components of the electronic device / server 500 may include, but are not limited to, one or more processors 510 or processing units, memory 520, storage devices 530, one or more communication units 540, one or more input devices 550, and one or more output devices 560. The processing unit may be a physical or virtual processor and is capable of performing various processes according to programs stored in memory 520. In a multiprocessor system, multiple processing units execute computer-executable instructions in parallel to improve the parallel processing capability of the electronic device / server 500.

[0077] Electronic device / server 500 typically includes multiple computer storage media. Such media can be any available media accessible to electronic device / server 500, including but not limited to volatile and non-volatile media, removable and non-removable media. Memory 520 can be volatile memory (e.g., registers, cache, random access memory (RAM)), non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory), or some combination thereof. Storage device 530 can be removable or non-removable media and can include machine-readable media, such as flash drives, disks, or any other media that can be used to store information and / or data (e.g., training data for training) and can be accessed within electronic device / server 500.

[0078] The electronic device / server 500 may further include additional removable / non-removable, volatile / non-volatile storage media. Although not explicitly stated... Figure 5 As shown, disk drives for reading from or writing to removable, non-volatile disks (e.g., "floppy disks") and optical disk drives for reading from or writing to removable, non-volatile optical disks can be provided. In these cases, each drive can be connected to a bus (not shown) via one or more data media interfaces. Memory 520 may include computer program product 525 having one or more program modules configured to perform various methods or actions of various embodiments of this disclosure.

[0079] The communication unit 540 enables communication with other electronic devices via a communication medium. Additionally, the functionality of the components of the electronic device / server 500 can be implemented as a single computing cluster or multiple computing machines capable of communicating via communication connections. Therefore, the electronic device / server 500 can operate in a networked environment using logical connections to one or more other servers, network personal computers (PCs), or another network node.

[0080] Input device 550 can be one or more input devices, such as a mouse, keyboard, trackball, etc. Output device 560 can be one or more output devices, such as a monitor, speaker, printer, etc. Electronic device / server 500 can also communicate with one or more external devices (not shown) via communication unit 540 as needed. These external devices, such as storage devices, display devices, etc., can communicate with one or more devices that enable user interaction with electronic device / server 500, or with any device (e.g., network card, modem, etc.) that enables electronic device / server 500 to communicate with one or more other electronic devices. Such communication can be performed via input / output (I / O) interfaces (not shown).

[0081] According to an exemplary implementation of this disclosure, a computer-readable storage medium is provided that stores one or more computer instructions, wherein the one or more computer instructions are executed by a processor to implement the methods described above.

[0082] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products implemented according to this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0083] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processing unit of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0084] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions that execute on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0085] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0086] Various implementations of this disclosure have been described above. The foregoing description is exemplary and not exhaustive, nor is it limited to the disclosed implementations. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described implementations. The terminology used herein is chosen to best explain the principles, practical applications, or improvements to technology in the market, or to enable others skilled in the art to understand the implementations disclosed herein.

Claims

1. A layout processing method, characterized in that, include: The perturbation pattern of the layout is divided into multiple sub-patterns, and the size of each sub-pattern is smaller than the threshold size; For each sub-pattern, a perturbation signal component is determined, which is used to simulate the change in optical signal caused by the sub-pattern in the wafer when photolithography is performed based on the layout; as well as The layout is optimized based on the multiple perturbation signal components determined for each of the multiple sub-patterns.

2. The layout processing method according to claim 1, characterized in that, The disturbance signal component includes a measurement point component corresponding to a measurement point in the layout. This measurement point component is used to simulate the optical signal change caused by the sub-pattern at the wafer position corresponding to the measurement point during photolithography based on the layout. And for each sub-pattern, the determination of the disturbance signal component includes: Determine the convolution kernel corresponding to the measurement point, wherein the convolution kernel is a quantized representation of the optical properties associated with the lithography; and The components of the measurement point are determined based on the convolution kernel, the first coordinate information of the measurement point in the layout, and the second coordinate information of the sub-graphic in the layout.

3. The layout processing method according to claim 2, characterized in that, Determining the convolution kernel corresponding to the measurement point includes: Determine the three-dimensional structural information related to the mask used for the photolithography; Based on the aforementioned three-dimensional structural information, the optical phase shift caused by the three-dimensional structure of the mask is determined; and Based on the optical phase shift and the reference convolution kernel, the convolution kernel corresponding to the measurement point is determined.

4. The layout processing method according to claim 3, characterized in that, The three-dimensional structural information includes at least one of the following: The geometry of the mask, The thickness of the mask.

5. The layout processing method according to claim 3, characterized in that, The optical phase shift is read from the optical phase shift offset library.

6. The layout processing method according to claim 1, characterized in that, Optimizing the layout based on multiple disturbance signal components determined for each of the multiple sub-patterns includes: Based on multiple of the said perturbation signal components, a perturbation signal caused by the perturbation pattern is determined, the perturbation signal being used to simulate the optical signal variation caused by the perturbation pattern in the wafer during photolithography based on the layout; and The layout is optimized based on the disturbance signal.

7. The layout processing method according to claim 6, characterized in that, Determining the disturbance signal caused by the disturbance pattern includes: The multiple disturbance signal components are added together to form the disturbance signal.

8. The layout processing method according to claim 6, characterized in that, At least two of the plurality of sub-patterns have different sizes, and determining the disturbance signal caused by the disturbance pattern includes: Based on the respective dimensions of the multiple sub-graphs, determine the weights of each of the multiple sub-graphs; and Based on the weights, a weighted sum of the multiple disturbance signal components is determined as the disturbance signal.

9. An electronic device, characterized in that, include: At least one processing unit; as well as At least one memory, coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, which, when executed by the at least one processing unit, cause the electronic device to perform the method according to any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program can be executed by a processor to implement the method according to any one of claims 1 to 8.

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