Chip carrier device and method of bonding a chip to a wafer

Abstract

The application provides a chip bearing device and a chip and wafer bonding method. A plurality of grooves are arranged on a first surface of the chip bearing device, and a fixing assembly is arranged in each groove. When the UV film is expanded and the chip already attached to the UV film cannot be conveyed, the chip can be transferred to the groove of the chip bearing device. The chip transferred to the groove can be fixed by the fixing assembly in the groove. Then, the chip bearing device loaded with the chip can be transferred to perform the next process. Thus, the technical problem that the chip already attached to the UV film cannot be conveyed after the UV film is expanded is solved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a chip carrier device and a method for bonding a chip to a wafer. Background Technology

[0002] Chip to Wafer (C2W) stacking technology is not limited by chip size matching, offering high flexibility. Furthermore, C2W can significantly improve yield by selecting known good dies (KGD) to bond with wafers, thus gaining favor among global semiconductor giants.

[0003] During the chip-wafer bonding process, multiple diced chips are attached to a UV film. The UV film needs to be expanded to increase the spacing between the chips, facilitating their removal during bonding. However, after this expansion, if the chips require further processing (such as chip interface activation), the chips already attached to the UV film cannot be transferred. Summary of the Invention

[0004] In view of this, the main objective of this application is to provide a chip carrier device and a chip-wafer bonding method to solve the technical problem that after UV film expansion, the chip already attached to the UV film cannot be transferred.

[0005] To achieve the above objectives, the technical solution of this application is implemented as follows:

[0006] This application provides a chip carrier device, wherein a plurality of grooves are provided on the first surface of the chip carrier device, and a fixing component is provided in each groove.

[0007] In the chip carrier device provided in this application embodiment, the fixing component includes a plurality of through holes, the opening direction of the through holes is perpendicular to the first surface, and the air pressure in each of the through holes is less than the air pressure in the groove.

[0008] In the chip carrier device provided in the embodiments of this application, the plurality of through holes are evenly distributed.

[0009] In the chip carrier device provided in this application embodiment, the groove includes a central region and an edge region distributed around the central region, and the distribution density of the vias located in the central region is greater than the distribution density of the vias located in the edge region.

[0010] In the chip carrier device provided in this application embodiment, the fixing component further includes a pneumatic control module, which is connected to the plurality of through holes.

[0011] In the chip carrier device provided in this application embodiment, the fixing component includes an adhesive layer, which is located on the surface of the groove away from the first surface.

[0012] This application also provides a chip-wafer bonding method, including:

[0013] The UV film is expanded to increase the spacing between multiple chips located on the UV film;

[0014] Pick up the target chip from the plurality of chips and transfer the target chip into the groove of the chip carrier device described above;

[0015] The chip carrier containing the target chip is transferred to the activation chamber for activation.

[0016] The target chip is bonded to the wafer.

[0017] In the chip-wafer bonding method provided in this application embodiment, before expanding the UV film, the chip-wafer bonding method further includes:

[0018] Activation process is performed on multiple chips.

[0019] In the chip-wafer bonding method provided in this application embodiment, picking up the target chip from the plurality of chips includes:

[0020] Activation failure detection was performed on multiple of the aforementioned chips;

[0021] Mark the chip that failed to activate as the target chip;

[0022] Pick up the target chip.

[0023] In the chip-wafer bonding method provided in this application embodiment, after expanding the UV film, the chip-wafer bonding method further includes:

[0024] Check if the bonding machine is malfunctioning;

[0025] If the bonding machine malfunctions, the step of picking up the target chip from the plurality of chips and transferring the target chip into the groove of the chip carrier device includes:

[0026] Each of the multiple chips is picked up in sequence, and all the chips are transferred to the groove of the chip carrier device described above.

[0027] In the chip-wafer bonding method provided in this application embodiment, after transferring the chip carrier device carrying the target chip to the activation chamber for activation processing, and before bonding the target chip to the wafer, the chip-wafer bonding method further includes:

[0028] The chip carrier containing the target chip is transferred to the cleaning chamber for cleaning.

[0029] This application provides a chip carrier device. A plurality of grooves are provided on the first surface of the chip carrier device, and a fixing component is disposed in each groove. This application provides a chip carrier device that, when a chip already attached to the UV film cannot be transferred after UV film expansion, can be transferred to a groove in the chip carrier device. The chip transferred to the groove can be fixed by the fixing component in the groove. Then, the chip carrier device carrying the chip can be transferred to the next process. Therefore, this solves the technical problem that a chip already attached to the UV film cannot be transferred after UV film expansion. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the basic structure of the chip carrier device provided in the embodiments of this application;

[0031] Figure 2 A partial top view of the first surface of the chip carrier device provided in an embodiment of this application;

[0032] Figure 3a and Figure 3b This is a first schematic diagram of a fixing component provided in an embodiment of this application;

[0033] Figure 4 A second schematic diagram of the fixing component provided in the embodiments of this application;

[0034] Figure 5 A flowchart of a chip-wafer bonding method provided in an embodiment of this application;

[0035] Figures 6a to 6d This is a schematic diagram of the basic structure of each component during the chip-wafer bonding process provided in the embodiments of this application. Detailed Implementation

[0036] The technical solution of this application will be further described in detail below with reference to the accompanying drawings and specific embodiments. In the drawings, for clarity and ease of understanding and description, the dimensions and thicknesses of the components are not drawn to scale.

[0037] In 3D integration technology, wafer bonding is crucial for stacking multiple chips. Currently, bonding between electrodes on a wafer (or chip) often requires solder bumps. However, the reduction in bump size has reached its limit, making it impossible to further increase the integration density of chip electrodes. Hybrid bonding, which simultaneously bonds Cu electrodes and SiO2 insulating layers on the wafer (or chip) without solder bumps, is currently the most promising and optimal solution for manufacturing miniaturized, multifunctional electronic devices and achieving high-density interconnects.

[0038] Unlike traditional homogeneous bonding techniques that use only one bonding material, hybrid-bonded samples feature planar dielectric materials and insulating metals. For the dielectric material, SiO2 is the optimal choice. Due to its high electrical and thermal conductivity, copper has become a standard interconnect metal material in advanced electronic applications, thus improving electrical performance and thermal conductivity; therefore, Cu was chosen as the interconnect metal in hybrid bonding.

[0039] Cu / SiO2 hybrid bonding technology can simultaneously achieve Cu-Cu bonding for electrical interconnection and SiO2-SiO2 bonding for improved mechanical strength. It can reduce the interconnect pitch to 1-10µm, and has good compatibility with front-end and back-end processes, requires no underfill, and, combined with wafer thinning technology, can realize 4-layer, 8-layer, 12-layer, or even 16-layer stacked memory in the future. It can meet the packaging height and performance requirements of next-generation high-performance computing, making it the most ideal solution for 3D integration.

[0040] In the chip-wafer bonding process, the thinned wafer is first attached to a UV film. Then, through a series of processes, the wafer is diced into individual chips, which are then bonded to the wafer. Since the spacing between adjacent chips on the UV film is only a few micrometers, the UV film needs to be expanded to increase the spacing between the chips, facilitating chip removal during bonding. Because the UV film has a certain degree of elasticity, it becomes looser after expansion. If subsequent chip processing (such as chip interface activation) is required, the chips already attached to the UV film cannot be transferred. The embodiments of this application address these shortcomings.

[0041] like Figure 1 and Figure 2 The figures shown are a schematic diagram of the basic structure of the chip carrier device 10 provided in the embodiments of this application and a partial top view of the first surface S1 of the chip carrier device 10. The first surface S1 of the chip carrier device 10 is provided with a plurality of grooves 100, and a fixing component 101 is provided in each groove 100.

[0042] It is understood that by providing a chip carrier device 10, when the chip already attached to the UV film cannot be transferred after the UV film is expanded, the chip can be transferred to the groove 100 of the chip carrier device 10. The chip transferred to the groove 100 can be fixed by the fixing component 101 in the groove 100. Then, the chip carrier device 10 carrying the chip can be transferred to the next process. Therefore, the technical problem that the chip already attached to the UV film cannot be transferred after the UV film is expanded is solved.

[0043] It is understood that, in this embodiment of the application, by providing a plurality of grooves 100 on the first surface S1 of the chip carrier device 10, that is, by dividing the first surface S1 of the chip carrier device 10 into sections, the area inside the grooves 100 is the chip placement area, and the area outside the grooves 100 is the non-chip placement area, it is possible to more accurately locate the chip placement area when transferring the chip to the grooves 100 of the chip carrier device 10.

[0044] It should be noted that the multiple grooves 100 can be evenly distributed on the first surface S1 of the chip carrier device 10. The multiple grooves 100 can be arranged in rows and / or columns, for example, according to... Figure 1 The arrangement is shown in a row-by-row and column-by-column manner (i.e., a matrix arrangement), or according to... Figure 2 The grooves 100 can be arranged in a row-by-row manner, or in a column-by-column manner (not shown in the figure). When arranged in a row-by-row manner, the grooves 100 in adjacent rows do not need to be strictly aligned. When arranged in a column-by-column manner, the grooves 100 in adjacent columns do not need to be strictly aligned, making the distribution of the grooves 100 more flexible.

[0045] In some embodiments, the size of the groove 100 is generally larger than the chip; that is, in a cross-section parallel to the first surface S1, the area of ​​the groove 100 is larger than the area of ​​the chip. Therefore, even if there is a deviation during chip placement, contact between the chip and the sidewall of the groove 100 can be avoided, preventing damage to the outer edge of the chip. The projection of the groove 100 onto the first surface S1 can be rectangular or other shapes adapted to the shape of the chip.

[0046] In some embodiments, in a direction perpendicular to the first surface S1, the difference between the depth of the groove 100 and the thickness of the chip is greater than 0 and less than or equal to 30 micrometers. For example, the difference between the depth of the groove 100 and the thickness of the chip is 20 micrometers. Specifically, the chip is fixed in the groove 100 by a fixing component 101. When the depth of the groove 100 is greater than the thickness of the chip, contact between adjacent chips can be avoided during the transfer process.

[0047] Next, please refer to Figure 3a and Figure 3b This is a first schematic diagram of the fixing component 101 provided in the embodiment of this application. In this embodiment, the fixing component 101 includes a plurality of through holes 1011. The opening direction of the through holes 1011 is perpendicular to the first surface S1. The air pressure in each through hole 1011 is less than the air pressure in the groove 100.

[0048] It is understood that in this embodiment, the chip transferred into the groove 100 is adsorbed by the negative pressure of multiple through holes 1011. Specifically, the bottom of the groove 100 in this embodiment is provided with multiple through holes 1011, which penetrate the chip carrier device 10. By evacuating air from the end of the multiple through holes 1011 away from the groove 100, the pressure inside the through holes 1011 is reduced, and the air pressure inside the through holes 1011 is lower than the air pressure inside the groove 100, thereby adsorbing and fixing the chip.

[0049] In this embodiment, the fixing component 101 further includes a pneumatic control module (not shown), which is connected to the plurality of through holes 1011. That is, the pneumatic control module controls the air pressure within the plurality of through holes 1011. When a chip is transferred into the groove 100, the pneumatic control module is activated, causing the pressure within the plurality of through holes 1011 to decrease, making the air pressure within the plurality of through holes 1011 lower than the air pressure within the groove 100, thereby adsorbing and fixing the chip. When it is necessary to remove the chip from the chip carrier 10, the pneumatic control module is deactivated, thus separating the chip from the chip carrier 10.

[0050] It should be noted that when the chip carrier device 10 carrying the chip needs to be transferred to the chamber for processing, the pneumatic control module does not need to be transferred to the chamber at the same time. This is because the chamber generally has a negative pressure control function, so it is not necessary to transfer the pneumatic control module to the chamber separately.

[0051] It should be noted that multiple through holes 1011 can be configured according to... Figure 3a The arrangement can be evenly distributed, or it can be arranged according to... Figure 3b The distribution is non-uniform.

[0052] Specifically, in one embodiment, such as Figure 3b As shown, the groove 100 includes a central region A1 and an edge region A2 distributed around the central region A1. The distribution density of the through holes 1011 in the central region A1 is greater than the distribution density of the through holes 1011 in the edge region A2.

[0053] It is understandable that since the size of the groove 100 is generally larger than the chip, most of the chip's area is located in the middle region A1 of the groove 100. In this embodiment, by making the through holes 1011 in the middle region A1 more compact, the adsorption effect on the chip can be improved.

[0054] Next, please refer to Figure 4 This is a second schematic diagram of the fixing component 101 provided in the embodiment of this application. In this embodiment, the fixing component 101 includes an adhesive layer 1012. The adhesive layer 1012 is located on the surface of the groove 100 away from the first surface S1, that is, the adhesive layer 1012 is located on the bottom surface of the groove 100.

[0055] It is understood that in this embodiment, an adhesive layer 1012 is provided on the bottom surface of the groove 100 to bond and fix the chip transferred to the groove 100. When it is necessary to remove the chip from the chip carrier 10, a method of releasing the adhesive is used to separate the chip and the adhesive layer 1012. The method of releasing the adhesive includes, but is not limited to, laser, ultraviolet light, and heating.

[0056] Next, please refer to Figure 5 This is a flowchart of a chip-wafer bonding method provided in an embodiment of this application. The chip-wafer bonding method includes:

[0057] S101. Expand the UV film to increase the spacing between the multiple chips located on the UV film;

[0058] S102. Pick up the target chip from the plurality of chips and transfer the target chip into the groove of the chip carrier device described above;

[0059] S103. The chip carrier device containing the target chip is transferred to the activation chamber for activation process;

[0060] S104. Bond the target chip to the wafer.

[0061] It is understandable that after the UV film has expanded, when the chip needs to undergo an activation process, the chip already attached to the UV film cannot be transported to the activation chamber. This application's embodiment solves the technical problem that the chip already attached to the UV film cannot be transferred after UV film expansion by transferring the chip to a groove in a chip carrier device, fixing the chip in the groove using a fixing component within the groove, and then transferring the chip-carrying chip carrier device to the activation chamber for the activation process.

[0062] Specifically, the chip attached to the UV film can be transferred to the groove of the chip carrier using a pick-up head. The chip activation process uses N2 or H2 plasma activation.

[0063] In some embodiments, prior to expanding the UV film, the chip-wafer bonding method further includes:

[0064] Activation process is performed on multiple chips.

[0065] It is understood that in this embodiment, multiple chips undergo two activation processes: the first before UV film expansion and the second after UV film expansion. The activation process before UV film expansion can be performed without using a chip carrier device to transfer the chips; however, after UV film expansion, the chip carrier device provided in this embodiment must be used to carry the chips and transfer them to the activation chamber for the activation process.

[0066] In some embodiments, picking up the target chip from the plurality of said chips includes:

[0067] Activation failure detection was performed on multiple of the aforementioned chips;

[0068] Mark the chip that failed to activate as the target chip;

[0069] Pick up the target chip.

[0070] It is understood that in this embodiment, the target chip is activated twice. The first activation process is performed on each of the multiple chips. The second activation process is performed before bonding. The activation failure chip is identified among the multiple chips, marked as the target chip, and then the target chip is removed and reactivated and rebonded, thereby improving the yield of chip-wafer bonding.

[0071] In some embodiments, after expanding the UV film, the chip-wafer bonding method further includes:

[0072] Check if the bonding machine is malfunctioning;

[0073] If the bonding machine malfunctions, the step of picking up the target chip from the plurality of chips and transferring the target chip into the groove of the chip carrier device includes:

[0074] Each of the multiple chips is picked up in sequence, and all the chips are transferred to the groove of the chip carrier device described above.

[0075] It should be noted that the bonding machine position is the same as the film expansion machine position. If the bonding machine malfunctions (e.g., the bonding machine crashes) when film expansion is completed, bonding cannot be completed, and all chips on the UV film need to be removed. That is, the chip carrier device provided in this application embodiment needs to be used to carry all the chips on the UV film, remove all the chips on the UV film, transfer them to the groove of the chip carrier device, perform the activation process, and then bond them.

[0076] In some embodiments, after transferring the chip carrier containing the target chip to an activation chamber for activation processing, and before bonding the target chip to a wafer, the chip-wafer bonding method further includes:

[0077] The chip carrier containing the target chip is transferred to the cleaning chamber for cleaning.

[0078] It should be noted that semiconductor manufacturing includes processes that produce organic and inorganic particulate byproducts, which may contaminate or cross-contaminate further wafer processing. This embodiment cleans these particulate materials through a pre-bonding cleaning process, thereby improving yield and reducing defects associated with these particulate materials.

[0079] It should be noted that the chip cleaning process uses deionized water rinsing (DIW). This application embodiment employs a two-stage activation cleaning process, which can reduce copper oxidation on the chip and improve the yield of chip-to-wafer bonding.

[0080] Next, please refer to Figures 6a to 6d This is a schematic diagram of the basic structure of each component during the bonding process between the chip 30 and the wafer provided in this application embodiment. First, as shown... Figure 6a As shown, after the thinned wafer is attached to the UV film 20, it is diced into individual chips 30 through a series of processes. The spacing between adjacent chips 30 after dicing is several tens of micrometers. Therefore, the UV film 20 needs to be expanded to increase the spacing between the chips 30, making it easier for the chips 30 to be removed from the UV film 20. Since the UV film 20 has a certain degree of tightness, it becomes looser after expansion. If the chips 30 need to undergo a certain process (such as chip 30 interface activation process), the pick-up head 40 picks up the chips 30 attached to the UV film 20.

[0081] Next, as Figure 6b As shown, the pickup head 40 transfers the chip 30 into the groove of the chip carrier 10, and the chip 30 is fixed by the fixing component in the groove.

[0082] Next, as Figure 6c As shown, the chip carrier device 10 carrying chip 30 is transferred to the activation chamber for activation. Specifically, the activation process of chip 30 uses N2 or H2 plasma activation.

[0083] Next, as Figure 6dAs shown, the chip carrier 10 carrying chip 30 is transferred to the cleaning chamber for cleaning. Specifically, the cleaning process for chip 30 is deionized water rinsing (DIW).

[0084] Finally, the activated and cleaned chip 30 is bonded to the wafer (not shown).

[0085] In summary, the chip carrier device provided in this application has multiple grooves on its first surface, and a fixing component is disposed in each groove. By providing a chip carrier device, when the chip already attached to the UV film cannot be transferred after UV film expansion, the chip can be transferred to the groove of the chip carrier device. The chip transferred to the groove can be fixed by the fixing component in the groove. Then, the chip carrier device carrying the chip can be transferred to the next process. Therefore, the technical problem that the chip already attached to the UV film cannot be transferred after UV film expansion is solved.

[0086] The above description is merely a preferred embodiment of this application and is not intended to limit the scope of protection of this application.

Claims

1. A chip carrier device, characterized in that, The first surface of the chip carrier device is provided with a plurality of grooves, and a fixing component is provided in each groove; The fixing component includes multiple through holes, the opening direction of which is perpendicular to the first surface, and the air pressure in each through hole is less than the air pressure in the groove. The groove includes a central region and an edge region distributed around the central region, wherein the distribution density of the through holes located in the central region is greater than the distribution density of the through holes located in the edge region.

2. The chip carrier device according to claim 1, characterized in that, The multiple through holes are evenly distributed.

3. The chip carrier device according to claim 1, characterized in that, The fixing component also includes a pneumatic control module, which is connected to the plurality of through holes.

4. The chip carrier device according to claim 1, characterized in that, The fixing component includes an adhesive layer located on the surface of the groove away from the first surface.

5. A method for bonding a chip to a wafer, characterized in that, include: The UV film is expanded to increase the spacing between multiple chips located on the UV film; Pick up a target chip from the plurality of said chips and transfer the target chip into a groove of the chip carrier device according to any one of claims 1 to 4; The chip carrier containing the target chip is transferred to the activation chamber for activation. The target chip is bonded to the wafer.

6. The chip-wafer bonding method according to claim 5, characterized in that, Before expanding the UV film, the chip-wafer bonding method further includes: Activation process is performed on multiple chips.

7. The chip-wafer bonding method according to claim 6, characterized in that, The step of picking up the target chip from the plurality of said chips includes: Activation failure detection was performed on multiple of the aforementioned chips; Mark the chip that failed to activate as the target chip; Pick up the target chip.

8. The chip-wafer bonding method according to claim 5, characterized in that, After expanding the UV film, the chip-wafer bonding method further includes: Check if the bonding machine is malfunctioning; If the bonding machine malfunctions, the step of picking up the target chip from the plurality of chips and transferring the target chip into the groove of the chip carrier device according to any one of claims 1 to 4 includes: Each of the plurality of chips is picked up in sequence, and all of the plurality of chips are transferred into the groove of the chip carrier device according to any one of claims 1 to 4.

9. The chip-wafer bonding method according to claim 5, characterized in that, After transferring the chip carrier containing the target chip to the activation chamber for activation processing, and before bonding the target chip to the wafer, the chip-wafer bonding method further includes: The chip carrier containing the target chip is transferred to the cleaning chamber for cleaning.

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