Fabrication methods for micro LED devices, micro LED devices and display devices

Abstract

This disclosure provides a method for fabricating a micro-LED device, a micro-LED device, and a display device. The method includes: providing a micro-LED epitaxial wafer, the epitaxial wafer sequentially comprising a substrate, a first semiconductor layer, a quantum well structure, and a second semiconductor layer; etching from the second semiconductor layer until the first semiconductor layer is exposed to obtain a mesa structure, the mesa structure including at least one protrusion; depositing an extinction layer on the mesa structure and forming contact holes on the extinction layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer, with multiple contact holes formed on the extinction layer above each protrusion; depositing a metal layer on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer; depositing a metal block on the metal layer to obtain a micro-LED chip array; and flip-chip bonding the chip array to a driving substrate using the metal block to obtain a micro-LED device. According to this method, optical crosstalk and peripheral light leakage problems can be improved.

Description

Technical Field

[0001] This disclosure relates to the technical field of semiconductor LEDs, and more specifically, to a method for fabricating a micro LED device, a micro LED device, and a display device. Background Technology

[0002] Micro-LED boasts advantages such as low power consumption, long lifespan, high brightness, and high contrast. With the gradual development of display technology, Micro-LED has become a growing trend in new display technologies. However, Micro-LED suffers from the problem of optical crosstalk. Summary of the Invention

[0003] To address the technical problems mentioned in the background section, this disclosure provides a method for fabricating a micro LED device, a micro LED device, and a display device.

[0004] According to one aspect of the present disclosure, a method for fabricating a micro-LED device is provided. The method includes: providing a micro-LED epitaxial wafer, the micro-LED epitaxial wafer comprising, from bottom to top, a substrate, a first semiconductor layer, a quantum well structure, and a second semiconductor layer; etching from the second semiconductor layer until the first semiconductor layer is exposed to obtain a mesa structure, wherein the mesa structure includes at least one boss; depositing an extinction layer on the mesa structure and forming contact holes on the extinction layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one boss, wherein each of the at least one boss has multiple contact holes on the extinction layer above it for forming multiple light-emitting units; depositing a metal layer on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer; depositing a metal block on the metal layer to obtain a micro-LED chip array; and flip-bonding the micro-LED chip array to a driving substrate through the metal block to obtain a micro-LED device.

[0005] Furthermore, contact holes are formed on the matte layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one boss. The matte layer above each of the at least one boss has multiple contact holes for forming multiple light-emitting units. This includes forming multiple first contact holes and multiple second contact holes on the matte layer, such that each of the multiple first contact holes exposes a portion of the first semiconductor layer and each of the multiple second contact holes exposes a portion of the second semiconductor layer on the boss. The multiple second contact holes are formed according to a preset contact hole size and a preset hole spacing size.

[0006] Furthermore, the provision of a metal layer on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer includes: providing a current spreading layer on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer; and providing the metal layer on the current spreading layer.

[0007] Furthermore, the current spreading layer includes an indium tin oxide layer.

[0008] Furthermore, the material of the metal block includes indium.

[0009] Furthermore, the process of flip-bonding the micro-LED chip array to the driving substrate using the metal block to obtain a micro-LED device includes: reflowing the metal block to form metal bumps; and flip-bonding the micro-LED chip array to the driving substrate using the metal bumps.

[0010] Furthermore, etching from the second semiconductor layer until the first semiconductor layer is exposed to obtain the mesa structure includes: using an inductively coupled plasma etching method to etch from the second semiconductor layer until the first semiconductor layer is exposed to obtain the mesa structure.

[0011] Furthermore, the method of setting a matte layer on the mesa structure and forming contact holes on the matte layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one protrusion includes: spin-coating the matte layer on the mesa structure; and etching a plurality of contact holes on the matte layer using an inductively coupled plasma etching method to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one protrusion.

[0012] Furthermore, the current spreading layer is formed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer by using an electron beam evaporation method and an etching method.

[0013] Furthermore, depositing the metal layer on the current spreading layer includes: depositing the metal layer on the current spreading layer using plasma-enhanced chemical vapor deposition and wet etching methods.

[0014] Furthermore, setting the metal block on the metal layer includes setting the metal block on the metal layer using a vapor deposition method and a wet etching method.

[0015] Furthermore, reflowing the metal block to form metal bumps includes: reflowing the metal block in a vacuum reflow furnace in an environment of N2 and formic acid to form the metal bumps.

[0016] Furthermore, the substrate is a sapphire substrate, the first semiconductor layer is an N-GaN layer, and the second semiconductor layer is a P-GaN layer.

[0017] According to another aspect of this disclosure, a micro-LED device is also provided. The micro-LED device includes a micro-LED chip array and a driving substrate. The micro-LED chip array includes a mesa structure, the mesa structure including at least one protrusion, the at least one protrusion sequentially including a substrate, a first semiconductor layer, a quantum well structure, and a second semiconductor layer. The micro-LED chip array further includes: an extinction layer disposed on the mesa structure and including contact holes for exposing a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one protrusion, wherein a plurality of contact holes are formed on the extinction layer above each of the at least one protrusion for forming a plurality of light-emitting units; a metal layer disposed on the exposed portions of the first and second semiconductor layers; and a metal block disposed on the metal layer, wherein the micro-LED chip array is flip-bonded to the driving substrate via the metal block.

[0018] Furthermore, the matte layer has a plurality of first contact holes and a plurality of second contact holes, each of the plurality of first contact holes exposing a portion of the first semiconductor layer and each of the plurality of second contact holes exposing a portion of the second semiconductor layer on the boss, wherein the plurality of second contact holes are formed according to a preset contact hole size and a preset hole spacing size.

[0019] Furthermore, the micro LED chip array also includes a current spreading layer disposed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer, and the metal layer disposed on the current spreading layer.

[0020] According to another aspect of the present disclosure, a display device is also provided. The display device includes the micro LED device described above.

[0021] By applying the technical solution disclosed herein, a mesa structure comprising only at least one protrusion can be obtained by etching an epitaxial wafer, and an extinction layer can be disposed on the mesa structure to form a micro-LED chip array on the extinction layer corresponding to each protrusion, thereby forming a micro-LED device. In the micro-LED device thus fabricated, each micro-LED chip in the micro-LED chip array acts as a pixel. The extinction layer can absorb the light that is not properly emitted from the pixel, i.e., it can absorb the light reflected from the substrate into the device, thereby improving optical crosstalk between different pixels and reducing the phenomenon of continuous reflection of light within the device and its emission from the periphery. In other words, while achieving high resolution, it can also improve optical crosstalk and peripheral light leakage problems, thus achieving efficient display.

[0022] Furthermore, since multiple micro LED chips (pixels) are formed on the same protrusion, the light emitted by each chip will not be absorbed or blocked by the structure of adjacent chips, thereby increasing the amount of light emitted and thus improving the brightness of the screen. Attached Figure Description

[0023] The above and other objects, features, and advantages of exemplary embodiments of the present disclosure will become readily apparent upon reading the following detailed description with reference to the accompanying drawings. In the drawings, several embodiments of the present disclosure are illustrated by way of example and not limitation, and like or corresponding reference numerals denote like or corresponding parts, wherein:

[0024] Figure 1 This is a flowchart illustrating a method for fabricating a micro LED device according to an embodiment of the present disclosure;

[0025] Figures 2a-2g This is a schematic diagram illustrating the fabrication process of a micro LED device fabrication method according to an embodiment of the present disclosure. Detailed Implementation

[0026] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This disclosure will now be described in detail with reference to the accompanying drawings and embodiments.

[0027] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0028] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways, rotated 90 degrees, or in other orientations, and the spatial relative descriptions used herein will be interpreted accordingly.

[0029] Exemplary embodiments according to this disclosure will now be described in more detail with reference to the accompanying drawings. However, these exemplary embodiments may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. It should be understood that these embodiments are provided so that this disclosure is thorough and complete, and that the concept of these exemplary embodiments is fully conveyed to those skilled in the art. In the drawings, for clarity, the thickness of layers and regions has been enlarged, and the same reference numerals are used to denote the same devices, and therefore their description will be omitted.

[0030] This disclosure provides a method for fabricating a micro LED device. (Refer to...) Figure 1 as well as Figures 2a-2g , Figure 1 This is a flowchart illustrating a method for fabricating a microLED device according to an embodiment of the present disclosure. Figures 2a-2g This is a schematic diagram illustrating the fabrication process of a micro LED device fabrication method according to an embodiment of the present disclosure.

[0031] According to embodiments of this disclosure, a micro-LED device includes a micro-LED chip array and a driving substrate, wherein each micro-LED chip in the micro-LED chip array is a pixel, and the pixel size is typically less than or equal to 200 micrometers.

[0032] like Figure 1 As shown, the method for fabricating this micro LED device includes the following steps S101-S106.

[0033] Step S101: Provide a micro LED epitaxial wafer, wherein the micro LED epitaxial wafer comprises, from bottom to top, a substrate, a first semiconductor layer, a quantum well structure, and a second semiconductor layer.

[0034] Step S102: Etch from the second semiconductor layer until the first semiconductor layer is exposed to obtain a mesa structure, wherein the mesa structure includes at least one boss.

[0035] Step S103: A matte layer is provided on the platform structure and multiple contact holes are formed on the matte layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one boss, wherein multiple contact holes are formed on the matte layer above each of the at least one boss.

[0036] Step S104: A metal layer is disposed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer.

[0037] Step S105: Set metal blocks on the metal layer to obtain a micro LED chip array.

[0038] Step S106: The micro LED chip array is flip-bonded to the driving substrate using the metal block to obtain a micro LED device.

[0039] According to this technical solution, a mesa structure comprising only at least one protrusion can be obtained by etching an epitaxial wafer. An extinction layer is then formed on this mesa structure, allowing a micro-LED chip array to be formed on the extinction layer corresponding to each protrusion, thereby forming a micro-LED device. In this fabricated micro-LED device, each micro-LED chip in the micro-LED chip array acts as a pixel. The extinction layer absorbs light that is not properly emitted from the pixel, i.e., it absorbs light reflected from the substrate into the device. This improves optical crosstalk between different pixels and reduces the phenomenon of light continuously reflecting within the device and emitting light from the periphery. In other words, while achieving high resolution, it also improves optical crosstalk and peripheral light leakage, thus achieving efficient display. Furthermore, since multiple micro-LED chips (pixels) are formed on the same protrusion, the light emitted by each chip is not absorbed or blocked by the structure of adjacent chips, thereby increasing the light output and improving screen brightness.

[0040] In step S101, a micro LED epitaxial wafer can be provided, which includes, from bottom to top, a substrate, a first semiconductor layer, a quantum well structure, and a second semiconductor layer.

[0041] According to embodiments of this disclosure, in order to fabricate a micro-LED device, it is first necessary to fabricate a micro-LED chip array, thereby obtaining a micro-LED epitaxial wafer. This epitaxial wafer can be pre-fabricated or fabricated during the fabrication process of the micro-LED chip array described in this disclosure. (Refer to...) Figures 2a-2g ,in Figure 2aA microLED epitaxial wafer 10 according to an embodiment of the present disclosure is shown. For example... Figure 2a As shown, the micro LED epitaxial wafer 10 may include, from bottom to top, a substrate 101, a buffer layer 102, a third semiconductor layer 103, a first semiconductor layer 104, a quantum well structure 105, and a second semiconductor layer 106.

[0042] According to embodiments of this disclosure, the first substrate 101 may be a sapphire substrate, the third semiconductor layer 103 may be a U-GaN layer, the first semiconductor layer 104 may be an N-GaN layer, and the second semiconductor layer 106 may be a P-GaN layer.

[0043] In step S102, etching can be performed starting from the second semiconductor layer until the first semiconductor layer is exposed to obtain a mesa structure, wherein the mesa structure includes at least one boss.

[0044] According to embodiments of this disclosure, after obtaining a micro-LED epitaxial wafer, it can be etched to obtain a mesa structure for setting electrodes. The mesa structure may include at least one boss. Further, when the mesa structure includes a single boss, the single boss may be located at the center of the mesa structure, thus facilitating subsequent electrode placement.

[0045] Specifically, etching from the second semiconductor layer until the first semiconductor layer is exposed to obtain a mesa structure may include: using an inductively coupled plasma etching method to etch from the second semiconductor layer until the first semiconductor layer is exposed to obtain a mesa structure.

[0046] Reference Figures 2a-2g ,in Figure 2b It shows the Figure 2a The mesa structure 20 formed after etching the epitaxial wafer 10 is shown. For example... Figure 2b As shown, the mesa structure 20 includes a single boss 21. Specifically, plasma-enhanced chemical vapor deposition (PECVD) can be used in... Figure 2a A silicon oxide layer is deposited on the second semiconductor layer 106 of the epitaxial wafer 10 as a hard mask. Then, photoresist is spin-coated on the hard mask, and a surface pattern is etched. After removing the photoresist, inductively coupled plasma etching (ICP) is used to etch until the first semiconductor layer 104 is exposed. Finally, the silicon oxide layer is removed to form... Figure 2b The mezzanine structure 20 is shown. Of course, any other applicable process can be used to etch the mezzanine structure. In this embodiment, the mezzanine structure 20 includes only one boss 21, but the mezzanine structure can of course include multiple bosses.

[0047] In step S103, an matting layer can be provided on the mesa structure and contact holes can be formed on the matting layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one protrusion. The matting layer above each of the at least one protrusion has multiple contact holes for forming multiple light-emitting units.

[0048] According to embodiments of this disclosure, after obtaining the mesa structure, an matting layer can be formed on the entire mesa structure, and contact holes can be formed in the matting layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on each protrusion. Multiple contact holes are formed on the matting layer above each protrusion, so that the final device can have multiple light-emitting units corresponding to each protrusion. The material of the matting layer can be a matting material such as a dark color resist (black) or a non-metallic layer.

[0049] Specifically, forming contact holes on the matte layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one boss, wherein a plurality of contact holes are formed on the matte layer above each of the at least one boss to form a plurality of light-emitting units, may include: forming a plurality of first contact holes and a plurality of second contact holes on the matte layer, such that each of the plurality of first contact holes exposes a portion of the first semiconductor layer and each of the plurality of second contact holes exposes a portion of the second semiconductor layer on the boss, wherein the plurality of second contact holes are formed according to a preset contact hole size and a preset hole spacing size.

[0050] In this embodiment, when multiple second contact holes are formed on the matte layer, the size of the second contact holes to be formed can be determined according to a pre-set contact hole size, and the distance between each second contact hole can be determined according to a pre-set hole spacing size, thereby obtaining a required second contact hole matrix on each boss. Therefore, it is possible to achieve a large aperture ratio for micro LED devices and improve the optical crosstalk phenomenon caused by current spread of the electrodes set in the second contact holes.

[0051] Specifically, setting a matte layer on the mesa structure and opening contact holes on the matte layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one protrusion may include: spin-coating a matte layer on the mesa structure; and etching multiple contact holes on the matte layer using an inductively coupled plasma etching method to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one protrusion.

[0052] Reference Figures 2a-2g ,in Figure 2c A matte layer 107 with contact holes is shown. For example... Figure 2c As shown, it is possible to Figure 2b A matte layer 107 is spin-coated onto the entire mesa structure 20. After spin-coating the matte layer 107, photoresist is applied to the matte layer to photolithographically pattern the first contact hole 1071 and the second contact hole 1072. Then, inductively coupled plasma (ICP) etching is used to etch the first contact hole 1071 and the second contact hole 1072. The first contact hole 1071 exposes a portion of the first semiconductor layer 104, and the second contact hole 1072 is located above the boss and exposes a portion of the second semiconductor layer 106. Multiple second contact holes 1072 form a contact hole array. It is worth noting that... Figure 2c The number of contact holes shown is merely illustrative; in particular, the number of second contact holes 1072 can be determined based on the number of chips (pixels) in the desired micro-LED chip array. Furthermore, in the case where the mesa structure includes multiple bosses, each boss is provided with an matte layer and a second contact hole as described above. Therefore, the number of bosses and the number of second contact holes on the bosses can be determined based on the number of chips (pixels) in the desired micro-LED chip array.

[0053] In step S104, a metal layer may be disposed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer.

[0054] According to embodiments of this disclosure, in order to better position the electrodes, a metal layer may be disposed on the exposed first semiconductor layer and second semiconductor layer.

[0055] Furthermore, depositing a metal layer on the exposed portions of the first and second semiconductor layers may include: depositing a current spreading layer on the exposed portions of the first and second semiconductor layers; and depositing the metal layer on the current spreading layer. The current spreading layer may include an indium tin oxide layer. Depositing the current spreading layer can improve light extraction efficiency.

[0056] Furthermore, setting a current spreading layer on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer may include: setting the current spreading layer on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer using an electron beam evaporation method and an etching method. Setting the metal layer on the current spreading layer may include: setting the metal layer on the current spreading layer using a plasma-enhanced chemical vapor deposition method and a wet etching method.

[0057] Reference Figures 2a-2g ,in Figure 2d A current spreading layer 108 is shown disposed on a portion of the exposed first semiconductor layer 104 and a portion of the second semiconductor layer 106. Specifically, an electron beam evaporation method can be used to... Figure 2cThe structure shown is subjected to a current spreading layer 108, such as an indium tin oxide layer, which is then deposited by vapor deposition. A photoresist mask is then used, and the layer is etched with oxalic acid to obtain the desired result. Figure 2d The structure shown.

[0058] Reference Figures 2a-2g ,in Figure 2e A metal layer 109 disposed on the current spreading layer 108 is shown. Specifically, a plasma-enhanced chemical vapor deposition method can be used to deposit the metal layer 109 on the current spreading layer 108. Figure 2d A metal layer 109 is deposited on the structure shown, and then wet etching is performed using photoresist as a mask to obtain... Figure 2e The structure shown.

[0059] In step S105, metal blocks can be set on the metal layer to obtain a micro LED chip array.

[0060] According to embodiments of this disclosure, in order to fabricate a micro LED chip array, metal blocks can be disposed on a metal layer for bonding with other components to achieve corresponding functions. The material of the metal blocks may include indium, which has a low melting point and is particularly suitable for flip-chip bonding at lower temperatures; of course, any suitable metal may also be included.

[0061] Furthermore, setting metal blocks on the metal layer may include setting metal blocks on the metal layer using a vapor deposition method and a wet etching method.

[0062] Reference Figures 2a-2g , Figure 2f A metal block 110 disposed on the metal layer 109 is shown. Specifically, it can be... Figure 2e The structure shown employs vacuum thermal evaporation to deposit metal, such as indium, and wet etching is performed using photoresist as a mask to obtain the desired result. Figure 2f The structure shown.

[0063] Thus, the fabrication of the micro LED chip array is complete. Figure 2f The completed micro-LED chip array 30 is shown.

[0064] In step S106, the micro LED chip array can be flip-bonded to the driving substrate using the metal block to obtain a micro LED device.

[0065] According to embodiments of this disclosure, in order to realize a micro LED device, it is necessary to bond the fabricated micro LED chip array to a driving substrate.

[0066] Furthermore, the process of flip-bonding the micro-LED chip array to the driving substrate using the metal block to obtain a micro-LED device includes: reflowing the metal block to form metal bumps; and flip-bonding the micro-LED chip array to the driving substrate using the metal bumps.

[0067] Specifically, reflowing the metal block to form metal bumps may include: reflowing the metal block in a vacuum reflow furnace in an environment of N2 and formic acid to form the metal bumps.

[0068] Reference Figures 2a-2g ,in Figure 2g The image shows a micro-LED chip array 30 and a driving substrate 40 bonded together. Specifically, the image shows... Figure 2f The structure shown is placed in a vacuum reflux furnace for the reflux of metal block 110. The vacuum reflux furnace is first evacuated to ensure a vacuum state, then N2 and formic acid are introduced into the vacuum reflux furnace and the temperature is raised for reflux, resulting in the following... Figure 2g The metal bumps 111 are shown. The initial vacuum environment prevents metal oxidation during reflow, thus avoiding the formation of high-melting-point metal oxides. Formic acid reduces the metal oxides, while N2 reduces metal oxidation. Then, a flip-chip bonding machine is used to flip-chip the micro-LED chip array 30 and bond it to the driver substrate 40 using the metal bumps 111.

[0069] Thus, the fabrication of the micro LED device is complete. Figure 2g The completed micro-LED device 1 is shown.

[0070] It should be noted that the inventors of this disclosure discovered that reflection exists at the interface between the U-GaN layer of the light-emitting chip (lit pixel) of a monochromatic Micro-LED device on a sapphire substrate and the sapphire substrate. The reflected light can enter unlit pixels or exit from the side of the device, causing optical crosstalk or light leakage. Furthermore, in the fabrication of high-resolution displays, due to the reduction in pixel size, some processes experience yield problems, making optical crosstalk and light leakage more likely. According to the technical solution of this disclosure, a mesa structure including only at least one protrusion can be obtained by etching an epitaxial wafer, and an extinction layer can be formed on this mesa structure to form a micro-LED chip array on the extinction layer corresponding to each protrusion, thereby forming a micro-LED device. In this fabricated micro-LED device, each micro-LED chip in the micro-LED chip array acts as a pixel. The extinction layer absorbs light that is not properly emitted from the pixel, specifically light reflected from the interface between the third semiconductor layer (e.g., U-GaN layer) and the sapphire substrate. This reduces optical crosstalk between different pixels and mitigates the phenomenon of light continuously reflecting within the device and emitting light from the periphery. In other words, while achieving high resolution, it improves optical crosstalk and peripheral light leakage, thus achieving efficient display. In practice, it may even be possible to avoid optical crosstalk and peripheral light leakage altogether. Furthermore, because multiple micro-LED chips (pixels) are formed on the same protrusion, the light emitted by each chip is not absorbed or blocked by the structure of adjacent chips, thereby increasing the light output and improving screen brightness.

[0071] This disclosure also provides a micro LED device. This micro LED device can be manufactured using the micro LED device fabrication method described above.

[0072] like Figures 2a-2g As shown, the micro-LED device includes a micro-LED chip array 30 and a driving substrate 40. The micro-LED chip array 30 includes a mesa structure 20, which includes at least one boss 21. The at least one boss 21 sequentially includes a first semiconductor layer 104, a quantum well structure 105, and a second semiconductor layer 106. The micro-LED chip array 30 also includes: an extinction layer 107 disposed on the mesa structure 20 and including contact holes for exposing a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one boss. The extinction layer above each of the at least one boss has multiple contact holes for forming multiple light-emitting units; a metal layer 109 disposed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer; and a metal block 110 disposed on the metal layer 109. The micro-LED chip array 30 is flip-bonded to the driving substrate 40 through the metal block 110.

[0073] According to an embodiment of the present disclosure, the matte layer 107 has a plurality of first contact holes 1071 and a plurality of second contact holes 1072. Each of the plurality of first contact holes 1071 exposes a portion of the first semiconductor layer and each of the plurality of second contact holes 1072 exposes a portion of the second semiconductor layer on the boss. The plurality of second contact holes 1072 are formed according to a preset contact hole size and a preset hole spacing size.

[0074] According to an embodiment of the present disclosure, the micro LED chip array 30 further includes a current spreading layer 108 disposed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer, and the metal layer 109 disposed on the current spreading layer 108.

[0075] It is worth noting that any relevant descriptions of the micro-LED device structure in the above-mentioned micro-LED device fabrication method (including but not limited to technical features and their functions, explanations, etc.) can be applied to the micro-LED device disclosed herein.

[0076] This disclosure also provides a display device. The display device includes the aforementioned micro-LED device. The display device can be, for example, a display screen used in an electronic device. The electronic device can include: smartphones, smartwatches, laptops, tablets, dashcams, navigators, and any other device with a display screen.

[0077] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0078] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0079] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A method for fabricating a micro LED device, wherein, The method includes: A micro LED epitaxial wafer is provided, wherein the micro LED epitaxial wafer comprises, from bottom to top, a substrate, a first semiconductor layer, a quantum well structure, and a second semiconductor layer; Etching begins from the second semiconductor layer until the first semiconductor layer is exposed, resulting in a mesa structure, wherein the mesa structure includes at least one boss. An matting layer is provided on the platform structure and contact holes are formed on the matting layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one protrusion. A plurality of contact holes are formed on the matting layer above each of the at least one protrusion to form a plurality of light-emitting units. A metal layer is disposed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer; A micro LED chip array is obtained by placing metal blocks on the metal layer. The micro LED chip array is flip-bonded to the driving substrate using the metal block to obtain a micro LED device.

2. The method for fabricating a micro LED device according to claim 1, wherein, Contact holes are formed in the matte layer to expose a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one protrusion. Multiple contact holes are formed on the matte layer above each of the at least one protrusion to form multiple light-emitting units, including: Multiple first contact holes and multiple second contact holes are formed on the matte layer, such that each of the multiple first contact holes exposes a portion of the first semiconductor layer and each of the multiple second contact holes exposes a portion of the second semiconductor layer on the boss, wherein the multiple second contact holes are formed according to a preset contact hole size and a preset hole spacing size.

3. The method for fabricating a micro LED device according to claim 1, wherein, Depositing a metal layer on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer includes: A current spreading layer is disposed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer; The metal layer is disposed on the current spreading layer.

4. The method for fabricating a micro LED device according to claim 3, wherein, The current spreading layer includes an indium tin oxide layer.

5. The method for fabricating a micro LED device according to claim 1, wherein, The micro-LED chip array is flip-bonded to the driving substrate using the metal block to obtain a micro-LED device comprising: The metal block is recirculated to form metal bumps; The micro-LED chip array is flip-bonded to the driving substrate using the metal bumps.

6. The method for fabricating a micro LED device according to any one of claims 1 to 5, wherein, The substrate is a sapphire substrate, the first semiconductor layer is an N-GaN layer, and the second semiconductor layer is a P-GaN layer.

7. A miniature LED device, wherein, The micro-LED device includes a micro-LED chip array and a driving substrate. The micro-LED chip array includes a mesa structure, which includes at least one protrusion. The at least one protrusion sequentially includes a first semiconductor layer, a quantum well structure, and a second semiconductor layer. Furthermore, the micro LED chip array also includes: A matting layer is disposed on the mesa structure and includes contact holes for exposing a portion of the first semiconductor layer and a portion of the second semiconductor layer on the at least one boss, wherein a plurality of contact holes are formed on the matting layer above each of the at least one boss for forming a plurality of light-emitting units; A metal layer disposed on the exposed portions of the first semiconductor layer and the second semiconductor layer; A metal block, which is disposed on the metal layer, The micro LED chip array is flip-bonded to the driving substrate via the metal block.

8. The micro LED device according to claim 7, wherein, The matte layer has a plurality of first contact holes and a plurality of second contact holes. Each of the plurality of first contact holes exposes a portion of the first semiconductor layer and each of the plurality of second contact holes exposes a portion of the second semiconductor layer on the boss. The plurality of second contact holes are formed according to a preset contact hole size and a preset hole spacing size.

9. The micro LED device according to claim 7, wherein, The micro LED chip array further includes a current spreading layer disposed on the exposed portion of the first semiconductor layer and the portion of the second semiconductor layer, and the metal layer disposed on the current spreading layer.

10. A display device, wherein, The display device includes the micro LED device according to any one of claims 7 to 9.

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