Filter integrated circuit

Abstract

The present application provides a filter integrated circuit, including an acoustic wave filter chip and a matching circuit. The acoustic wave filter chip is mounted on a substrate. The matching circuit is disposed on the substrate to provide a matching impedance to the acoustic wave filter chip. First and second contact pads of the matching circuit are connected to first and second signal terminals of the acoustic wave filter chip, respectively. First and second coil inductances of the matching circuit have first ends connected to the first and second contact pads of the substrate, respectively. The first coil inductance is adjacent to the second coil inductance and coupled to the second coil inductance to form a parasitic capacitance, so that the matching circuit and the acoustic wave filter chip together generate a transmission zero point in a range of three times of a fundamental frequency.

Description

Technical Field

[0001] This invention relates to an integrated circuit, and more particularly to a filter integrated circuit. Background Technology

[0002] Electronic filters are widely used in various electronic circuits. A filter is a circuit, component, or device that performs signal processing functions, attenuating unwanted components and / or amplifying desired components in a signal. Among the many types of filters, acoustic filters, such as surface acoustic wave (SAW) filters and bulk acoustic wave (BAW) filters, are widely used in communication circuits. As 5G frequency bands move towards higher frequencies, the market share of acoustic filters will increase. Summary of the Invention

[0003] The present invention provides a filter integrated circuit, which enables a matching circuit and an acoustic filter chip to jointly generate a transmission zero point located in the third harmonic range of the fundamental frequency of the input signal.

[0004] In one embodiment of the present invention, the aforementioned filter integrated circuit is used to filter an input signal having a fundamental frequency within a frequency band and output an output signal. The filter integrated circuit includes an acoustic wave filter chip and a matching circuit. The acoustic wave filter chip is mounted on a substrate to suppress signals outside the frequency band. A first signal terminal and a second signal terminal of the acoustic wave filter chip are respectively used to input the input signal or output the output signal. The matching circuit is disposed on the substrate to provide matching impedance to the acoustic wave filter chip. The matching circuit includes a first pad, a second pad, a first coil inductor, and a second coil inductor disposed on the substrate. The first pad is electrically connected to the first signal terminal of the acoustic wave filter chip. The second pad is electrically connected to the second signal terminal of the acoustic wave filter chip. The first end of the first coil inductor is electrically connected to the first pad of the substrate. The first end of the second coil inductor is electrically connected to the second pad of the substrate. The first coil inductor is adjacent to the second coil inductor and mutually inducts to form a parasitic capacitance, which, together with the acoustic wave filter chip, generates a transmission zero within the third harmonic range of the fundamental frequency.

[0005] Based on the above, the matching circuit described in the embodiments of the present invention can provide a matching impedance to the acoustic wave filter chip. In the matching circuit, the first coil inductor is adjacent to the second coil inductor and they are mutually inducted, forming a parasitic capacitance. Accordingly, the first coil inductor, the second coil inductor, and the acoustic wave filter chip can jointly generate a transmission zero within the third harmonic range of the fundamental frequency of the input signal of the acoustic wave filter chip.

[0006] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0007] Figure 1 This is a three-dimensional perspective view of a filter integrated circuit according to an embodiment of the present invention. Figure 2 This is a three-dimensional schematic diagram illustrating a bulk acoustic wave (BAW) filter chip according to an embodiment of the present invention. Figure 3 This is described according to an embodiment of the present invention. Figure 2 The diagram shows the equivalent circuit of the BAW filter chip. Figure 4 This is described according to an embodiment of the present invention. Figure 1 A three-dimensional perspective view of the substrate shown. Figure 5 This is illustrated according to an embodiment of the present invention. Figure 4 The diagram shows the layout structure of the first conductive layer. Figure 6 This is illustrated according to an embodiment of the present invention. Figure 4 The diagram shows the layout structure of the second conductive layer. Figure 7 This is illustrated according to another embodiment of the present invention. Figure 4 The diagram shows the layout structure of the second conductive layer. Figure 8 This is described according to another embodiment of the present invention. Figure 1 A three-dimensional perspective view of the substrate shown. Figure 9 This is illustrated according to an embodiment of the present invention. Figure 8 The diagram shows the layout structure of the third conductive layer M3. Figure 10 This is illustrated according to an embodiment of the present invention. Figure 8 The diagram shows the layout structure of the second conductive layer M2. Figure 11 This is illustrated according to an embodiment of the present invention. Figure 8 The diagram shows the layout structure of the first conductive layer M1. Symbol Explanation 100: Filter Integrated Circuit 110: Acoustic wave filter chip 120:Substrate 121, 122: Matching circuits 121_11, 121_21, 121_22, 122_14, 122_24, 122_25, 122_31, 122_32: Reference voltage transfer components 121_12, 121_13, 122_15, 122_16: Adjusting coils 121_23: Conductor FBAR11, FBAR12, FBAR13, FBAR14, FBAR21, FBAR22, FBAR23: Thin-film bulk acoustic resonators L1, L2: Coil inductance M1: First conductive layer M2: Second conductive layer M3: Third conductive layer Nref1, Nref2, Nref3: Reference voltage terminals Ns1: First signal terminal Ns2: Second signal terminal Pref1, Pref2, Ps1, Ps2: Pads Sin: Input signal Sout: Output signal Vref: Reference voltage Detailed Implementation

[0008] The term "coupled (or connected)" as used throughout the entire specification (including the scope of the claims) of this case. The term "first" can refer to any direct or indirect means of connection. For example, if the text describes a first device coupled (or connected) to a second device, it should be interpreted as meaning that the first device can be directly connected to the second device, or that the first device can be indirectly connected to the second device through other devices or some means of connection. The terms "first" and "second" as used throughout the entire specification (including the scope of the claims) are also relevant. Terms such as "component" are used to name components or distinguish different embodiments or scopes, and are not used to limit the upper or lower limit of the number of components, nor to limit the order of components. Furthermore, wherever possible, components / components / steps using the same reference numerals in the drawings and embodiments represent the same or similar parts. Components / components / steps using the same reference numerals or the same terms in different embodiments can be referred to mutually in the relevant descriptions.

[0009] Figure 1 This is a three-dimensional perspective view of a filter integrated circuit 100 according to an embodiment of the present invention. Figure 1The X, Y, and Z axes are illustrated. The filter integrated circuit 100 is configured with pads Ps1 and Ps2. Pads Ps1 and Ps2 are adapted for electrical connection to a printed circuit board (PCB, not shown). Pad Ps1 can be configured to receive an input signal Sin, and pad Ps2 can be configured to output an output signal Sout. Pads Ps1 and Ps2 can also be interchanged. The filter integrated circuit 100 can filter an input signal Sin having a fundamental frequency in a certain frequency band and output the output signal Sout. The filter integrated circuit 100 is also configured with at least one pad Pref1 adapted for electrical connection to the printed circuit board. The number of pads Pref1 can be determined according to the actual design. Pad Pref1 is configured to receive a reference voltage Vref. The reference voltage Vref can be determined according to the actual design. For example, in some embodiments, the reference voltage Vref can be ground voltage or other fixed voltage.

[0010] exist Figure 1 In the illustrated embodiment, the filter integrated circuit 100 includes an acoustic wave filter chip 110 and a substrate 120. A matching circuit (not shown) Figure 1 (Details to follow) The acoustic filter chip 110 is disposed in substrate 120 to provide matching impedance to the acoustic filter chip 110. The acoustic filter chip 110 is housed in a package of filter integrated circuit 100, and substrate 120 may be a package substrate of filter integrated circuit 100. The acoustic filter chip 110 is overlaid on substrate 120. The acoustic filter chip 110 can suppress signals outside a certain frequency band. Although not shown in the diagram... Figure 1 The acoustic filter chip 110 has a first signal terminal and a second signal terminal for inputting / receiving the input signal Sin or outputting the output signal Sout, respectively. That is, the first signal terminal of the acoustic filter chip 110 can be electrically connected to one of the pads Ps1 and Ps2 through the substrate 120, and the second signal terminal of the acoustic filter chip 110 can be electrically connected to the other of the pads Ps1 and Ps2 through the substrate 120.

[0011] This embodiment does not limit the specific implementation of the acoustic filter chip 110. For example, according to actual design, the acoustic filter chip 110 may include a bulk acoustic wave (BAW) filter chip, a surface acoustic wave (SAW) filter chip, and / or other filters. Compared to SAW filter chips, BAW filter chips are suitable for use in higher frequency bands, and applying BAW filter chips to this embodiment does not require additional external components. The following description will use a BAW filter chip as an example of a specific implementation of the acoustic filter chip 110.

[0012] The acoustic filter chip 110 may include a plurality of first film bulk acoustic resonators (FBARs) and a plurality of second film bulk acoustic resonators. This embodiment does not limit the specific implementation of these film bulk acoustic resonators. For example, according to actual design, any of these film bulk acoustic resonators may include conventional film bulk acoustic resonators and / or other film bulk acoustic resonators. These first film bulk acoustic resonators are connected in series with each other at the first signal terminal and the second signal terminal (not shown) of the acoustic filter chip 110. Figure 1 Between these second thin-film bulk acoustic resonators. The first terminal of each of these second thin-film bulk acoustic resonators is electrically connected to a corresponding one of these first thin-film bulk acoustic resonators to form a π-type circuit structure. The second terminal of each of these second thin-film bulk acoustic resonators is electrically connected to a plurality of reference voltage terminals (not shown) of the acoustic filter chip 110. Figure 1 One of the corresponding terminals of the acoustic filter chip 110 is used to receive the reference voltage Vref. That is, these reference voltage terminals of the acoustic filter chip 110 can be electrically connected to the pad Pref1 via the substrate 120. The number of these first thin-film bulk acoustic resonators and the number of these second thin-film bulk acoustic resonators of the acoustic filter chip 110 can be determined according to the actual design.

[0013] For example, Figure 2 This is described according to an embodiment of the present invention. Figure 1 A three-dimensional schematic diagram of the acoustic filter chip 110 is shown. Figure 2 The embodiment shown uses a BAW filter chip as an example of a specific implementation of the acoustic wave filter chip 110. Figure 2 The X, Y, and Z axes shown can be referenced. Figure 1 The X-axis, Y-axis, and Z-axis are shown. Figure 3 This is described according to an embodiment of the present invention. Figure 2 The diagram shows the equivalent circuit of the acoustic filter chip 110. Please refer to the diagram. Figure 2 and Figure 3 The acoustic filter chip 110 can suppress signals outside the rated frequency band. One of the first signal terminal Ns1 and the second signal terminal Ns2 of the acoustic filter chip 110 can be used to input the input signal Sin, while the other of the first signal terminal Ns1 and the second signal terminal Ns2 can be used to output the output signal Sout.

[0014] exist Figure 2 and Figure 3 In the illustrated embodiment, the acoustic filter chip 110 may include a plurality of first thin-film bulk acoustic resonators (e.g., thin-film bulk acoustic resonators FBAR11, FBAR12, FBAR13, and FBAR14) and a plurality of second thin-film bulk acoustic resonators (e.g., thin-film bulk acoustic resonators FBAR21, FBAR22, and FBAR23). According to the actual design, Figure 2 and Figure 3 Any of the thin-film bulk acoustic resonators FBAR11–FBAR14 and FBAR21–FBAR23 shown can be a conventional thin-film bulk acoustic resonator and / or other thin-film bulk acoustic resonators. It should be noted that… Figure 2 and Figure 3 The thin-film bulk acoustic resonators FBAR11-FBAR14 and FBAR21-FBAR23 shown are one specific example of many embodiments of the acoustic filter chip 110. However, the embodiments of the acoustic filter chip 110 should not be limited to these examples. Figure 2 and Figure 3 The illustrated embodiment.

[0015] exist Figure 2 and Figure 3 In the illustrated embodiment, the thin-film bulk acoustic wave resonators FBAR11 to FBAR14 are connected in series between the first signal terminal Ns1 and the second signal terminal Ns2 of the acoustic wave filter chip 110. The first signal terminal Ns1 can be electrically connected to one of the pads Ps1 and Ps2 via the substrate 120, and the second signal terminal Ns2 can be electrically connected to the other of the pads Ps1 and Ps2 via the substrate 120. The first terminal of each of the thin-film bulk acoustic wave resonators FBAR21 to FBAR23 is electrically connected to a corresponding one of the thin-film bulk acoustic wave resonators FBAR11 to FBAR14 to form a π-type circuit structure (e.g., ...). Figure 3 (As shown). The second terminal of each of the thin-film bulk acoustic resonators FBAR21 to FBAR23 is electrically connected to the reference voltage terminal of the acoustic filter chip 110 (e.g., Figure 2 and Figure 3The reference voltage terminals Nref1, Nref2, and Nref3 shown correspond to one of them. These reference voltage terminals Nref1 to Nref3 of the acoustic filter chip 110 can be electrically connected to the pad Pref1 via the substrate 120 to receive the reference voltage Vref.

[0016] Figure 4 This is described according to an embodiment of the present invention. Figure 1 A three-dimensional perspective view of the substrate 120 shown. Figure 4 The X, Y, and Z axes shown can be referenced. Figure 1 The X-axis, Y-axis, and Z-axis are shown. Figure 4 The substrate 120 shown includes a first conductive layer M1 and a second conductive layer M2. Please refer to... Figure 1 , Figure 3 and Figure 4 The second conductive layer M2 is disposed between the first conductive layer M1 and the acoustic filter chip 110. It should be noted that... Figure 4 The first conductive layer M1 and the second conductive layer M2 shown are a specific example of many embodiments of the substrate 120. However, the embodiments of the substrate 120 should not be limited to these examples. Figure 4 The illustrated embodiment. According to actual design, in some embodiments, substrate 120 includes three (or more) conductive layers. In other embodiments, substrate 120 may have only a second conductive layer M2.

[0017] exist Figure 4 In the illustrated embodiment, a matching circuit 121 is disposed on the first conductive layer M1 and the second conductive layer M2 of the substrate 120. The matching circuit 121 can provide matching impedance to the acoustic wave filter chip 110. Pads Ps1 and Ps2 are disposed on the first conductive layer M1 of the substrate 120. Pad Ps1 is electrically connected to one of the first signal terminals Ns1 and Ns2 of the acoustic wave filter chip 110, while pad Ps2 is electrically connected to the other of the first signal terminals Ns1 and Ns2 of the acoustic wave filter chip 110. For example, pad Ps1 can be electrically connected to the first signal terminal Ns1 of the acoustic wave filter chip 110 through a conductive via (not shown), and pad Ps2 can be electrically connected to the second signal terminal Ns2 of the acoustic wave filter chip 110 through a conductive via (not shown).

[0018] Matching circuit 121 includes pads Ps1, Ps2, Pref1, coil inductance L1, and coil inductance L2, wherein coil inductance L1 and coil inductance L2 will be referred to later. Figure 3 and Figure 6 To explain. Although not shown in Figure 1 ,exist Figure 4In the illustrated embodiment, the matching circuit 121 may further include a pad Pref2. The pad Pref2 is configured to receive a reference voltage Vref. Figure 4 In the illustrated embodiment, coil inductors L1 and L2 are disposed on the second conductive layer M2 of substrate 120. The first end of coil inductor L1 is electrically connected to pad Ps1 of substrate 120 via a conductive via (not shown). The first end of coil inductor L2 is electrically connected to pad Ps2 of substrate 120 via a conductive via (not shown). Coil inductors L1 and L2 are mutually inductant to form parasitic capacitance, which, together with the acoustic wave filter chip 110, generates transmission zeros within the third harmonic range of the fundamental frequency of the input signal Sin, particularly transmission zeros within the second and / or third harmonics, thereby suppressing the second harmonic (i.e., the second harmonic) and / or third harmonic (i.e., the third harmonic) in the input signal Sin.

[0019] Figure 5 This is illustrated according to an embodiment of the present invention. Figure 4 The diagram shows the layout structure of the first conductive layer M1. Figure 6 This is illustrated according to an embodiment of the present invention. Figure 4 The diagram shows the layout structure of the second conductive layer M2. Please refer to... Figure 3 , Figure 4 , Figure 5 and Figure 6 The reference voltage transmission components 121_21 and 121_22, the coil inductor L1, and the coil inductor L2 of the matching circuit 121 are disposed in the second conductive layer M2. The reference voltage transmission components 121_11, the adjustment coil 121_12, and the adjustment coil 121_13 of the matching circuit 121 are disposed in the first conductive layer M1.

[0020] The reference voltage transmission component 121_11 in the first conductive layer M1 is electrically connected to pads Pref1 and Pref2. Reference voltage transmission component 121_11 is also electrically connected to reference voltage transmission components 121_21 and 121_22 in the second conductive layer M2 via conductive vias (not shown). Reference voltage transmission components 121_21 and 121_22 are electrically connected to the reference voltage terminals Nref1 to Nref3 of the acoustic wave filter chip 110. Therefore, the reference voltage Vref can be transmitted to the reference voltage terminals Nref1 to Nref3 of the acoustic wave filter chip 110 through pads Pref1 and Pref2, reference voltage transmission component 121_11, and conductive vias (not shown).

[0021] The first end of coil inductor L1 is electrically connected to pad Ps1 and the first signal terminal Ns1 of acoustic filter chip 110 via a conductive via (not shown). Adjustment coil 121_12 is configured corresponding to coil inductor L1. For example, the projection of adjustment coil 121_12 onto the Z-direction of the XY plane where coil inductor L1 is located has a similar shape and a close position to coil inductor L1. In one embodiment, they may have coil shapes with opposite or the same winding direction and close shape center positions. The first end of adjustment coil 121_12 is electrically connected to the second end of coil inductor L1 via a conductive via (not shown). The second end of adjustment coil 121_12 is electrically connected to reference voltage transmission component 121_11. The number of turns of adjustment coil 121_12 is less than the number of turns of coil inductor L1. The first end of coil inductor L2 is electrically connected to pad Ps2 and the second signal terminal Ns2 of acoustic filter chip 110 via a conductive via (not shown). The adjustment coil 121_13 is configured to correspond to the coil inductance L2. For example, the projection of the adjustment coil 121_13 onto the Z-direction of the XY plane containing the coil inductance L2 has a similar shape and a close position to the coil inductance L2. In one embodiment, they may have coil shapes with opposite or identical winding directions and close shape center positions. The first end of the adjustment coil 121_13 can be electrically connected to the second end of the coil inductance L2 via a conductive via (not shown). The second end of the adjustment coil 121_13 is electrically connected to the reference voltage transmission component 121_11. The number of turns of the adjustment coil 121_13 is less than the number of turns of the coil inductance L2.

[0022] exist Figure 6 In the illustrated embodiment, coil inductor L1 includes a helical first conductor, and coil inductor L2 includes a helical second conductor. The first conductor has a first linewidth, and the second conductor has a second linewidth. The shortest distance between coil inductors L1 and L2 is less than four times the first linewidth (or the second linewidth). The outermost first conductor of coil inductor L1 and the outermost second conductor of coil inductor L2 are parallel to each other. Coil inductors L1 and L2 are mutually inductant to form parasitic capacitance, which, together with the acoustic filter chip 110, generates transmission zeros in the third harmonic range of the fundamental frequency of the input signal Sin, particularly transmission zeros in the second and / or third harmonic ranges, to suppress the second harmonic (i.e., the second harmonic) and / or third harmonic (i.e., the third harmonic) in the input signal Sin. In one embodiment, any conductor is excluded between coil inductors L1 and L2 to provide better mutual inductance between them.

[0023] Figure 7 This is illustrated according to another embodiment of the present invention. Figure 4The diagram shows the layout structure of the second conductive layer M2. Please refer to... Figure 3 , Figure 4 , Figure 5 and Figure 7 .exist Figure 7 In the illustrated embodiment, the matching circuit 121 further includes a wire 121_23. The reference voltage transmission components 121_21 and 121_22, the wire 121_23, the coil inductor L1, and the coil inductor L2 of the matching circuit 121 are disposed in the second conductive layer M2. The two ends of the wire 121_23 are electrically connected to the reference voltage transmission components 121_21 and 121_22, respectively. That is, the wire 121_23 can be electrically connected to the pad Pref1 through the reference voltage transmission component 121_21, and electrically connected to the pad Pref2 through the reference voltage transmission component 121_22. The wire 121_23 is disposed between the coil inductor L1 and the coil inductor L2. In this embodiment, although there is a conductor, i.e., wire 121_23, between coil inductance L1 and coil inductance L2, the shortest distance between coil inductance L1 and wire 121_23, the shortest distance between coil inductance L2 and wire 121_23, and / or the width of wire 121_23 can be appropriately adjusted so that coil inductance L1 can mutually induct with coil inductance L2 through wire 121_23 to form a parasitic capacitance. This capacitance, together with the acoustic wave filter chip 110, generates a transmission zero within the third harmonic range of the fundamental frequency of the input signal Sin, particularly a transmission zero within the second and / or third harmonic range, thereby suppressing the second harmonic (i.e., the second harmonic) and / or third harmonic (i.e., the third harmonic) in the input signal Sin. For example, coil inductance L1 includes a helical first wire, and coil inductance L2 includes a helical second wire. The first wire has a first linewidth, and the second wire has a second linewidth. The shortest distance between coil inductance L1 and wire 121_23, and the shortest distance between coil inductance L2 and wire 121_23 are respectively less than 4 times the first line width and 4 times the second line width.

[0024] In the above embodiments, coil inductance L1 and coil inductance L2 are placed in the same conductive layer. However, the implementation of the matching circuit is not limited to this. For example, in other embodiments, coil inductance L1 and coil inductance L2 may be disposed in different conductive layers and not overlap each other.

[0025] Figure 8 This is described according to another embodiment of the present invention. Figure 1 A three-dimensional perspective view of the substrate 120 shown. Figure 8 The X, Y, and Z axes shown can be referenced. Figure 1 The X-axis, Y-axis, and Z-axis are shown. Figure 8The substrate 120 shown includes a first conductive layer M1, a second conductive layer M2, and a third conductive layer M3. Please refer to... Figure 1 , Figure 3 and Figure 8 The second conductive layer M2 is disposed between the first conductive layer M1 and the third conductive layer M3. The third conductive layer M3 is disposed between the second conductive layer M2 and the acoustic wave filter chip 110. It should be noted that... Figure 8 The first conductive layer M1, the second conductive layer M2, and the third conductive layer M3 shown are a specific example of many embodiments of the substrate 120. However, the embodiments of the substrate 120 should not be limited to these examples. Figure 8 The illustrated embodiment.

[0026] exist Figure 8 In the illustrated embodiment, a matching circuit 122 is disposed on the first conductive layer M1, the second conductive layer M2, and the third conductive layer M3 of the substrate 120. The matching circuit 122 can provide matching impedance to the acoustic wave filter chip 110. Pads Ps1 and Ps2 are disposed on the first conductive layer M1 of the substrate 120. Pad Ps1 is electrically connected to one of the first signal terminals Ns1 and Ns2 of the acoustic wave filter chip 110, while pad Ps2 is electrically connected to the other of the first signal terminals Ns1 and Ns2 of the acoustic wave filter chip 110. For example, pad Ps1 can be electrically connected to the first signal terminal Ns1 of the acoustic wave filter chip 110 through a conductive via, and pad Ps2 can be electrically connected to the second signal terminal Ns2 of the acoustic wave filter chip 110 through a conductive via.

[0027] Figure 9 This is illustrated according to an embodiment of the present invention. Figure 8 The diagram shows the layout structure of the third conductive layer M3. Figure 10 This is illustrated according to an embodiment of the present invention. Figure 8 The diagram shows the layout structure of the second conductive layer M2. Figure 11 This is illustrated according to an embodiment of the present invention. Figure 8 The diagram shows the layout structure of the first conductive layer M1. Please refer to it. Figure 3 , Figure 8 , Figure 9 , Figure 10 and Figure 11 The matching circuit 122 includes pads Ps1, Ps2, Pref1, Pref2, coil inductance L1, and coil inductance L2. Figures 8 to 11 The matching circuit 122, pads Ps1, Ps2, Pref1, Pref2, coil inductance L1, and coil inductance L2 shown can be referenced. Figures 4 to 7The relevant descriptions of the matching circuit 121, pads Ps1, Ps2, Pref1, Pref2, coil inductance L1, and coil inductance L2 shown are omitted here.

[0028] exist Figures 8 to 11 In the illustrated embodiment, coil inductor L1 is disposed on the second conductive layer M2 of substrate 120, while coil inductor L2 is disposed on the third conductive layer M3 of substrate 120. The first end of coil inductor L1 is electrically connected to pad Ps1 of substrate 120 via a conductive via. The first end of coil inductor L2 is electrically connected to pad Ps2 of substrate 120 via a conductive via. Coil inductors L1 and L2 are disposed on different conductive layers M2 and M3 and do not overlap. Coil inductor L1 is adjacent to coil inductor L2 and forms a parasitic capacitance, which, together with the acoustic wave filter chip 110, generates transmission zeros within the third harmonic range of the fundamental frequency of the input signal Sin, particularly transmission zeros within the second and / or third harmonics, thereby suppressing the second harmonic (i.e., second harmonic) and / or third harmonic (i.e., third harmonic) in the input signal Sin.

[0029] The reference voltage transmission components 122_31 and 122_32 of the matching circuit 122, along with the coil inductor L2, are disposed in the third conductive layer M3. The reference voltage transmission components 122_24 and 122_25 of the matching circuit 122, along with the coil inductor L1, are disposed in the second conductive layer M2. The reference voltage transmission components 122_14, adjustment coils 122_15 and 122_16 of the matching circuit 122 are disposed in the first conductive layer M1. The reference voltage transmission component 122_14 is electrically connected to pads Pref1 and Pref2. The reference voltage transmission component 122_14 is also electrically connected to reference voltage transmission components 122_24 and 122_25 via conductive vias (not shown). Reference voltage transmission components 122_24 and 122_25 are electrically connected to reference voltage transmission components 122_31 and 122_32 via conductive vias (not shown). Reference voltage transmission components 122_31 and 122_32 are electrically connected to the reference voltage terminals Nref1 to Nref3 of the acoustic wave filter chip 110. Therefore, the reference voltage Vref can be transmitted to the reference voltage terminals Nref1 to Nref3 of the acoustic wave filter chip 110 through pads Pref1 and Pref2.

[0030] The first end of coil inductance L1 is electrically connected to pad Ps1 and the first signal terminal Ns1 of acoustic filter chip 110 via a conductive via. Adjust coil 122_15 is configured corresponding to coil inductance L1. The first end of coil 122_15 is electrically connected to the second end of coil inductance L1 via a conductive via. The second end of coil 122_15 is electrically connected to reference voltage transmission component 122_14. The number of turns of coil 122_15 is less than the number of turns of coil inductance L1. The first end of coil inductance L2 is electrically connected to pad Ps2 and the second signal terminal Ns2 of acoustic filter chip 110 via a conductive via. Adjust coil 122_16 is configured corresponding to coil inductance L2. The first end of coil 122_16 is electrically connected to the second end of coil inductance L2 via a conductive via. The second end of coil 122_16 is electrically connected to reference voltage transmission component 122_14. Adjust the number of turns of coil 122_16 to be less than the number of turns of coil inductance L2.

[0031] exist Figures 8 to 11 In the illustrated embodiment, coil inductor L1 includes a helical first conductor, and coil inductor L2 includes a helical second conductor. The first conductor has a first linewidth, and the second conductor has a second linewidth. The shortest distance between coil inductors L1 and L2 is less than four times the first linewidth (or the second linewidth). The outermost first conductor of coil inductor L1 and the outermost second conductor of coil inductor L2 are parallel to each other. No conductors are excluded between coil inductors L1 and L2. Coil inductors L1 and L2 are mutually inductant to form parasitic capacitance, which, together with the acoustic filter chip 110, generates transmission zeros in the third harmonic range of the fundamental frequency of the input signal Sin, particularly transmission zeros in the second and / or third harmonic ranges, to suppress the second harmonic (i.e., the second harmonic) and / or third harmonic (i.e., the third harmonic) in the input signal Sin.

[0032] In summary, the matching circuit 122 (or 121) described in the above embodiments can provide matching impedance to the acoustic filter chip 110. In the matching circuit 122 (or 121), the coil inductance L1 is adjacent to the coil inductance L2 and they are mutually inductive, forming a parasitic capacitance. Therefore, it is not necessary to add any external components (such as capacitors). Based on this, the coil inductance L1, the coil inductance L2, and the acoustic filter chip 110 can jointly generate a transmission zero in the third harmonic range of the fundamental frequency of the input signal Sin, especially a transmission zero in the second harmonic and / or third harmonic range, so as to suppress the second harmonic (i.e., the second harmonic) and / or the third harmonic (i.e., the third harmonic) in the input signal Sin.

[0033] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the claims.

Claims

1. A filter integrated circuit, characterized in that, This is used to filter an input signal with a fundamental frequency in a frequency band and output an output signal, including: An acoustic wave filter chip, mounted on a substrate, is used to suppress signals outside a certain frequency band. It has a first signal terminal and a second signal terminal for inputting the input signal and outputting the output signal, respectively. A matching circuit, disposed on the substrate, is used to provide a matching impedance for the acoustic wave filter chip, including: A first pad is disposed on the substrate for electrically connecting to the first signal terminal of the acoustic wave filter chip; A second pad is disposed on the substrate for electrically connecting to the second signal terminal of the acoustic wave filter chip; A first coil inductor is disposed on the substrate, wherein a first terminal of the first coil inductor is electrically connected to the first pad of the substrate; and A second coil inductor is disposed on the substrate, wherein a first end of the second coil inductor is electrically connected to the second pad of the substrate; The first coil inductor is adjacent to the second coil inductor and they are mutually inducted to form a parasitic capacitance, which together with the acoustic filter chip generates a transmission zero in the third harmonic range of the fundamental frequency. The substrate further includes a first conductive layer, and the first pad and the second pad are disposed on the first conductive layer; The matching circuit further includes a reference voltage transmission component disposed on the first conductive layer and electrically connected to a first reference voltage terminal.

2. The filter integrated circuit as described in claim 1, characterized in that, The matching circuit further includes a first adjustment coil and a second adjustment coil disposed on the first conductive layer and connected to the reference voltage transmission component, wherein the first adjustment coil and the second adjustment coil are respectively disposed corresponding to the first coil inductance and the second coil inductance.

3. The filter integrated circuit as described in claim 2, characterized in that, The number of turns of the first adjustment coil and the second adjustment coil is less than the number of turns of the inductance of the first coil and the inductance of the second coil, respectively.

4. The filter integrated circuit as described in claim 1, characterized in that, The matching circuit further includes a third pad disposed on the first conductive layer and electrically connected to the reference voltage transmission component and the first reference voltage terminal.

5. The filter integrated circuit as described in claim 4, characterized in that, The matching circuit further includes a fourth pad disposed on the first conductive layer and electrically connected to the reference voltage transmission component and the first reference voltage terminal.

6. The filter integrated circuit as described in claim 1, characterized in that, The first coil inductor and the second coil inductor each further include a spiral first wire and a spiral second wire.

7. The filter integrated circuit as described in claim 1, characterized in that, The substrate further includes a second conductive layer, on which the first coil inductor and the second coil inductor are disposed.

8. The filter integrated circuit as described in claim 7, characterized in that, The second conductive layer is disposed between the first conductive layer and the acoustic filter chip.

9. The filter integrated circuit as described in claim 1, characterized in that, The substrate further includes a second conductive layer and a third conductive layer, with the first coil inductor disposed on the second conductive layer and the second coil inductor disposed on the third conductive layer.

10. The filter integrated circuit of claim 9, wherein the second conductive layer is disposed between the first conductive layer and the third conductive layer, and the third conductive layer is disposed between the second conductive layer and the acoustic filter chip.

11. A filter integrated circuit, characterized in that, This is used to filter an input signal with a fundamental frequency in a frequency band and output an output signal, including: An acoustic wave filter chip, mounted on a substrate, is used to suppress signals outside a certain frequency band. It has a first signal terminal and a second signal terminal for inputting the input signal and outputting the output signal, respectively. A matching circuit, disposed on the substrate, is used to provide a matching impedance for the acoustic wave filter chip, including: A first pad is disposed on the substrate for electrically connecting to the first signal terminal of the acoustic wave filter chip; A second pad is disposed on the substrate for electrically connecting to the second signal terminal of the acoustic wave filter chip; A first coil inductor is disposed on the substrate, wherein a first terminal of the first coil inductor is electrically connected to the first pad of the substrate; and A second coil inductor is disposed on the substrate, wherein a first end of the second coil inductor is electrically connected to the second pad of the substrate; The first coil inductor is adjacent to the second coil inductor and they are mutually inducted to form a parasitic capacitance, which together with the acoustic filter chip generates a transmission zero in the third harmonic range of the fundamental frequency. The first coil inductor and the second coil inductor each further include a spiral first wire and a spiral second wire; The first conductor and the second conductor each have a first line width and a second line width, and the shortest distance between the first coil inductance and the second coil inductance is less than 4 times the first line width or the second line width.

12. The filter integrated circuit as described in claim 11, characterized in that, The first wire and the second wire are located on the outermost sides of the first coil inductance and the second coil inductance, respectively.

13. The filter integrated circuit as described in claim 12, characterized in that, The first conductor and the second conductor are parallel to each other.

14. The filter integrated circuit as described in claim 12, characterized in that, The first coil inductor and the second coil inductor are disposed on the same conductive layer.

15. The filter integrated circuit as described in claim 12, characterized in that, The first coil inductor and the second coil inductor are disposed on different conductive layers and do not overlap with each other.

16. The filter integrated circuit as described in claim 11, characterized in that, There is no conductor between the first coil inductance and the second coil inductance.

17. The filter integrated circuit as described in claim 11, characterized in that, The substrate further includes a third conductor disposed between the first coil inductor and the second coil inductor, and the first coil inductor is mutually inducted with the second coil inductor through the third conductor.

18. The filter integrated circuit as described in claim 17, characterized in that, The matching circuit further includes a third pad electrically connected to a first reference voltage terminal, and a third wire electrically connected to the third pad.

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