Circuit used to adjust the clock duty cycle

Abstract

This application relates to the field of integrated circuits and discloses a circuit for adjusting the clock duty cycle. This circuit can use a smaller current source for adjustment and control, reducing circuit power consumption and improving signal adjustment accuracy. The circuit includes an adjustable current source, a first resistor, a second resistor, a first inverter, a second inverter, and a capacitor. The output terminal of the adjustable current source, the first terminal of the first resistor, and the first terminal of the second resistor are coupled to the input terminal of the second inverter. The second terminal of the first resistor is coupled to the output terminal of the second inverter, and the second terminal of the second resistor is coupled to the input terminal of the first inverter. The first terminal of the capacitor is coupled to the clock signal input terminal, and the second terminal of the capacitor is coupled to the input terminal of the first inverter. The output terminal of the first inverter is coupled to the clock signal output terminal.

Description

Technical Field

[0001] This application relates to the field of integrated circuits, and more specifically to a circuit for adjusting the clock duty cycle. Background Technology

[0002] Computer hardware and communication systems require clock signals to control and transmit signals. Modern high-speed systems can achieve signal transmission speeds of up to 32Gbps, making the clock signal's duty cycle crucial for high-speed operation. The clock signal duty cycle refers to the percentage of time a clock signal remains at a high level within one cycle.

[0003] Currently, the duty cycle of the output clock signal is adjusted by regulating the flip-flop voltage of the DC-coupled inverter using current. However, due to the size of the inverter used, adjusting the flip-flop voltage requires a large amount of DC current, resulting in high circuit power consumption. Summary of the Invention

[0004] The purpose of this application is to provide a circuit for adjusting the clock duty cycle, which can be adjusted and controlled using a smaller current source, greatly reducing circuit power consumption and improving signal adjustment accuracy.

[0005] This application discloses a circuit for adjusting the clock duty cycle, including: an adjustable current source, a first resistor, a second resistor, a first inverter, a second inverter, and a capacitor;

[0006] The output terminal of the adjustable current source, the first terminal of the first resistor, and the first terminal of the second resistor are coupled to the input terminal of the second inverter.

[0007] The second end of the first resistor is coupled to the output of the second inverter, the second end of the second resistor is coupled to the input of the first inverter, the first end of the capacitor is coupled to the clock signal input, the second end of the capacitor is coupled to the input of the first inverter, and the output of the first inverter is coupled to the clock signal output.

[0008] In a preferred embodiment, the adjustable current source is an adjustable current source consisting of a first adjustable current source and a second adjustable current source connected in series.

[0009] In a preferred embodiment, the first terminal of the first adjustable current source is coupled to the power supply voltage.

[0010] In a preferred embodiment, the first terminal of the second adjustable current source is grounded.

[0011] In a preferred embodiment, the second terminal of the first adjustable current source and the second terminal of the second adjustable current source are coupled to the output terminal of the adjustable current source.

[0012] In a preferred embodiment, the current introduced by the adjustable current source is either a positive current or a negative current.

[0013] In a preferred embodiment, the first adjustable current source and the second adjustable current source are voltage-controlled current sources.

[0014] In a preferred embodiment, the first adjustable current source and the second adjustable current source are adjustable resistors.

[0015] In this embodiment, a combination of capacitors and resistors transforms a DC-coupled circuit into an AC-coupled circuit, allowing for regulation and control using a smaller current source. This reduces circuit power consumption and improves signal adjustment accuracy. The second inverter and the first resistor are self-biased, fixing the input of the second inverter at a standard switching voltage value. By controlling the magnitude and direction of the current flowing through the second resistor from an adjustable current source, the AC voltage at the input of the first inverter is adjusted, thereby achieving clock signal duty cycle adjustment from input to output.

[0016] The specification of this application contains numerous technical features distributed across various technical solutions. Listing all possible combinations of these technical features (i.e., technical solutions) would make the specification excessively lengthy. To avoid this problem, the various technical features disclosed in the above-described invention, the various technical features disclosed in the following embodiments and examples, and the various technical features disclosed in the accompanying drawings can be freely combined to form various new technical solutions (all of which are considered to have been described in this specification), unless such a combination of technical features is technically infeasible. For example, one example discloses feature A+B+C, and another example discloses feature A+B+D+E. Features C and D are equivalent technical means that serve the same function, and technically only one needs to be used; they cannot be used simultaneously. Feature E can technically be combined with feature C. Therefore, the solution A+B+C+D should not be considered as described because it is technically infeasible, while the solution A+B+C+E should be considered as described. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of a circuit structure according to one embodiment of this application;

[0018] Figure 2 This is an implementation of an adjustable current source according to one embodiment of this application;

[0019] Figure 3 This is an implementation of an adjustable current source according to one embodiment of this application. Detailed Implementation

[0020] In the following description, many technical details are presented to help the reader better understand this application. However, those skilled in the art will understand that the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0021] The specific implementation of the present invention will be described in detail below with reference to specific embodiments and accompanying drawings:

[0022] Figure 1 The diagram shows the circuit structure, which includes: an adjustable current source, a first resistor, a second resistor, a first inverter, a second inverter, and a capacitor. The output of the adjustable current source, the first terminal of the first resistor, and the first terminals of the second resistor are coupled to the input of the second inverter. The second terminal of the first resistor is coupled to the output of the second inverter, and the second terminal of the second resistor is coupled to the input of the first inverter. The first terminal of the capacitor is coupled to the clock signal input, and the second terminal of the capacitor is coupled to the input of the first inverter. The output of the first inverter is coupled to the clock signal output. The capacitor converts the DC-coupled circuit into an AC-coupled circuit.

[0023] In this design, the second inverter and the first resistor are self-biased, fixing the input of the second inverter at a standard switching voltage value. An adjustable current source introduces current to regulate the current flowing through the second resistor, adding an additional voltage difference to the standard switching voltage value to change the voltage at the input of the first inverter, thus altering its switching voltage. The introduced current can be either positive or negative. The first resistor feeds back the output of the second inverter to its input, providing a stable reference switching voltage. The standard switching voltage value can vary according to the operating voltage.

[0024] The adjustable current source is formed by connecting a first adjustable current source and a second adjustable current source in series. The first terminal of the first adjustable current source is coupled to the power supply voltage, the first terminal of the second adjustable current source is grounded, and the second terminals of both the first and second adjustable current sources are coupled to the output terminal of the adjustable current source. Both the first and second adjustable current sources can be voltage-controlled current sources.

[0025] The implementation methods of adjustable current sources include, but are not limited to, the following:

[0026] like Figure 2 As shown, current regulation can be achieved using an adjustable resistor. When the resistor R1 decreases, the current from the power supply to the output point increases, and when the resistor R2 decreases, the current from the output point to ground decreases.

[0027] Or such as Figure 3As shown, the number of mirrored current sources can be controlled by a switch. Increasing the number of current sources at the P terminal increases the current from the power supply to the output point, while increasing the number of current sources at the N terminal decreases the current from the output point to ground.

[0028] It should be noted that in this patent application, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. In this patent application, if it refers to performing an action according to an element, it means performing the action at least according to that element, including two cases: performing the action only according to that element, and performing the action according to that element and other elements. Expressions such as "multiple," "repeatedly," and "various" include two, two times, two kinds, and more than two, more than two times, and more than two kinds.

[0029] All documents mentioned in this application are considered to be incorporated in their entirety into the disclosure of this application so that they can serve as a basis for modifications if necessary. Furthermore, it should be understood that after reading the foregoing disclosure of this application, those skilled in the art can make various alterations or modifications to this application, and these equivalent forms also fall within the scope of protection claimed in this application.

Claims

1. A circuit for adjusting the duty cycle of a clock, characterized in that, include: An adjustable current source, a first resistor, a second resistor, a first inverter, a second inverter, and a capacitor; The output terminal of the adjustable current source, the first terminal of the first resistor, and the first terminal of the second resistor are coupled to the input terminal of the second inverter. The second end of the first resistor is coupled to the output of the second inverter, the second end of the second resistor is coupled to the input of the first inverter, the first end of the capacitor is coupled to the clock signal input, the second end of the capacitor is coupled to the input of the first inverter, and the output of the first inverter is coupled to the clock signal output. The second inverter, combined with the first resistor, is self-biased so that the input of the second inverter is fixed at the standard flip voltage value; The adjustable current source is configured to introduce current to adjust the magnitude and direction of the current passing through the second resistor, and to create an additional voltage difference based on the standard flip voltage value to change the voltage value at the input of the first inverter.

2. The circuit for adjusting the clock duty cycle as described in claim 1, characterized in that, The adjustable current source is an adjustable current source consisting of a first adjustable current source and a second adjustable current source connected in series.

3. The circuit for adjusting the clock duty cycle as described in claim 2, characterized in that, The first terminal of the first adjustable current source is coupled to the power supply voltage.

4. The circuit for adjusting the clock duty cycle as described in claim 2, characterized in that, The first terminal of the second adjustable current source is grounded.

5. The circuit for adjusting the clock duty cycle as described in claim 2, characterized in that, The second end of the first adjustable current source and the second end of the second adjustable current source are coupled to the output end of the adjustable current source.

6. The circuit for adjusting the clock duty cycle as described in claim 1, characterized in that, The adjustable current source introduces either a positive or negative current.

7. The circuit for adjusting the clock duty cycle as described in claim 2, characterized in that, The first adjustable current source and the second adjustable current source are voltage-controlled current sources.

8. The circuit for adjusting the clock duty cycle as described in claim 2, characterized in that, The first adjustable current source and the second adjustable current source are adjustable resistors.

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