Flowable film formation and processing

Abstract

An example processing method can include forming a plasma of a silicon-containing precursor. The method can include depositing a flowable film on a semiconductor substrate with effluents of the plasma of the silicon-containing precursor. The semiconductor substrate can define a feature within the semiconductor substrate. The method can include forming a plasma of a hydrogen-containing precursor within a processing region of a semiconductor processing chamber. A bias power can be applied to a substrate support from a bias power source. The method can include etching the flowable film from a sidewall of the feature within the semiconductor substrate with effluents of the plasma of the hydrogen-containing precursor. The method can include densifying a retained flowable film defined within the feature of the semiconductor substrate with effluents of the plasma of the hydrogen-containing precursor.

Description

[0001] This application claims priority to U.S. Patent Application No. 16 / 932,801, filed July 19, 2020, entitled “FLOWABLE FILM FORMATION ANDTREATMENTS,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] This technology relates to semiconductor processing. More specifically, this technology relates to methods for depositing, etching, and converting materials, including flowable films. Background Technology

[0003] Integrated circuits can be fabricated by creating intricately patterned layers of material on a substrate surface. Creating patterned material on the substrate requires controlled methods for forming and removing exposed material. As component dimensions continue to shrink, material formation can impact subsequent operations. For example, in gap-filling operations, material can be formed or deposited to fill trenches or other features formed on a semiconductor substrate. These filling operations can be challenging because features can be characterized by higher aspect ratios and smaller critical dimensions. For instance, continued deposition may pinch off features included between sidewalls within the feature, and voids may be created within the feature, as deposition may occur on top of the feature and along its sidewalls. This can affect component performance and subsequent processing operations.

[0004] Therefore, there is a need for improved systems and methods to produce high-quality devices and structures. This technology can meet these and other needs. Summary of the Invention

[0005] Example processing methods may include: forming a plasma containing a silicon precursor. The method may include: depositing a flowable film on a semiconductor substrate using a plasma effluent containing a silicon precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing chamber. The semiconductor substrate may define features within the semiconductor substrate. The processing region may be at least partially defined between a panel and a substrate support, wherein the semiconductor substrate is disposed on the substrate support. The method may include: forming a plasma containing a hydrogen precursor within a processing region of the semiconductor processing chamber. The plasma containing the hydrogen precursor may be formed at a first power level from a plasma power source. A bias power may be applied to the substrate support from a bias power source at a second power level less than the first power level. The method may include: etching a flowable film from the sidewalls of a feature within the semiconductor substrate using a plasma effluent containing a hydrogen precursor. The method may include: densifying a retained flowable film within a feature defined within the semiconductor substrate using a plasma effluent containing a hydrogen precursor.

[0006] In some embodiments, features within the semiconductor substrate may be characterized by an aspect ratio greater than or about 5:1, and features may be characterized by a width across the feature of less than or about 10 nm. A bias power source can be operated in pulse mode using a pulse frequency of less than or about 1 kHz. When operating the bias power source in pulse mode, a plasma power source can be operated in continuous wave mode. A bias power source can be operated using a duty cycle of less than or about 75%. The bias power source can be activated after the plasma power source is activated. Densification may include reducing the hydrogen content of the flowable film to less than or about 30 atomic percent. The method may also include forming a plasma of a conversion precursor after densification. The method may include converting the flowable film into a modified film. The conversion precursor may be or may include a nitrogen-containing precursor, an oxygen-containing precursor, or a carbon-containing precursor. The method may be repeated in a second cycle. During the method, the temperature of the semiconductor substrate may be maintained at a temperature of less than or about 0°C.

[0007] Some embodiments of this technology may cover processing methods. Methods may include: forming a plasma containing a silicon precursor. Methods may include: depositing a flowable film on a semiconductor substrate using plasma effluent containing a silicon precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing chamber. The semiconductor substrate may define features within the semiconductor substrate. Methods may include: forming a plasma containing a hydrogen precursor within a processing region of a semiconductor processing chamber. The hydrogen precursor plasma may be formed at a first power level from a plasma power source. A bias power may be applied from a bias power source to the hydrogen precursor plasma at a second power level. Methods may include: etching a flowable film from the sidewalls of a feature defined within the semiconductor substrate using plasma effluent containing a hydrogen precursor. Methods may include: densifying the flowable film within a feature defined within the semiconductor substrate using plasma effluent containing a hydrogen precursor.

[0008] In some embodiments, when the bias power source is operated in pulse mode at a frequency less than or about 1 kHz, the plasma power source providing a first power level can be operated continuously. The bias power source can be operated with a duty cycle of less than or about 50%. Etching can completely remove the flowable film from the sidewalls of the feature above the substrate filler. The method may include: forming a conversion precursor plasma after densification. The method may include: converting the flowable film into a modified film. The conversion precursor may be or may include a nitrogen-containing precursor, an oxygen-containing precursor, or a carbon-containing precursor. The modified film may be or may include silicon nitride, silicon oxide, or silicon carbide.

[0009] Some embodiments of this technology cover processing methods. Methods may include: forming a plasma containing a silicon precursor. Methods may include: depositing a flowable film on a semiconductor substrate using a plasma effluent containing a silicon precursor. The semiconductor substrate may be housed in a processing region of a semiconductor processing chamber. The semiconductor substrate may define features within the semiconductor substrate. Methods may include: forming a plasma containing a hydrogen precursor within a processing region of the semiconductor processing chamber. Methods may include: etching a flowable film from the sidewalls of a feature defined within the semiconductor substrate using a plasma effluent containing a hydrogen precursor. Methods may include: densifying a retained flowable film within a feature defined within the semiconductor substrate using a plasma effluent containing a hydrogen precursor. Methods may include: forming a plasma that converts a precursor. Methods may include: converting the flowable film into a modified film. In some embodiments, the modified film may be or may include silicon and one or more of the following: nitrogen, oxygen, or carbon.

[0010] Such technology offers numerous advantages over conventional systems and techniques. For example, by performing a hardening or processing operation according to embodiments of this technology, sidewall coverage can be limited or controlled, which limits void formation in small features. Furthermore, by performing a conversion operation after the hardening treatment, void formation can be further prevented by limiting the effects of membrane expansion. These and other embodiments, along with their numerous advantages and features, are described in more detail below and in conjunction with the accompanying drawings. Diagram Explanation

[0011] The nature and advantages of the disclosed technology can be further understood by referring to the rest of the specification and the accompanying drawings.

[0012] Figure 1 A schematic cross-sectional view of an example processing chamber according to some embodiments of the present technology is shown.

[0013] Figure 2 Example operations in processing methods according to some embodiments of the present technology are shown.

[0014] Figures 3A to 3C A schematic cross-sectional view of a substrate is shown during processing according to some embodiments of the present technology.

[0015] Several figures are included schematically. It should be understood that the figures are for illustrative purposes only and should not be considered to be drawn to scale unless specifically stated otherwise. Furthermore, as schematic diagrams, the figures are intended to aid understanding and may not include all aspects or information compared to actual representations, and may include exaggerated material for illustrative purposes.

[0016] In the accompanying drawings, similar parts and / or features may have the same reference numerals. Furthermore, parts of the same class may be distinguished by adding a letter after the reference numeral to differentiate them. If only the first reference numeral is used in the description, the description applies to any of the similar parts having the same first reference numeral, regardless of the letter. Detailed Implementation

[0017] In semiconductor component manufacturing, amorphous silicon can be used in many structures and processes, including as a sacrificial material, such as as a dummy gate material or as a trench fill material. In gap-filling operations, some processes utilize a flowable film formed under processing conditions to limit the conformality of the deposition, allowing the deposited material to better fill features on the substrate. Flowable silicon materials can be characterized by a relatively large amount of hydrogen and can have a lower density than other film-forming materials. Therefore, subsequent processing operations can be performed to harden the produced film. Conventional techniques utilize UV ​​curing to remove hydrogen and process the film. However, UV curing can cause significant film shrinkage, which can stress features and potentially create voids within the structure.

[0018] As feature sizes continue to shrink, flowable films may face the challenge of narrow features, which can be further characterized by high aspect ratios. For example, feature pinching may be more likely to occur due to deposition on the sidewalls of the feature, which may further restrict further flow into the feature in small feature sizes and may create voids. Furthermore, for processes in which the conversion of amorphous silicon can be performed, the expansion of the sidewall material during the conversion can further restrict flow in and out of the feature. This technique overcomes these limitations by etching the formed film during the curing operation. This limits or avoids sidewall overlay during trench filling, thereby allowing for improved filling operations. Additionally, the conversion operation can be performed after curing, which can further reduce flow restrictions within the feature. Specific methods may be discussed after describing general aspects of a chamber (in which plasma processing operations discussed below can be performed) according to some embodiments of this technique. It should be understood that this technique is not intended to be limited to the specific film, chamber, or process discussed, as the techniques described herein can be used to improve many film formation processes and are applicable to a wide variety of processing chambers and operations.

[0019] Figure 1A cross-sectional view of an example processing chamber 100 according to some embodiments of the present technology is shown. This figure depicts an overview of a system that may incorporate one or more aspects of the present technology and / or perform one or more deposition or other processing operations according to embodiments of the present technology. Additional details of the chamber 100 or the performed methods are further described below. According to some embodiments of the present technology, the chamber 100 may be used to form a film layer, although it will be understood that the method can be similarly performed in any chamber in which film formation may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed within the chamber body 102, and a cover assembly 106 coupled to the chamber body 102 and enclosing the substrate support 104 within a processing volume 120. A substrate 103 may be provided to the processing volume 120 through an opening 126, which may conventionally be sealed using a slit valve or door for processing. During processing, the substrate 103 may be placed on a surface 105 of the substrate support. As indicated by arrow 145, the substrate support 104 can be rotated along axis 147, and the shaft 144 of the substrate support 104 can be located on axis 147. Alternatively, the substrate support 104 can be rotated by lifting as needed during the deposition process.

[0020] A plasma profile modulator 111 may be disposed in the processing chamber 100 to control the plasma distribution across a substrate 103 disposed on a substrate support 104. The plasma profile modulator 111 may include a first electrode 108, which may be positioned adjacent to the chamber body 102 and separate the chamber body 102 from other components of the cover assembly 106. The first electrode 108 may be part of the cover assembly 106 or may be a separate sidewall electrode. The first electrode 108 may be annular or ring-shaped, and may be a ring electrode. The first electrode 108 may be a continuous loop surrounding the periphery of the processing chamber 100 of the processing volume 120, or may be discontinuous at selected locations if desired. The first electrode 108 may also be a perforated electrode, such as a perforated ring or mesh electrode, or may be a plate electrode, such as, for example, a secondary gas distributor.

[0021] One or more isolators 110a, 110b may contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from the gas distributor 112 and from the chamber body 102. The isolators 110a, 110b may be dielectric materials, such as ceramics or metal oxides, for example, alumina and / or aluminum nitride. The gas distributor 112 may define an orifice 118 for dispensing the processing precursor into the processing volume 120. The gas distributor 112 may be coupled to a first power source 142 (such as an RF generator, RF power source, DC power source, pulsed DC power source, pulsed RF power source, or any other power source that may be coupled to the processing chamber). In some embodiments, the first power source 142 may be an RF power source.

[0022] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 can also be formed from conductive or non-conductive components. For example, the body of the gas distributor 112 can be conductive, while the panel of the gas distributor 112 can be non-conductive. This can be achieved, for example, by... Figure 1 The first power source 142 shown supplies power to the gas distributor 112, or in some embodiments the gas distributor 112 may be grounded.

[0023] The first electrode 108 may be coupled to a first tuning circuit 128, which controls the grounding path of the processing chamber 100. The first tuning circuit 128 may include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 may be or may include a variable capacitor or other circuit components. The first tuning circuit 128 may be or may include one or more inductors 132. The first tuning circuit 128 may be any circuit that implements variable or controllable impedance under plasma conditions present in the processing volume 120 during processing. In some embodiments shown, the first tuning circuit 128 may include a first circuit leg and a second circuit leg coupled in parallel between ground and the first electronic sensor 130. The first circuit leg may include a first inductor 132A. The second circuit leg may include a second inductor 132B, which is coupled in series with the first electronic controller 134. A second inductor 132B can be disposed between the first electronic controller 134 and a node that connects both the first circuit branch and the second circuit branch to the first electronic sensor 130. The first electronic sensor 130 can be a voltage sensor or a current sensor and can be coupled to the first electronic controller 134, which can provide a degree of closed-loop control for the plasma environment within the processing volume 120.

[0024] The second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded within the substrate support 104 or coupled to the surface of the substrate support 104. The second electrode 122 may be any other distributed arrangement of a plate, perforated plate, mesh, wirescreen, or conductive component. The second electrode 122 may be a tuning electrode and may be coupled to a second tuning circuit 136 via, for example, a conduit 146 (e.g., a cable) having a selected resistance such as 50 ohms, disposed in a shaft 144 of the substrate support 104. The second tuning circuit 136 may have a second electronic sensor 138 and a second electronic controller 140, the second electronic controller 140 being a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and may be coupled to the second electronic controller 140 to provide further control over the plasma environment in the processing volume 120.

[0025] The third electrode 124 can be coupled to the substrate support 104. The third electrode 124 can be a bias electrode and / or an electrostatic adsorption electrode. The third electrode can be coupled to the second power source 150 through a filter 148, which can be an impedance matching circuit. The second power source 150 can be DC power, pulsed DC power, RF bias power, pulsed RF source, or pulsed RF bias power, or a combination of these or other power sources. In some embodiments, the second power source 150 can be RF bias power.

[0026] It can be used with any processing chamber used for plasma or heat treatment. Figure 1 The process chamber 100 includes a cover assembly 106 and a substrate support 104. During operation, the process chamber 100 provides real-time control of the plasma environment within the process volume 120. A substrate 103 can be mounted on the substrate support 104, and process gas can be flowed through the cover assembly 106 via the inlet 114 according to any desired flow pattern. The gas exits the process chamber 100 via the outlet 152. Electrical power can be coupled to a gas distributor 112 to create plasma within the process volume 120. In some embodiments, a third electrode 124 can be used to subject the substrate to an electrical bias.

[0027] When plasma is excited in processing volume 120, a potential difference can be established between the plasma and the first electrode 108. A potential difference can also be established between the plasma and the second electrode 122. Electronic controllers 134 and 140 can then be used to adjust the flow properties of the ground paths represented by the two tuning circuits 128 and 136. Setpoints can be fed to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control over the deposition rate and the uniformity of plasma density from center to edge. In embodiments where the electronic controllers are both variable capacitors, electronic sensors can adjust the variable capacitors to independently maximize the deposition rate and minimize thickness non-uniformity.

[0028] Each of the tuning circuits 128 and 136 may have a variable impedance, which can be adjusted using corresponding electronic controllers 134 and 140. When the electronic controllers 134 and 140 are variable capacitors, the capacitance range of each of the variable capacitors and the inductance of the first inductor 132A and the second inductor 132B can be selected to provide an impedance range. This range may have a minimum value within the capacitance range of each variable capacitor, depending on the frequency and voltage characteristics of the plasma. Therefore, when the capacitance of the first electronic controller 134 is at its minimum or maximum, the impedance of the first tuning circuit 128 may be high, resulting in a minimum aerial coverage or lateral coverage of the plasma shape above the substrate support. When the capacitance of the first electronic controller 134 approaches the value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma can grow to its maximum, effectively covering the entire working area of ​​the substrate support 104. When the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may shrink from the chamber wall, and the aerial coverage of the substrate support may decrease. The second electronic controller 140 can have a similar effect, increasing or decreasing the air coverage of the plasma above the substrate support as the capacitance of the second electronic controller 140 can be changed.

[0029] Electronic sensors 130 and 138 can be used to tune corresponding circuits 128 and 136 in a closed loop. Depending on the type of sensor used, a setpoint for current or voltage can be installed in each sensor, and the sensor can be equipped with control software that determines the adjustment of each corresponding electronic controller 134 and 140 to minimize deviation from the setpoint. Thus, the plasma shape can be selected and dynamically controlled during processing. It should be understood that although the above discussion is based on electronic controllers 134 and 140, which may be variable capacitors, any electronic component with adjustable characteristics can be used to provide adjustable impedance for tuning circuits 128 and 136.

[0030] The processing chamber 100 may be used in some embodiments of the present technology for processing methods that may include the formation, etching, or conversion of materials for semiconductor structures. It should be understood that the described chamber should not be considered limiting, and any chamber configurable to perform the operations described herein may be used in a similar manner. Figure 2 Example operations in a processing method 200 according to some embodiments of the present technology are illustrated. The method can be performed in various processing chambers, including the processing chamber 100 described above, and on one or more host machines or tools. Method 200 may include several optional operations, which may or may not be specifically related to some embodiments of the method according to the present technology. For example, many operations are described to provide a broader range of structural forms, but these operations are not critical to the technology or can be performed by easily understood alternative methods. Method 200 may describe Figures 3A to 3C The operations illustrated herein will be combined with the operation description of method 200. Figures 3A to 3C The accompanying drawings are schematic representations only, and the substrate may contain any number of additional materials and features having the various characteristics and aspects shown.

[0031] Prior to the commencement of the illustrated operations, method 200 may include additional operations. For example, additional processing operations may include forming a structure on a semiconductor substrate, which may include both forming and removing material. For example, a transistor structure, a memory structure, or any other structure may be formed. The preceding processing operations may be performed in a chamber in which method 200 is performed, or the processing may be performed in one or more other processing chambers before the substrate is conveyed to one or more semiconductor processing chambers in which method 200 is performed. In any case, method 200 may optionally include conveying the semiconductor substrate to a processing region of a semiconductor processing chamber (such as processing chamber 100 described above), or to other chambers that may include components as described above. The substrate may be deposited on a substrate support, which may be a base such as substrate support 104, and may be located in a processing region of the chamber (such as processing volume 120 described above).

[0032] The substrate on which several operations have been performed may be substrate 305 of structure 300, which may show a partial view of the substrate on which semiconductor processing can be performed. It should be understood that structure 300 may show only a few top layers during processing to depict aspects of the present technology. Substrate 305 may include material, and one or more features 310 may be formed in said material. Substrate 305 may be any number of materials used in semiconductor processing. Substrate material may be or may include: silicon, germanium, dielectric materials (including silicon oxide or silicon nitride), metallic materials, or any combination of these materials, and the substrate material may be substrate 305 or material formed in structure 300. According to the present technology, feature 310 may be characterized by any shape or construction. In some embodiments, features may be or may include trench structures or holes formed within substrate 305.

[0033] Although feature 310 may be characterized by shape or size, in some embodiments, feature 310 may be characterized by a high aspect ratio or the ratio of the feature's depth to the width across the feature. For example, in some embodiments, feature 310 may be characterized by an aspect ratio greater than or about 5:1, and feature 310 may be characterized by the following aspect ratios: greater than or about 10:1, greater than or about 15:1, greater than or about 20:1, greater than or about 25:1, greater than or about 30:1, greater than or about 40:1, greater than or about 50:1, or greater. Furthermore, the feature may be characterized by a narrow width or diameter across the feature, such as a size less than or about 20 nm, and may be characterized by the following widths across the feature: less than or about 15 nm, less than or about 12 nm, less than or about 10 nm, less than or about 9 nm, less than or about 8 nm, less than or about 7 nm, less than or about 6 nm, less than or about 5 nm, or smaller.

[0034] In some embodiments, method 200 may include optional processing operations, such as pretreatment, that can be performed to prepare the surface of substrate 305 for deposition. Once prepared, method 200 may include delivering one or more precursors to a processing region of the semiconductor processing chamber housing structure 300. The precursors may include one or more silicon-containing precursors and one or more diluents or carrier gases, such as an inert gas or other gas delivered with the silicon-containing precursors. In operation 205, a plasma may be formed from the deposition precursors, including the silicon-containing precursors. The plasma may be formed within the processing region, which may allow deposition material to be deposited on the substrate. For example, in some embodiments, capacitively coupled plasma may be formed within the processing region by applying plasma power to the aforementioned panel.

[0035] In operation 210, a silicon-containing material may be deposited onto a substrate from a plasma effluent of a silicon-containing precursor. In some embodiments, the material may be a flowable silicon-containing material, which may be or may include amorphous silicon. The deposited material may at least partially flow into features on the substrate to provide bottom-up type gap filling. Figure 3A As illustrated, material 315 can be deposited on substrate 305 and can flow into trenches or features 310. As shown, the deposited material 315 can flow into the bottom of the feature, although, as also shown, a certain amount of material may remain on the sidewalls of the substrate. Although the amount deposited may be relatively small, the material retained on the sidewalls may restrict subsequent flow. Furthermore, if a conventional conversion (e.g., conversion to, for example, silicon nitride) is performed on the deposited material, the conversion involves film expansion. With respect to features with reduced dimensions, residual material formed on the sidewalls can be converted and expand outward toward the opposite sidewall. This may cause the feature to be pinched off, potentially creating voids within the feature.

[0036] The power applied during deposition can be a low-power plasma, which limits dissociation and maintains the amount of hydrogen bound in the deposited material. This bound hydrogen can contribute to the flowability of the deposited material. Therefore, in some embodiments, the plasma power source can deliver plasma power of less than or about 300 W to the panel, and can deliver power of less than or about 250 W, less than or about 200 W, less than or about 150 W, less than or about 100 W, less than or about 50 W, or even less.

[0037] Following a certain amount of deposition, in some embodiments of this technology, a treatment or hardening process may be performed, which is configured to etch back and forth the material formed. This treatment may be performed in the same chamber as the deposition and may be performed in a cyclic process to fill the feature. In some embodiments, the silicon-containing precursor stream may be stopped and the treatment area may be purged. After purge, a hydrogen-containing precursor stream may be introduced into the treatment area of ​​the treatment chamber. A treatment plasma may be formed in operation 215, which may also be a capacitively coupled plasma formed in the treatment area, although in some embodiments an inductively coupled plasma may be used in a similar manner. The deposition plasma may be formed by applying plasma power to a panel or spray head, and in some embodiments, no other power source may be required.

[0038] During the processing operation, an additional power source can be supplied and coupled to the aforementioned substrate support to bias the plasma generated above the substrate. This may attract plasma effluent toward the substrate, which can bombard the film and cause densification of the deposited material. While any hydrogen-containing material can be used, in some embodiments diatomic hydrogen can be used as a hydrogen-containing precursor to generate the processing plasma together with one or more additional precursors. Hydrogen radicals and ions can readily permeate the material formed within the trenches and can release bound hydrogen from the film, resulting in densification. A relatively low bias power can be applied to limit the sputtering of the generated film and limit any potential damage to the structure, and the material supplied to form the plasma can similarly have a reduced amount of heavier material to limit the sputtering of the deposited film. Furthermore, by adjusting the applied source power and bias power, an etching operation can be performed, which can reduce the sidewall coverage of the deposited material.

[0039] Hydrogen, or any other hydrogen-containing material, can be used to generate plasma within the processing area by delivering power from a plasma power source to the panel. In some embodiments, the plasma power can be greater than the plasma power used during deposition. For example, the delivered plasma power can be greater than or about 100 W, and can be greater than or about 200 W, greater than or about 300 W, greater than or about 400 W, greater than or about 500 W, greater than or about 600 W, or greater. By increasing the plasma power during plasma formation, a larger amount of plasma effluent can be generated. Furthermore, aspects of the bias power can be adjusted. For example, although the bias power can be higher than the plasma source power in some processing operations, in some embodiments of the art, the bias power can be maintained below the plasma power, such as below or about 500 W, and can be below or about 400 W, below or about 300 W, below or about 200 W, below or about 100 W, or less.

[0040] Applying a larger bias voltage increases the directionality of the delivery perpendicular to the plane across the substrate. Therefore, by reducing the applied bias power, the amount of directionality can be reduced, which increases the interaction of the plasma effluent within the feature. The plasma effluent can then be etched into a flowable film in operation 220, and the flowable film can be removed from the sidewalls of the trench. Simultaneously, or additionally, in optional operation 225, more directionally delivered plasma effluent can penetrate the retained film formed at the bottom of the feature and can reduce hydrogen binding, thereby densifying the film. Figure 3BAs depicted, material 315 can be removed from the sidewalls and overhang region of substrate 305, which may retain material deposited in the bottom region of the feature. The treatment may also reduce hydrogen bonding in the retained material, such as less than or about 40 atomic% hydrogen bonding, and may provide reduced hydrogen bonding of less than or about 35 atomic%, less than or about 30 atomic%, less than or about 25 atomic%, less than or about 20 atomic%, less than or about 15 atomic%, less than or about 10 atomic%, less than or about 5 atomic%, or even less.

[0041] Additional adjustments can be made by modifying one or more characteristics of the supplied plasma power or bias power to further enhance the etching of material deposited along the sidewalls of the feature. For example, in some embodiments, both the plasma power source and the bias power source operate in continuous wave mode. Alternatively, one or both of the power sources can be operated in pulsed mode. In some embodiments, the source power can be operated in either continuous wave or pulsed mode while the bias power is operated in pulsed mode. The pulse frequency used for the bias power can be greater than or about 100 Hz, and can be greater than or about 200 Hz, greater than or about 300 Hz, greater than or about 500 Hz, greater than or about 750 Hz, greater than or about 1,000 Hz, greater than or about 1,500 Hz, greater than or about 2,000 Hz, or greater. The duty cycle of the bias power can be less than or about 75%, and the bias power can be operated at the following duty cycles: less than or about 70%, less than or about 60%, less than or about 50%, less than or about 40%, less than or about 30%, less than or about 20%, less than or about 10%, less than or about 5%, or less. By operating the bias power at a reduced duty cycle (such as less than or about 50% on-time duty), more time per cycle can be used to perform more isotropic etching within the feature, which allows for better material removal from the sidewalls.

[0042] Additional power configurations may also include the amount of synchronization between source power and bias power in a master / slave relationship. For example, both power sources can operate in pulse orientation, and the bias power can be synchronized to apply bias power after source power has been applied at each pulse. A level-to-level pulsing scheme can also be applied. For example, during the bias power on-time, the source power can be operated using a first plasma power. During the remainder of the bias power off-time cycle, the source power can be operated using a second plasma power, which may be greater than the first plasma power. This can increase isotropic etching by eliminating bias-induced orientation and can also increase the etching characteristics of isotropic etching. In embodiments of this technique, deposition and etching processes can be repeated any number of times in a cycle to fill features, and amorphous silicon can be used to fill features.

[0043] Furthermore, in some embodiments where silicon conversion within a feature may be sought, the cycle may also include a conversion operation. By performing conversion during each cycle, the penetration problem across the feature can be completely addressed. Moreover, by performing the conversion operation after hardening and etching, deposited material can be removed from the sidewalls before conversion, which limits lateral expansion of the film within the aforementioned trenches or between the sidewalls of the feature. Conversion can be performed in a different chamber than deposition and processing, but in some embodiments, two or more operations (including all operations) can be performed in a single processing chamber. This reduces queue time compared to conventional processing.

[0044] Method 200 may also optionally include converting amorphous silicon into other materials. For example, after etching and densification, one or more conversion precursors may be delivered to a processing region of the chamber. For example, nitrogen-containing precursors, oxygen-containing precursors, and / or carbon-containing precursors may be delivered to the processing region of the chamber along with any carrier gas or diluent gas. A plasma may be formed from the conversion precursors, which may then contact the amorphous silicon material within the feature. In optional operation 230, the plasma effluent of the conversion precursors may interact with the amorphous silicon material within the trench and, together with any other material that can be used to convert the amorphous silicon film, convert the material into silicon nitride, silicon oxide, silicon carbide, silicon oxynitride, silicon carbide, silicon oxynitride, or silicon oxynitride. The plasma power may be similar to the power described above, and for example, from about 100 W to up to about 1,000 W or more for capacitively coupled systems, and up to 10 kW or more for inductively coupled plasma systems, but any type of conversion may also be performed.

[0045] Although deposits can be formed to several nanometers or larger, the thickness of the densified material can be controlled to less than or approximately [amount missing] by performing an etching process as described above. The thickness, and can be less than or approximately Less than or about Less than or about Less than or about Less than or about Less than or about Less than or about Less than or about Less than or about Or even smaller. By controlling the thickness of the deposited material, conversion across the entire thickness can be more easily performed, and permeation problems common in conventional processes can be addressed. For example... Figure 3C As depicted, the material 315 retained within the feature after the etching process can be completely converted into material 320 throughout the entire depth of the film. This process can then be completely repeated to continue producing converted material upward through the feature.

[0046] Regarding the deposition precursors used during any formation operation, any number of precursors may be used in conjunction with this technology. Silicon-containing precursors that may be used during any of the silicon oxide formation, silicon formation, or silicon nitride formation may include, but are not limited to: silanes (SiH4), disilanes (Si2H6), or other organosilanes, including cyclohexylsilane, silicon tetrafluoride (SiF4), silicon tetrachloride (SiCl4), dichlorosilane (SiH2Cl2), tetraethyl orthosilicate (TEOS), and any other silicon-containing precursors that may be used in silicon-containing film formation. In some embodiments, the silicon-containing material may be nitrogen-free, oxygen-free, and / or carbon-free. Oxygen-containing precursors used in any operation described throughout this technology may include O2, N2O, NO2, O3, H2O, and any other oxygen-containing precursors that may be used in silicon oxide film formation or other film formation. Nitrogen-containing precursors used in any operation may include N2, N2O, NO2, NH3, N2H2, and any other nitrogen-containing precursors that may be used in silicon nitride film formation. Carbon-containing precursors can be or may include any carbon-containing material, such as any hydrocarbon, or any other precursor that includes carbon. In any operation, one or more additional precursors may be included, such as inert precursors, which may include Ar, He, Xe, Kr, or other materials (such as nitrogen, ammonia, hydrogen, or other precursors).

[0047] Temperature and pressure can also affect the operation of this technology. For example, in some embodiments, to promote membrane flow, the process can be performed at temperatures below or about 20 °C, and can be performed at temperatures below or about 0 °C, below or about -20 °C, below or about -50 °C, below or about -75 °C, below or about -100 °C, or lower. Throughout the method, including during processing, etching, and conversion, the temperature can be maintained within any of these ranges. For any process, the pressure within the chamber can also be kept relatively low, such as at a chamber pressure of less than or about 20 Torr, and the pressure can be maintained at less than or about 15 Torr, less than or about 10 Torr, less than or about 5 Torr, less than or about 3 Torr, less than or about 2 Torr, less than or about 1 Torr, less than or about 0.1 Torr, or less. By performing the processes according to some embodiments of this technology, improved narrow feature filling utilizing silicon-containing materials can be produced.

[0048] In the foregoing description, numerous details have been set forth for purposes of explanation in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments may be practiced without some of these details or with the addition of additional details.

[0049] Having disclosed several embodiments, those skilled in the art will recognize that various modifications, alternative structures, and equivalents can be used without departing from the spirit of the embodiments. Furthermore, to avoid unnecessarily obscuring the present technology, several well-known processes and components have not been described. Therefore, the above description should not be construed as limiting the scope of the present technology. Additionally, methods or processes may be described as performed sequentially or in steps; however, it should be understood that operations may be performed simultaneously or in a different order than those listed.

[0050] Where a range of values ​​is provided, it should be understood that, unless expressly specified otherwise herein, each intermediate value between the upper and lower limits of the range is specifically disclosed, with precision to the least quantile of the lower limit unit. Any narrower range between any stated or unstated intermediate value within the stated range and any other stated or intermediate value within the stated range is also covered. The upper and lower limits of those narrower ranges may be independently included in or excluded from the range, and each range in which either or both of the limits are included or excluded is also covered by this technique, each range being subject to any specific exclusion from the stated range. Where a stated range includes one or both of the limits, ranges excluding one or both of the included limits are also included.

[0051] As used herein and in the appended claims, unless expressly specified otherwise, the singular forms “a,” “an,” and “the” include plural references. Thus, for example, a reference to “precursor” includes multiple such precursors, and a reference to “layer” includes references to one layer and multiple layers, as well as equivalents known to those skilled in the art, and so on.

[0052] Furthermore, when the terms “comprise,” “comprising,” “contain(s),” “containing,” “include(s),” and “including” are used in this specification and in the claims below, they are intended to specify the presence of a stated feature, integer, component, or operation, but do not preclude the presence or addition of one or more other features, integers, components, operations, actions, or groups.

Claims

1. A processing method, comprising: Formation of plasma containing silicon precursors; A flowable film is deposited on a semiconductor substrate using the plasma effluent of the silicon-containing precursor, wherein the semiconductor substrate is housed in a processing region of a semiconductor processing chamber, wherein the semiconductor substrate defines features within the semiconductor substrate, and wherein the processing region is at least partially defined between a panel and a substrate support, the semiconductor substrate being disposed on the substrate support. A plasma containing a hydrogen precursor is formed within the processing region of the semiconductor processing chamber, wherein the plasma containing the hydrogen precursor is formed at a first power level from a plasma power source, and wherein a bias power is applied to the substrate support from a bias power source at a second power level, the second power level being less than the first power level. The flowable film is etched from the sidewalls of the feature within the semiconductor substrate using the plasma effluent of the hydrogen-containing precursor, wherein the etching completely removes the flowable film from the sidewalls of the feature above the substrate filling of the feature; and The retained flowable film within the feature confined within the semiconductor substrate is densified using the plasma effluent of the hydrogen-containing precursor.

2. The processing method of claim 1, wherein the feature within the semiconductor substrate is characterized by an aspect ratio greater than or equal to 5:1, and wherein the feature is characterized by a width across the feature of less than or equal to 10 nm.

3. The processing method of claim 1, wherein the bias power source is operated in pulse mode at a pulse frequency of less than or equal to 1 kHz.

4. The processing method of claim 3, wherein when the bias power source is operated in the pulse mode, the plasma power source is operated in the continuous wave mode.

5. The processing method of claim 3, wherein the bias power source is operated with a duty cycle of less than or equal to 75%.

6. The processing method as described in claim 1, wherein the bias power source is activated after the plasma power source is activated.

7. The processing method of claim 1, wherein the densification comprises: reducing the hydrogen content of the flowable membrane to less than or equal to 30 atoms.

8. The processing method as described in claim 1, further comprising: Following densification, a plasma is formed that transforms the precursor; and The flowable membrane is converted into a modified membrane.

9. The processing method of claim 8, wherein the conversion precursor comprises: a nitrogen-containing precursor, an oxygen-containing precursor, or a carbon-containing precursor.

10. The processing method of claim 8, wherein the method is repeated in a second loop.

11. The processing method of claim 8, wherein during the method, the temperature of the semiconductor substrate is maintained at a temperature less than or equal to 0°C.

12. A processing method, comprising: Formation of plasma containing silicon precursors; A flowable film is deposited on a semiconductor substrate using the plasma effluent of the silicon-containing precursor, wherein the semiconductor substrate is housed in a processing region of a semiconductor processing chamber, and wherein the semiconductor substrate defines features within the semiconductor substrate. A plasma containing a hydrogen precursor is formed within the processing region of the semiconductor processing chamber, wherein the plasma containing the hydrogen precursor is formed at a first power level of a plasma power source, and wherein a bias power is applied from a bias power source to the plasma containing the hydrogen precursor at a second power level. The flowable film is etched from the sidewall of the feature defined within the semiconductor substrate using the plasma effluent of the hydrogen-containing precursor, wherein the etching completely removes the flowable film from the sidewall of the feature above the substrate filling of the feature; and The retained flowable film within the feature defined within the semiconductor substrate is densified using the plasma effluent of the hydrogen-containing precursor.

13. The processing method of claim 12, wherein when the bias power source is operated in pulse mode at a frequency less than or equal to 1 kHz, the plasma power source providing the first power level is continuously operated.

14. The processing method of claim 13, wherein the bias power source is operated with a duty cycle of less than or equal to 50%.

15. The processing method as described in claim 12, further comprising: Following densification, a plasma is formed that transforms the precursor; and The flowable membrane is converted into a modified membrane.

16. The processing method of claim 15, wherein the conversion precursor comprises: a nitrogen-containing precursor, an oxygen-containing precursor, or a carbon-containing precursor.

17. The processing method of claim 16, wherein the modified film comprises: silicon nitride, silicon oxide, or silicon carbide.

18. A processing method, comprising: Formation of plasma containing silicon precursors; A flowable film is deposited on a semiconductor substrate using the plasma effluent of the silicon-containing precursor, wherein the semiconductor substrate is housed in a processing region of a semiconductor processing chamber, and wherein the semiconductor substrate defines features within the semiconductor substrate. A plasma containing hydrogen precursors is formed within the processing region of the semiconductor processing chamber; The flowable film is etched from the sidewall of the feature defined within the semiconductor substrate using the plasma effluent of the hydrogen-containing precursor, wherein the etching completely removes the flowable film from the sidewall of the feature above the substrate of the feature; The retained flowable film within the feature defined within the semiconductor substrate is densified using the plasma effluent of the hydrogen-containing precursor; Plasma that forms conversion precursors; as well as The flowable membrane is converted into a modified membrane.

19. The processing method of claim 18, wherein the modified film comprises silicon and one or more of the following: nitrogen, oxygen, or carbon.

Images