Data processing apparatus, data processing method, and electronic device
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- KUNLUNXIN TECHNOLOGY (BEIJING) CO LTD
- Filing Date
- 2022-08-08
- Publication Date
- 2026-08-07
AI Technical Summary
[0010]应当理解,本部分所描述的内容并非旨在标识本公开的实施例的关键或重要特征,也不用于限制本公开的范围。本公开的其它特征将通过以下的说明书而变得容易理解。
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Figure CN115951860B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of artificial intelligence technology, particularly to the fields of deep learning, neural networks, and cloud computing, and can be applied to scenarios such as image processing, natural language processing, speech recognition, autonomous driving, and product recommendation. More specifically, this disclosure provides a data processing apparatus, a data processing method, and an electronic device. Background Technology
[0002] With the development of artificial intelligence technology, deep learning models are widely used in various scenarios. Deep learning models include various neural network models. A wide range of processing devices can be used to implement the numerous operations involved in neural network models. Summary of the Invention
[0003] This disclosure provides a data processing apparatus, a data processing method, and an electronic device.
[0004] According to one aspect of this disclosure, a data processing apparatus is provided, the apparatus comprising: an acquisition unit configured to acquire data to be processed; a quantization unit configured to determine parameter values based on extreme values among a plurality of floating-point numbers in the data to be processed; and to quantize the floating-point numbers based on the extreme values and the parameter values to obtain quantized data, the quantized data including a first value and a second value of the floating-point numbers; a processing unit configured to perform arithmetic processing using the first value and the second value of the floating-point numbers in the quantized data to obtain a processing result; and an output unit configured to output the processing result.
[0005] According to another aspect of this disclosure, a data processing method is provided, the method comprising: acquiring data to be processed; determining parameter values based on extreme values among multiple floating-point numbers in the data to be processed; quantizing the floating-point numbers based on the extreme values and parameter values to obtain quantized data, the quantized data including a first value and a second value of the floating-point numbers; performing calculations using the first value and the second value of the floating-point numbers in the quantized data to obtain a processing result; and outputting the processing result.
[0006] According to another aspect of this disclosure, an electronic device is provided, including at least one data processing device provided in this disclosure.
[0007] According to another aspect of this disclosure, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform a method provided according to this disclosure.
[0008] According to another aspect of this disclosure, a non-transitory computer-readable storage medium is provided storing computer instructions for causing a computer to perform the methods provided according to this disclosure.
[0009] According to another aspect of this disclosure, a computer program product is provided, including a computer program that, when executed by a processor, implements the method provided according to this disclosure.
[0010] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description
[0011] The accompanying drawings are provided to better understand this solution and do not constitute a limitation of this disclosure. Wherein:
[0012] Figure 1 This is a schematic diagram of the encoding of a floating-point number according to an embodiment of the present disclosure;
[0013] Figure 2 This is a structural block diagram of a data processing apparatus according to an embodiment of the present disclosure;
[0014] Figure 3 This is a schematic diagram of a data processing apparatus according to an embodiment of the present disclosure;
[0015] Figure 4 This is a schematic diagram of a data processing apparatus according to another embodiment of the present disclosure;
[0016] Figure 5 This is a flowchart of a data processing method according to an embodiment of the present disclosure; and
[0017] Figure 6 This is a block diagram of an electronic device to which a data processing apparatus can be applied, according to an embodiment of the present disclosure. Detailed Implementation
[0018] The exemplary embodiments of this disclosure are described below with reference to the accompanying drawings, including various details of the embodiments to aid understanding, and should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this disclosure. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.
[0019] Deep learning techniques can combine low-level features of an object to form more abstract high-level features, representing the object's category or attributes. Based on deep learning, distributed features of data related to an object can be discovered. Neural network models can include, for example, deep neural network (DNN), recurrent neural network (RNN), and convolutional neural network (CNN) models.
[0020] Neural network models involve numerous computationally intensive operations. These operations may include matrix multiplication, convolution, pooling, and so on. Implementing these operations using a Central Processing Unit (CPU) is time-consuming. To improve the efficiency of applying neural network models, neural network processors can be used to implement these operations. Neural network processors can be implemented based on processors such as Graphics Processing Units (GPUs), Field Programmable Gate Arrays (FPGAs), and Application Specific Integrated Circuits (ASICs). Neural network processors offer significantly higher computational efficiency. Compared to general-purpose CPUs, neural network processors can improve computational performance by at least an order of magnitude.
[0021] Neural network processors can process floating-point numbers. Floating-point numbers are a concept relative to fixed-point numbers. Fixed-point numbers in computers stipulate that the position of the decimal point is fixed; that is, the position of the decimal point is artificially set. For example, for fixed-point integers, the decimal point can be placed at the end of the numerical digits. Conversely, for fixed-point decimals, the most significant digit is placed after the decimal point. Due to the limitations of computer word length, when the data to be represented has a very large numerical range, it cannot be directly represented using fixed-point decimals or fixed-point integers.
[0022] Floating-point numbers can be constructed from a mantissa M and an exponent E. The floating-point representation of a number F with a base-2 is:
[0023] F = M * 2 E (Formula 1)
[0024] Floating-point number encoding rules: The mantissa M must be a decimal, represented by an n+1-bit signed fixed-point decimal; the number of bits n+1 determines the precision of the floating-point number. The longer the mantissa, the higher the precision that can be represented. n is an integer greater than 0. The exponent E must be an integer, represented by a k+1-bit signed fixed-point integer; the number of bits k+1 determines the range of values that the floating-point number can represent, that is, the size of the data or the actual position of the decimal point in the data; the exponent sign determines whether the exponent is positive or negative. The longer the exponent, the larger the range that can be represented.
[0025] k is an integer greater than 0
[0026] The number of bits m in the floating-point code is:
[0027] m = (n+1) + (k+1) (Formula 2)
[0028] Neural network model data processing can be divided into two phases: training and inference. In the training phase, the parameters of the neural network model are adjusted using a known dataset to obtain a trained neural network model. During the training phase, the data in the dataset needs to have high precision. Floating-point data can be used in the training phase of the neural network.
[0029] Floating-point numbers can include single-precision floating-point numbers (Float Point 32, FP32), tensor single-precision floating-point numbers (TensorFloat 32, TF32), half-precision floating-point numbers (Float Point 32, FP16), and brain floating-point numbers (Brain FloatPoint 16, BF16).
[0030] Single-precision floating-point numbers (SNRs) and tensor SNRs offer higher precision. These two types of floating-point numbers have a 32-bit bit width, resulting in approximately twice the amount of data accessed in memory compared to half-precision floating-point numbers, and requiring more computational resources. Neural network processors perform poorly when processing data of type SNR or tensor SNR. For example, a graphics processing unit (GPU) can achieve a performance of 60 TOPS (Tera Operations Per Second) for SNRs. For tensor SNRs, the GPU can achieve 500 TOPS. For half-precision floating-point numbers or tensor SNRs, the GPU can achieve 1000 TOPS. Therefore, using half-precision floating-point numbers or tensor SNRs during the training phase can yield higher performance.
[0031] Fixed-point numbers (such as 4-bit or 8-bit fixed-point numbers) have a smaller bit width and lower precision, but they can be used in the inference stage of neural network models.
[0032] Figure 1This is a schematic diagram of the encoding of a floating-point number according to an embodiment of the present disclosure.
[0033] Floating-point numbers can be represented in computers using encoding methods. The encoding of floating-point numbers includes a sign bit (101), an exponent bit (102), and a fraction bit (103).
[0034] The sign bit is used to indicate the sign of a floating-point number. For example, 0 indicates that the floating-point number is positive, and 1 indicates that the floating-point number is negative.
[0035] The exponent bits can represent the range of values a floating-point number can take. For example, the more exponent bits, the wider the range that can be represented.
[0036] The precision of a floating-point number can be determined by the mantissa and exponent; the more mantissas, the higher the precision of the floating-point number.
[0037] In some embodiments, taking a half-precision floating-point number as an example, the sign bit of the half-precision floating-point number is 1 bit, the exponent bit can be 5 bits, and the mantissa bit is 10 bits.
[0038] If the exponent is all 0 and the mantissa is 0, then the half-precision floating-point number is 0.
[0039] If the exponent is all 0 and the mantissa is not 0, then the half-precision floating-point number FP16 can be:
[0040]
[0041] If all exponent bits are 1 and the mantissa is 0, it represents positive or negative infinity ±inf.
[0042] If all exponent bits are 1 and the mantissa is not 0, it is represented as Not A Number (NAN).
[0043] In other cases, the half-precision floating-point number FP16 can be:
[0044]
[0045] A single-precision floating-point number has a 1-bit sign bit, an 8-bit exponent, and a 23-bit mantissa.
[0046] Tensor single-precision floating-point numbers have a 1-bit sign bit, an 8-bit exponent, and a 10-bit mantissa. In some embodiments, some neural network processors can process data of type single-precision floating-point numbers or tensor single-precision floating-point numbers. Single-precision floating-point numbers or tensor single-precision floating-point numbers have an 8-bit exponent, allowing them to represent a wider range of numbers. Furthermore, both have a larger mantissa, resulting in higher precision. The bit width of single-precision floating-point numbers or tensor single-precision floating-point numbers is 32 bits, while the bit width of half-precision floating-point numbers is 16 bits. Storing single-precision floating-point numbers or tensor single-precision floating-point numbers requires approximately twice the memory resources of half-precision floating-point numbers, and processing single-precision floating-point numbers or tensor single-precision floating-point numbers also requires more hardware resources than processing half-precision floating-point numbers.
[0047] Single-precision floating-point numbers have a 5-bit exponent, which limits the range of numbers they can represent. Using single-precision floating-point numbers during training may cause the model to have difficulty converging.
[0048] Brain-precision floating-point numbers have a 1-bit sign bit, an 8-bit exponent, and a 7-bit mantissa. In some embodiments, a Tensor Processing Unit (TPU) can process this type of brain-precision floating-point data. The 8-bit exponent of a brain-precision floating-point number allows it to represent a wide range of numbers. The 7-bit mantissa results in lower precision compared to single-precision floating-point numbers. Using brain-precision floating-point numbers during training may cause the model to have difficulty converging.
[0049] In some embodiments, floating-point numbers can be quantized, which can help improve the computing power of neural network processors. However, quantizing floating-point numbers reduces the precision of the data, which in turn leads to insufficient precision or limited representation range of the relevant neural network model, and may even cause a decrease in model convergence performance.
[0050] In some embodiments, to improve the representation range of the model, quantization can be performed based on the exponent bits of the floating-point number. For example, the floating-point number FP may include 1 sign bit, 3 exponent bits, and 12 mantissa bits. A maximum value Max_0 can be determined from multiple floating-point numbers FP, and then quantization can be performed based on the maximum value Max_0 and a first preset value 2. 12 This identifies eight data intervals. For example, the eight data intervals could be: [max / 2] 12 [max], (max / 2 24 max / 2 12 ],(max / 2 36 max / 2 24 ],(max / 2 48 max / 2 36 ],(max / 2 60 max / 2 48 ],(max / 272 max / 2 60 ],(max / 2 84 max / 2 72 ],(max2 96 max / 2 84 With 3 exponent bits, the representable bit width reaches 96. However, multiple floating-point numbers may only be in the range [max / 2]. 12 [max], (max / 2 24 max / 2 12 Within these two numerical ranges, the representable bit width is much larger than the range required for model training or inference. Furthermore, an excessively large representable bit width will reduce the model's accuracy.
[0051] Figure 2 This is a structural block diagram of a data processing apparatus according to an embodiment of the present disclosure.
[0052] like Figure 2 As shown, the device 200 may include an acquisition unit 210, a quantization unit 220, a processing unit 230, and an output unit 240.
[0053] The acquisition unit 210 is configured to acquire data to be processed.
[0054] In this embodiment of the disclosure, the data to be processed may include multiple floating-point numbers.
[0055] For example, a single piece of data to be processed can be a matrix. This matrix contains multiple floating-point numbers.
[0056] In this embodiment of the disclosure, the sign bit of the floating-point number can be 1 bit, the exponent bit of the floating-point number can be less than 5 bits, and the floating-point number can be 16 bits.
[0057] For example, the sign bit of a floating-point number can be 1 bit, the exponent bit can be 3 bits, and the mantissa bit can be 12 bits.
[0058] The quantization unit 220 is configured to determine parameter values based on the extreme values among multiple floating-point numbers in the data to be processed; and to quantize the floating-point numbers based on the extreme values and parameter values to obtain quantized data.
[0059] In this embodiment of the disclosure, the amount of quantized data can be the same as the amount of data to be processed.
[0060] For example, there can be one piece of data to be processed, and there can also be one piece of data to be quantified.
[0061] In this embodiment of the disclosure, the quantized data includes a first value and a second value of the floating-point number.
[0062] For example, quantized data can include the first and second values of multiple floating-point numbers.
[0063] In this embodiment of the disclosure, extreme values may include maximum and minimum values.
[0064] For example, the data to be processed, Data_C, consists of multiple floating-point numbers. A parameter value can be determined in various ways based on the maximum value, Max_C, and the minimum value, Min_C, among these floating-point numbers. In one example, the maximum value, Max_C, could be 2. 5 The minimum value Min_C can be 2. -30 It can be determined that the parameter value Para_C is 2. 5 Multiple numerical ranges can be determined based on the parameter values Para_C, Max_C, and Min_C. Therefore, the numerical range within which each of the multiple floating-point numbers lies can be determined. These multiple numerical ranges can, for example, include: [Max_C, Max_C / 2]. 5 ],(Max_C / 2 10 Max_C / 2 5 ]etc.
[0065] For example, a first preset value Pre_1 can be used to quantize floating-point numbers.
[0066] In one example, the numerical range of a floating-point number FP_C1 in the data to be processed, Data_C, could be [Max_C / 2]. 5 The first value of the floating-point number FP_C1, FP_C1F1, can be Max_C / Pre_1, and the second value, FP_C1F2, can be (FP_C1v / Max_C)*Pre_1, where FP_C1v is the absolute value of the floating-point number FP_C1.
[0067] In one example, the numerical range of another floating-point number FP_C2 in the data to be processed, Data_C, could be [Max_C / 2]. 10 Max_C / 2 5 The first value of the floating-point number FP_C2, FP_C2F1, can be Max_C / (Pre_1*2). 5 The second value FP_C2F2 can be (FP_C2v / (Max_C / 2)). 5 ))*Pre_1, FP_C2v is the absolute value of the floating-point number FP_C2.
[0068] The processing unit 230 is configured to perform calculations using the first and second values of the floating-point numbers in the quantized data to obtain the processing result.
[0069] In the embodiments disclosed herein, various calculations can be performed using quantized data.
[0070] For example, various operations can include matrix multiplication, pooling, convolution, etc. The processing unit 230 can perform operations using the first and second values of a portion of the floating-point number to obtain the processing sub-result.
[0071] Output unit 240 is configured to output the processing results.
[0072] For example, after obtaining the processing sub-results of all floating-point numbers, these processing sub-results can be used as the processing result and output.
[0073] Through the embodiments of this disclosure, floating-point numbers are quantized. Processing with quantized data reduces the hardware resource overhead required for computation, improves processing efficiency, and enhances the performance of the processing device. During quantization, parameter values are determined based on the maximum value among multiple floating-point numbers, allowing for a more reasonable numerical range. This enables a more even distribution of multiple floating-point numbers across different numerical ranges, further reducing hardware resource overhead and improving processing efficiency.
[0074] It is understood that the above description uses one piece of data to be processed as an example to illustrate the data processing apparatus provided in this disclosure, but this disclosure is not limited thereto. In the embodiments of this disclosure, the data to be processed can be at least one. For example, two pieces of data to be processed can be two matrices with different dimensions.
[0075] In this embodiment of the disclosure, the number of quantized data can be the same as the number of data to be processed. For example, there can be multiple data to be processed, and there can also be multiple quantized data.
[0076] It is understood that the above description uses the example of quantizing data including a first and second value of a floating-point number to illustrate the data processing apparatus provided in this disclosure, but this disclosure is not limited thereto. In the embodiments of this disclosure, a floating-point number can be quantized into two or more numerical values.
[0077] It is understood that, in the embodiments of this disclosure, the square value of the floating-point number can be determined using the first and second values of the floating-point number in the quantized data.
[0078] For example, for the floating-point number FP_C1, the processing sub-result FP_C1sq can be determined by the following operation:
[0079] FP_C1sq=FP_C1F2*FP_C1F2*FP_C1F1*FP_C1F1 (Formula 5)
[0080] It is understood that in this embodiment, the floating-point number can be of various types. For example, the quantization unit 220 can quantize various types of floating-point numbers, such as single-precision floating-point numbers, tensor single-precision floating-point numbers, half-precision floating-point numbers, and scalar floating-point numbers. The processing unit 230 can perform calculations based on the first and second values of the corresponding floating-point number to obtain the processing result. Through this embodiment, the device 200 of this disclosure can be used to process data of various precisions, exhibiting strong compatibility.
[0081] In some embodiments, the apparatus provided in this disclosure may further include: a storage unit coupled to the quantization unit and the processing unit, for storing quantized data from the quantization unit.
[0082] In this embodiment of the disclosure, the storage unit may be a built-in cache unit.
[0083] For example, a storage unit may include multiple storage sub-units. The first storage sub-unit is used to store quantized data.
[0084] For example, a storage unit can also include different storage partitions, one of which is used to store quantized data.
[0085] It is understood that the data processing device has been described in detail above. The quantization unit of this disclosure will be described in detail below with reference to relevant embodiments.
[0086] In some embodiments, the quantization unit 220 described above may include: a first determining module configured to determine a parameter value based on the extreme values among multiple floating-point numbers in the data to be processed; a second determining module configured to determine at least one numerical range based on the extreme values and the parameter value; a quantization module configured to quantize the floating-point number according to the numerical range in which the floating-point number is located, to obtain quantized data; and a writing module configured to write the quantized data into a storage unit.
[0087] The first determining module of this disclosure will now be described in detail with reference to relevant embodiments.
[0088] In this embodiment of the disclosure, the first determining module is further configured to: determine the number of intervals of at least one numerical interval based on the exponent of the floating-point number.
[0089] For example, when the floating-point number FP includes 3 exponent bits, the number of intervals can be determined to be 8(2). 3 )indivual.
[0090] In this embodiment of the disclosure, the first determining module is further configured to: determine the parameter value based on the maximum value, the minimum value, and the number of intervals.
[0091] For example, for a dataset Data containing multiple floating-point numbers, if the maximum value Max is 2...5 And the minimum value Min is 2 -30 The maximum value Max is twice the minimum value Min. 35 To ensure a more uniform numerical range and cover all floating-point numbers, the parameter value Para can be set to 2. 5 It is understood that in this embodiment of the disclosure, the parameter value can also be other values, as long as the numerical range is relatively uniform and the numerical range covers all floating-point numbers.
[0092] As can be understood, the first determining module of the quantization unit has been described in detail above. The second determining module of the quantization unit will be described in detail below with reference to relevant embodiments.
[0093] In this embodiment of the disclosure, the second determining module is further configured to: determine at least one data threshold based on parameter values and extreme values.
[0094] For example, as mentioned above, the parameter value can be 2. 5 For example, extreme values can include a maximum value (Max) and a minimum value (Min).
[0095] In this embodiment of the disclosure, at least one data threshold is I+1 data thresholds. For example, the number of data thresholds may be related to the number of intervals in the numerical range. As another example, as described above, when the number of intervals is 8, the number of data thresholds may be 9.
[0096] In this embodiment of the disclosure, as described above, the extreme value may include the maximum value of a plurality of floating-point numbers.
[0097] In this embodiment of the disclosure, the second determining module is further configured to determine the maximum value as the first data threshold.
[0098] For example, for multiple floating-point numbers in the data to be processed, the maximum value Max can be used as the first data threshold Max_0.
[0099] In this embodiment of the disclosure, the second determining module is further configured to determine the (i+1)th data threshold based on the i-th data threshold and the parameter value.
[0100] For example, i is an integer greater than or equal to 1, and i is an integer less than or equal to 1. In one example, taking I = 8 as an example, the value of i can be 1, 2, 3, 4, 5, 6, 7, or 8.
[0101] For example, the data threshold can be determined using the following formula:
[0102]
[0103]
[0104]
[0105]
[0106]
[0107]
[0108]
[0109]
[0110] Para can be a parameter value.
[0111] It is understood that Max_1, Max_2, Max_3, Max_4, Max_5, Max_6, Max_7, and Max_8 represent the 2nd, 3rd, 4th, 5th, 6th, 7th, 8th, and 9th data thresholds, respectively. It is also understood that in some embodiments, a second preset value (e.g., 0) may be used as the 9th data threshold.
[0112] In this embodiment of the disclosure, at least one numerical interval is I numerical intervals, where I is an integer greater than 1.
[0113] In this embodiment of the disclosure, the second determining module is further configured to: determine at least one numerical range based on at least one data threshold.
[0114] For example, the determination module is also configured to: determine the i-th numerical range based on the i-th data threshold and the (i+1)-th data threshold.
[0115] For example, the first numerical interval Max_1 to Max_0 can be determined based on the first data threshold Max_0 and the second data threshold Max_1. The second numerical interval Max_2 to Max_1 can be determined based on the second data threshold Max_1 and the third data threshold Max_2. The third numerical interval Max_3 to Max_2 can be determined based on the third data threshold Max_2 and the fourth data threshold Max_3. The fourth numerical interval Max_4 to Max_3 can be determined based on the fourth data threshold Max_3 and the fifth data threshold Max_4. The fifth numerical interval Max_5 to Max_4 can be determined based on the fifth data threshold Max_4 and the sixth data threshold Max_5. The sixth numerical interval Max_6 to Max_5 can be determined based on the sixth data threshold Max_5 and the seventh data threshold Max_6. The seventh numerical interval Max_7 to Max_6 can be determined based on the seventh data threshold Max_6 and the eighth data threshold Max_7. The 8th numerical range Max_8 to Max_7 can be determined based on the 8th data threshold Max_7 and the 9th data threshold Max_8.
[0116] It is understood that in some other embodiments, the second determining module is further configured to: determine the first numerical range based on the first data threshold and the second preset value. For example, the eighth numerical range 0 to Max_7 is determined based on the eighth data threshold Max_7 and the second preset value (e.g., 0).
[0117] As can be understood, the second determining module of the quantization unit has been described in detail above. The quantization module of the quantization unit will now be described in detail with reference to relevant embodiments.
[0118] In this embodiment of the disclosure, the quantization module is configured to: obtain a first value of the floating-point number based on a target data threshold and a first preset value; and obtain a second value of the floating-point number based on the first preset value, the floating-point number, and the target data threshold.
[0119] For example, the target data threshold is the larger of two data thresholds related to the numerical range in which the floating-point number is located.
[0120] For example, if the absolute value of the floating-point number FP, FP_v, is in the first numerical interval (Max_1 < FP_v ≤ Max_0), then the target data threshold for the floating-point number FP is the larger of the two data thresholds (Max_0 and Max_1) in the first numerical interval, which is the first data threshold, Max_0.
[0121] The first preset value can be 2. 12 The first value of the floating-point number FP, FP_F1, can be:
[0122]
[0123] The second value FP_F2 of the floating-point number FP can be:
[0124]
[0125] It can be understood that the quantization module of the quantization unit has been described in detail above. Next, the writing module of the quantization unit will be described in detail in combination with related embodiments.
[0126] In the embodiments of the present disclosure, the writing module is configured to write quantization data into the storage unit.
[0127] For example, the first value FP_F1 and the second value FP_F2 of the floating-point number FP can be written into the storage unit.
[0128] It can be understood that the quantization module of the quantization unit has been described in detail above by taking the floating-point number in the first numerical interval as an example. The floating-point number can also be in other numerical intervals. Next, the methods for determining the first value and the second value of the floating-point number in other numerical intervals will be described in detail in combination with related embodiments.
[0129] For example, if the absolute value FP_v of the floating-point number FP is in the second numerical interval (Max_2 < FP_v < Max_1), the target data threshold of the floating-point number FP is: the larger second data threshold Max_1 of the two data thresholds (Max_1 and Max_2) in the second numerical interval.
[0130] As described above, the first preset value can be 2 12 , the first value FP_F1 of the floating-point number FP can be:
[0131]
[0132] The second value FP_F2 of the floating-point number FP can be:
[0133]
[0134] Again, for example, if the absolute value FP_v of the floating-point number FP is in the third numerical interval (Max_3 < FP_v < Max_2), the target data threshold of the floating-point number FP is: the larger third data threshold Max_2 of the two data thresholds (Max_2 and Max_3) in the third numerical interval.
[0135] As described above, the first preset value can be 2 12 , the first value FP_F1 of the floating-point number FP can be:
[0136]
[0137] The second value FP_F2 of the floating-point number FP can be:
[0138]
[0139] For another example, if the absolute value FP_v of the floating-point number FP is in the 4th numerical interval (Max_4 < FP_v < Max_3), then the target data threshold of the floating-point number FP is: the 4th data threshold Max_3, which is the larger one of the two data thresholds (Max_3 and Max_4) in the 4th numerical interval.
[0140] As described above, the first preset value can be 2 12 , and the first value FP_F1 of the floating-point number FP can be:
[0141]
[0142] The second value FP_F2 of the floating-point number FP can be:
[0143]
[0144] For another example, if the absolute value FP_v of the floating-point number FP is in the 5th numerical interval (Max_5 < FP_v < Max_4), then the target data threshold of the floating-point number FP is: the 5th data threshold Max_4, which is the larger one of the two data thresholds (Max_4 and Max_5) in the 5th numerical interval.
[0145] As described above, the first preset value can be 2 12 , and the first value FP_F1 of the floating-point number FP can be:
[0146]
[0147] The second value FP_F2 of the floating-point number FP can be:
[0148]
[0149] For another example, if the absolute value FP_v of the floating-point number FP is in the 6th numerical interval (Max_6 < FP_v < Max_5), then the target data threshold of the floating-point number FP is: the 6th data threshold Max_5, which is the larger one of the two data thresholds (Max_5 and Max_6) in the 6th numerical interval.
[0150] As described above, the first preset value can be 2 12 , and the first value FP_F1 of the floating-point number FP can be:
[0151]
[0152] The second value FP_F2 of the floating-point number FP can be:
[0153]
[0154] For another example, if the absolute value FP_v of the floating-point number FP is in the 7th numerical interval (Max_7 < FP_v < Max_6), the target data threshold of the floating-point number FP is: the 7th data threshold Max_6, which is the larger one of the two data thresholds (Max_6 and Max_7) in the 7th numerical interval.
[0155] As described above, the first preset value can be 2 12 , the first value FP_F1 of the floating-point number FP can be:
[0156]
[0157] The second value FP_F2 of the floating-point number FP can be:
[0158]
[0159] For another example, if the absolute value FP_v of the floating-point number FP is in the 8th numerical interval (Max_8 < FP_v < Max_7), the target data threshold of the floating-point number FP is: the 8th data threshold Max_7, which is the larger one of the two data thresholds (Max_8 and Max_7) in the 8th numerical interval.
[0160] As described above, the first preset value can be 2 12 , the first value FP_F1 of the floating-point number FP can be:
[0161]
[0162] The second value FP_F2 of the floating-point number FP can be:
[0163]
[0164] In some embodiments, the quantization data includes function data related to the target processing function and the first and second values of the target floating-point number related to the target processing function.
[0165] For example, a neural network model can be used to process floating-point data. The neural network model can include multiple processing functions, and these processing functions themselves also have a large number of parameters, which can also be floating-point numbers. The parameters of the processing function can be used as the data to be processed related to the processing function. These data to be processed can also be represented by a matrix, and all or part of the elements in the matrix are floating-point numbers. Quantifying these data to be processed can obtain the function data related to the processing function.
[0166] For example, a processing function can process one or more input floating-point numbers. The target floating-point number can be the input to the processing function.
[0167] For example, the target floating-point number and the data to be processed related to the processing function can come from different data sets. In one example, the target processing function can be a convolution kernel function. The parameters of the convolution kernel function can be implemented as a 3x3 matrix. This 3x3 matrix includes 9 floating-point numbers. This 3x3 matrix is used as the data to be processed, quantized, and the function data of the target processing function is obtained. This function data includes the first and second values of each of the 9 floating-point numbers.
[0168] It is understood that the quantization unit of this disclosure has been described in detail above. The processing unit of this disclosure will now be described in detail with reference to relevant embodiments.
[0169] In some embodiments, the processing unit 230 described above may include: a reading module configured to read a target processing function and a target floating-point number associated with the target processing function from a storage unit; and a processing module configured to process a first value and a second value of the target floating-point number using the target processing function to obtain a processing result.
[0170] For example, the reading module can read the function data of the target processing function and the target floating-point number.
[0171] For example, the target floating-point number can be at least one.
[0172] For example, there are at least two pieces of data to be processed, and at least two target floating-point numbers, each derived from one of the at least two pieces of data to be processed. In one example, the target floating-point numbers associated with the target processing function Fun_t1 come from data Data_A and data Data_B to be processed. One target floating-point number from data Data_A can be the floating-point number FP_A1. Another target floating-point number from data Data_B can be the floating-point number FP_B1. The target processing function Fun_t1 can be a multiplication function used to calculate the product of the two floating-point numbers.
[0173] In this embodiment of the disclosure, the processing module is further configured to: determine the target sign bit based on the sign bit of the target floating-point number.
[0174] For example, taking two target floating-point numbers as an example, the sign bits of the two target floating-point numbers are XORed, and the result is used as the target sign bit. In one example, the sign bits of floating-point number FP_A1 and floating-point number FP_B1 can be XORed to obtain the target sign bit.
[0175] In this embodiment of the disclosure, the processing module is further configured to: process the first and second values of the target floating-point number using the target processing function to obtain the absolute value of the output floating-point number.
[0176] For example, the processing module is also configured to: multiply the first values of at least two target floating-point numbers and the second values of at least two target floating-point numbers in sequence to obtain the absolute value of the output floating-point number.
[0177] In one example, the absolute value of the output floating-point number FP_AB1v can be determined using the following formula:
[0178] FP_AB1v=FP_A1F2*FP_B1F2*FP_A1F1*FP_B1F1 (Formula 30)
[0179] FP_A1F1 is the first value of the floating-point number FP_A1, and FP_A1F2 is the second value of the floating-point number FP_A1. FP_B1F1 is the first value of the floating-point number FP_B1, and FP_B1F2 is the second value of the floating-point number FP_B1.
[0180] In this embodiment of the disclosure, the processing module is further configured to obtain the output floating-point number based on the absolute value of the output floating-point number and the target sign bit.
[0181] For example, the output floating-point number FP_AB1 can be determined based on the absolute value of the output floating-point number FP_AB1v and the target sign bit.
[0182] In this embodiment of the disclosure, the processing module is further configured to obtain the processing result based on the output floating-point number.
[0183] For example, if the target processing function is related to floating-point numbers FP_A1 and FP_B1, the output floating-point number FP_AB1 can be used as the processing result.
[0184] In this embodiment of the disclosure, the processing module is further configured to convert the processing result into a floating-point number format to obtain the converted processing result. For example, the processing result or a sub-result can be converted into a floating-point number encoding format. Through this embodiment of the disclosure, the output result is also a floating-point number, which can further improve the compatibility of the data processing device.
[0185] In this embodiment of the disclosure, the output module is further configured to output the post-processing result.
[0186] It is understood that the data processing apparatus of this disclosure has been described in detail above, and the following will be combined with... Figure 3 The principles of the data processing apparatus of this disclosure will be described in detail with reference to relevant embodiments.
[0187] Figure 3This is a schematic diagram of a data processing apparatus according to an embodiment of the present disclosure.
[0188] like Figure 3 As shown, the acquisition unit 310 can acquire data to be processed from other devices and store the data to be processed in the off-chip storage unit 360. The acquisition unit 310 may be a Direct Memory Access (DMA) unit.
[0189] After acquiring the data to be processed, the quantization unit 320 reads the corresponding data from the off-chip storage unit. The quantization unit 320 determines parameter values based on the extreme values among multiple floating-point numbers in the data to be processed; then, based on the parameter values and extreme values, it quantizes the data to be processed to obtain quantized data. In this embodiment, the quantized data includes: function data related to the target processing function and a first and second value of the target floating-point number related to the target processing function.
[0190] Depending on the type of quantized data, the quantized data is written to a storage unit. The storage unit can be an on-chip static random access memory (SRAM). In this embodiment, the storage unit includes a first storage unit 351 and a second storage unit 352. Function data can be stored in the first storage unit 351, and the first and second values of the target floating-point number can be stored in the second storage unit 352. The first storage unit 351 can also be referred to as a model SRAM storage unit, and the second storage unit 352 can also be referred to as an input SRAM storage unit.
[0191] The data to be processed may include multiple floating-point numbers, and the quantized data may include the first and second values of multiple floating-point numbers.
[0192] Processing unit 330 can process the first and second values of the target floating-point number using the target processing function to obtain processing sub-results. These sub-results can be converted to floating-point format and cached in output unit 340. After processing unit 330 completes its calculations, output unit 340 can output multiple processing sub-results as the final processing result to off-chip storage unit 360. Output unit 340 can also be referred to as the result SRAM unit.
[0193] Understandable, based on the above... Figure 3 The principle of the data processing apparatus of this disclosure has been described in detail, but this disclosure is not limited thereto. The following will be combined with... Figure 4 The principles of the data processing apparatus of this disclosure will be described in detail with reference to relevant embodiments.
[0194] Figure 4 This is a schematic diagram of a data processing apparatus according to another embodiment of the present disclosure.
[0195] like Figure 4 As shown, the data processing device can be implemented based on a graphics processor. The acquisition unit 410 can acquire data to be processed from the graphics processor's storage unit 460. The acquisition unit 410 can be a direct memory access unit. For example, the graphics processor's storage unit 460 can also be referred to as video memory.
[0196] After acquiring the data to be processed, the quantization unit can read the corresponding data to be processed from the memory unit 460 of the graphics processor. The quantization unit may include a first quantization unit 421 and a second quantization unit 422. The first quantization unit 421 can determine the parameter value based on the extreme values among multiple floating-point numbers in the data to be processed related to the processing function itself; then, based on the parameter value and the extreme values, it quantizes the data to be processed related to the processing function itself to obtain the function data of the target processing function. The second quantization unit 422 can determine the parameter value based on the extreme values among multiple floating-point numbers in the data to be processed related to the input data of the processing function; then, based on the parameter value and the extreme values, it quantizes the data to be processed related to the input data of the processing function to obtain the first value and the second value of the target floating-point number related to the target processing function. In this embodiment of the present disclosure, the quantized data includes: the function data related to the target processing function and the first and second values of multiple target floating-point numbers related to the target processing function.
[0197] Depending on the type of quantized data, the quantized data is written to a storage unit. The storage unit can be an on-chip static random access memory (SRAM). In this embodiment, the storage unit includes a first storage unit 451 and a second storage unit 452. Function data can be stored in the first storage unit 451, and the first and second values of the target floating-point number can be stored in the second storage unit 452. The first storage unit 451 can also be referred to as a model SRAM storage unit, and the second storage unit 452 can also be referred to as an input SRAM storage unit.
[0198] Processing unit 430 can process the first and second values of the target floating-point number using the target processing function to obtain a processing sub-result. The processing sub-result can be converted to floating-point format and cached in output unit 440. After processing unit 430 completes the calculation, output unit 440 can take multiple processing sub-results as the processing result and output them to the graphics processor's storage unit 460. Output unit 440 can also be referred to as the result SRAM unit.
[0199] The data processing apparatus of this disclosure will be further described in detail below with reference to relevant embodiments.
[0200] In some embodiments, the acquisition unit is configured to acquire data to be processed. For example, there are two data to be processed, namely Data_A and Data_B.
[0201] The data to be processed, Data_A, can be represented by a 3x1 matrix. The transposed Data_A = [1.0, 2...]. -6 ,2 -7 ].
[0202] The data to be processed, Data_B, can be represented by a 1x2 matrix, Data_B = [1, 2...]. -6 It is understood that, for ease of understanding, in this embodiment, multiple floating-point numbers in the data to be processed, Data_A and Data_B, are represented in decimal.
[0203] It is understood that the decimal number corresponding to the floating-point number FP_A1 of the data to be processed mentioned above can be 1.0. Similarly, the decimal number corresponding to the floating-point number FP_B1 of the data to be processed mentioned above can be 1.0.
[0204] In some embodiments, the quantization unit is configured to: determine parameter values based on the extreme values among multiple floating-point numbers in the data to be processed; and quantize the floating-point numbers based on the parameter values and the extreme values to obtain quantized data. The quantized data may include a first value and a second value of the floating-point number. For example, for the data to be processed, Data_A, the maximum value Max_A is 1, and the minimum value Min_A is 2. -7 For the data to be processed, Data_B, the maximum value Max_B is 1, and the minimum value Min_B is 2. -6 In this embodiment, for ease of understanding, the parameter values of both the data to be processed, Data_A and Data_B, can be set to 2. 5 .
[0205] For the data to be processed, Data_A, the maximum value Max_A can be used as the first data threshold Max_0A. For the data to be processed, Data_B, the maximum value Max_B can be used as the first data threshold Max_0B. Next, formulas six to thirteen described above can be used to determine several other data thresholds for the data to be processed, Data_A and Data_B, respectively.
[0206] For the data to be processed, Data_A, the second data threshold Max_1A can be 2. -5 The third data threshold, Max_2A, can be 2. -10 For the data to be processed, Data_A, the first two value intervals of multiple value intervals are: 2 -5 ~1, 2 -10 2 -5In the data to be processed, Data_A, the floating-point number FP_A1 corresponding to the decimal number "1.0" is located in the first value range of 2. -5 ~1.0. In the data to be processed, Data_A, and the decimal number "2 -6 The corresponding floating-point number FP_A2 is in the second numerical range 2. - 10 2 -5 , and the decimal number "2 -7 The corresponding floating-point number FP_A3 is in the second numerical range 2. -10 ~_2 -5 Based on formulas fourteen to seventeen described above, the decimal numbers corresponding to the first values of floating-point numbers FP_A1, FP_A2, and FP_A3 can be determined as follows: 2 -12 2 -17 and 2 -17 Alternatively, the decimal numbers corresponding to the second values of floating-point numbers FP_A1, FP_A2, and FP_A3 can be determined as 4096, 2048, and 1024, respectively.
[0207] For the data to be processed, Data_B, the second data threshold Max_1B can be 2. -5 The third data threshold, Max_2B, can be 2. -10 For the data to be processed, Data_B, the first two value intervals of the multiple value intervals are: 2 -5 ~1, 2 -10 2 -5 In the data to be processed, Data_B, the floating-point number FP_B1 corresponding to the decimal number "1" is located in the first value interval 2. -5 ~1. In the data to be processed, Data_B, the decimal number "2" is... -6 The corresponding floating-point number FP_B2 is in the second numerical range 2. -10 2 -5 Based on formulas fourteen to seventeen described above, the decimal numbers corresponding to the first values of floating-point numbers FP_B1 and FP_B2 can be determined as follows: 2 -12 and 2 -17 Alternatively, the decimal numbers corresponding to the second values of floating-point numbers FP_B1 and FP_B2 can be determined to be 4096 and 2048, respectively.
[0208] In some embodiments, the processing unit is configured to perform calculations using the first and second values of the floating-point numbers in the quantized data to obtain a processing result.
[0209] For example, the processing unit can multiply the data to be processed, Data_A, and the data to be processed, Data_B. During this operation, the first floating-point number FP_A1 of the data to be processed, Data_A, can be multiplied by the first floating-point number FP_B1 of the data to be processed, Data_B. Alternatively, the first floating-point number FP_A1 of the data to be processed, Data_A, can be multiplied by the second floating-point number FP_B2 of the data to be processed, Data_B.
[0210] The decimal number corresponding to the floating-point number FP_A1 is 1.0. As mentioned above, the decimal number corresponding to the first value of the floating-point number FP_A1 is 2. -12 The second value of the floating-point number FP_A1 corresponds to the decimal number 4096.
[0211] The decimal number corresponding to the floating-point number FP_B1 is 1.0. As mentioned above, the decimal number corresponding to the first value of the floating-point number FP_B1 is 2. -12 The second value of the floating-point number FP_B1 corresponds to the decimal number 4096.
[0212] Multiplying the first floating-point number FP_A1 of the data to be processed Data_A and the first floating-point number FP_B1 of the data to be processed Data_B yields the absolute value FP_AB1v of the output floating-point number, which can be achieved using the following formula:
[0213] FP_AB1v_10 = 4096 * 4096 * 2 -12 *2 -12 =1 (Formula Thirty-One)
[0214] The decimal number FP_AB1v_10 corresponding to FP_AB1v can be 1.
[0215] The decimal number corresponding to the floating-point number FP_B2 is 2. -6 As mentioned above, the first value of the floating-point number FP_B2 corresponds to the decimal number 2. -17 The second value of the floating-point number FP_B2 corresponds to the decimal number 2048.
[0216] Multiplying the first floating-point number FP_A1 of the data to be processed Data_A and the second floating-point number FP_B1 of the data to be processed Data_B yields the absolute value of the output floating-point number FP_AB2v, which can be achieved using the following formula:
[0217] FP_AB2v_10 = 4096 * 2048 * 2 -12 *2 -17 =0.015625 (Formula Thirty-Two)
[0218] The decimal number FP_AB2v_10 corresponding to FP_AB2v can be 0.015625.
[0219] For example, the result could be a 3x2 matrix. After converting each floating-point number in the matrix to decimal, the resulting matrix would be:
[0220]
[0221] The present invention can effectively improve the computing efficiency of the data processing device while maintaining a high level of computing accuracy.
[0222] It's understandable that performing various operations directly between floating-point numbers requires significant computational resources. Converting them to their first and second values before performing the operations can significantly reduce the required resources. For example, taking floating-point multiplication as an example, floating-point numbers FP_A1 and FP_B1 are stored in off-chip memory in encoded form, and directly multiplying them would consume considerable computational resources. However, using the first and second values of these two floating-point numbers for the operation can significantly reduce computational resources. Multiplying the second values of floating-point numbers FP_A1 and FP_B1 (multiplying the binary numbers corresponding to 4096 with the binary numbers corresponding to 4096) only requires a simple shift operation with the shift register corresponding to the processing unit.
[0223] It is understandable that the above text assumes the first preset value is 2. 12 For example, the data processing apparatus of this disclosure has been described in detail. In some other embodiments, the first preset value may also be other values; for example, the first preset value may also be 2. 12 1.
[0224] Figure 5 This is a flowchart of a data processing method according to an embodiment of the present disclosure.
[0225] like Figure 5 As shown, the method 500 includes operations S510 to S550.
[0226] It is understandable that method 500 can be applied to data processing devices.
[0227] The S510 is used to obtain data to be processed.
[0228] In operation S520, parameter values are determined based on the extreme values among multiple floating-point numbers in the data to be processed.
[0229] In operation S530, the floating-point number is quantized based on the extreme values and parameter values to obtain quantized data. For example, the quantized data includes the first and second values of the floating-point number.
[0230] In the S540 operation, the first and second values of the floating-point numbers in the quantized data are used for calculation and processing to obtain the processing result.
[0231] The S550 is operated to output the processing results.
[0232] In this embodiment of the disclosure, method 500 can be implemented using device 200.
[0233] For example, operation S510 can be performed using the acquisition unit 210.
[0234] For example, operations S520 and S530 can be performed using the quantization unit 220.
[0235] For example, operation S540 can be performed using processing unit 230.
[0236] For example, operation S550 can be performed using output unit 240.
[0237] In some embodiments, quantizing a floating-point number based on extreme values and parameter values to obtain quantized data includes: determining at least one numerical range based on the extreme values and parameter values among multiple floating-point numbers in the data to be processed; and quantizing the floating-point number based on the numerical range in which the floating-point number is located to obtain quantized data.
[0238] In this embodiment of the disclosure, the second determining module of the quantization unit 220 can be used to determine at least one numerical range based on the extreme values among multiple floating-point numbers in the data to be processed. In this embodiment of the disclosure, the quantization module of the quantization unit 220 can be used to quantize the floating-point numbers based on the numerical range in which the floating-point numbers are located, thereby obtaining quantized data.
[0239] In some embodiments, the extreme values include the maximum value among a plurality of floating-point numbers and the minimum value among a plurality of floating-point numbers. Determining the parameter value based on the extreme values among the plurality of floating-point numbers in the data to be processed includes: determining the number of intervals of at least one numerical interval based on the exponent of the floating-point number; and determining the parameter value based on the maximum value, the minimum value, and the number of intervals.
[0240] In this embodiment of the disclosure, the first determining module of the quantization unit 220 can be used to determine the number of at least one numerical interval based on the exponent of the floating-point number; and to determine the parameter value based on the maximum value, the minimum value and the number of intervals.
[0241] In some embodiments, determining at least one numerical interval based on extreme values and parameter values includes: determining at least one data threshold based on parameter values and extreme values; and determining at least one numerical interval based on a second preset value and at least one data threshold. For example, the second determining module of quantization unit 220 may perform the following operations: determining at least one data threshold based on a first preset value and extreme values; and determining at least one numerical interval based on a second preset value and at least one data threshold.
[0242] In some embodiments, the extreme values include the maximum value among a plurality of floating-point numbers, at least one data threshold is I data thresholds, at least one numerical range is I numerical ranges, and I is an integer greater than 1.
[0243] In some embodiments, determining at least one data threshold based on parameter values and extreme values includes: determining the maximum value as the first data threshold; and determining the (i+1)th data threshold based on the i-th data threshold and the parameter value. For example, i is an integer greater than or equal to 1, and i is an integer less than or equal to 1. For example, the second determining module of the quantization unit 220 may perform the following operations: determining the maximum value as the first data threshold; and determining the (i+1)th data threshold based on the i-th data threshold and the parameter value.
[0244] In some embodiments, determining at least one numerical interval based on at least one data threshold includes: determining the i-th numerical interval based on the i-th data threshold and the (i+1)-th data threshold. For example, the second determining module of the quantization unit 220 may perform the following operation: determining the i-th numerical interval based on the i-th data threshold and the (i+1)-th data threshold.
[0245] In some embodiments, quantizing a floating-point number according to its numerical range to obtain quantized data includes: obtaining a first value of the floating-point number based on a target data threshold and a first preset value; and obtaining a second value of the floating-point number based on the first preset value, the floating-point number, and the target data threshold. For example, the target data threshold is the larger of two data thresholds related to the numerical range of the floating-point number. For example, the quantization module of quantization unit 220 can perform the following operations: obtaining the first value of the floating-point number based on the target data threshold and the first preset value; and obtaining the second value of the floating-point number based on the first preset value, the floating-point number, and the target data threshold.
[0246] In some embodiments, the quantization data includes function data related to the target processing function and the target floating-point number related to the target processing function.
[0247] In some embodiments, processing the first and second values of the floating-point numbers in the quantized data to obtain a processing result includes: reading the target processing function and the target floating-point number associated with the target processing function; processing the first and second values of the target floating-point number using the target processing function to obtain a processing result. For example, the reading module of the arithmetic unit 230 can be used to read the target processing function and the target floating-point number associated with the target processing function. For example, the processing module of the arithmetic unit 230 can be used to process the first and second values of the target floating-point number using the target processing function to obtain a processing result.
[0248] In some embodiments, processing the first and second values of the target floating-point number using a target processing function to obtain a processing result includes: determining the target sign bit based on the sign bit of the target floating-point number; processing the first and second values of the target floating-point number using the target processing function to obtain the absolute value of the output floating-point number; obtaining the output floating-point number based on the absolute value of the output floating-point number and the target sign bit; and obtaining the processing result based on the output floating-point number. For example, the processing module of the arithmetic unit 230 can perform the following operations: determining the target sign bit based on the sign bit of the target floating-point number; processing the first and second values of the target floating-point number using the target processing function to obtain the absolute value of the output floating-point number; obtaining the output floating-point number based on the absolute value of the output floating-point number and the target sign bit; and obtaining the processing result based on the output floating-point number.
[0249] In some embodiments, there are at least two data points to be processed and at least two target floating-point numbers, with the at least two target floating-point numbers each coming from at least two data points to be processed.
[0250] In some embodiments, processing the first and second values of the target floating-point numbers using a target processing function to obtain the absolute value of the output floating-point number includes: sequentially multiplying the first values of at least two target floating-point numbers and the second values of at least two target floating-point numbers to obtain the absolute value of the output floating-point number. For example, the processing module of the arithmetic unit 230 can be used to sequentially multiply the first values of at least two target floating-point numbers and the second values of at least two target floating-point numbers to obtain the absolute value of the output floating-point number.
[0251] The collection, storage, use, processing, transmission, provision, and disclosure of user personal information involved in the technical solution disclosed herein comply with the provisions of relevant laws and regulations and do not violate public order and good morals.
[0252] According to embodiments of this disclosure, this disclosure also provides an electronic device, a readable storage medium, and a computer program product.
[0253] In this disclosure, an electronic device is provided that may include the data processing apparatus provided herein. For example, the electronic device may include data processing apparatus 200.
[0254] In embodiments of this disclosure, an electronic device is provided, which may also include: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the method provided in this disclosure. For example, the processor may execute method 500.
[0255] In this embodiment of the disclosure, a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform the methods provided herein is provided.
[0256] In this embodiment of the disclosure, a computer program product is provided, which includes a computer program that, when executed by a processor, implements the method provided in this disclosure.
[0257] Figure 6 A schematic block diagram of an example electronic device 600 that can be used to implement embodiments of the present disclosure is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.
[0258] like Figure 6 As shown, device 600 includes a computing unit 601, which can perform various appropriate actions and processes based on a computer program stored in read-only memory (ROM) 602 or a computer program loaded from storage unit 608 into random access memory (RAM) 603. RAM 603 may also store various programs and data required for the operation of device 600. The computing unit 601, ROM 602, and RAM 603 are interconnected via bus 604. Input / output (I / O) interface 605 is also connected to bus 604.
[0259] Multiple components in device 600 are connected to I / O interface 605, including: input unit 606, such as keyboard, mouse, etc.; output unit 607, such as various types of monitors, speakers, etc.; storage unit 608, such as disk, optical disk, etc.; and communication unit 609, such as network card, modem, wireless transceiver, etc. Communication unit 609 allows device 600 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.
[0260] The computing unit 601 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 601 include, but are not limited to, a central processing unit, a graphics processing unit, various special-purpose artificial intelligence (AI) computing chips, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. For example, various special-purpose artificial intelligence computing chips may include the device 200 described above.
[0261] The computing unit 601 performs the various methods and processes described above, such as data processing methods. For example, in some embodiments, the data processing method may be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 608. In some embodiments, part or all of the computer program may be loaded and / or installed on device 600 via ROM 602 and / or communication unit 609. When the computer program is loaded into RAM 603 and executed by computing unit 601, one or more steps of the data processing method described above may be performed. Alternatively, in other embodiments, computing unit 601 may be configured to perform data processing methods by any other suitable means (e.g., by means of firmware).
[0262] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays, application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.
[0263] The program code used to implement the methods of this disclosure may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.
[0264] In the context of this disclosure, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.
[0265] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) monitor or an LCD (liquid crystal display)) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).
[0266] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with embodiments of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.
[0267] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other.
[0268] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this disclosure can be achieved, and this is not limited herein.
[0269] The specific embodiments described above do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.
Claims
1. A data processing apparatus, comprising: The acquisition unit is configured to acquire data to be processed. The quantization unit is configured to determine parameter values based on the extreme values among multiple floating-point numbers in the data to be processed. And based on the extreme value and the parameter value, the floating-point number is quantized to obtain quantized data, wherein the quantized data includes: function data related to the target processing function and a first value and a second value of the target floating-point number related to the target processing function; the data to be processed is at least two, and the at least two target floating-point numbers are respectively derived from at least two data to be processed; The processing unit is configured to perform calculations using the first and second values of the target floating-point number in the quantized data to obtain a processing result, thereby reducing the resources required for computation. The output unit is configured to output the processing result, and A storage unit is coupled to the quantization unit and the processing unit; the storage unit includes a first storage unit and a second storage unit, the first storage unit being used to store the function data of the target processing function, and the second storage unit being used to store the first value and the second value of the target floating-point number; The quantization unit includes: The second determining module is configured to determine at least one numerical range based on the extreme value and the parameter value; The quantization module is configured to: obtain a first value of the target floating-point number based on a target data threshold and a first preset value, wherein the target data threshold is the larger of two data thresholds related to the numerical range in which the target floating-point number is located; and obtain a second value of the target floating-point number based on the first preset value, the target floating-point number, and the target data threshold; and obtain the second value of the target floating-point number based on the first preset value, the target floating-point number, and the target data threshold. The processing unit includes: The read module is configured to read function data of the target processing function from the first storage unit, and to read a first value and a second value of a target floating-point number related to the target processing function from the second storage unit; and The processing module, when the target processing function is a multiplication function, performs a shift operation using a shift register corresponding to the processing unit to achieve multiplication between the first values and the second values of at least two target floating-point numbers, including: The absolute value of the output floating-point number is obtained by sequentially multiplying the first values of at least two of the target floating-point numbers and sequentially multiplying the second values of at least two of the target floating-point numbers.
2. The apparatus according to claim 1, wherein, The quantization unit further includes: The first determining module is configured to determine the parameter value based on the extreme value.
3. The apparatus according to claim 2, wherein, The extreme values include the maximum value among the plurality of floating-point numbers and the minimum value among the plurality of floating-point numbers. The first determining module is also configured as follows: The number of intervals in the at least one numerical interval is determined based on the exponent of the floating-point number; and The parameter value is determined based on the maximum value, the minimum value, and the number of intervals.
4. The apparatus according to claim 3, wherein, The second determining module is also configured as follows: Based on the parameter values and the extreme values, at least one data threshold is determined; and The at least one numerical range is determined based on the at least one data threshold.
5. The apparatus according to claim 4, wherein, The extreme value includes the maximum value among the plurality of floating-point numbers, the at least one data threshold is I+1 data thresholds, and the at least one numerical interval is I numerical intervals, where I is an integer greater than 1. The second determining module is also configured as follows: The maximum value is determined as the first data threshold; and Based on the i-th data threshold and the parameter value, determine the (i+1)-th data threshold. Where i is an integer greater than or equal to 1, and i is an integer less than or equal to 1.
6. The apparatus according to claim 5, wherein, The second determining module is also configured as follows: The i-th numerical interval is determined based on the i-th data threshold and the (i+1)-th data threshold.
7. The apparatus according to claim 1, wherein, The processing module is further configured to: Determine the target sign bit based on the sign bit of the target floating-point number; The first and second values of the target floating-point number are processed using the target processing function to obtain the absolute value of the output floating-point number; The output floating-point number is obtained based on the absolute value of the output floating-point number and the target sign bit; as well as The processing result is obtained based on the output floating-point number.
8. A data processing method applied to a data processing apparatus, the method comprising: Obtain the data to be processed; The parameter values are determined based on the extreme values among multiple floating-point numbers in the data to be processed; The floating-point number is quantized based on the extreme value and the parameter value to obtain quantized data, wherein the quantized data includes: function data related to the target processing function and a first value and a second value of the target floating-point number related to the target processing function; the data to be processed is at least two, and the at least two target floating-point numbers are respectively derived from at least two data to be processed; The first and second values of the target floating-point number in the quantized data are used for calculation to obtain the processing result; Output the processing result; Based on the extreme values and the parameter values, at least one numerical range is determined; The first value of the target floating-point number is obtained based on the target data threshold and the first preset value, wherein the target data threshold is the larger of two data thresholds related to the numerical range in which the target floating-point number is located; and the second value of the target floating-point number is obtained based on the first preset value, the target floating-point number, and the target data threshold; the second value of the target floating-point number is obtained based on the first preset value, the target floating-point number, and the target data threshold. The quantized data is written into a storage unit, which includes a first storage unit and a second storage unit. The first storage unit is used to store the function data of the target processing function, and the second storage unit is used to store the first value and the second value of the target floating-point number. Read the function data of the target processing function from the first storage unit, and read the first and second values of the target floating-point number related to the target processing function from the second storage unit; The first and second values of the target floating-point number are processed using the target processing function to obtain the processing result; When the target processing function is a multiplication function, a shift operation is performed using a shift register corresponding to the processing unit to achieve multiplication between the first values and the second values of at least two target floating-point numbers, including: The absolute value of the output floating-point number is obtained by sequentially multiplying the first values of at least two of the target floating-point numbers and sequentially multiplying the second values of at least two of the target floating-point numbers.
9. The method according to claim 8, wherein, The extreme values include the maximum value among the plurality of floating-point numbers and the minimum value among the plurality of floating-point numbers. The step of determining the parameter value based on the extreme values among multiple floating-point numbers in the data to be processed includes: The number of intervals in the at least one numerical interval is determined based on the exponent of the floating-point number; and The parameter value is determined based on the maximum value, the minimum value, and the number of intervals.
10. The method according to claim 8, wherein, Determining at least one numerical range based on the extreme value and the parameter value includes: Based on the parameter values and the extreme values, at least one data threshold is determined; and The at least one numerical range is determined based on the at least one data threshold.
11. The method according to claim 10, wherein, The extreme value includes the maximum value among the plurality of floating-point numbers, the at least one data threshold is I+1 data thresholds, and the at least one numerical interval is I numerical intervals, where I is an integer greater than 1. Determining at least one data threshold based on the parameter value and the extreme value includes: The maximum value is determined as the first data threshold; and Based on the i-th data threshold and the parameter value, determine the (i+1)-th data threshold. Where i is an integer greater than or equal to 1, and i is an integer less than or equal to 1.
12. The method according to claim 11, wherein, Determining the at least one numerical range based on the at least one data threshold includes: The i-th numerical interval is determined based on the i-th data threshold and the (i+1)-th data threshold.
13. The method according to claim 8, wherein, The process of processing the first and second values of the target floating-point number using the target processing function to obtain the processing result includes: Determine the target sign bit based on the sign bit of the target floating-point number; The first and second values of the target floating-point number are processed using the target processing function to obtain the absolute value of the output floating-point number; The output floating-point number is obtained based on the absolute value of the output floating-point number and the target sign bit; and The processing result is obtained based on the output floating-point number.
14. An electronic device comprising at least one data processing apparatus as described in any one of claims 1 to 7.
15. An electronic device comprising: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 8 to 13.
16. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to perform the method according to any one of claims 8 to 13.
17. A computer program product comprising a computer program that, when executed by a processor, implements the method according to any one of claims 8 to 13.
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