Hardware queue scheduling method, processor, electronic device and storage medium

Abstract

The application relates to a hardware queue scheduling method, a processor, an electronic device and a storage medium. The processor comprises a plurality of hardware queues, each hardware queue corresponding to a kind of processing unit in a processing unit cluster. By using the hardware property of the processor, at least one operation command included in an obtained to-be-processed operation flow is distributed to the hardware queue corresponding to each processing unit, at least one operation command is selected from each hardware queue and distributed to the corresponding processing unit, so that the processing unit executes the received at least one operation command. According to the embodiment of the application, the serial and / or parallel processing of a plurality of hardware commands can be realized based on the hardware characteristics of the processor, each hardware operation command in the operation flow can be efficiently and correctly executed on the corresponding processing unit, and the efficiency of the processor is improved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a hardware queue scheduling method, processor, electronic device and storage medium. Background Technology

[0002] In related technologies, the characteristic of CUDA (Compute Unified Device Architecture) operation stream is that all commands on an operation stream are executed serially.

[0003] This is because, typically, an operation flow is mapped to a hardware queue. Therefore, all operation commands for a given operation flow are executed on the same hardware queue. The characteristic of a hardware queue is serial execution; that is, within a queue, the next operation command will only begin execution after the previous one has completed. If an operation flow contains multiple operation commands, even if these commands are independent, they will still be executed serially. This reduces the parallelism of operation command execution, thereby decreasing processor efficiency. Summary of the Invention

[0004] This application proposes a hardware queue scheduling method, as well as a processor, electronic device, and storage medium, which can improve the problem of low command execution efficiency of processors in the prior art.

[0005] In a first aspect, embodiments of this application provide a hardware queue scheduling method. The method is applied to a processor, which includes multiple hardware queues and at least one processing unit cluster. Each processing unit cluster includes at least one processing unit. In the same processing unit cluster, any two processing units are of different types. The processing unit is used to process operation commands from the hardware queues. Each hardware queue corresponds to a type of processing unit in a processing unit cluster.

[0006] The method includes:

[0007] Obtain an operation flow to be processed, the operation flow including at least one operation command, each operation command having command information;

[0008] Based on the command information, at least one operation command included in the operation flow is distributed to at least one hardware queue among the plurality of hardware queues;

[0009] At least one operation command is selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue.

[0010] The processing unit executes at least one received operation command.

[0011] In this embodiment, the processor includes multiple hardware queues, each corresponding to a different processing unit within a processing unit cluster. Leveraging the processor's hardware characteristics, the operation commands within the acquired operation stream are distributed to their respective hardware queues. The operation commands in each hardware queue are then distributed sequentially, ensuring that each operation command in its queue is assigned to its corresponding processing unit, enabling the processing unit to execute the received operation commands. This approach, based on the processor's hardware capabilities, allows multiple operation commands in the operation stream to be distributed to multiple hardware queues. Multiple operation commands within a single hardware queue can be processed serially, while multiple operation commands without dependencies across multiple hardware queues can be processed in parallel. This enables serial and / or parallel processing of multiple operation commands in the operation stream, ensuring efficient and correct execution of each operation command on the processing unit and improving processor efficiency.

[0012] Secondly, embodiments of this application provide a processor, comprising: a plurality of hardware queues and at least one processing unit cluster, each processing unit cluster including at least one processing unit, wherein any two processing units within the same processing unit cluster are of different types, the processing unit being used to process operation commands from the hardware queues, each hardware queue corresponding to a type of processing unit in a processing unit cluster; the processor, by executing software driving, obtains an operation stream to be processed, including at least one operation command, each operation command having command information reflecting the command type; according to the command information, the processor distributes the at least one operation command included in the operation stream to at least one hardware queue among the plurality of hardware queues; at least one operation command is selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue; the processing unit executes the received at least one operation command.

[0013] Thirdly, embodiments of this application provide an electronic device, including: a memory and a processor; the memory stores computer-readable instructions, which, when executed by the processor, perform the method provided in the first aspect described above.

[0014] Fourthly, embodiments of this application provide a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, implement the method provided in the first aspect above.

[0015] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this application. Attached Figure Description

[0016] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with this application and, together with the specification, serve to explain the technical solutions of this application.

[0017] Figure 1 A flowchart illustrating a hardware queue scheduling method according to an embodiment of this application is shown.

[0018] Figure 2 This diagram illustrates an application of a hardware queue scheduling method according to an embodiment of this application.

[0019] Figure 3 A schematic diagram of a hardware queue scheduling method according to an embodiment of this application is shown.

[0020] Figure 4 A schematic block diagram of an architecture of a processor according to an embodiment of this application is shown. Detailed Implementation

[0021] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0022] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0023] In this document, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Furthermore, the term "at least one" in this document means any combination of at least two of any one or more elements. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C.

[0024] Furthermore, to better illustrate this application, numerous specific details are provided in the following detailed description. Those skilled in the art should understand that this application can be implemented without certain specific details. In some instances, methods, means, components, and circuits well-known to those skilled in the art have not been described in detail in order to highlight the main points of this application.

[0025] In modern high-performance computing processors or graphics processing units (GPUs), hardware queues (or hardware command queues) are typically used to execute data processing tasks. When program code executes on the processor, it is first parsed into hardware-executable operation commands by the processor's software driver. These operation commands are then allocated to hardware queues for processing. The hardware queue receives operation streams (also called operation command streams) generated by the software driver and distributes the operation commands in the queue to processing units in sequence. However, in related technologies, one operation stream corresponds to one hardware queue, which reduces the parallelism of operation command execution and affects the processor's processing efficiency.

[0026] In view of this, embodiments of this application propose a hardware queue scheduling scheme, wherein an operation stream can correspond to multiple hardware queues within a processor, and each hardware queue corresponds to a processing unit within a processing unit cluster. Utilizing the hardware characteristics of the processor, multiple operation commands included in the acquired operation stream can be distributed to multiple hardware queues, and at least one operation command can be selected from each hardware queue and distributed to the corresponding processing unit, so that the processing unit executes the received at least one operation command. In this way, based on the processor's hardware characteristics, multiple hardware queues can be scheduled and managed to improve the processor's parallelism and processing efficiency, enabling serial and / or parallel processing of multiple operation commands. This allows each operation command in the operation stream to be executed efficiently and correctly on the processing unit, improving processor efficiency.

[0027] Figure 1 A flowchart illustrating a hardware queue scheduling method according to an embodiment of this application is shown, such as... Figure 1 As shown, the hardware queue scheduling method includes:

[0028] In step S11, an operation flow to be processed is obtained, the operation flow includes at least one operation command, and each operation command has command information to reflect the command type;

[0029] In step S12, based on the command information, at least one operation command included in the operation flow is distributed to at least one hardware queue among multiple hardware queues.

[0030] In step S13, at least one operation command is selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue.

[0031] In step S14, the processing unit executes at least one received operation command.

[0032] In one possible implementation, the method is applied to a processor, which can be implemented by the processor calling computer-readable instructions stored in memory. The processor may include multiple hardware queues and at least one cluster of processing units, each cluster including at least one processing unit. Within the same cluster, any two processing units are of different types, and different types of processing units can implement different functions. For example, a cluster of processing units may include: a Compute Unit (CU) for handling general-purpose computational tasks, a Tensor Unit (TU) for handling tensor operations, a Direct Memory Access (DMA) unit for data handling or transfer, etc.

[0033] The processing unit can be used to process operation commands from hardware queues, and each hardware queue corresponds to one type of processing unit in a processing unit cluster. One processing unit corresponds to one hardware queue.

[0034] The processing unit may include at least one of a computing unit, a tensor unit, and a direct memory access unit. This application embodiment does not limit the specific type of processing unit included in the processor.

[0035] In one possible implementation, in step S11, when a program code is executed on the processor, the program code can be parsed into a stream of operations to be processed by the processor's software driver. This stream of operations may include a series of hardware-executable operation commands. These operation commands in the stream can be arranged serially according to the order in which the software driver generates the operation commands (i.e., conforming to the original command order in the code programming), and each operation command has command information.

[0036] After obtaining the operation flow to be processed in step S11, in step S12, based on the command information of each operation command in the operation flow, at least one operation command included in the operation flow is distributed to at least one hardware queue among multiple hardware queues, wherein one hardware queue corresponds to one processing unit in a processing unit cluster. The processor can complete steps S11 and S12 by running the above-mentioned software driver.

[0037] For example, suppose an operation flow includes N (N≥1) operation commands. Based on the command information of each of these N commands, the N operation commands can be distributed to multiple (e.g., 8, 16, etc.) different hardware queues. Each hardware queue can point to a different processing unit, so that each hardware queue is responsible for the operation commands of one processing unit within a processing unit cluster. The command information of each operation command can be used to determine the target processing unit (e.g., a tensor unit within a processing unit cluster) to which the operation command is distributed. This allows the operation command to be distributed to the corresponding target processing unit through the target hardware queue.

[0038] In this way, an operation flow can be extended to multiple hardware queues. Furthermore, at the hardware architecture level, it is set that any two processing units in the same processing unit cluster are of different types (for example, there is only one processing unit of each type in any processing unit cluster). Each hardware queue is responsible for the operation commands of one processing unit in a processing unit cluster. This makes the operation commands on a single hardware queue naturally serial, which is beneficial for the parallel processing of operation commands on different hardware queues, thereby improving the parallelism and processing efficiency of the processor's internal execution.

[0039] In step S12, the N operation commands included in the operation flow are distributed to multiple hardware queues. In step S13, at least one operation command can be selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue.

[0040] Within each hardware queue, operation commands are distributed sequentially, ensuring that the commands in each queue are executed serially. For example, after distributing an operation command, a hardware queue will wait for that command to complete before distributing the next operation command.

[0041] In step S13, at least one operation command is selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue. In step S14, each processing unit can execute the received at least one operation command in response to the received operation command. For example, the computation unit can execute the computation operation command in response to the received computation operation command to obtain the computation result; the tensor unit can execute the tensor operation command in response to the received tensor operation command to obtain the tensor operation result; and the direct memory access unit can execute the direct memory access operation command (e.g., for copying data from one address space to another) in response to the received direct memory access operation command to obtain the access operation result.

[0042] In embodiments of this application, the processor may include multiple hardware queues, each corresponding to a different processing unit within a cluster of processing units. Leveraging this hardware property of the processor, the operation commands included in the acquired operation stream can be distributed to their respective hardware queues, and the operation commands in each hardware queue can be distributed sequentially, ensuring that the operation commands in each hardware queue are distributed to their corresponding processing units, enabling the respective processing units to execute the received operation commands. Thus, based on the processor's hardware properties, multiple operation commands in the operation stream can be distributed to multiple hardware queues. Multiple operation commands in a single hardware queue can be processed serially, while multiple operation commands in multiple hardware queues that are independent can be processed in parallel. This achieves serial and / or parallel processing of multiple operation commands in the operation stream, thereby ensuring that each operation command in the operation stream is executed efficiently and correctly on the processing units, improving processor efficiency.

[0043] The hardware queue scheduling method of this application embodiment will be described by way of example below.

[0044] Figure 2 This diagram illustrates an application of a hardware queue scheduling method according to an embodiment of this application. Figure 2 As shown, in step S11, the operation flow to be processed generated by the software driver is obtained. In step S12, each operation command included in the operation flow can be distributed to the corresponding hardware queue (e.g., hardware queue 0 to hardware queue n).

[0045] In one possible implementation, each operation command has command information. Step S12 may include: distributing at least one operation command included in the operation flow to at least one hardware queue among a plurality of hardware queues, based on the command information of the operation command.

[0046] The command information includes cluster information and type information. The cluster information is used to indicate the cluster of processing units that process the operation command, and the type information is used to indicate the type of processing unit that processes the operation command.

[0047] Optionally, for a target operation command in the operation flow, the target processing unit cluster and target processing unit for executing the target operation command can be determined based on the cluster information and type information of the target operation command, and the target operation command can be distributed to the target hardware queue corresponding to the target processing unit cluster and the target processing unit, so that the target operation command can be distributed to the target processing unit in the target processing unit cluster through the target hardware queue.

[0048] Since each hardware queue of the processor can correspond to a different processing unit in a processing unit cluster, for any operation command included in the operation flow, the cluster information in the command information of the operation command determines which processing unit cluster the operation command should be distributed to, and the type information in the command information of the operation command determines which type of processing unit the operation command should be distributed to, thus determining which hardware queue the operation command should be distributed to.

[0049] Therefore, based on the command information of the operation commands, the hardware queue corresponding to each operation command in the operation flow can be determined, and each operation command in the operation flow can be distributed to its corresponding hardware queue. After the operation command enters the hardware queue, it can wait to be distributed in order (e.g., the order in which the operation commands are generated by the software driver).

[0050] In this way, when the processor receives dozens (or more) operation commands, it can distribute these commands to multiple hardware queues based on the operation flow. Each hardware queue will contain a number of operation commands, which will then be distributed to the corresponding processing units. This allows operation commands from different types of processing units (such as the aforementioned computation units, tensor units, and direct memory access units) to be distinguished on the hardware queues.

[0051] For example, such as Figure 2 As shown, hardware queue 0 can correspond to the computing unit in processing unit cluster 0, and hardware queue 1 can correspond to the tensor unit in processing unit cluster 0.

[0052] If the command information of a certain operation command in the operation flow indicates that the processing unit cluster used to process the operation command is processing unit cluster 0, and the type of the processing unit used to process the operation command is computing unit, the operation command can be distributed to hardware queue 0.

[0053] If the command information of a certain operation command in the operation flow indicates that the processing unit cluster used to process the operation command is processing unit cluster 0, and the type of the processing unit used to process the operation command is tensor unit, then the operation command can be distributed to hardware queue 1.

[0054] In this system, hardware queue 0 is responsible for processing the operation commands of the computing units in unit cluster 0. Within unit cluster 0, there is only one processing unit of type computing unit. Hardware queue 0 waits until the operation command sent to the computing unit in unit cluster 0 has been executed before sending the next operation command to that computing unit. Having a hardware queue handle the commands of a specific type of processing unit within a unit cluster ensures that the operation commands on a single hardware queue are naturally serialized, which is beneficial for parallel processing of operation commands from different hardware queues.

[0055] Because from a hardware design perspective, each processing unit cluster contains only one processing unit of each type, such as Figure 2 As shown, for processing unit cluster 0, there is one computing unit and one tensor unit. The hardware queue 0 that distributes operation commands to the computing unit of processing unit cluster 0 will not send operation commands to the computing units of other processing unit clusters (e.g., processing unit cluster 1). Similarly, the hardware queue 1 that distributes operation commands to the tensor unit of processing unit cluster 0 will not send operation commands to the tensor unit of other processing unit clusters (e.g., processing unit cluster 1).

[0056] In this way, based on the command information of the operation command, each operation command in the operation flow is distributed to the corresponding hardware queue, which is conducive to realizing the parallelism of operation commands on different hardware queues and improving the parallelism and processing efficiency of the processor.

[0057] like Figure 2 As shown, in step S12, at least one operation command included in the operation flow is distributed to multiple hardware queues (e.g., hardware queue 0 to hardware queue n). In step S13, at least one operation command can be selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue. For example, hardware queue 0 can sequentially distribute its stored operation commands to the computing units of processing unit cluster 0, and hardware queue 1 can sequentially distribute its stored operation commands to the tensor units of processing unit cluster 0. In step S14, the processing unit can execute the received operation command, which may include various read and write operations on global memory.

[0058] In step S14, after the processing unit finishes executing the current operation command sent by the hardware queue, step S13 can also be triggered. The hardware queue can select the next operation command to distribute to the processing unit. The embodiments of this application do not restrict the order of steps S13 and S14.

[0059] In the above process, it is known that the operation commands in the operation flow can be arranged serially according to the order in which the operation commands are generated by the software driver (i.e., conforming to the original command order in the code programming). If an operation flow is mapped to a hardware queue, sending operation commands to a hardware queue does not require concern about whether there are dependencies between the operation commands (for example, the execution of one operation command depends on the execution result of another operation command). This is because the operation commands in the same hardware queue are executed serially. Even if there are dependencies between the operation commands in the same hardware queue, the dependent operation command will be prioritized and executed sequentially according to the order in which the operation commands are arranged in the hardware queue.

[0060] However, having one hardware queue for each operation flow results in low parallelism in the hardware queue scheduling method, impacting processor efficiency. In the embodiments of this application, one operation flow can be expanded to correspond to multiple hardware queues, allowing for scheduling and management of these queues to improve processor parallelism and efficiency. In this case, the dependencies between operation commands within the operation flow need to be considered. If these dependencies are ignored and all operation commands are executed in parallel, incorrect execution results may result from the execution order of the operation commands. For example, if operation command 1 depends on the execution result of operation command 2, and operation command 1 and operation command 2 are executed synchronously (or operation command 1 is executed before operation command 2), the execution result of operation command 1 will obviously be inaccurate.

[0061] Therefore, in order to improve processing accuracy, the embodiments of this application perform dependency identification processing on the operation commands in the operation flow before distributing each operation command in the operation flow to different hardware queues, thereby obtaining the dependency relationship between the operation commands in the operation flow; based on the dependency relationship between the operation commands in the operation flow, at least one operation command is selected from the operation flow and distributed to the corresponding hardware queue.

[0062] The dependencies can be determined or set during program coding; for example, the execution of a certain operation command depends on the execution result of a previous operation command. If dependencies exist between operation commands in the operation flow, a waiting mechanism can be established based on these dependencies. According to this mechanism, at least one operation command can be selected from the operation flow and distributed to its corresponding hardware queue, ensuring that the dependent operation command is executed first. If no dependencies exist between operation commands in the operation flow, a waiting mechanism can be omitted, and at least one operation command can be directly selected from the operation flow and distributed to its corresponding hardware queue without further concern for the execution order of the operation commands.

[0063] For example, suppose there are operation command 1 and operation command 2 in the operation flow. Operation command 1 is used to perform convolution operation of the first network layer in a multi-layer convolutional neural network, which convolves the data to be processed with the convolution kernel of the first network layer. Operation command 2 is used to perform convolution operation of the second network layer in a multi-layer convolutional neural network, which convolves the result of the execution of operation command 1 with the convolution kernel of the second network layer. In this case, by performing dependency identification processing on operation command 1 and operation command 2 in the operation flow, it can be identified that there is a dependency relationship between operation command 1 and operation command 2, that is, operation command 2 depends on operation command 1.

[0064] For example, suppose there are operation command 1 and operation command 2 in the operation flow. Operation command 1 is used to perform filtering processing on image A to be processed, and operation command 2 is used to perform segmentation processing on image B to be processed. Image A and image B are unrelated. In this case, by performing dependency identification processing on operation command 1 and operation command 2 in the operation flow, it can be identified that there is no dependency relationship between operation command 1 and operation command 2.

[0065] Given that most operation commands utilize hardware resources (such as memory), the dependencies between operation commands can be more accurately identified by tracing and analyzing these hardware resources. Specifically, a memory block corresponds to a physical address, and operation commands can access different memory blocks by accessing different physical addresses.

[0066] In one possible implementation, the identification is performed according to the order of the operation commands in the operation flow. If it is identified that the first operation command and the second operation command in the operation flow need to access the same hardware resource, and either the first operation command or the second operation command needs to perform a write operation on the same hardware resource, then it is determined that the first operation command depends on the second operation command. Herein, the first operation command is the current operation command in the operation flow that is to be allocated to the hardware queue, and the second operation command is the command in the operation flow that is arranged before the first operation command.

[0067] If the first operation command and the second operation command are commands that need to be processed by the same processing unit, they will be assigned to the same hardware queue in sequence for processing. If the first operation command and the second operation command are commands that need to be processed by different processing units, that is, if the first operation command needs to be assigned to a different hardware queue than the second operation command, then a waiting mechanism needs to be established for the first operation command that depends on the second operation command.

[0068] For example, if two operation commands use the same resource data stored in the same hardware resources, the other operation command may only become effective after one operation command has been completed. Therefore, resource analysis can be performed on the operation commands waiting to be allocated to each hardware queue in the operation flow to identify the dependencies between the operation commands in the operation flow. This will help to establish waiting relationships based on the dependencies between the operation commands, so that each operation command can be executed in the correct timing.

[0069] Assuming that, according to the order of operation commands in the operation flow, the second operation command to be assigned to a certain hardware queue A is processed before the first operation command to be assigned to another hardware queue B.

[0070] If the second operation command performs a write operation on a target hardware resource, and the first operation command performs a read operation on that target hardware resource, and the hardware resources read and written by the first and second operation commands share similarities, then a dependency relationship exists between the first and second operation commands; that is, the first operation command depends on the second operation command. When subsequent operation commands are executed, they must wait for the second operation command to complete its write operation on the hardware resource before the first operation command can perform its read operation.

[0071] If the second operation command is a read operation on the hardware resource, and the first operation command is a write operation on the hardware resource, and the hardware resource read or written by both operations is the same, then a dependency relationship exists between the two operations; that is, the first operation command depends on the second operation command. When subsequent operation commands are executed, they can wait for the second operation command to complete its read operation on the hardware resource before the first operation command performs its write operation.

[0072] If both the first and second operation commands perform write operations on the same hardware resource, it can be identified that there is a dependency relationship between the first and second operation commands; that is, the first operation command depends on the second operation command. When subsequent operation commands are executed, they can wait for the second operation command to complete its write operation on the hardware resource before the first operation command can perform its write operation.

[0073] If both the first and second operation commands perform read operations on the same hardware resource, since both commands are read operations and do not modify the corresponding storage content of the hardware resource, they can be considered to have no dependency relationship. Therefore, the execution order of these two operation commands is not required when subsequent operation commands are executed.

[0074] Optionally, in the above process, considering that the operation commands in the same hardware queue are executed serially, even if there are dependencies between the operation commands in the hardware queue, the dependent operation commands will be sorted first and executed sequentially according to their order in the hardware queue. Therefore, to improve processing efficiency, for the operation commands in the operation flow that need to be assigned to the same hardware queue, the analysis of the dependencies between the operation commands that need to be assigned to the same hardware queue can be omitted or ignored.

[0075] It should be understood that in practical applications, an operation command may require a lot of hardware resources. For example, an operation command may use a dozen resources to access multiple addresses. Therefore, an operation command may depend on one or more operation commands. This application does not limit the number of hardware resources used by an operation command or the number of operation commands that each operation command may depend on.

[0076] The above implementation method can perform hardware resource analysis on each operation command in the operation flow that is to be allocated to the hardware queue, analyze which hardware resources each operation command will use, and the read and write relationship between the operation command and each hardware resource, which is conducive to more accurately identifying the dependency relationship between each operation command in the operation flow.

[0077] Once the dependencies between operation commands in the operation flow are identified, at least one operation command can be selected from the operation flow and distributed to the corresponding hardware queue based on the dependencies.

[0078] In one possible implementation, in response to determining that the first operation command depends on the second operation command, and determining that the first operation command and the second operation command are commands that need to be processed by different processing units, a waiting command corresponding to the first operation command is generated, the waiting command being used to ensure that the first operation command is executed only after the second operation command has been completed; the waiting command is inserted before the first operation command in the operation flow; the waiting command and the first operation command are distributed as a whole command to the hardware queue corresponding to the first operation command.

[0079] For example, if there are no dependencies between the operation commands in the operation flow, when distributing each operation command to its corresponding hardware queue, the hardware queues can distribute the operation commands serially and / or in parallel. In this case, no incorrect execution results will occur due to the execution order of the operation commands. Specifically, to improve processor efficiency, the hardware queues can distribute the operation commands in parallel.

[0080] For example, in the operation flow, if there is no dependency between the two operation commands, sending them to their respective hardware queues will not affect the execution results of the memcpy and launchkernel commands. This applies whether hardware queue 0 sends memcpy to its corresponding processing unit first, and then hardware queue 1 sends launchkernel to its corresponding processing unit; or hardware queue 1 sends launchkernel to its corresponding processing unit first, and then hardware queue 0 sends memcpy to its corresponding processing unit; or hardware queue 0 and hardware queue 1 send memcpy and launchkernel to their respective processing units simultaneously.

[0081] Alternatively, if there are dependencies between operation commands in the operation flow, and these operation commands require processing by the same processing unit, these operations will be distributed to the same hardware queue (i.e., the hardware queue corresponding to the same processing unit). Considering that operation commands within the same hardware queue are executed serially, even if there are dependencies between operation commands in that hardware queue, the dependent operation commands will be prioritized and executed sequentially according to their order of arrangement in the hardware queue. In this case, no incorrect execution results will occur due to the execution order of the operation commands.

[0082] For example, if `l aunchkerne l` (the kernel execution command) in the operation flow is to be assigned to hardware queue 1, and `memcpy` (the memory copy command) is to be assigned to the same hardware queue 1 but is prioritized earlier, then `memcpy` will be assigned to hardware queue 1 first, followed by `l aunchkerne l`, ensuring that `memcpy` is prioritized over `l aunchkerne l` in hardware queue 1. This way, hardware queue 1 can send `memcpy` to its corresponding processing unit first, so that `l aunchkerne l` is executed after `memcpy`, without affecting the execution results of both commands.

[0083] Conversely, if there are dependencies between the operation commands in the operation flow, and these operation commands require processing by different processing units, the dependent operation commands in the operation flow will be distributed to different hardware queues. In this case, if the execution order of the operation commands is not considered during execution, incorrect execution results are highly likely. Therefore, in this situation, during the distribution of operation commands in the operation flow to different hardware queues, a hardware-level operation command waiting mechanism can be established based on the dependencies between the operation commands in the operation flow. In this way, although the operation commands are distributed to different hardware queues, due to the established waiting mechanism, the operation commands will be executed in the correct execution order (e.g., dependent operation commands will be executed first), thus obtaining the correct execution results.

[0084] For example, if launchkerne l (the kernel execution command) to be allocated to hardware queue 1 in the operation flow depends on memcpy (the memory copy command) to be allocated to hardware queue 0, and if hardware queue 1 sends it to its corresponding processing unit first, so that launchkerne l is executed before memcpy, then the execution result of launchkerne l will obviously be incorrect.

[0085] Therefore, upon recognizing that launchkerne l to be allocated to hardware queue 1 depends on memcpy to be allocated to hardware queue 0, a wait command can be generated for launchkerne l to be allocated to hardware queue 1. This wait command ensures that the execution of launchkerne l waits for memcpy to complete. This wait command can be inserted into the operation flow before launchkerne l to be allocated to hardware queue 1, and launchkerne l and the wait command can be distributed to hardware queue 1 as a single command. In this case, before distributing launchkerne l to the corresponding processing unit, hardware queue 1 can first check whether memcpy has completed execution using the wait command. If memcpy has not yet completed, hardware queue 1 can wait for memcpy to finish before distributing launchkerne l to the corresponding processing unit.

[0086] In this way, although each operation command is placed on a different hardware queue and distributed separately, the waiting relationship is established so that they can be executed serially according to the correct execution sequence, reducing the probability that two operation commands located on different hardware queues may be executed in parallel when there is a dependency relationship.

[0087] In this way, when there are dependencies between operation commands that need to be processed by different processing units in the operation flow, a waiting mechanism between operation commands can be established based on the dependencies between operation commands in the operation flow. This helps to ensure that each operation command is executed efficiently and correctly in the processor, thereby improving the processor's execution efficiency and accuracy.

[0088] In one possible implementation, in order to more efficiently and accurately identify the dependencies between operation commands in the operation flow, a dynamic dependency table can be constructed for the operation commands in the operation flow. The dynamic dependency table is used to reflect the address read and write relationships of each operation command to various hardware resources in the processor. Based on the dynamic dependency table, the dependencies between each operation command in the operation flow are determined.

[0089] For example, Table 1 shows a dynamic dependency table constructed based on operation commands to be assigned to different hardware queues in the operation flow.

[0090] Table 1 Dynamic Dependency Relationship Table

[0091]

[0092] In Table 1, hardware resources 1 through 6 can have different physical addresses. Different hardware resources can be accessed through different physical addresses. For example, in Table 1, hardware resource 1 can be accessed through physical address 1, hardware resource 2 can be accessed through physical address 2, and so on, hardware resource 6 can be accessed through physical address 6.

[0093] The dynamic dependency table may include at least one of the following: operation command number, command information, number of hardware resources corresponding to the operation command, address of each hardware resource, and read / write relationship between the operation command and each hardware resource. This application does not limit the specific content and form of the dynamic dependency table.

[0094] It is understood that Table 1 above is only an example and its form is not unique. The dynamic dependency table can be used for analysis and state updates. This application does not restrict the specific form of Table 1.

[0095] After constructing the dynamic dependency table, the dependencies between operation commands in the operation flow can be determined by querying the table. For example, Table 1 shows that operation command 2, to be assigned to hardware queue 1, depends on operation command 0, to be assigned to hardware queue 0; operation command 6, to be assigned to hardware queue 2, depends on both operation command 2 and operation command 3, to be assigned to hardware queue 0; operation command 7, to be assigned to hardware queue 0, depends on operation command 4, to be assigned to hardware queue 1; and operation command 8, to be assigned to hardware queue 1, depends on both operation command 6 and operation command 7, to be assigned to hardware queue 0.

[0096] Then, based on the dependencies determined by the dynamic dependency table, waiting relationships between operation commands can be established. For example, operation command 2 waits for operation command 1 to finish executing, operation command 6 waits for operation commands 2 and 3 to finish executing, operation command 7 waits for operation command 4 to finish executing, and operation command 8 waits for operation commands 6 and 7 to finish executing.

[0097] Based on the waiting relationship between operation commands, each operation command can be distributed from the operation flow to the corresponding hardware queue 0 to hardware queue 2.

[0098] For example, Figure 3 This diagram illustrates a hardware queue scheduling method according to an embodiment of this application, as shown below. Figure 3 As shown, based on the waiting relationships between operation commands in the operation flow, a waiting command can be generated for operation command 2 to wait for operation command 1 to complete, and this waiting command can be packaged with operation command 2 into a single command and sent to hardware queue 1. Similarly, since operation command 6 waits for operation commands 2 and 3 to complete, a waiting command can be generated for operation command 6 to wait for operation commands 2 and 3 to complete, and this waiting command can be packaged with operation command 6 into a single command and sent to hardware queue 2. Since operation command 7 waits for operation command 4 to complete, a waiting command can be generated for operation command 7 to wait for operation command 4, and this waiting command can be packaged with operation command 7 into a single command and sent to hardware queue 0. Since operation command 8 waits for operation commands 6 and 7 to complete, a waiting command can be generated for operation command 8 to wait for operation commands 6 and 7 to complete, and this waiting command can be packaged with operation command 8 into a single command and sent to hardware queue 1.

[0099] In this way, hardware queues 0-2 can receive each operation command distributed from the operation stream and process each operation command in the correct timing.

[0100] For example, hardware queue 0 and hardware queue 2 can be processed in parallel, distributing operation command 1 and operation command 5 to their respective processing units;

[0101] When the waiting command corresponding to operation command 2 in hardware queue 1 detects that operation command 1, which was distributed to the corresponding processing unit by hardware queue 0, has been executed, hardware queue 1 can distribute operation command 2. Furthermore, hardware queue 1 and hardware queue 0 can process in parallel, distributing operation command 2 and operation command 3 to their respective processing units.

[0102] Once the operation command 2 distributed from hardware queue 1 to the corresponding processing unit has been executed, the operation command 4 in hardware queue 1 can continue to be distributed to its corresponding processing unit.

[0103] When the waiting command corresponding to operation command 6 in hardware queue 2 detects that operation command 2, which was distributed from hardware queue 1 to the corresponding processing unit, has been executed and operation command 3, which was distributed from hardware queue 0 to the corresponding processing unit, has also been executed, operation command 6 in hardware queue 2 can be distributed to its corresponding processing unit.

[0104] When the waiting command corresponding to operation command 7 in hardware queue 0 detects that operation command 4, which was distributed from hardware queue 1 to the corresponding processing unit, has been executed, it can distribute operation command 7 in hardware queue 1 to its corresponding processing unit.

[0105] If the waiting command corresponding to operation command 8 in hardware queue 1 detects that operation command 7 distributed from hardware queue 0 to the corresponding processing unit has been executed, and operation command 6 distributed from hardware queue 2 to the corresponding processing unit has also been executed, then operation command 8 in hardware queue 1 can be distributed to its corresponding processing unit.

[0106] In this way, a waiting mechanism is established between operation commands based on a dynamic dependency table, and the operation commands of the operation flow are distributed to the corresponding hardware queues based on the established waiting mechanism. This helps to ensure that each operation command is executed efficiently and correctly in the processor, thereby improving the processor's execution efficiency and accuracy.

[0107] In addition to the above-described approach that focuses on operation commands, analyzing hardware resources among these commands in an operation flow to identify dependencies and accurately and efficiently distribute them to their corresponding hardware queues, embodiments of this application can also focus on hardware resources to track the execution of operation commands, further reducing the probability of scheduling errors during hardware queue scheduling.

[0108] In one possible implementation, a command number is assigned to each operation command in the operation flow; each hardware resource in the processor is encapsulated into a corresponding software resource object (or a corresponding software resource object is generated for the hardware resource), the software resource object being used to store the command number of the operation command; and the information of the hardware resource corresponding to the current first operation command to be allocated to the hardware queue is determined according to the order of the operation commands in the operation flow.

[0109] If no command number is stored in the software resource object corresponding to the hardware resource, it is determined that the first operation command does not depend on any operation command, and the command number of the first operation command is stored in the software resource object corresponding to the hardware resource.

[0110] Alternatively, if a command number is stored in the software resource object of the hardware resource, it is determined that the first operation command depends on the operation command corresponding to the command number stored in the software resource object, and the command number stored in the software resource object of the hardware resource is replaced with the command number of the first operation command.

[0111] For example, assuming that there are hardware resources H1 and hardware resources H2 in the processor (hardware resources H1 and hardware resources H2 can be memory blocks with different addresses), for each hardware resource in the processor, the software driver can encapsulate it into a corresponding software resource object, that is: encapsulate hardware resource H1 into software resource object Obj1, and hardware resource H2 into software resource object Obj2.

[0112] Each hardware resource can correspond to a different software resource object. Each software resource object can include a command number (ID) to distinguish different operation commands, such as the command number of the operation command that last accessed the hardware resource.

[0113] It should be understood that any operation command executed on hardware resources can have a unique command number, which can include numbers, letters, symbols, etc. This application does not limit the specific form of the command number.

[0114] Furthermore, software resource objects may also include other additional information, such as the address information, size, corresponding processing unit cluster, last processed by what operation command, last read / write relationship, etc. of the hardware resource (memory), and this application does not impose any restrictions on this.

[0115] According to the order of operation commands in the operation flow, for the current first operation command to be allocated to the hardware queue in the operation flow, obtain the hardware resources that the first operation command will use, such as hardware resources H1 and hardware resources H2.

[0116] If neither the software resource object Obj1 corresponding to hardware resource H1 nor the software resource object Obj2 corresponding to hardware resource H2 stores a command number, the command number of the first operation command can be stored in the software resource object Obj1 corresponding to hardware resource H1 and the software resource object Obj2 corresponding to hardware resource H2 respectively, and it can be recognized as the first operation command not depending on any operation command.

[0117] Alternatively, if the software resource object Obj1 corresponding to hardware resource H1 does not store any command number, the software resource object Obj2 corresponding to hardware resource H2 does store a command number.

[0118] Since the software resource object Obj1 corresponding to hardware resource H1 does not store any command number, the command number of the current first operation command can be stored in the software resource object Obj1 of hardware resource H1. Since the software resource object Obj2 corresponding to hardware resource H2 has a command number (for example, the command number corresponding to the previous operation command that accessed hardware resource H2), it can be identified that the first operation command depends on the operation command corresponding to the command number, and synchronously, the command number on the software resource object Obj2 corresponding to hardware resource H2 is updated to the command number of the current first operation command.

[0119] In this way, a command number of the operation command that last used the hardware resource can be saved for the hardware resource, which is conducive to tracking the hardware resource and to efficiently and accurately identifying the dependencies between operation commands.

[0120] In one possible implementation, in response to the first operation command depending on the operation command corresponding to the command number, and determining that the first operation command and the operation command corresponding to the command number are commands that need to be processed by different processing units, a waiting command corresponding to the first operation command is generated. The waiting command is used to ensure that the first operation command is executed only after the operation command corresponding to the command number has been executed. The waiting command is inserted before the first operation command in the operation flow. The waiting command and the first operation command are distributed as a whole command to the hardware queue corresponding to the first operation command.

[0121] For example, if the current first operation command accesses the software resource object Obj2 corresponding to hardware resource H2 and finds that software resource object Obj2 stores a certain command number, and the current first operation command and the operation command corresponding to the command number stored in software resource object Obj2 are commands that need to be processed by different processing units, it means that the first operation command depends on the operation command corresponding to the command number stored in software resource object Obj2, and these two operation commands correspond to different hardware queues. In this case, a waiting command can be generated for the current first operation command, and this waiting command can be inserted before the current first operation command in the operation flow. The waiting command and the first operation command are then distributed as a whole command to the hardware queue corresponding to the first operation command.

[0122] Each hardware queue receives operation commands from the operation stream and can sequentially distribute the received operation commands, so that the operation commands in each hardware queue are executed serially.

[0123] Specifically, for a first operation command to be distributed to a processing unit, if there is a corresponding waiting command for the first operation command, the first operation command can be distributed to the corresponding processing unit in response to the completion of the waiting command corresponding to the first operation command.

[0124] In this way, the first operation command can wait for the operation command that used the same hardware resources to finish, which is conducive to the efficient and correct execution of each operation command by the processing unit.

[0125] In summary, the embodiments of this application propose a scheduling method based on multiple hardware queues of processing units. The processor may include multiple hardware queues, each corresponding to a different processing unit within a cluster of processing units. Utilizing the hardware characteristics of the processor, the operation commands included in the acquired operation stream can be distributed to their respective hardware queues, and the operation commands in each hardware queue are distributed sequentially, ensuring that the operation commands in each hardware queue are distributed to their corresponding processing units, enabling the respective processing units to execute the received operation commands. Thus, based on the processor's hardware characteristics, after distributing multiple operation commands in the operation stream to multiple hardware queues, multiple operation commands in a single hardware queue can be processed serially, while multiple operation commands in multiple hardware queues that are independent can be processed in parallel.

[0126] Furthermore, by identifying the dependencies between operation commands in the operation flow, and establishing waiting relationships between operation commands when each operation command requires processing by different processing units, at least one operation command can be selected from the operation flow and distributed to the corresponding hardware queue according to the waiting relationship, thereby realizing the serial and / or parallel processing of multiple operation commands. This allows each operation command in the operation flow to be executed efficiently and correctly on the processing unit, improving the efficiency of the processor.

[0127] It is understood that the various method embodiments mentioned above in this application can be combined with each other to form combined embodiments without violating the principle and logic. Due to space limitations, this application will not elaborate further. Those skilled in the art will understand that in the above methods of specific implementation, the specific execution order of each step should be determined by its function and possible internal logic.

[0128] In addition, this application also provides a processor, an electronic device, a computer-readable storage medium, and a program. All of the aforementioned products can be used to implement any of the hardware queue scheduling methods provided in this application. The corresponding technical solutions and descriptions are described in the relevant section of the method and will not be repeated here.

[0129] Figure 4 This diagram illustrates a schematic block diagram of an architecture for a processor 40 according to an embodiment of this application, such as... Figure 4 As shown, the processor 40 includes: a plurality of hardware queues 41 and at least one processing unit cluster 42. Each processing unit cluster 42 includes at least one processing unit 43. Within the same processing unit cluster 42, any two processing units 43 are of different types. The processing unit 43 is used to process operation commands from the hardware queues 41. Each hardware queue 41 corresponds to one type of processing unit 43 in a processing unit cluster 42. The processor 40 can obtain an operation stream containing at least one operation command to be processed by executing software. Each operation command has command information reflecting the command type. Based on the command information, the processor distributes the at least one operation command included in the operation stream to at least one hardware queue 41 among the plurality of hardware queues 41. It selects at least one operation command from each hardware queue 41 and distributes it to the processing unit 43 corresponding to each hardware queue 41. The processing unit 43 executes the received at least one operation command.

[0130] In some embodiments, the processor provided in this application may have functions or include hardware modules that can be used to execute the methods described in the above method embodiments. The specific implementation can be referred to the description of the above method embodiments, and for the sake of brevity, it will not be repeated here.

[0131] The processor can be a completely new design or an improvement on an existing processor. The types of processing units or clusters of processing units in the processor architecture can be, but are not limited to: a central processing unit (CPU), a graphics processing unit (GPU), a general-purpose computing on graphics processing unit (GPGPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, as well as a microprocessor or other conventional processor.

[0132] This application also proposes a computer-readable storage medium storing computer program instructions thereon, which, when executed by a processor, implement the above-described method. The computer-readable storage medium can be volatile or non-volatile.

[0133] This application also proposes an electronic device, including a memory and a processor that executes the hardware queue scheduling method described above. The electronic device can be provided as a computer, mobile phone, server, vehicle-mounted device, or other types of device.

[0134] The electronic device includes a processor as described above, and a memory (for storing instructions executable by the processor, such as program instructions for applications, drivers, or even operating systems). The processing component is configured to execute computer-readable instructions stored in the memory to implement the methods described above.

[0135] Optionally, the electronic device may also include more components, such as power supply components, wired or wireless network interfaces, and input / output interfaces. The exemplary components of the electronic device should not be construed as limiting this application.

[0136] This application also provides a computer program product, including software functional modules for implementing the above methods. When the computer-readable program instructions corresponding to these software functional modules are run in the processor of an electronic device, the above methods are executed.

[0137] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts (implementation principles and technical effects) between the various embodiments can be referred to each other.

[0138] The various embodiments of this application have been described above. The above description is exemplary and not exhaustive, nor is it limited to the disclosed embodiments. Without departing from the scope and spirit of the described embodiments, any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be covered within the protection scope of this application.

Claims

1. A hardware queue scheduling method, characterized by, The method is applied to a processor, which includes multiple hardware queues and at least one processing unit cluster. Each processing unit cluster includes at least one processing unit, wherein any two processing units within the same processing unit cluster are of different types. The processing unit is used to process operation commands from the hardware queues, and each hardware queue corresponds to one type of processing unit in a processing unit cluster. The method includes: Obtain an operation flow to be processed, the operation flow including at least one operation command, each operation command having command information to reflect the command type; Based on the command information, at least one operation command included in the operation flow is distributed to at least one hardware queue among the plurality of hardware queues; At least one operation command is selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue. The processing unit executes at least one received operation command; Distributing at least one operation command included in the operation flow to at least one hardware queue among the plurality of hardware queues includes: The operation commands in the operation flow are subjected to dependency identification processing to obtain the dependency relationship between the operation commands in the operation flow, wherein the dependency relationship is identified based on the read and write relationship of each operation command to each hardware resource in the processor; Based on the dependencies between operation commands in the operation flow, at least one operation command is selected from the operation flow and distributed to the corresponding hardware queue; Specifically, the process of identifying dependencies between operation commands in the operation flow to obtain the dependencies between operation commands in the operation flow includes: Assign a command number to each operation command in the operation flow; Each hardware resource in the processor is encapsulated into a corresponding software resource object, and the software resource object is used to store the command number of the operation command. Based on the order of the operation commands in the operation flow, determine the hardware resources corresponding to the current first operation command to be allocated to the hardware queue; If no command number is stored in the software resource object corresponding to the hardware resource, it is determined that the first operation command does not depend on any operation command, and the command number of the first operation command is stored in the software resource object corresponding to the hardware resource. Alternatively, if a command number is stored in the software resource object of the hardware resource, it is determined that the first operation command depends on the operation command corresponding to the command number stored in the software resource object, and the command number stored in the software resource object of the hardware resource is replaced with the command number of the first operation command.

2. The method of claim 1, wherein, The process of identifying dependencies between operation commands in the operation flow to obtain the dependencies between operation commands in the operation flow includes: The operation commands in the operation flow are identified according to their order. If the first operation command and the second operation command in the operation flow need to access the same hardware resource, and either the first operation command or the second operation command needs to perform a write operation on the hardware resource, then the first operation command depends on the second operation command. Wherein, the first operation command is the current operation command in the operation flow to be allocated to the hardware queue, and the second operation command is the command in the operation flow that is arranged before the first operation command.

3. The method of claim 2, wherein, The step of selecting at least one operation command from the operation flow and distributing it to the corresponding hardware queue based on the dependencies between operation commands in the operation flow includes: In response to determining that the first operation command depends on the second operation command, and determining that the first operation command and the second operation command are commands that need to be processed by different processing units, a waiting command corresponding to the first operation command is generated, the waiting command being used to make the first operation command execute only after the second operation command has been executed; The wait command is inserted before the first operation command in the operation flow; The waiting command and the first operation command are treated as a single command and distributed to the hardware queue corresponding to the first operation command.

4. The method of claim 1, wherein, The process of identifying dependencies between operation commands in the operation flow to obtain the dependencies between operation commands in the operation flow includes: For the operation commands in the operation flow, a dynamic dependency table is constructed. The dynamic dependency table is used to reflect the address read and write relationships of each operation command to various hardware resources in the processor. Based on the dynamic dependency table, the dependencies between each operation command in the operation flow are determined.

5. The method according to claim 1, wherein selecting at least one operation command from the operation flow and distributing it to the corresponding hardware queue based on the dependencies between operation commands in the operation flow comprises: In response to the first operation command depending on the operation command corresponding to the command number, and determining that the first operation command and the operation command corresponding to the command number are commands that need to be processed by different processing units, a waiting command corresponding to the first operation command is generated. The waiting command is used to make the first operation command execute only after the operation command corresponding to the command number has been executed. The wait command is inserted before the first operation command in the operation flow; The waiting command and the first operation command are treated as a single command and distributed to the hardware queue corresponding to the first operation command.

6. The method according to claim 3 or 5, characterized in that, At least one operation command is selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue, including: In response to the completion of the waiting command corresponding to the first operation command, the first operation command is distributed to the corresponding processing unit.

7. The method according to any one of claims 1 to 5, characterized in that, The command information includes cluster information and type information. The cluster information is used to indicate the cluster of processing units that process the operation command, and the type information is used to indicate the type of processing unit that processes the operation command.

8. A processor, comprising: include: Multiple hardware queues and at least one processing unit cluster, each processing unit cluster including at least one processing unit, wherein any two processing units within the same processing unit cluster are of different types, the processing unit is used to process operation commands from the hardware queues, and each hardware queue corresponds to one type of processing unit in a processing unit cluster; The processor obtains an operation stream to be processed, including at least one operation command, by executing software drive, and each operation command has command information to reflect the command type; Based on the command information, at least one operation command included in the operation flow is distributed to at least one hardware queue among the plurality of hardware queues; At least one operation command is selected from each hardware queue and distributed to the processing unit corresponding to each hardware queue. The processing unit executes at least one received operation command; Distributing at least one operation command included in the operation flow to at least one hardware queue among the plurality of hardware queues includes: The operation commands in the operation flow are subjected to dependency identification processing to obtain the dependency relationship between the operation commands in the operation flow, wherein the dependency relationship is identified based on the read and write relationship of each operation command to each hardware resource in the processor; Based on the dependencies between operation commands in the operation flow, at least one operation command is selected from the operation flow and distributed to the corresponding hardware queue; Specifically, the process of identifying dependencies between operation commands in the operation flow to obtain the dependencies between operation commands in the operation flow includes: Assign a command number to each operation command in the operation flow; Each hardware resource in the processor is encapsulated into a corresponding software resource object, and the software resource object is used to store the command number of the operation command. Based on the order of the operation commands in the operation flow, determine the hardware resources corresponding to the current first operation command to be allocated to the hardware queue; If no command number is stored in the software resource object corresponding to the hardware resource, it is determined that the first operation command does not depend on any operation command, and the command number of the first operation command is stored in the software resource object corresponding to the hardware resource. Alternatively, if a command number is stored in the software resource object of the hardware resource, it is determined that the first operation command depends on the operation command corresponding to the command number stored in the software resource object, and the command number stored in the software resource object of the hardware resource is replaced with the command number of the first operation command.

9. An electronic device, comprising: include: Memory and processor; The memory stores computer-readable instructions, which, when executed by the processor, perform the method of any one of claims 1 to 7.

10. A computer-readable storage medium having stored thereon computer program instructions, wherein, When the computer program instructions are executed by the processor, they implement the method of any one of claims 1 to 7.

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