Control method and system of railway traction network and railway power supply and distribution network interconnection converter

Abstract

This invention discloses a control method and system for an interconnection converter between a railway traction network and a railway power supply and distribution network. By coordinating the phase-locked loop control and current control of a second-order LADRC, it achieves closed-loop anti-interference and low steady-state error control effects. It enables the converter to start from an extreme zero state at the moment of grid connection, effectively suppressing transient inrush current. Even if there are disturbances in the grid connection system, this invention can still stably lock the phase of the power supply and distribution network, effectively improving the dynamic and fast tracking performance and steady-state tracking accuracy of the voltage phase, reducing the impact of current inrush at the moment of grid connection of the interconnection converter, and enhancing the flexible grid connection capability of the interconnection converter.

Description

Technical Field

[0001] This invention relates to the field of energy interconnection between railway traction power grid and power supply and distribution network, and in particular to a control method and system for an interconnection converter between railway traction power grid and railway power supply and distribution network. Background Technology

[0002] The efficient interconnection system between the railway traction network and the railway power supply and distribution network mainly involves the railway traction network, the railway power supply and distribution network, and the interconnection converter connecting the two power supply networks. It can be viewed as a power electronic device that inputs high-voltage single-phase AC and outputs high-voltage three-phase AC, converting 27.5kV single-phase power into 10kV three-phase power to supply the load. The high-voltage, high-power interconnection converter, as the core power conversion device in the system, often adopts a multi-level power conversion topology of cascaded H-bridge (CHB) converters. In terms of control, in grid-connected equipment based on CHB, the AC output port is connected to the grid, and the output AC current can be autonomously controlled by the CHB, making the AC side of the CHB a current source.

[0003] When interconnected converter equipment is connected to a three-phase power distribution network, the high operating voltage of the entire system means that traditional control methods will generate significant transient inrush currents, which may have a substantial impact on the system's operation. Therefore, researching transient current suppression during the transient connection of interconnected converter equipment is crucial for the safe operation of railways. Based on hardware topology optimization of the interconnected converter equipment, it is necessary to propose an effective control method to suppress transient currents during grid connection. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a control method and approach for an interconnection converter between a railway traction network and a railway power supply and distribution network, which effectively suppresses the transient current when the interconnection converter is connected to the grid, in order to address the shortcomings of the existing technology.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is: a control method for a railway traction network and railway power supply and distribution network interconnection converter, wherein the railway traction network and railway power supply and distribution network interconnection converter includes a multi-winding transformer whose primary side is connected to a single-phase railway traction power grid; the secondary side of the multi-winding transformer is connected to a three-phase link, the three-phase link is star-connected, and each phase link includes multiple cascaded power sub-units; each of the three-phase link is connected to the primary side of an isolation transformer through an output filter; the secondary side of the isolation transformer is connected to a three-phase power supply and distribution network; the method includes the following steps:

[0006] S1. Collect the three-phase voltage u of the three-phase power supply and distribution network. Ca u Cb u Cc and output filter inductor current iLa i Lb i Lc ;u Ca u Cb u Cc The grid voltage u is obtained after Park transformation. Cd u Cq The voltage reference value u Cqref =0 and u Cq The difference is calculated to obtain the error signal Δu. Cq ;

[0007] S2, the error signal Δu Cq As input to the second-order linear active disturbance rejection method, the output adjustment deviation signal ω is obtained. The output adjustment deviation signal ω is then compared with the theoretical angular frequency ω. s Adding them together yields the first derivative of the phase-locked loop's angular frequency reference value. right Integrating, the phase reference value θ of the railway traction network and railway power supply and distribution network interconnection converter is obtained; using the phase reference value θ as the phase-locked angle, the three-phase current i is... La i Lb i Lc Perform the Park transformation to obtain the grid-connected current i Ld i Lq , change i Ld i Lq Corresponding to the current reference value i Ldref i Lqref By subtracting, we get Δi Ld , Δi Lq ; will Δi Ld , Δi Lq As input to the second-order linear active disturbance rejection method, the modulation signals m on the d and q axes are obtained. d m q The modulation signal m of the d and q axes d m q After inverse Park transform, the signal m of the SPWM modulated wave in the stationary coordinate system is obtained. a m b m c Carrier phase shift control is performed on the SPWM modulated wave signal to obtain the duty cycle signal of each power sub-unit switch, and the switching on and off of the switch is controlled.

[0008] This invention requires only three-phase voltage and three-phase current to achieve grid-connected control, simplifying the calculation process and control process. By effectively coordinating the phase-locked loop control of second-order LADRC (line active disturbance rejection control) and the current control of second-order LADRC, this invention achieves closed-loop anti-interference and low steady-state error control effects, enabling the grid connection to start from an extreme zero state, effectively suppressing transient inrush currents. Even if there are disturbances in the grid-connected system, this invention can still stably lock the grid phase.

[0009] In this invention, each phase link includes three cascaded power sub-units.

[0010] In step S2 above, the specific process of obtaining the output adjustment deviation signal ω includes: converting Δu Cq The difference between z1 and z2 is proportional to the coefficient K. p After magnification, the observed value z2 and K d The difference is calculated and divided by b0 to obtain the output adjustment deviation signal ω; where b0 is the compensation factor of the second-order linear active disturbance rejection control element, and z1 and z2 are the first and second observations of the linear extended state observer, respectively.

[0011] In step S2, the modulation signals m of the d and q axes d m q The specific process of obtaining Δi includes: Ld The difference between this value and the first observed value z1 is used to obtain the first difference value. This first difference value is then passed through a scaling factor K. p Magnification, comparing the magnified first difference with the second observation z2 and the differential coefficient K d The difference between the products is taken to obtain the second difference value u0. The second difference value u0 is divided by b0 to obtain the modulation signal m on the d-axis. d ;

[0012] Δi Lq The third difference is obtained by subtracting the first observed value z1 from the first observed value z1. This third difference is then processed by a scaling factor K. p Magnify, then compare the magnified third difference with the observed value z2 and the differential coefficient K. d The product of the products is subtracted to obtain the fourth difference value. This fourth difference value is then divided by b0 to obtain the modulation signal m on the q-axis. q .

[0013] Furthermore, the formulas for calculating the first observation z1 and the second observation z2 are as follows:

[0014]

[0015] Among them, y dqThis represents the Laplace transform of the d-axis and q-axis output currents of the output filter inductor of the interconnect converter. For the first differential of z1, z2 is the first derivative of z2, and z3 is the observed value of the total external disturbance. For the first differential of z3, u dq β1, β2, and β3 are the dq-axis output signals of the current controller and the parameters of the linear expansion state observer.

[0016] For variables with subscripts d and q in the above formula, the rule for calculation is to use either the first subscript or the second subscript simultaneously. For example, when performing calculations on the d-axis, the formula uses y... d and u Ld Similarly, in this invention, when there are multiple different letters in a similar subscript, the operation rules all refer to the above standard.

[0017] In this invention, the formula for calculating u0 is: u o =K p (R-z1)-K d z2; where R is the control signal, i.e., R takes the value Δi. Ld or Δi Lq or Δu Cq .

[0018] As an inventive concept, the present invention also provides a control system for a railway traction network and railway power supply and distribution network interconnection converter, including a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the control method described above.

[0019] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention addresses the problem of large inrush current during grid connection in traditional interconnect converters by proposing an interconnect converter control method, which effectively improves the dynamic fast tracking performance and steady-state tracking accuracy of voltage phase, reduces the impact of current inrush during grid connection of the interconnect converter, and enhances the flexible grid connection capability of the interconnect converter. Attached Figure Description

[0020] Figure 1 This is a block diagram of the interconnect converter structure according to an embodiment of the present invention;

[0021] Figure 2 This is a Park coordinate transformation of three-phase voltage and three-phase current in an embodiment of the present invention;

[0022] Figure 3 This is a schematic diagram of a second-order LADRC structure according to an embodiment of the present invention;

[0023] Figure 4 This is a block diagram of a control system applying second-order LADRC in an embodiment of the present invention;

[0024] Figure 5 This is a control block diagram of a phase-locked loop using a second-order LADRC in an embodiment of the present invention;

[0025] Figure 6 This is a control block diagram of a cascaded H-type multilevel grid-connected equipment current controller using a second-order LADRC in an embodiment of the present invention.

[0026] Figures 7(a) and 7(b) show the transient current and steady-state error waveforms of the three-phase grid-connected circuit under the traditional control method and the embodiment of the present invention, respectively. Figure 7(a) shows the three-phase grid-connected current i under the current loop PI decoupling control and phase-locked loop PI controller control method of the interconnected converter in the embodiment of the present invention. abc andi d Figure 7(b) shows the transient and steady-state error waveforms of the PLL in an embodiment of the present invention, where the interconnected converter uses a second-order LADRC current loop control and the phase-locked loop uses a second-order LADRC controller to control the three-phase grid-connected current i. abc andi d PLL transient and steady-state error waveforms;

[0027] Figures 8(a) to 8(c) The diagram shows the frequency locking of the phase-locked loop after adding voltage disturbance to the traditional control method and the embodiment of the present invention. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] In this document, the terms "first," "second," and other similar words are not intended to imply any order, quantity, or importance, but are merely used to distinguish different elements. The terms "one," "a," and other similar words are not intended to indicate the existence of only one of the stated things, but rather that the description refers only to one of the stated things, which may have one or more. The terms "comprising," "including," and other similar words are intended to indicate a logical relationship, not a spatial relationship. For example, "A includes B" means that logically B belongs to A, not that spatially B is located inside A. Furthermore, the meanings of the terms "comprising," "including," and other similar words should be considered open-ended, not closed. For example, "A includes B" means that B belongs to A, but B does not necessarily constitute all of A; A may also include other elements such as C, D, and E.

[0030] Example 1

[0031] Figure 1 This is a structural block diagram of the high-voltage chain multilevel equipment system for energy interconnection between railway traction power grid and power supply and distribution power grid (i.e., railway traction network and railway power supply and distribution power grid interconnection converter, hereinafter referred to as interconnection converter) according to an embodiment of the present invention. Figure 1 In this system, the railway traction single-phase power grid (27.5KV) outputs nine voltage signals through a multi-winding transformer, which are connected to nine power modules (power sub-units). The secondary side of the multi-winding transformer is connected to three links (three-phase links), which are star-connected. Each phase includes three cascaded power modules. The power modules include H-bridge power devices and their drive circuits and bus capacitors. The three-phase links are connected to the three-phase 10KV power distribution network through an LC output filter, a switching switch, and an isolation transformer.

[0032] based on Figure 1 In this embodiment, the three-phase voltage u of the power supply and distribution network is first described. Ca u Cb u Cc and output filter inductor current i La i Lb i Lc A / D analog-to-digital sampling is performed separately, and then... Figure 2 and Figure 5 The phase reference value θ obtained from the phase-locked loop control is used to transform the three-phase output current Park coordinates to obtain the d-axis and q-axis grid-connected current i. Ld i Lq And then through Figure 6The current control loop shown obtains the duty cycle signals of the switching transistors in the nine power modules, controlling the on / off state of the power module switching transistors. Thus, through the second-order LADRC phase-locked loop, a stable and interference-resistant output grid voltage phase reference value θ is obtained. This θ is then used for the three-phase voltage Park conversion to obtain the stable and interference-resistant dq-axis current i of the interconnect converter's three-phase output current. Ld i Lq Finally, through the current control of the second-order LADRC, an effective and high-performance switching control signal is output.

[0033] In this embodiment, the phase-locked loop of second-order LADRC (line active disturbance rejection control) and the current control of second-order LADRC are effectively coordinated to achieve complementary closed-loop anti-interference and low steady-state error control effects, thereby minimizing the impact of current surges during grid connection of the interconnect converter and the error in steady-state operation.

[0034] At the beginning of each sampling period, the A / D sampling conditioning circuit adjusts the three-phase grid voltage u. Cabc (i.e., three-phase voltage u) Ca u Cb u Cc Three-phase grid-connected current i Labc (i.e. i La i Lb i Lc Each sample is taken separately, and the sampled data is sent to the control module for processing.

[0035] A phase-locked loop based on a second-order LADRC synchronous rotating coordinate system is used to lock the grid-connected voltage, and the phase-locked angle θ is set. PLL (i.e., the phase reference value θ) is applied to the current sampling value i Labc Park transform and modulation signal u Ld u Lq The inverse Park transform.

[0036] When the power is given as 270kW, the d-axis current loop reference value i of the interconnect converter will be... Ldref Set it to 96A.

[0037] By setting the q-axis current reference value to 0, unity power factor output of the interconnected converter in grid connection is achieved, and the current sampling value i is... Labc i obtained after Park transformation Ld i Lq With the corresponding given signal reference value i Ldref i Lqref By subtracting the values, we can obtain Δi. Ld , Δi Lq and ΔiLd , Δi Lq As input to the second-order active disturbance rejection controller, the controller ultimately obtains the modulated wave signal m along the d and q axes. d m q The modulated wave signal m in the d and q coordinate system d m q The modulation signal m in the stationary coordinate system is obtained by inverse Park transform. a m b m c The duty cycle signal of 9 switching transistors is generated by carrier phase shift control to control the switching transistors of the power module to turn on and off.

[0038] The control method in this embodiment includes the following steps:

[0039] S1. Collect the three-phase voltage u of the three-phase power supply and distribution network. Ca u Cb u Cc and output filter inductor current i La i Lb i Lc ;u Ca u Cb u Cc The grid voltage u is obtained after Park transformation. Cd u Cq The voltage reference value u Cqref =0 and u Cq The difference is calculated to obtain the error signal Δu. Cq ;

[0040] S2, the error signal Δu Cq As input to the second-order linear active disturbance rejection method, the output adjustment deviation signal ω is obtained. The output adjustment deviation signal ω is then compared with the theoretical angular frequency ω. s Adding them together yields the first derivative of the phase-locked loop's angular frequency reference value. right Integrating, we obtain the phase reference value θ of the interconnection converter between the railway traction network and the railway power supply and distribution network; using the phase reference value θ as the phase-locked angle, we then perform the phase-locking operation on the three-phase current i. La i Lb i Lc Perform the Park transformation to obtain the grid-connected current i Ld i Lq , change i Ld i Lq Corresponding to the current reference value i Ldref i Lqref By subtracting, we get Δi Ld , Δi Lq ; will Δi Ld , Δi LqAs input to the second-order linear active disturbance rejection method, the modulation signals m on the d and q axes are obtained. d m q The modulation signal m of the d and q axes d m q After inverse Park transform, the signal m of the SPWM modulated wave in the stationary coordinate system is obtained. a m b m c Carrier phase shift control is performed on the SPWM modulated wave signal to obtain the duty cycle signal of each power sub-unit switch, and the switching on and off of the switch is controlled.

[0041] w s =2πf ref , where f ref It is 50Hz.

[0042] Since θ is a value that increases continuously with time, it is not conducive to observation. Subsequent observations of θ are equivalent to observations of f. That is, in this embodiment, the observed value of f should approach 50Hz, which is equivalent to θ maintaining phase with the grid voltage, thus ensuring u d Amplitude is constant, u q The amplitude is zero. The process of obtaining f is as follows: Multiply The frequency reference value f of the grid voltage is obtained.

[0043] Combination Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 and Figure 6 The design process of the controller is described in detail below.

[0044] Depend on Figure 3 As can be seen, the second-order LADRC mainly consists of three parts: the controlled object, the linear extended state observer (LESO), and the linear state error feedback control law (LSEF).

[0045] Active disturbance rejection control is based on a synchronously rotating dq coordinate system to achieve control. The control process can be roughly described as follows: First, the three-phase current i is sampled and obtained. La i Lb i Lc After coordinate rotation, the actual values ​​of the active and reactive components of the current are obtained; the given values ​​and actual values ​​of the active and reactive currents are sent to the active disturbance rejection controller to obtain the modulation signal of the dq axis, and then the PWM modulation signal of the three phases abc is obtained through inverse park coordinate transformation, thereby generating the switching control signal.

[0046] First, establish a mathematical model for grid connection of interconnected converters:

[0047] The interconnected converter has 3 links connected to the grid, and its output voltage is...

[0048]

[0049] In the formula: d kj V represents the switching duty cycle of the j-th power module in phase k; kj This is the DC-side voltage of the power module.

[0050] From Kirchhoff's voltage law, the grid-side voltage-current relationship of the interconnect converter can be obtained as follows:

[0051] In a stationary coordinate system:

[0052]

[0053] Where k = a, b, c represents the state equations of the three phases a, b, c respectively, and L and C are the output filter inductor and filter capacitor of the interconnected converter, respectively; u Ck The voltage of the k-phase filter capacitor is the same as the voltage of the k-phase mains grid; i Lk Let i be the current of the k-phase inductor. k Let K be the grid-connected current, and its direction be as follows: Figure 1 As shown; u k This is the output voltage of phase k of the converter.

[0054] To facilitate the control of the interconnect converter in grid connection, the mathematical model of the above interconnect converter grid connection is transformed into the dq rotating coordinate system:

[0055]

[0056] Among them, i dq (i.e. i d i q ) represent the grid-connected currents on the d and q axes of the interconnected converter, respectively, and u dq (i.e. u d u q ) represents the grid-connected d-axis and q-axis output voltages of the interconnected converter, i Ldq These represent the d-axis and q-axis currents of the output filter inductor, respectively, u Cdq (i.e. u Cd u Cq ) are the d-axis and q-axis voltages of the capacitor, respectively, and ω is the fundamental angular frequency of the grid voltage.

[0057] As can be seen from the mathematical model of the interconnected converter in the d-q rotating coordinate system, there is voltage and current coupling between the d and q axes. Since the active disturbance rejection control element in this embodiment has strong robustness, the coupling between the d and q axes can be ignored, thus simplifying the mathematical model under the d-q axis to:

[0058]

[0059] The following combination Figure 3 , Figure 4 , Figure 5 and Figure 6 The second-order LADRC is explained in detail.

[0060] The Linear State Error Feedback (LSEF) controller employs a combination of linear PDs, and the output u of this controller... o =K p (R-z1)-K d z2, where R is the given input value (i.e., Δi in the current controller). Ldq (i.e. Δi) Ld , Δi Lq In the phase-locked loop controller, Δu Cq ), z1 and z2 are the values ​​observed by LESO, K p With K d These are the proportional and derivative gains (i.e., the proportional coefficient and the derivative coefficient), respectively.

[0061] In this invention, m in the current controller d and m q The calculation process includes: Δi Ld The difference is taken from the observed value z1, and this difference is passed through the scaling factor K. p Magnification, the magnified result is then compared with the observed value z2 and the differential coefficient K d The difference between the products is taken, and this difference u0 is divided by b0 to obtain the d-axis output signal m of the active disturbance rejection control loop. d ; will Δi Lq The difference is taken from the observed value z1, and this difference is passed through the scaling factor K. p Magnification, the magnified result is then compared with the observed value z2 and the differential coefficient K d The difference between the products of z0 and z3 is taken, and this difference is divided by b0 to obtain the q-axis output signal m of the active disturbance rejection control loop. q In the phase-locked loop controller, Δu Cq The difference is taken from the observed value z1, and this difference is passed through the scaling factor K. p The magnified result is then compared with the observed value z2 and the differential coefficient K. d The difference between the products of z0 and z3 is taken, and the difference between z0 and z3 is taken. This difference is then divided by b0 to obtain the output error signal ω of the active disturbance rejection control (ADRC) loop; where b0 is the compensation factor of the ADRC loop.

[0062] The Linear Extended State Observer (LESO) is:

[0063]

[0064] In the current controller: ydq Z1 is the Laplace transform of the dq-axis output current of the output filter inductor of the interconnect converter, where z1 is the d- and q-axis grid-connected current i. dq The observed values, Let z1 be the first derivative, and z2 be the estimate of the intermediate state variables. z2 is the first derivative of z2, and z3 is the observed value of the total external disturbance. For the first differential of z3, u dq β1, β2, and β3 are the d-axis and q-axis output signals of the current controller, respectively, and the parameters of the extended state observer are β1, β2, and β3.

[0065] In the phase-locked loop controller: y dq The output error signal ω is the Laplace transform of the phase-locked loop output signal, and z1 is the q-axis voltage u of the power grid. q The observed values ​​are z1, z2 is the intermediate state quantity estimate, z3 is the observed value of the total external disturbance, and β1, β2, and β3 are the parameters of the extended state observer.

[0066] Figures 7(a) and 7(b) show the transient current and steady-state error waveforms of the three-phase grid-connected system compared with the traditional control method and the embodiment of the present invention, respectively. Figure 7(a) shows the three-phase grid-connected current i under the current loop PI decoupling control and phase-locked loop PI controller control method of the grid-connected equipment (interconnected converter). abc andi d The waveforms of the frequency reference value f of the PLL transient and steady-state output grid voltage are shown in Figure 7(b). Figure 7(b) shows the three-phase grid-connected current i under the control of the grid-connected equipment using a second-order LADRC current controller and the phase-locked loop using a second-order LADRC controller. abc andi d The waveforms of the frequency reference value f of the PLL transient and steady-state output grid voltage are shown. It can be seen that the frequency reference value f in this embodiment is more stable at 50Hz during grid connection and steady-state operation than the traditional method. This indicates that the phase-locked loop capability of this embodiment is better than the traditional method, which is more conducive to the safe and stable operation of the interconnecting converter during grid connection and operation. Compared with the traditional control method, the second-order LADRC control is used in both the phase-locked loop controller and the current controller, in i d The performance has been effectively improved in terms of overshoot, settling time and steady-state error. At the same time, the magnitude of the inrush current and the output steady-state settling time of the interconnect converter at the moment of grid connection have been significantly reduced, and the grid connection flexibility of the interconnect converter has been enhanced.

[0067] Figure 8(a) shows the severely distorted three-phase voltage waveform after voltage disturbance is introduced into the power supply and distribution network. Figures 8(b) and 8(c) show the phase-locked loop (PLL) frequency locking diagrams under the traditional control method and the embodiment of the present invention, respectively, in the scenario shown in Figure 8(a). It can be seen that the frequency reference value f of the traditional control method fluctuates around 50Hz (with a fluctuation amplitude reaching 10Hz), while the frequency reference value f of the embodiment of the present invention fluctuates very little around 50Hz. Therefore, under severe voltage distortion, the PLL capability of the embodiment of the present invention is significantly enhanced compared to the traditional control method, which is beneficial to the safe and stable operation of the interconnected converter in grid connection.

[0068] Example 2

[0069] Embodiment 2 of the present invention provides a control system for a railway traction network and railway power supply and distribution network interconnection converter corresponding to Embodiment 1 above, including a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method of Embodiment 1 above.

[0070] In some implementations, the memory may be high-speed random access memory (RAM), and may also include non-volatile memory, such as at least one disk storage device.

[0071] In other implementations, the processor can be any type of general-purpose processor, such as a central processing unit (CPU) or a digital signal processor (DSP), and there is no limitation here.

[0072] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of this application can be implemented in various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0073] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0074] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0075] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0076] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A control method for a railway traction network and railway power supply and distribution network interconnection converter, the railway traction network and railway power supply and distribution network interconnection converter comprising a multi-winding transformer whose primary side is connected to a single-phase railway traction power grid; the secondary side of the multi-winding transformer is connected to a three-phase link, the three-phase link is star-connected, each phase link includes multiple cascaded power sub-units; each of the three-phase link is connected to the primary side of an isolation transformer through an output filter; the secondary side of the isolation transformer is connected to a three-phase power supply and distribution network; characterized in that, The method includes the following steps: S1, collect three-phase voltage of three-phase power supply network and output filter inductance current , , ; After Park transformation, get grid voltage , get error signal by subtracting voltage reference value from ; S2, the error signal As input to the second-order linear active disturbance rejection method, the output adjustment deviation signal is obtained. The output adjustment deviation signal Compared with theoretical angular frequency Adding them together yields the first derivative of the phase-locked loop's angular frequency reference value. ,right By integrating, the phase reference value of the interconnection converter between the railway traction network and the railway power supply and distribution network is obtained. ; with the phase reference value The phase-locked angle is the angle for three-phase current. , , Perform Park transformation to obtain the grid-connected current. , ,Will , Corresponding to the current reference value respectively , Doing bad things, getting... , ;Will , As input to the second-order linear active disturbance rejection method, the modulation signals of the d and q axes are obtained. , Modulation signals of the d and q axes , The SPWM modulated wave signal in the stationary coordinate system is obtained by inverse Park transform. , , Carrier phase shift control is performed on the SPWM modulated wave signal to obtain the duty cycle signal of each power sub-unit switch, and the switching on and off of the switch is controlled. In step S2, the modulation signals of the d and q axes , The acquisition process specifically includes: Compared with the first observation The difference is calculated to obtain the first difference value, which is then processed by a proportionality coefficient. Magnify, compare the magnified first difference with the second observation. and differential coefficients Subtract the products to get the second difference. The second difference Divide by The modulation signal of the d-axis is obtained. ; Will Compared with the first observation The difference is calculated to obtain a third difference value, which is then processed by a scaling factor. Magnify, and compare the magnified third difference with the observed value. and differential coefficients The product of is subtracted to obtain the fourth difference value, which is then divided by . The modulation signal of the q-axis is obtained. .

2. The control method of the railway traction power network and railway power supply and distribution network interconnection converter according to claim 1, characterized in that, Each phase link consists of three cascaded power sub-units.

3. The control method for the railway traction network and railway power supply and distribution network interconnection converter according to claim 1, characterized in that, In step S2, the adjustment deviation signal is output. The specific acquisition process includes: and The difference is processed by the proportionality coefficient. After magnification, compared with the observed value and Find the difference, then divide the difference by The output adjustment deviation signal is obtained. ;in, This is the compensation factor for the second-order linear active disturbance rejection control element. and These are the first and second observations of the linearly extended state observer, respectively.

4. The control method for the railway traction network and railway power supply and distribution network interconnection converter according to claim 3, characterized in that, and The calculation formula is: ； in, This represents the Laplace transform of the d-axis and q-axis output currents of the output filter inductor of the interconnect converter. for The first-order differential, for The first-order differential, The observed value of total external disturbance. for The first-order differential, For the d-axis and q-axis output signals of the current controller, These are the parameters for the linearly extended state observer.

5. The control method for the railway traction network and railway power supply and distribution network interconnection converter according to claim 3, characterized in that, The calculation formula is: ;in, For control signals, R takes the value of or or .

6. The control method for the railway traction network and railway power supply and distribution network interconnection converter according to claim 1, characterized in that, Theoretical angular frequency The calculation formula is: ,in This is the reference frequency.

7. A control system for a railway traction network and railway power supply and distribution network interconnection converter, comprising a memory, a processor, and a computer program stored in the memory, characterized in that, The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 6.

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