Audio signal processing chip, audio signal processing device and method

Abstract

The application discloses an audio-video signal processing chip, an audio-video signal processing device containing the chip and an audio-video signal processing method. The audio-video signal processing chip contains a signal detection module, a storage unit and a controller. The signal detection module is used for detecting and storing audio-video signals. The controller is used for moving the audio-video signals from the signal detection module to the storage unit and transmitting the audio-video signals stored in the storage unit to a host.

Description

Technical Field

[0001] This invention application relates to an audio-visual signal analysis technology, and more particularly to an audio-visual signal processing chip, an audio-visual signal processing device including the processing chip, and an audio-visual signal processing method. Background Technology

[0002] Existing audio / video signal processing devices (e.g., DisplayPort audio / video signals) mostly utilize Field Programmable Gate Arrays (FPGAs) for signal processing, while data storage is typically handled using additional Double Data Rate (DDR) memory (e.g., DDR SDRAM). Furthermore, specialized cables are usually required to maintain high-speed transmission of the main audio / video signal data, resulting in high costs. Summary of the Invention

[0003] One object of the present invention is to provide an audio-visual signal processing chip, comprising a signal detection module, a storage unit, and a controller. The signal detection module, the storage unit, and the controller are electrically connected. The signal detection module is used to detect audio-visual signals, wherein the audio-visual signals are transmitted from a signal source to a signal destination; and to store the audio-visual signals. The controller is used to move the audio-visual signals from the signal detection module to the storage unit; and to transmit the audio-visual signals stored in the storage unit to a host computer.

[0004] Another object of the present invention is to provide an audio-visual signal processing device, comprising the aforementioned audio-visual signal processing chip, audio-visual signal input interface, and audio-visual signal output interface. The audio-visual signal processing chip, audio-visual signal input interface, and audio-visual signal output interface are electrically connected. The audio-visual signal input interface is used to receive audio-visual signals from a signal source. The audio-visual signal output interface, electrically connected to the audio-visual signal input interface and the audio-visual signal processing chip, is used to transmit the audio-visual signals to a signal destination. The packet data output interface, electrically connected to the audio-visual signal processing chip, is used to transmit packet data to a host computer.

[0005] Another objective of this invention is to provide an audio-visual signal processing method, comprising: detecting an audio-visual signal, wherein the audio-visual signal is transmitted from a signal source to a signal destination; storing the audio-visual signal in a buffer; moving the audio-visual signal from the buffer to a storage unit; and transmitting the audio-visual signal stored in the storage unit to a host computer.

[0006] The features, practical operation, and effects of this invention will be described in detail below with reference to the accompanying drawings. Attached Figure Description

[0007] The best understanding of embodiments of the invention will be achieved by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that various features may not be drawn to scale. In fact, for clarity, the dimensions of various features can be arbitrarily increased or decreased.

[0008] Figure 1 Block diagrams of audio-visual signal processing chips in some embodiments of this application are provided.

[0009] Figure 2A Block diagrams of audio-visual signal processing apparatus in some embodiments of this application are provided.

[0010] Figure 2B This is a schematic diagram of packet data in some embodiments of this invention application.

[0011] Figure 3 The flowcharts for some embodiments of the audio-visual signal processing methods in this application are provided.

[0012] Figure 4A and 4B The flowcharts for some embodiments of the audio-visual signal processing methods in this application are provided.

[0013] Symbol Explanation

[0014] 11: Audio / Video Signal Processing Chip 110: Interruption Request 111: Signal Detection Module 113: Storage unit 115: Controller 2: Audio-visual signal processing device 21: Audio / video signal processing chip 210: Interruption Request 211: Signal Detection Module 211A: Signal Receiver 211B: Buffer 213: Storage unit 215: Controller 217: Signal Output Module 217A: Transceiver 217B: Storage unit 23: Audio / video signal input interface 25: Audio / video signal output interface 27: Packet data output interface 6: Host 701: Audio and video data 702: Control signal 71: Signal Source 73: Signal Purpose 8: Host 90: Audio / Video Signal 91: Signal Source 93: Signal Purpose CH1: Transmission Channel CH2: Transmission Channel PT: Packet Data S301~S304: Steps S401~S406: Steps Detailed Implementation Embodiments of the invention are described in more detail below. However, it should be understood that the invention provides many applicable concepts that can be embodied in a wide range of specific scenarios. The embodiments described are for illustrative purposes only and do not limit the scope of the invention.

[0015] Please see Figure 1 This is a block diagram of an audio-visual signal processing chip 11 according to an embodiment of the present invention. The audio-visual signal processing chip 11 includes a signal detection module 111, a storage unit 113, and a controller 115. The signal detection module 111, the storage unit 113, and the controller 115 are electrically connected to each other to transmit data and signals, and the relevant processing operations will be further described below.

[0016] In this embodiment, the audio-visual signal processing chip 11 is connected to the signal source 91 and the signal destination 93. When the signal source 91 transmits an audio-visual signal 90 to the signal destination 93, the signal detection module 111 detects and stores the audio-visual signal 90.

[0017] Subsequently, the signal detection module 111 sends an interrupt request 110 to the controller 115. Based on the interrupt request 110, the controller 115 stores the audio-visual signal 90 in the storage unit 113 and transmits it to the host 8, so that the host 8 can parse the audio-visual signal 90 through the application and provide the parsing results to the user.

[0018] Please see Figure 2A This is a block diagram of an audio-visual signal processing device 2 according to another embodiment of the present invention. The audio-visual signal processing device 2 includes: an audio-visual signal processing chip 21, an audio-visual signal input interface 23, an audio-visual signal output interface 25, and a packet data output interface 27. The audio-visual signal processing chip 21 is electrically connected to the audio-visual signal input interface 23, the audio-visual signal output interface 25, and the packet data output interface 27. In some embodiments, the audio-visual signal input interface 23 and the audio-visual signal output interface 25 include a DisplayPort interface or a Universal Serial Bus Type-C (USB Type-C) interface, but are not limited thereto.

[0019] The audio / video signal processing chip 21 includes: a signal detection module 211, a storage unit 213 (e.g., a memory of approximately 7 kilobits), a controller 215, and a signal output module 217. The signal detection module 211, the storage unit 213, the controller 215, and the signal output module 217 are electrically connected to each other. The signal detection module 211 includes a signal receiver 211A and a buffer 211B (e.g., a buffer of approximately 128 bits).

[0020] The signal output module 217 includes a transceiver 217A and a storage unit 217B. The buffer 211B and storage unit 213 can be configured to store data in a First-In-First-Out (FIFO) manner. Data and signals are transmitted between components via electrical connections. Related processing operations will be further described below.

[0021] Specifically, the audio-visual signal processing device 2 is connected to the signal source 71 and the signal destination 73 via the audio-visual signal input interface 23 and the audio-visual signal output interface 25, respectively. The audio-visual signal input interface 23 and the audio-visual signal output interface 25 have two transmission channels CH1 and CH2. When the signal source 71 transmits audio-visual signals to the signal destination 73, transmission channel CH1 transmits audio-visual data 701, and transmission channel CH2 transmits control signals 702.

[0022] Next, the signal receiver 211A of the signal detection module 211 detects the control signal 702 and stores it in the buffer 211B. Simultaneously, the signal receiver 211A sends an interrupt request 210 to the controller 215. Based on the interrupt request 210, the controller 215 retrieves the control signal 702 from the buffer 211B. Subsequently, the controller 215 encapsulates the control signal 702 into packet data PT and stores the packet data PT in the storage unit 213.

[0023] Please refer to this as well. Figure 2B This is a schematic diagram of packet data PT in some embodiments of this invention. Specifically, the packet data PT includes packet information P1, time information P2, and a control signal 702. Time information P2 records the signal occurrence time or signal acquisition time of the control signal 702. Packet information P1 records the data length of the control signal 702 and the packet status of the packet data PT.

[0024] In some embodiments, the control signal 702 for the audio / video signal includes an auxiliary channel command (Auxiliary) related to the display port protocol or a hot plug detection (HPD) signal related to the display port protocol. The X bits of the packet information P1 are used to record the data length of the control signal 702, and the Y bits of the packet information P1 are used to record the packet status of the packet data. The length of the packet information P1 is X + Y bits.

[0025] For example, since the size of the control signal 702 does not exceed 17 bits in some standard specifications, only 5 bits are needed to record the data length of the control signal 702. In other words, the packet information P1 in this embodiment has a length of 5 bits to record the data length of the control signal 702.

[0026] In another embodiment, packet information P1 can use 3 bits to record the packet status of packet data. When the 3 bits recording the packet status are 000, it means that the packet data PT containing time information P2 and control signal 702 can be successfully saved to the storage unit. When the 3 bits recording the packet status are 001, it means that the information recorded in the packet data PT includes HPD signals or interrupt requests. When the 3 bits recording the packet status are 100, it means that the storage unit previously failed to save one or more control signals due to insufficient space; in other words, the storage unit previously experienced an overflow, and the current packet data PT can be successfully recorded in the storage unit.

[0027] When the three bits recording the packet status are 101, it indicates that due to insufficient storage space, the data of the current control signal 702 cannot be saved normally, and only the time information P2 can be recorded. In other words, the storage unit is currently in an overflow state. When the three bits recording the packet status are 110, it indicates that due to insufficient storage space, one or more control signals were not saved (i.e., the storage unit has previously overflowed), and the data of the current control signal 702 cannot be saved normally, and only the time information P2 can be recorded (i.e., the storage unit is currently in an overflow state).

[0028] In some embodiments, the controller 215 transmits packet data PT to the host 6 via the packet data output interface 27 through the signal output module 217. Specifically, the controller 215 moves the packet data PT stored in the storage unit 213 to the storage unit 217B of the signal output module 217. Subsequently, the transceiver 217A of the signal output module 217 transmits the packet data PT stored in the storage unit 217B to the host 6 via the packet data output interface 27, so that the host 6 can parse the control signal 702 through the application program and provide the parsing result to the user.

[0029] In some embodiments, the packet data output interface 27 includes a Universal Serial Bus (USB) interface, and the signal output module 217 conforms to the USB data storage and transmission specifications. Specifically, during USB data transmission, each USB data packet is 32 bits in size. The first bit group contains packet length information, representing the actual data length contained in the USB data packet, and the subsequent 31 bit groups contain the actual data. When the actual data is less than 31 bit groups, the USB data packet can be padded with 0s.

[0030] For example, when there is no data in the storage unit, the first bit group of the corresponding USB data packet has a value of 0, and the remaining values ​​in the actual data are all filled with 0. Then, the USB data packet is transmitted to host 6. When the data stored in the storage unit that has not yet been transmitted does not exceed 31 bit groups, the first bit group of the corresponding USB data packet records the length of the actual data in the current storage unit, and the values ​​of the portion of the actual data that is less than 31 bit groups are all filled with 0. Then, the USB data packet is transmitted to host 6. When the data stored in the storage unit that has not yet been transmitted exceeds 31 bit groups, the first bit group of the corresponding USB data packet has a value of 0x1F, and the actual data includes the 31 bit groups of data read from the storage unit. Then, the USB data packet is transmitted to host 6.

[0031] In some embodiments, when multiple instructions occur between the signal source 71 and the signal destination 73 within a specific time interval, the signal receiver 211A stores the multiple instructions in the buffer 211B and writes boundary bits between each instruction to accurately distinguish different instructions when parsing USB data packets. The boundary bits may consist of multiple bits.

[0032] Some embodiments of the present invention include an audio-visual signal processing method, the flowchart of which is shown below. Figure 3 As shown. The audio-visual signal processing methods of these embodiments are implemented by an audio-visual signal processing chip (such as the audio-visual signal processing chip in the aforementioned embodiments), and the detailed operation of the methods is as follows.

[0033] First, step S301 is executed to detect the audio / video signal. The audio / video signal is transmitted from the signal source to the signal destination. Step S302 is executed to store the audio / video signal in a buffer. Step S303 is executed to move the audio / video signal from the buffer to a storage unit. Step S304 is executed to transmit the audio / video signal stored in the storage unit to the host computer, so that the host computer can parse the audio / video signal through the application and provide the parsing results to the user.

[0034] Some embodiments of the present invention include an audio-visual signal processing method, the flowchart of which is shown below. Figure 4A and 4BAs shown. The audio-visual signal processing methods of these embodiments are implemented by an audio-visual signal processing chip (such as the audio-visual signal processing chip in the aforementioned embodiments), and the detailed operation of the methods is as follows.

[0035] First, step S401 is executed to detect the audio / video signal. This audio / video signal is transmitted from the signal source to the signal destination. Step S402 is executed to store the audio / video signal in a buffer. Step S403 is executed to encapsulate the audio / video signal into packet data. This packet data includes packet information, time information, and the audio / video signal. The packet information records the data length of the audio / video signal and the packet status. The audio / video signal includes auxiliary channel commands related to the display port protocol or HPD signals related to the display port protocol.

[0036] Next, step S404 is executed to store the packet data in the storage unit. Step S405 is executed to transmit the packet data stored in the storage unit to the host, so that the host can parse the audio-visual signal through the application and provide the parsing result to the user. In some embodiments, when the audio-visual signal contains multiple instructions, the audio-visual signal processing method may selectively execute step S406 before step S403 to write a boundary bit between each instruction.

[0037] In summary, the audio-visual signal processing chip, the audio-visual signal processing apparatus including the chip, and the audio-visual signal processing method provided by this invention can effectively provide audio-visual signal parsing operations by integrating the module into a system-on-a-chip (SoC), while significantly reducing costs. It should be noted that in some embodiments, the controller of the aforementioned audio-visual signal processing chip includes logic circuitry capable of executing operations and instructions, and the signal receiver includes high-speed signal receiving circuitry; however, this is not intended to limit the implementation of the hardware components of this invention.

[0038] The foregoing description briefly describes the features of certain embodiments of the present invention, thereby enabling those skilled in the art to more fully understand the various ways in which the present invention pertains. Those skilled in the art should recognize that they can easily design or modify other processes and structures based on the present invention to achieve the same objectives and / or advantages as these embodiments described herein. Those skilled in the art should understand that these equivalent embodiments still fall within the inventive concept and scope of this application, and various changes, substitutions, and adjustments can be made without departing from the spirit and scope of the present invention.

[0039] While the embodiments of the present invention have been described above, these embodiments are not intended to limit the present invention. Those skilled in the art can make changes to the technical features of the present invention based on the explicit or implicit content of the present invention. All such changes may fall within the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention shall be determined by the scope defined in the claims of this application.

Claims

1. An audio-visual signal processing chip, characterized in that, The audio-visual signal processing chip includes: The signal detection module includes: A signal receiver for detecting audio-visual signals, wherein the audio-visual signals are transmitted from a signal source to a signal destination, and the audio-visual signals include control signals related to the display port protocol; and A buffer, electrically connected to the signal receiver, is used to store the control signal; The first storage unit is electrically connected to the signal detection module; and The controller is electrically connected to the signal detection module and the first storage unit, and is used to move the control signal from the signal detection module to the first storage unit, and to transmit the control signal stored in the first storage unit to an external host, so that the external host can parse the control signal through an application and provide the parsing result to the user.

2. The audio-visual signal processing chip as described in claim 1, characterized in that, After detecting the audio-visual signal, the signal receiver sends an interrupt request to the controller, and the controller moves the control signal from the buffer to the first storage unit according to the interrupt request.

3. The audio-visual signal processing chip as described in claim 1, characterized in that, The audio-visual signal contains multiple instructions, and the signal receiver is also used to write boundary bits between each instruction.

4. The audio-visual signal processing chip as described in claim 1, characterized in that, Moving the control signal from the signal detection module to the first storage unit includes: The control signal is obtained from the buffer; The control signal is encapsulated into packet data, wherein the packet data includes the control signal and time information; and The packet data is stored in the first storage unit.

5. The audio / video signal processing chip as described in claim 4, characterized in that, The packet data also includes packet information, which records the data length of the control signal and the packet status of the packet data.

6. The audio / video signal processing chip as described in claim 5, characterized in that, The control signals related to the DisplayPort Protocol include auxiliary channel commands related to the DisplayPort Protocol or hot-insertion detection signals related to the DisplayPort Protocol.

7. The audio / video signal processing chip as described in claim 6, characterized in that, The first bit group of the packet information is used to record the data length of the control signal, and the second bit group of the packet information is used to record the packet status of the packet data.

8. The audio-visual signal processing chip as described in claim 4, characterized in that, The audio-visual signal processing chip also includes: The signal output module is electrically connected to the controller and the first storage unit; The controller is further configured to transmit the packet data stored in the first storage unit to the external host via the signal output module.

9. The audio-visual signal processing chip as described in claim 8, characterized in that, The signal output module further includes: The second storage unit is used to store the packet data; A transceiver is used to transmit the packet data to the external host.

10. A method for processing audio-visual signals, characterized in that, The method includes: Detecting audio-visual signals, wherein the audio-visual signals are transmitted from a signal source to a signal destination, and the audio-visual signals include control signals related to the display port protocol; The control signal is stored in a buffer. The control signal is encapsulated into packet data, wherein the packet data includes the control signal and time information; Move the control signal from the buffer to the storage unit; and The control signals stored in the storage unit are transmitted to an external host, so that the external host can parse the control signals through an application and provide the parsing results to the user.

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