Voltage conversion device
By designing symmetrical first and second routing structures in the transformer and utilizing partial or complete overlap of the sub-routes, the inductance and quality factor are improved, solving the problem of low inductance and quality factor in existing transformers and expanding the application range.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- REALTEK SEMICON CORP
- Filing Date
- 2021-10-13
- Publication Date
- 2026-07-14
Smart Images
Figure CN115966378B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to an integrated circuit, and more particularly to a transformer device for an integrated circuit. Background Technology
[0002] Each type of transformer has its advantages and disadvantages. For example, transformers with interleaved structures have lower inductance density. Furthermore, stacked type transformers have lower quality factor (Q value). Therefore, the application range of these transformers is limited. Summary of the Invention
[0003] One aspect of this disclosure relates to a transformer device comprising a first wiring and a second wiring. The first wiring includes at least one first sub-wiring. The at least one first sub-wiring is located on a first layer. The second wiring includes at least one second sub-wiring and a third sub-wiring. The at least one second sub-wiring is located on the first layer and is adjacent to the at least one first sub-wiring. The third sub-wiring is located on a second layer and partially overlaps with the at least one first sub-wiring.
[0004] Therefore, according to the technical content of this disclosure, the partial overlap structure between the sub-traces of the transformer device shown in the embodiments of this disclosure can improve the inductance value of the overall device. Furthermore, it can also improve the quality factor of the overall device. Moreover, because the structure of the transformer device of this disclosure is highly symmetrical, it can improve the coupling factor (K-factor) of the overall device. Attached Figure Description
[0005] To make the above and other objects, features, advantages and embodiments of this disclosure more apparent and understandable, the accompanying drawings are described below:
[0006] Figure 1 This is a schematic diagram of a transformer device according to an embodiment of the present disclosure.
[0007] Figure 2 This is a schematic diagram of a transformer device according to an embodiment of the present disclosure.
[0008] Figure 3 This is a schematic diagram of experimental data for a transformer device according to an embodiment of the present disclosure.
[0009] In accordance with customary practice, the various features and components in the figures are not drawn to scale, but are drawn in a manner that best represents the specific features and components relevant to this disclosure. Furthermore, similar components / parts are referred to by the same or similar element symbols across different figures.
[0010] Symbol Explanation
[0011] 1000, 1000A: Transformer
[0012] 1100, 1100A: First wiring route
[0013] 1110, 1110A: First sub-routing
[0014] 1120, 1120A: First sub-routing
[0015] 1130, 1130A: First sub-routing
[0016] 1200, 1200A: Second wiring route
[0017] 1210, 1210A: Second sub-routing
[0018] 1220, 1220A: Second sub-routing
[0019] 1230, 1230A: Third sub-wiring
[0020] 1300, 1300A: First Input / Output Device
[0021] 1400, 1400A: Second Input / Output Device
[0022] C1, C2, L1, L2: Experimental curves Detailed Implementation
[0023] To make the description of this disclosure more detailed and complete, illustrative descriptions of implementation methods and specific embodiments of this disclosure are provided below; however, these are not the only forms of implementing or utilizing the specific embodiments of this disclosure. The implementation methods cover features of multiple specific embodiments and the methods, steps, and their order for constructing and operating these specific embodiments. However, other specific embodiments may also be used to achieve the same or equivalent functions and sequence of steps.
[0024] Unless otherwise defined in this specification, the scientific and technical terms used herein have the same meaning as understood and commonly used by one of ordinary skill in the art to which this disclosure pertains. Furthermore, unless conflicting with the context, singular nouns used herein include their plural forms, and vice versa.
[0025] Figure 1 This is a schematic diagram of a transformer device 1000 according to an embodiment of the present disclosure. As shown, the transformer device 1000 includes a first trace 1100 and a second trace 1200. The first trace 1100 includes at least one first sub-trace 1110, 1120, and 1130. The second trace 1200 includes at least one second sub-trace 1210 and 1220 and a third sub-trace 1230.
[0026] In terms of structural configuration, at least one first sub-route (e.g., first sub-routes 1110, 1120, 1130) is located on the first layer. At least one second sub-route (e.g., second sub-routes 1210, 1220) is located on the first layer and is adjacent to at least one first sub-route (e.g., first sub-routes 1110, 1120, 1130). Furthermore, a third sub-route 1230 is located on the second layer and partially overlaps with at least one first sub-route (e.g., first sub-routes 1110, 1120, 1130).
[0027] As described above, the partial overlap between at least one first sub-trace (such as first sub-traces 1110, 1120, 1130) and the third sub-trace 1230 improves the overall inductance value of the device. Furthermore, it also improves the overall quality factor of the device. Moreover, as can be seen from the figures, the structure of the transformer 1000 of this disclosure is highly symmetrical, thus improving the overall coupling factor (K factor).
[0028] In one embodiment, the third sub-trace 1230 is located inside the second trace 1200 and partially overlaps with at least one first sub-trace (such as first sub-traces 1110, 1120, and 1130) located inside the first trace 1100. Furthermore, the third sub-trace 1230 is located at the innermost side of the second trace 1200, and the aforementioned at least one first sub-trace includes multiple first sub-traces 1110, 1120, and 1130. The third sub-trace 1230 partially overlaps with the innermost first sub-trace 1130 among the first sub-traces 1110, 1120, and 1130.
[0029] In one embodiment, at least one second sub-trace includes multiple second sub-traces 1210 and 1220. The order of the first sub-traces 1110, 1120, and 1130 and the second sub-traces 1210 and 1220 is as follows: first sub-trace 1110, second sub-trace 1210, second sub-trace 1220, first sub-trace 1120, and first sub-trace 1130. Furthermore, as can be seen from the figure, the second sub-traces 1210 and 1220 are directly adjacent, and the first sub-traces 1120 and 1130 are directly adjacent.
[0030] In one embodiment, the transformer 1000 further includes a first input / output element 1300, which is located on a first layer and coupled to first sub-routes 1110, 1120, and 1130 of the first trace 1100. More specifically, the first input / output element 1300 is coupled to the outermost of the first sub-routes 1110, 1120, and 1130 of the first trace 1100. Specifically, the first input / output element 1300 is coupled to the outermost first sub-trace 1110.
[0031] In one embodiment, the transformer 1000 further includes a second input / output element 1400, which is located on a second layer and coupled to second sub-routes 1210 and 1220 of the second trace 1200. More specifically, the second input / output element 1400 is coupled to the innermost of the second sub-routes 1210 and 1220 of the second trace 1200, and the second input / output element 1400 crosses over the second sub-routes 1210 and 1220 of the second trace 1200. Specifically, the second input / output element 1400 is coupled to the innermost second sub-route 1220, and the first input / output element 1300 and the second input / output element 1400 are respectively disposed on both sides of the transformer 1000 (e.g., the upper and lower sides of the transformer 1000).
[0032] In one embodiment, the first sub-routes 1110, 1120, 1130, the second sub-routes 1210, 1220, and the first input / output device 1300 are located on the first layer. Furthermore, the third sub-routes 1230 and the second input / output device 1400 are located on the second layer. Moreover, the first layer is different from the second layer. However, this disclosure does not imply... Figure 1 The embodiments shown are limited and are merely illustrative of one implementation of this disclosure.
[0033] Figure 2 This is a schematic diagram of a transformer 1000A according to an embodiment of the present disclosure. Compared to Figure 1 The transformer 1000 shown is... Figure 2 The configuration of the third sub-line 1230A of the transformer 1000A is different, as detailed below.
[0034] As shown in the figure, the third sub-route 1230A completely overlaps with at least one of the first sub-routes (such as first sub-routes 1110A, 1120A, and 1130A) of the first sub-route 1100A. For example, the third sub-route 1230A is located inside the second sub-route 1200A and completely overlaps with at least one of the first sub-routes (such as first sub-routes 1110A, 1120A, and 1130A) located inside the first sub-route 1100A. Furthermore, the third sub-route 1230A is located at the innermost edge of the second sub-route 1200A, and the aforementioned at least one first sub-route includes multiple first sub-routes 1110A, 1120A, and 1130A. The third sub-route 1230A completely overlaps with the innermost first sub-route 1130A located among the first sub-routes 1110A, 1120A, and 1130A. It should be noted that, since the first sub-routes 1120A and 1130A will be... Figure 2The lower side is staggered. Since the staggered coupling requires two layers of structure, the third sub-routes 1230A completely overlaps the first sub-routes 1130A, except for the staggered coupling mentioned above.
[0035] In one embodiment, at least one second sub-trace includes multiple second sub-traces 1210A and 1220A. The first sub-traces 1110A, 1120A, and 1130A are arranged in the following order with the second sub-traces 1210A, 1220A, 1120A, and 1130A: first sub-trace 1110A, second sub-trace 1210A, second sub-trace 1220A, first sub-trace 1120A, and first sub-trace 1130A. Furthermore, as shown in the figure, second sub-traces 1210A and 1220A are directly adjacent, and first sub-traces 1120A and 1130A are also directly adjacent.
[0036] In one embodiment, the transformer 1000A further includes a first input / output element 1300A, which is located on the first layer and coupled to the first sub-routes 1110A, 1120A, and 1130A of the first trace 1100A. More specifically, the first input / output element 1300A is coupled to the outermost of the first sub-routes 1110A, 1120A, and 1130A of the first trace 1100A. Specifically, the first input / output element 1300A is coupled to the outermost first sub-route 1110A.
[0037] In one embodiment, the transformer 1000A further includes a second input / output component 1400A, which is located on a second layer and coupled to second sub-routes 1210A and 1220A of the second trace 1200A. More specifically, the second input / output component 1400A is coupled to the innermost of the second sub-routes 1210A and 1220A of the second trace 1200A, and the second input / output component 1400A crosses over the second sub-routes 1210A and 1220A of the second trace 1200A. Specifically, the second input / output component 1400A is coupled to the innermost second sub-route 1220A, and the first input / output component 1300A and the second input / output component 1400A are respectively disposed on both sides of the transformer 1000A (e.g., the upper and lower sides of the transformer 1000A).
[0038] In one embodiment, the first sub-routes 1110A, 1120A, 1130A, the second sub-routes 1210A, 1220A, and the first input / output device 1300A are located on the first layer. Furthermore, the third sub-routes 1230A and the second input / output device 1400A are located on the second layer. Moreover, the first layer is different from the second layer. However, this disclosure does not imply... Figure 2 The embodiments shown are limited and are merely illustrative of one implementation of this disclosure.
[0039] Figure 3 This is a schematic diagram of experimental data for a transformer device according to an embodiment of the present disclosure. As shown in the figure, using the architecture configuration of the present disclosure, the experimental curve for the quality factor of the first traces 1100 and 1100A of the transformer device 1000 and 1000A is C1, and the experimental curve for the inductance value of the first traces 1100 and 1100A is L1. Furthermore, the experimental curve for the quality factor of the second traces 1200 and 1200A of the transformer device 1000 and 1000A is C2, and the experimental curve for the inductance value of the second traces 1200 and 1200A is L2. As can be seen from the figure, at a frequency of 5 GHz, the quality factor of the first traces 1100 and 1100A is 11, while the quality factor of the second traces 1200 and 1200A is 10.3. In addition, the inductance value of the first traces 1100 and 1100A and the second traces 1200 and 1200A is 1.34 nanohenries (nH). However, this public disclosure does not take into account Figure 3 The embodiments shown are limited and are merely illustrative of one implementation of this disclosure.
[0040] As can be seen from the above embodiments of this disclosure, applying this disclosure has the following advantages. The partial overlap structure between the sub-traces of the transformer device shown in the embodiments of this disclosure can improve the overall inductance value of the device. Furthermore, it can also improve the overall quality factor of the device. Moreover, since the structure of the transformer device of this disclosure is highly symmetrical, it can improve the overall coupling factor (K-factor).
Claims
1. A transformer device, comprising: The first routing includes: At least one first sub-routes, located on a first layer; and The second routing includes: At least one second sub-routing is located on the first layer and is adjacent to the at least one first sub-routing; and A third sub-trace, located on a second layer, partially overlaps with the at least one first sub-trace. The third sub-trace is located at the innermost side of the second trace. The at least one first sub-trace includes multiple first sub-traces. The third sub-trace partially overlaps with the innermost first sub-trace among the multiple first sub-traces. The at least one second sub-trace includes multiple second sub-traces. The multiple first sub-traces and the multiple second sub-traces are arranged in the following order: first sub-trace, second sub-trace, second sub-trace, first sub-trace, and first sub-trace.
2. The transformer as described in claim 1, further comprising: A first input / output device is located on the first layer and coupled to the plurality of first sub-routes, wherein the first input / output device is coupled to the outermost first sub-route among the plurality of first sub-routes, and wherein the first input / output device is coupled to the outermost first sub-route among the plurality of first sub-routes.
3. The transformer device as described in claim 2, further comprising: A second input / output device is located on the second layer and coupled to the plurality of second sub-routes, wherein the second input / output device is coupled to the innermost second sub-route among the plurality of second sub-routes, and the second input / output device spans the plurality of second sub-routes, wherein the second input / output device is coupled to the innermost second sub-route among the plurality of second sub-routes, and the first input / output device and the second input / output device are respectively disposed on both sides of the transformer device.
4. A transformer device, comprising: The first routing includes: At least one first sub-routes, located on a first layer; and The second routing includes: At least one second sub-routing is located on the first layer and is adjacent to the at least one first sub-routing; and A third sub-trace, located on a second layer, partially overlaps with the at least one first sub-trace. The third sub-trace is located at the innermost side of the second trace. The at least one first sub-trace includes multiple first sub-traces. The third sub-trace completely overlaps with the innermost first sub-trace among the multiple first sub-traces. The at least one second sub-trace includes multiple second sub-traces. The multiple first sub-traces and the multiple second sub-traces are arranged in the following order: first sub-trace, second sub-trace, second sub-trace, first sub-trace, and first sub-trace.
5. The transformer as described in claim 4, further comprising: A first input / output device is located on the first layer and coupled to the plurality of first sub-routes, wherein the first input / output device is coupled to the outermost first sub-route among the plurality of first sub-routes, and wherein the first input / output device is coupled to the outermost first sub-route among the plurality of first sub-routes.
6. The transformer as described in claim 5, further comprising: A second input / output device is located on the second layer and coupled to the plurality of second sub-routes, wherein the second input / output device is coupled to the innermost second sub-route among the plurality of second sub-routes, and the second input / output device spans the plurality of second sub-routes, wherein the second input / output device is coupled to the innermost second sub-route among the plurality of second sub-routes, and the first input / output device and the second input / output device are respectively disposed on both sides of the transformer device.