Semiconductor device including crack sensor

Abstract

The present disclosure relates to a semiconductor device including a crack sensor. A semiconductor device includes a target layer disposed on a substrate, and a crack sensor for detecting a crack generated in the target layer. The crack sensor includes a first conductive pattern at a bottom surface of the target layer, a second conductive pattern on a top surface of the target layer, and the top surface opposite the bottom surface of the target layer, a plurality of resistors, and a node. The plurality of resistors are connected in parallel to each other through the first conductive pattern and the second conductive pattern. Each of the plurality of resistors is disposed substantially through the target layer.

Description

Technical Field

[0001] This disclosure generally relates to semiconductor technology, and more specifically, to semiconductor devices including a crack sensor for detecting potential cracks in a semiconductor chip. Background Technology

[0002] Integrated circuits (ICs) can be repeatedly formed on a wafer, and the wafer can be separated into individual semiconductor chips. A wafer can be diced or cut into multiple semiconductor chips. The separated semiconductor chips can be packaged into semiconductor packages. During the process of separating the wafer into semiconductor chips, cracks may occur within the semiconductor chips. Cracks can represent the rupture of layers constituting the semiconductor chip. Cracks can represent delamination, where one layer peels off from another. When dicing a wafer into semiconductor chips, the stress applied to the layers constituting the semiconductor chip may vary from layer to layer. Therefore, cracks may propagate from the diced area into the interior of the semiconductor chip. Such cracks can lead to malfunctions or failures of the semiconductor chip. It is necessary to detect cracks that occur within the semiconductor chip. Summary of the Invention

[0003] One aspect of this disclosure provides a semiconductor device comprising: a substrate including a chip region and a scribe region; a target layer disposed on the substrate; and a crack sensor for detecting cracks generated in the target layer. The crack sensor may include: a first conductive pattern located at a bottom surface of the target layer; a second conductive pattern located at a top surface of the target layer, with the top surface opposite to the bottom surface of the target layer; a plurality of resistors substantially penetrating the target layer, the plurality of resistors being connected in parallel with each other via the first and second conductive patterns, wherein each of the plurality of resistors is disposed sequentially away from the chip region; and a first node and a second node respectively connected to the first and second conductive patterns.

[0004] Another aspect of this disclosure provides a semiconductor device comprising: a target layer disposed on a substrate; and a crack sensor for detecting cracks generated in the target layer. The crack sensor may include: a first conductive pattern located at a bottom surface of the target layer; a second conductive pattern located at a top surface of the target layer, the top surface opposite the bottom surface of the target layer; a plurality of resistors substantially penetrating the target layer, the plurality of resistors being connected in parallel to each other via the first and second conductive patterns; and a first node and a second node respectively connected to the first and second conductive patterns. Attached Figure Description

[0005] Figure 1 This is a schematic plan view illustrating a semiconductor device according to an embodiment of the present disclosure.

[0006] Figure 2 This is a schematic plan view illustrating a semiconductor device according to an embodiment of the present disclosure.

[0007] Figure 3 This is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment of the present disclosure.

[0008] Figure 4 This is an example Figure 3 A schematic circuit diagram of the resistive component of a crack sensor for a semiconductor device.

[0009] Figures 5 to 11 This is an example Figure 3 A schematic diagram of the crack sensing operation of a crack sensor in a semiconductor device.

[0010] Figures 12 to 16 This is a schematic diagram illustrating a semiconductor device according to an embodiment of the present disclosure.

[0011] Figure 17 This is a block diagram illustrating an electronic system employing a memory card including a package according to an embodiment of the present disclosure.

[0012] Figure 18 This is a block diagram illustrating an electronic system including a package according to an embodiment of the present disclosure. Detailed Implementation

[0013] The terms used herein may correspond to words chosen in consideration of their function in the presented embodiments, and the meanings of these terms may vary depending on ordinary skill in the art to which the embodiments pertain. Where terms are defined in detail, they may be interpreted according to their definitions. Unless otherwise defined, the terms used herein (including technical and scientific terms) have the same meanings as commonly understood by one of ordinary skill in the art to which the embodiments pertain.

[0014] It should be understood that although the terms “first” and “second,” “side,” “top” and “bottom or lower” may be used in this document to describe various devices, these devices should not be limited by these terms. These terms are used only to distinguish one device from another and are not intended to indicate a particular order or number of devices.

[0015] Semiconductor devices can include semiconductor substrates or structures in which multiple semiconductor substrates are stacked. A semiconductor device can refer to a semiconductor package structure in which a structure of stacked semiconductor substrates is encapsulated. A semiconductor substrate can refer to a semiconductor wafer, semiconductor die, or semiconductor chip in which electronic components and devices are integrated. A semiconductor chip can refer to: a memory chip integrating memory integrated circuits such as: Dynamic Random Access Memory (DRAM) circuits, Static Random Access Memory (SRAM) circuits, NAND flash memory circuits, NOR flash memory circuits, Magnetic Random Access Memory (MRAM) circuits, Resistive Random Access Memory (ReRAM) circuits, Ferroelectric Random Access Memory (FeRAM) circuits, or Phase Change Random Access Memory (PCRAM); a logic die or ASIC chip in which logic circuitry is integrated in the semiconductor substrate, or a processor such as an application processor (AP), graphics processing unit (GPU), central processing unit (CPU), or system-on-a-chip (SoC). Semiconductor devices can be used in information and communication systems such as mobile phones, electronic systems associated with biotechnology or healthcare, or wearable electronic systems. Semiconductor devices are suitable for the Internet of Things (IoT).

[0016] Throughout this specification, the same reference numerals refer to the same devices. Although a reference numeral may not be mentioned or described with reference to one drawing, it may be mentioned or described with reference to another drawing. Furthermore, even if a reference numeral is not shown in one drawing, it may be shown in another.

[0017] Figure 1 This is a schematic plan view illustrating a semiconductor device 10W according to an embodiment of the present disclosure. Figure 1 The shape of the semiconductor device 10W in the XY plane before it is cut into individual semiconductor chips can be illustrated.

[0018] Reference Figure 1 The semiconductor device 10W may include a wafer or semiconductor substrate 100 in which integrated circuits are integrated. The integrated circuits may include memory devices, such as dynamic random access memory (DRAM) devices or NAND flash memory devices. The semiconductor device 10W may be diced into individual semiconductor chips along dicing lines 150L.

[0019] Semiconductor device 10W may include a chip region 101 and a scribe lane region 102. The chip region 101 and scribe lane region 102 of semiconductor device 10W may correspond to the chip region 101 and scribe lane region 102 of semiconductor substrate 100. Chip region 101 may correspond to the region where integrated circuits are integrated. Chip region 101 may include a rectangular or square region in a plan view. A protective wall 101G protecting the integrated circuit may be provided in the inner edge portion of each chip region 101. The protective wall 101G may be formed in a shape extending along the boundary between chip region 101 and scribe lane region 102. Scribe lane region 102 may be a region surrounding chip region 101. A dicing line 150L may be provided as a portion within scribe lane region 102.

[0020] The semiconductor device 10W may include a crack sensor 200 for detecting cracks. The crack sensor 200 may be configured to detect cracks that may occur during the dicing of the semiconductor device 10W into semiconductor chips. The crack sensor 200 may be positioned at locations where one or more cracks are likely to occur. The crack sensor 200 may be positioned within a scribe line region 102. Multiple crack sensors 200 may be positioned in the scribe line region 102 while being spaced apart from each other. The crack sensor 200 may be positioned in a local region of the scribe line region 102 adjacent to a rectangular side of each chip region 101. The rectangular side of each chip region 101 may correspond to a portion forming the boundary 101S between the chip region 101 and the scribe line region 102.

[0021] Since the dicing line 150L is located within a portion of the scribing region 102, and the cutting is performed along the dicing line 150L, ​​one or more cracks may preferentially form in the scribing region 102 where the dicing line 150L is located. As the cutting proceeds along the dicing line 150L, ​​the side surface 150S of each cut semiconductor chip can be exposed. Because the stress caused by the cutting can be relatively concentrated on the side surface 150S of the semiconductor chip, cracks may form on the side surface 150S of the semiconductor chip, and these cracks may propagate into the semiconductor chip. To enable the crack sensor 200 to effectively detect cracks, the crack sensor 200 can be disposed in the scribing region 102 adjacent to the dicing line 150L. The crack sensor 200 can be arranged at various locations in the scribing region 102 while being positioned around the chip region 101.

[0022] Figure 2 This is a schematic plan view illustrating a semiconductor device 10 according to an embodiment of the present disclosure. Figure 2 Examples can be drawn from Figure 1 The semiconductor device 10W is a semiconductor device in the form of a separate semiconductor chip.

[0023] Reference Figure 1 and Figure 2 A dicing process can be performed along the dicing line 150L to separate individual semiconductor chip shapes from the semiconductor device 10W. The semiconductor device 10 may include a crack sensor 200 disposed in the scribing region 102. The crack sensor 200 may be disposed in the corner portion of the semiconductor device 10, that is, in the portion of the scribing region 102 adjacent to the rectangular corner 101C of each chip region 101. The corner portion of the semiconductor device 10 may be the portion where the dicing lines 150L intersect, such that stress can be relatively more concentrated on the corner portion of the semiconductor device 10 during the dicing process. Therefore, cracks may relatively primarily occur in the corner portion of the semiconductor device 10 or in the portion of the scribing region 102 adjacent to the corner 101C of the chip region 101. By disposing the crack sensor 200 in the portion of the scribing region 102 adjacent to the corner 101C of the chip region 101, cracks that may occur in the semiconductor device 10 can be detected more effectively.

[0024] Figure 3 This is a schematic cross-sectional view illustrating a semiconductor device 10 according to an embodiment of the present disclosure. Figure 3 Examples can be drawn from Figure 1 The semiconductor device 10W is a semiconductor device 10 in the shape of a separate semiconductor chip.

[0025] Reference Figure 3 The semiconductor device 10 may include a semiconductor substrate 100, a target layer 110, and a crack sensor 200. The target layer 110 may refer to a target from which cracks are to be detected. The target layer 110 may be formed on the semiconductor substrate 100 and may refer to a layer in which cracks may form or propagate. The target layer 110 may refer to a layer comprising multiple layers. The target layer 110 may be formed on a scribing region 102. The target layer 110 may be formed to extend from the scribing region 102 to the chip region 101. The target layer 110 may include a dielectric material layer. The target layer 110 may also include a conductive layer or a metal layer.

[0026] The crack sensor 200 can be configured to detect cracks that may appear or propagate in the target layer 110. The elements constituting the crack sensor 200 can be substantially disposed on a scribe region 102 of the semiconductor substrate 100. Each crack sensor 200 may include a first conductive pattern 270, a second conductive pattern 260, a plurality of resistors 220, 230, and 240, a first node N1, and a second node N2. The crack sensor 200 may also include an additional resistor 210.

[0027] The first conductive pattern 270 and the second conductive pattern 260 can be configured to substantially face each other and have the target layer 110 interposed between them as electrodes. Each of the first conductive pattern 270 and the second conductive pattern 260 may include a layer of conductive material. The conductive material may include a semiconductor material or a metal doped with a dopant. Each of the first conductive pattern 270 and the second conductive pattern 260 may include a metallic material, such as aluminum (Al), copper (Cu), or tungsten (W).

[0028] The first conductive pattern 270 can be formed on the bottom surface 110B of the target layer 110. The bottom surface 110B of the target layer 110 can be the surface of the target layer 110 facing the semiconductor substrate 100. Another material layer can be further interposed between the bottom surface 110B of the target layer 110 and the semiconductor substrate 100. The second conductive pattern 260 can be formed on the top surface 110T of the target layer 110. The top surface 110T of the target layer 110 can face the bottom surface 110B and have the target layer 110 interposed between them, or it can be another surface of the target layer 110 opposite to the bottom surface 110B.

[0029] The first node N1 and the second node N2 can be nodes connected to the first conductive pattern 270 and the second conductive pattern 260, respectively. A ohmmeter (not shown) can be used to measure the total resistance of resistors 210, 220, 230, and 240. The ohmmeter may include a current-voltage (IV) meter for measuring current-voltage (IV) curves. The first node N1 and the second node N2 may each include contact pads 271 and 261 that contact probes used for measuring resistance. The first contact pad 271 may be disposed on the top surface 110T of the target layer 110 to serve as the first node N1. The second contact pad 261 may be disposed on the top surface 110T of the target layer 110 to serve as the second node N2. The second contact pad 261 may include an extension or expansion of the second conductive pattern 260.

[0030] A first conductive pattern 270 may be disposed on the bottom surface 110B of the target layer 110, such that a first resistor 210 can connect the first conductive pattern 270 to the first node N1, or connect the first conductive pattern 270 to the first contact pad 271. The first resistor 210 may refer to an additional resistor connected in series with resistors 220, 230, and 240 of the crack sensor 200. The first resistor 210 may include a conductive via configured substantially through the target layer 110 to connect the first conductive pattern 270 and the first contact pad 271 to each other. The first resistor 210 may include conductive wiring or conductive patterns for connecting the first conductive pattern 270 and the first contact pad 271 to each other.

[0031] Resistors 220, 230, and 240 of the crack sensor 200 can be configured as sensing portions that substantially sense cracks. Resistors 220, 230, and 240 of the crack sensor 200 can be configured to change their total resistance value as the crack breaks due to propagation. When some or all of the resistors 220, 230, and 240 of the crack sensor 200 break during crack propagation, the total resistance value of resistors 220, 230, and 240, or the total resistance value of the crack sensor 200, can be changed. The change in the total resistance value can indicate whether a crack has occurred, allowing the crack sensor 200 to be used as a device for detecting the presence of a crack.

[0032] Resistors 220, 230, and 240 can be configured to penetrate the target layer 110 substantially vertically. Each of resistors 220, 230, and 240 can be formed as a conductive via or conductive wiring with one end connected to the first conductive pattern 270 and the other opposite end connected to the second conductive pattern 260.

[0033] Resistors 220, 230, and 240 can be configured to be connected in parallel with each other via a first conductive pattern 270 and a second conductive pattern 260. Because resistors 220, 230, and 240 are connected in parallel, different total resistance values ​​can be detected based on the degree to which resistors 220, 230, and 240 have broken due to cracks. The extent to which the crack has propagated can be determined based on the degree of change in the total resistance value. On the other hand, if resistors 220, 230, and 240 are connected in series, the total resistance value may be detected as substantially the same even if the cracks cause resistors 220, 230, and 240 to break to different degrees.

[0034] Resistors 230, 240, and 220 can be sequentially disposed away from the boundary 101S on the scribe region 102 of the semiconductor substrate 100. Resistors 230, 240, and 220 can be configured to move sequentially away from the chip region 101 on the scribe region 102 while being spaced apart from each other. Resistors 230, 240, and 220 can be configured to move sequentially away from the boundary 101S between the chip region 101 and the scribe region 102 while being spaced apart from each other. Resistors 220, 230, and 240 can be disposed between the boundary 101S of the chip region 101 and the scribe region 102 and the cut side surface 150S of the semiconductor device 10. Resistors 230, 240, and 220 can be sequentially disposed from the boundary 101S of the chip region 101 and the scribe region 102 toward the cut side surface 150S of the semiconductor device 10 and can be spaced apart from each other. The diced side surface 150S of the semiconductor device 10 may refer to the side surface of the target layer 110 and the side surface of the semiconductor substrate 100, and may be the side surface facing the boundary 101S of the chip region 101 and the scribe region 102.

[0035] Resistors 220, 230, and 240 may include a second resistor 220, a third resistor 230, and a fourth resistor 240. Further resistors may be disposed between the second resistor 220, the third resistor 230, and the fourth resistor 240. A first resistor 210 connected to the first node N1 may be disposed between the boundary 101S of the chip region 101 and the scribe region 102 and resistors 220, 230, and 240. The first resistor 210 may be disposed at a position P1 spaced a certain distance from the boundary 101S of the chip region 101 and the scribe region 102. The first resistor 210 may be disposed at a position P1 relatively close to the chip region 101. The second resistor 220 may be disposed at a position P2 closer to the cut side surface 150S of the semiconductor device 10 than the first resistor 210. The second resistor 220 may be disposed at the position P2 furthest from the boundary 101S of the chip region 101 and the scribe region 102. The third resistor 230 can be located at position P3 between the first resistor 210 and the second resistor 220, and the fourth resistor 240 can be located at position P4 between the second resistor 220 and the third resistor 230.

[0036] As described above, the first resistor 210, the third resistor 230, the fourth resistor 240, and the second resistor 220 can be arranged sequentially such that as a crack propagates from the cut side surface 150S of the semiconductor device 10 toward the chip region 101, the crack can cause the second resistor 220, the fourth resistor 240, the third resistor 230, and the first resistor 210 to break in that order. Depending on the degree of breakage of the second resistor 220, the fourth resistor 240, and the third resistor 230, the total resistance value measured by the crack sensor 200 can be measured as different resistance values. The measured total resistance value can be a factor indicating which of the second resistor 220, the fourth resistor 240, and the third resistor 230 has broken due to a crack. Thus, using the measured total resistance value, the location of the broken resistor can be identified, and therefore the location to which the crack propagation has progressed can be identified.

[0037] Resistors 210, 220, 230, and 240 can be configured to provide substantially the same resistance value. Resistors 210, 220, 230, and 240 can also be configured to provide different resistance values.

[0038] Reference Figure 1 , Figure 2 and Figure 3The resistors 210, 220, 230, and 240 of the crack sensor 200 can be disposed on the scribe region 102 of the semiconductor substrate 100 adjacent to the protective wall 101G. The resistors 210, 220, 230, and 240 of the crack sensor 200 can be disposed on the portion of the scribe region 102 of the semiconductor substrate 100 adjacent to the rectangular side of the chip region 101. The resistors 210, 220, 230, and 240 of the crack sensor 200 can be disposed on the portion of the scribe region 102 of the semiconductor substrate 100 adjacent to the rectangular corner 101C of the chip region 101.

[0039] Figure 4 This is an example Figure 3 A schematic circuit diagram of the resistance components R1, R2, R3 and R4 of the crack sensor 200 of the semiconductor device 10.

[0040] Reference Figure 3 and Figure 4 The first resistance component R1 of the first resistor 210 can be connected in series to the first node N1 of the crack sensor 200. The second resistance component R2 of the second resistor 220, the third resistance component R3 of the third resistor 230, and the fourth resistance component R4 of the fourth resistor 240 can be connected in parallel to form a crack sensing unit of the crack sensor 200 that substantially senses cracks. The second resistance component R2, the third resistance component R3, and the fourth resistance component R4 can be connected in parallel to form a first sensing resistance component Rs1, and the first sensing resistance component Rs1 can be connected in series to the first resistance component R1. The first sensing resistance component Rs1 can have a resistance value calculated based on the formula 1 / Rs1 = 1 / R2 + 1 / R3 + 1 / R4. The ohmmeter 290 can be connected to the first node N1 and the second node N2 of the crack sensor 200 to measure the first total resistance value R20 of the crack sensor 200. The first total resistance value R20 can have a resistance value calculated based on the formula R20 = Rs1 + R1.

[0041] As the crack advances, the second resistor 220, the fourth resistor 240, and the third resistor 230 can break in sequence, so that the parallel-connected sensing resistance component Rs can exhibit different resistance values ​​depending on the number of broken resistors among resistors 220, 240, and 230.

[0042] Figures 5 to 11 This is an example Figure 3 A schematic diagram of the crack sensing operation of the crack sensor 200.

[0043] Figure 5 This is a schematic cross-sectional view illustrating the state in which the second resistor 220 breaks due to a crack C1 in the semiconductor device 10A. Figure 6 This is an example Figure 5 A schematic circuit diagram 20A shows the resistive components R1, R3, and R4 of the crack sensor 200.

[0044] Reference Figure 5 and Figure 6 As crack C1 propagates inward from the cut side surface 150S, the second resistor 220, located at position P2 closest to side surface 150S, may break. When the second resistor 220 breaks, current cannot flow through it. As described above, in the state where the second resistor 220 has broken due to crack C1, the second sensing resistance component Rs2 can be calculated based on the third resistance component R3 and the fourth resistance component R4. The second sensing resistance component Rs2 can have a resistance value calculated based on the formula 1 / Rs2 = 1 / R3 + 1 / R4.

[0045] The difference between the second sensing resistance component Rs2 and the first sensing resistance component Rs1 lies in the fact that when the second resistor 220 is not broken, the second sensing resistance component Rs2 has a larger resistance value than the first sensing resistance component Rs1. Therefore, the second total resistance value R20A can exhibit a larger resistance value than the first total resistance value R20. Thus, the first sensing resistance component Rs1 in the state without crack C1 can exhibit a different resistance value compared to the second sensing resistance component Rs2 in the state where the second resistor 220 is broken due to crack C1. Because the measured total resistance values ​​R20 and R20A have different resistance values, it can be confirmed whether crack C1 has appeared at position P2 by comparing the total resistance values ​​R20 and R20A.

[0046] Figure 7 This is a schematic cross-sectional view illustrating the state in which the fourth resistor 240 breaks due to a crack C2 in the semiconductor device 10B. Figure 8 This is an example Figure 7 Schematic circuit diagram 20B of the resistive components R1 and R3 of the crack sensor 200.

[0047] Reference Figure 7 and Figure 8 As crack C2 propagates further inward from the cut side surface 150S, not only the second resistor 220 but also the fourth resistor 240 may break. The fourth resistor 240 can be positioned at a location P4 further away from the cut side surface 150S than the location P2 of the second resistor 220. The fourth resistor 240 can also be positioned closer to the chip region 101 or boundary 101S than the location P2 of the second resistor 220.

[0048] When the second resistor 220 and the fourth resistor 240 break, current cannot flow through them. Thus, in the state where the second resistor 220 and the fourth resistor 240 are broken due to crack C2, the third sensing resistance component Rs3 can be calculated as the third resistance component R3. The third sensing resistance component Rs3 can exhibit a different resistance value than the first sensing resistance component Rs1 when the second resistor 220 is not broken. The third sensing resistance component Rs3 can exhibit a different resistance value than the second sensing resistance component Rs2 when the second resistor 220 is broken but the fourth resistor 240 is not broken. The third sensing resistance component Rs3 can have a larger resistance value than the first sensing resistance component Rs1 and the second sensing resistance component Rs2. Therefore, the third total resistance value R20B can be different from the first total resistance value R20 and the second total resistance value R20A, and can exhibit a larger resistance value than the first total resistance value R20 and the second total resistance value R20A.

[0049] As described above, the first sensing resistance component Rs1 in the state without crack C1, the second sensing resistance component Rs2 in the state where the second resistor 220 is broken due to crack C1, and the third sensing resistance component Rs3 in the state where the second resistor 220 and the fourth resistor 240 are broken due to crack C2 can exhibit different resistance values. Since the measured total resistance values ​​R20, R20A, and R20B have different resistance values, by comparing the total resistance values ​​R20, R20A, and R20B, it can be confirmed whether cracks C1 and C2 have appeared at positions P2 or P4, respectively.

[0050] Figure 9 This is a schematic cross-sectional view illustrating the state in which the third resistor 230 breaks due to a crack C3 in the semiconductor device 10C. Figure 10 This is an example Figure 9 Schematic circuit diagram 20C of the resistive component of the crack sensor 200.

[0051] Reference Figure 9 and Figure 10 As crack C3 propagates further inward from the cut side surface 150S, not only the second resistor 220 and the fourth resistor 240, but also the third resistor 230 may break. The third resistor 230 can be positioned at a location P3 further away from the cut side surface 150S than the location P4 of the fourth resistor 240. The third resistor 230 can also be positioned closer to the chip region 101 or the boundary 101S than the location P4 of the fourth resistor 240.

[0052] When the second resistor 220, the fourth resistor 240, and the third resistor 230 break, current cannot flow through them. Even if crack C3 does not cause the first resistor 210 to break, because the first resistor 210 is connected in series with the second resistor 220, the fourth resistor 240, and the third resistor 230, no current flows through it. Thus, in the state where the second resistor 220, the fourth resistor 240, and the third resistor 230 are broken due to crack C3, the fourth sensing resistance component Rs4 may not function as a resistor. Unlike the first sensing resistance component Rs1, the second sensing resistance component Rs2, and the third sensing resistance component Rs3, the fourth sensing resistance component Rs4 can exhibit a substantially insulating state that cannot be measured as a specific resistance value. Therefore, the fourth total resistance value R20C can be different from the first total resistance value R20, the second total resistance value R20A, and the third total resistance value R20B, and can exhibit a substantially insulating state.

[0053] Thus, the first sensing resistance component Rs1 in the state without crack C1, the second sensing resistance component Rs2 in the state where the second resistor 220 is broken due to crack C1, the third sensing resistance component Rs3 in the state where the second resistor 220 and the fourth resistor 240 are broken due to crack C2, and the fourth sensing resistance component Rs4 in the state where the second resistor 220, the fourth resistor 240 and the third resistor 230 are broken due to crack C3 can exhibit different resistance values. Since the measured total resistance values ​​R20, R20A, R20B and R20C have different resistance values, by comparing the total resistance values ​​R20, R20A, R20B and R20C, it can be confirmed whether cracks C1, C2 and C3 have appeared at positions P2, P4 and P3, respectively.

[0054] Figure 11 This example illustrates what can be achieved by... Figure 3 A schematic diagram of the current-voltage (IV) curves of the total resistance values ​​R20, R20A, R20B and R20C sensed by the crack sensor 200.

[0055] Reference Figure 11 In such Figure 3 As shown, without the formation of crack C1, under the condition as... Figure 5 The second resistor 220 shown is broken due to crack C1, in the following condition... Figure 7 The second resistor 220 and the fourth resistor 240 shown are in a state where they are broken due to crack C2, and in the state where... Figure 9When the second resistor 220, the fourth resistor 240, and the third resistor 230 shown are broken due to crack C3, the total resistance values ​​R20, R20A, R20B, and R20C can have different resistance values ​​or can be measured with different current-voltage curves. For example... Figure 11 The current-voltage curves shown, representing the total resistance values ​​R20, R20A, R20B, and R20C, can be used as a reference to confirm whether a crack has occurred and the location of crack propagation. By comparing the measured values ​​or the measured current-voltage curves obtained through the crack sensor 200 with... Figure 11 By comparing the current-voltage curves showing the total resistance values ​​R20, R20A, R20B, and R20C, it can be confirmed where the crack has developed as the crack has occurred.

[0056] Figure 12 This is a schematic cross-sectional view illustrating a semiconductor device 10D according to another embodiment of the present disclosure. Figure 12 In the middle, by and Figure 3 Elements indicated by the same reference numerals in the accompanying drawings may indicate substantially the same elements.

[0057] Reference Figure 12 The semiconductor device 10D may include a crack sensor 200-1. The crack sensor 200-1 may include a first conductive pattern 270, a second conductive pattern 260, and a plurality of resistors 210-1, 220-1, 230-1, and 240-1. Resistors 210-1, 220-1, 230-1, and 240-1 may be configured to include different numbers of conductive vias. For example, the first resistor 210-1 and the third resistor 230-1 may be configured to include substantially the same number of conductive vias, and the second resistor 220-1 and the fourth resistor 240-1 may include a greater number of conductive vias than the third resistor 230-1. The fourth resistor 240-1 may include a smaller number of conductive vias than the second resistor 220-1.

[0058] Resistors 220-1, 230-1, and 240-1 can be configured to include different numbers of conductive vias, allowing them to have different resistance values. Because resistors 220-1, 230-1, and 240-1 have different resistance values, the difference in the total resistance values ​​that the crack sensor 200-1 can measure can increase depending on the degree of crack propagation. Simultaneously, as... Figure 3 As shown, resistors 220, 230 and 240 can be configured to include the same number of conductive vias to be configured to have the same resistance value.

[0059] Figure 13This is a schematic cross-sectional view illustrating a semiconductor device 10E according to another embodiment of the present disclosure. Figure 13 In the middle, by and Figure 3 Elements indicated by the same reference numerals in the accompanying drawings may indicate substantially the same elements.

[0060] Reference Figure 13 The semiconductor device 10E may include a crack sensor 200-2 and a target layer 110-1 as a crack detection target. The target layer 110-1 may include multiple target sublayers 111, 112, and 113. A second target sublayer 112 may be stacked on the first target sublayer 111, and a third target sublayer 113 may be stacked on the second target sublayer 112. The crack sensor 200-2 may include a first conductive pattern 270, a second conductive pattern 260, and multiple resistors 210-2, 220-2, 230-2, and 240-2. The first resistor 210-2, the second resistor 220-2, the third resistor 230-2, and the fourth resistor 240-2 may include a structure combining a conductive via 201 and a conductive land 202. The conductive via 201 may be formed as a conductive pattern that substantially penetrates the target sublayers 111, 112, and 113. The conductive base 202 can be disposed at the interface between the target sublayers 111, 112 and 113. The conductive via 201 can be connected to the conductive base 202.

[0061] Figure 14 This is a schematic cross-sectional view illustrating a semiconductor device 10F according to another embodiment of the present disclosure. Figure 14 In the middle, by and Figure 3 and Figure 13 Elements indicated by the same reference numerals in the accompanying drawings may indicate substantially the same elements.

[0062] Reference Figure 14 The semiconductor device 10F may include a crack sensor 200-3 and a target layer 110-1 as a crack detection target. The target layer 110-1 may include multiple target sublayers 111, 112, and 113. The crack sensor 200-3 may include a first conductive pattern 270, a second conductive pattern 260, and multiple resistors 210-3, 220-3, 230-3, and 240-3. The first resistor 210-3, the second resistor 220-3, the third resistor 230-3, and the fourth resistor 240-3 may include a structure combining conductive vias 201 and conductive bases. Some conductive bases 202-1 may extend to connect to adjacent resistors.

[0063] Figure 15 This is a schematic cross-sectional view illustrating a semiconductor device 10G according to another embodiment of the present disclosure. Figure 15 In the middle, by and Figure 3Elements indicated by the same reference numerals in the accompanying drawings may indicate substantially the same elements.

[0064] Reference Figure 15 The semiconductor device 10G may include a crack sensor 200-4. The crack sensor 200-4 may include a first conductive pattern 270, a second conductive pattern 260, and a plurality of resistors 210, 220, 230, and 240. The crack sensor 200-4 may also include a first contact pad 271-1 connected to a first node N1 and a second contact pad 261-1 connected to a second node N2. The first contact pad 271-1 and the second contact pad 261-1 may be disposed on a chip region of the semiconductor substrate 100. Figure 3 As shown, the first contact pad 271 and the second contact pad 261 can be disposed on the scribe region 102 of the semiconductor substrate 100. The first contact pad 271-1 and the second contact pad 261-1 can be disposed on the chip region 101 of the semiconductor substrate 100, so that compared with the case where the first contact pad 271-1 and the second contact pad 261 are disposed on the scribe region 102 of the semiconductor substrate 100, the size and position limitations of the first contact pad 271-1 and the second contact pad 261-1 can be overcome.

[0065] Resistors 210, 220, 230, and 240, as well as the first conductive pattern 270 and the second conductive pattern 260, can be disposed on the scribe region 102 of the semiconductor substrate 100, while the first contact pad 271-1 and the second contact pad 261-1 are disposed on the chip region 101. Therefore, the first extension 271-2 and the second extension 261-2 of the first contact pad 271-1 and the second contact pad 261-1, respectively, can be connected from the scribe region 102 to the chip region 101.

[0066] Figure 16 This is a schematic plan view illustrating a semiconductor device 10H according to another embodiment of the present disclosure. Figure 16 In the middle, by and Figure 3 Elements indicated by the same reference numerals in the accompanying drawings may indicate substantially the same elements.

[0067] Reference Figure 16The semiconductor device 10H may include a crack sensor 200-5. The crack sensor 200-5 may include a first conductive pattern 270-4, a second conductive pattern 260-4, and a plurality of resistors 210-4, 220-4, 230-4, and 240-4. The crack sensor 200-5 may also include a first contact pad 271-4 connected to a first node N1 and a second contact pad 261-4 connected to a second node N2. The first resistor 210-4, introduced as an additional resistor, may include a conductive via spaced apart from a third resistor 230-4, which is one of the second resistor 220-4, the third resistor 230-4, and the fourth resistor 240-4. The third resistor 230-4 and the first resistor 210-4 may be arranged side-by-side along the boundary 101S between the chip region 101 and the scribe region 102.

[0068] Figure 17 This is a block diagram illustrating an electronic system including a memory card 7800, which employs at least one of the semiconductor packages according to an embodiment. The memory card 7800 may include a memory 7810 and a memory controller 7820, such as a non-volatile memory device. The memory 7810 and the memory controller 7820 can store data or read stored data. At least one of the memory 7810 and the memory controller 7820 may include at least one of the semiconductor packages according to an embodiment.

[0069] The memory 7810 may include a non-volatile memory device to which the techniques of embodiments of the present disclosure are applied. The memory controller 7820 may control the memory 7810 such that stored data or stored data can be read in response to a read / write request from the host 7830.

[0070] Figure 18 This is a block diagram illustrating an electronic system 8710 including at least one of the semiconductor packages according to an embodiment. The electronic system 8710 may include a controller 8711, an input / output device 8712, and a memory 8713. The controller 8711, the input / output device 8712, and the memory 8713 may be interconnected via a bus 8715 providing a path for data movement.

[0071] In an embodiment, controller 8711 may include one or more microprocessors, digital signal processors, microcontrollers, and / or logic devices capable of performing the same functions as these components. Controller 8711 or memory 8713 may include at least one semiconductor package according to embodiments of this disclosure. Input / output device 8712 may include at least one selected from keypad, keyboard, display device, touchscreen, etc. Memory 8713 may be a means for storing data. Memory 8713 may store commands and / or data to be executed by controller 8711.

[0072] The memory 8713 may include volatile memory devices such as DRAM and / or non-volatile memory devices such as flash memory. For example, flash memory can be installed in information processing systems such as mobile terminals or desktop computers. Flash memory can constitute a solid-state drive (SSD). In this case, the electronic system 8710 can stably store large amounts of data in the flash memory system.

[0073] The electronic system 8710 may also include an interface 8714 configured to send data to and receive data from a communication network. The interface 8714 may be of wired or wireless type. For example, the interface 8714 may include an antenna, or a wired or wireless transceiver.

[0074] The electronic system 8710 can be implemented as a mobile system, a personal computer, an industrial computer, or a logical system performing various functions. For example, a mobile system can be any of a personal digital assistant (PDA), a portable computer, a tablet computer, a mobile phone, a smartphone, a cordless phone, a laptop computer, a memory card, a digital music system, and an information sending / receiving system.

[0075] If the electronic system 8710 is a device capable of performing wireless communication, then the electronic system 8710 can be used in communication systems using technologies such as CDMA (Code Division Multiple Access), GSM (Global System for Mobile Communications), NADC (North American Digital Cellular), E-TDMA (Enhanced Time Division Multiple Access), WCDMA (Wideband Code Division Multiple Access), CDMA2000, LTE (Long Term Evolution), or Wibro (Wireless Broadband Internet).

[0076] The concept of the invention has been disclosed in conjunction with some embodiments described above. Those skilled in the art will understand that various modifications, additions, and substitutions are possible without departing from the scope and spirit of this disclosure. Therefore, the embodiments disclosed in this specification should be considered from an exemplary perspective rather than a restrictive one. The scope of the inventive concept is not limited to the foregoing description, but is defined by the appended claims, and all distinguishing features within the equivalent scope should be interpreted as being included in the inventive concept.

[0077] Cross-references to related applications

[0078] This application claims priority to Korean Application No. 10-2021-0136148, filed on October 13, 2021, which is incorporated herein by reference in its entirety.

Claims

1. A semiconductor device, the semiconductor device comprising: A substrate, the substrate including a chip region and a scribe region; Target layer, the target layer being disposed on the substrate; as well as A crack sensor for detecting cracks generated in the target layer. The crack sensor includes: A first conductive pattern is located on the bottom surface of the target layer; A second conductive pattern is located on the top surface of the target layer, and the top surface is opposite to the bottom surface of the target layer. A plurality of resistors extending through the target layer and connected in parallel to each other via a first conductive pattern and a second conductive pattern; and A first node and a second node are respectively connected to the first conductive pattern and the second conductive pattern. The target layer and the substrate have cut side surfaces facing the boundary between the chip region and the scribe region. The plurality of resistors are spaced apart from each other sequentially between the boundary between the chip region and the scribe region and the cut side surface, and The plurality of resistors break sequentially as the crack propagates from the cut side surface toward the chip region, such that the total resistance value measured between the first node and the second node varies depending on which of the plurality of resistors break, and the total resistance value indicates the location of the crack propagation.

2. The semiconductor device according to claim 1, wherein, Each of the plurality of resistors provides the same resistance value.

3. The semiconductor device according to claim 2, wherein, Each of the plurality of resistors corresponds to the same number of conductive vias penetrating the target layer.

4. The semiconductor device according to claim 1, wherein, The multiple resistors provide different resistance values ​​for each other.

5. The semiconductor device according to claim 4, wherein, The plurality of resistors correspond to different numbers of conductive vias penetrating the target layer.

6. The semiconductor device according to claim 1, wherein, Each of the plurality of resistors corresponds to a conductive via or conductive wiring that penetrates the target layer.

7. The semiconductor device according to claim 1, wherein, The target layer includes multiple target sub-layers, and The resistor includes a conductive base disposed at the interface of the target sublayer and a conductive via penetrating the target sublayer.

8. The semiconductor device according to claim 7, wherein, Some extensions of the conductive base are used to connect adjacent resistors.

9. The semiconductor device according to claim 1, further comprising: An additional resistor extends through the target layer to connect the first conductive pattern to the first node.

10. The semiconductor device according to claim 9, wherein, The additional resistor includes a conductive via disposed between the boundary between the chip region and the scribe region and the resistor.

11. The semiconductor device according to claim 9, wherein, The additional resistor includes a conductive via, which is configured to be parallel to and spaced apart from one of the plurality of resistors along the boundary between the chip region and the scribe region.

12. The semiconductor device according to claim 1, wherein, The first node and the second node are disposed on the chip region of the substrate, or on the scribe region of the substrate.

13. The semiconductor device of claim 1, further comprising a protective wall that penetrates a portion of the target layer over the chip region. in, The plurality of resistors are disposed on the portion of the scribe line region of the substrate adjacent to the protective wall.

14. The semiconductor device according to claim 1, in, The chip region of the substrate includes a rectangular region, and The plurality of resistors are disposed on the portion of the scribe area of ​​the substrate adjacent to the side of the rectangular shape.

15. The semiconductor device according to claim 1, in, The chip region of the substrate includes a rectangular region, and The plurality of resistors are disposed on the portion of the scribed region of the substrate adjacent to the corner of the rectangular shape.

16. A semiconductor device comprising: Target layer, wherein the target layer is disposed on the substrate; as well as A crack sensor for detecting cracks generated in the target layer. The crack sensor includes: A first conductive pattern is located on the bottom surface of the target layer; A second conductive pattern is located on the top surface of the target layer, and the top surface is opposite to the bottom surface of the target layer. Multiple resistors, the multiple resistors extending through the target layer, and the multiple resistors connected in parallel to each other via the first conductive pattern and the second conductive pattern; and A first node and a second node are respectively connected to the first conductive pattern and the second conductive pattern. The target layer and the substrate have cut side surfaces facing the boundary between the chip region and the scribe region. The plurality of resistors are spaced apart from each other sequentially between the boundary between the chip region and the scribe region and the cut side surface, and The plurality of resistors break sequentially as the crack propagates from the cut side surface toward the chip region, such that the total resistance value measured between the first node and the second node varies depending on which of the plurality of resistors break, and the total resistance value indicates the location of the crack propagation.

17. The semiconductor device according to claim 16, wherein, Each of the plurality of resistors provides the same resistance value.

18. The semiconductor device according to claim 16, wherein, The multiple resistors provide different resistance values ​​for each other.

19. The semiconductor device according to claim 18, wherein, The plurality of resistors correspond to different numbers of conductive vias penetrating the target layer.

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