Cmos device back end interconnect structure and method of forming the same
CN115966552BActive Publication Date: 2026-07-24SEMICON MFG INT (SHANGHAI) CORP +1
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Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SEMICON MFG INT (SHANGHAI) CORP
- Filing Date
- 2021-10-12
- Publication Date
- 2026-07-24
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Figure CN115966552B_ABST
Abstract
A CMOS device back-end interconnect structure and a method of forming the same. The CMOS device back-end interconnect structure includes: a substrate having a conductive layer therein, and the substrate exposes a top surface of the conductive layer; a dielectric structure on the substrate; a contact hole in the dielectric structure, the contact hole exposes the top surface of the conductive layer; a protective layer on the top surface of the conductive layer; and a conductive plug in the contact hole, the conductive plug is electrically connected with the protective layer. The protective layer is used to reduce etching damage to the conductive layer during cleaning process, so that the height of the conductive layer remains unchanged, thereby reducing the increase of the aspect ratio of the contact hole. The material used to form the conductive plug can be fully deposited to the bottom of the contact hole, so that the electrical contact between the conductive plug and the conductive layer is improved, thereby improving the performance of the finally formed semiconductor structure.
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