An audio power amplifier and electronic device

CN115967358BActive Publication Date: 2026-10-30SHANGHAI AWINIC TECH CO LTD
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Patent Information

Application Number
CN202310071409.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-01-13
Publication Date
2026-10-30
Estimated Expiration
2043-01-13

AI Technical Summary

Technical Problem

这种情况下,如果环路内部存在失配,则会对输出端造成杂音(例如POP音),影响用户体验

Benefits of technology

[0030]本申请提供的电子设备,包括上述第一方面和/或第一方面的任意一种可能的实现方式所提供的音频功率放大器,因此也能实现第一方面提供的音频功率放大器所具备的有益效果(或优点)。

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses an audio power amplifier, a common-mode voltage submodule is used for providing a first voltage to a power amplifier loop submodule, the first voltage is a voltage related to an output stage level voltage of the power amplifier loop submodule in a first working mode; a current source submodule is used for providing a first current to the power amplifier loop submodule in a second working mode of the power amplifier loop submodule, and not providing the first current to the power amplifier loop submodule in the first working mode of the power amplifier loop submodule. In this way, in the second working mode, the common-mode voltage submodule provides a larger voltage to the power amplifier loop submodule, improves a common-mode voltage margin of the power amplifier loop submodule, and with the first voltage not being switched along with the working mode, can reduce output end noise and improve user experience. And the current source submodule inputs the first current to the power amplifier loop submodule, ensures stability and normal working of the loop. The application also discloses an electronic device.
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Description

Technical Field

[0001] This application relates to the field of audio power amplifier technology, and in particular to an audio power amplifier and electronic device. Background Technology

[0002] For audio power amplifiers, such as CLASSD amplifiers, in a typical CLASSD loop, the common-mode voltage (or common-mode reference voltage, or common-mode level, etc.) VCOM1 of the first-stage integrator A1 is usually set to, for example, Vx / 2, where Vx is the output stage level voltage (or output stage power supply voltage, etc.) corresponding to the first-stage integrator A1. Therefore, for a multi-rail CLASSD loop, when the output stage operates in High Voltage (HV) mode, VCOM1 needs to be set to VH / 2 (VH represents the output stage level voltage in HV mode). When the output stage operates in Low Voltage (LV) mode, VCOM1 needs to be set to VL / 2 (VL represents the output stage level voltage in LV mode).

[0003] In a multi-rail CLASSD loop, VCOM1 needs to be switched as the output stage's operating mode changes. In this case, if a mismatch exists within the loop, it will cause noise (such as popping sounds) at the output, affecting the user experience. Additionally, when the multi-rail CLASSD loop's output stage operates in LV mode, since VCOM1's voltage is LV / 2, which is relatively low, there is also the issue of low voltage margin for VCOM1. Summary of the Invention

[0004] This application provides an audio power amplifier and electronic device that can improve the voltage margin of the audio power amplifier and reduce output noise, thereby enhancing the user experience.

[0005] To address the aforementioned technical problems, in a first aspect, embodiments of this application provide an audio power amplifier, comprising: a first module and a second module. The first module includes a current source submodule, and the second module includes a power amplifier loop submodule and a common-mode voltage submodule. The common-mode voltage submodule provides a first voltage to the power amplifier loop submodule, the first voltage being a voltage related to the output stage level voltage of the power amplifier loop submodule in a first operating mode. The current source submodule provides a first current to the power amplifier loop submodule when the power amplifier loop submodule is in a second operating mode, and does not provide the first current to the power amplifier loop submodule when the power amplifier loop submodule is in the first operating mode. The second operating mode is an operating mode where the output stage level voltage is lower than the output stage level voltage in the first operating mode.

[0006] In this implementation, since the first voltage provided by the common-mode voltage submodule to the power amplifier loop submodule is related to the output stage level voltage of the power amplifier loop submodule in the first operating mode, even in the second operating mode, the common-mode voltage submodule can still provide a larger voltage, effectively improving the voltage margin of the common-mode voltage corresponding to the power amplifier loop submodule, i.e., the voltage margin of the common-mode voltage corresponding to the power amplifier loop submodule is wider. Furthermore, the first voltage is not switched with the operating mode change, which reduces output noise and improves the user experience. In the second operating mode, the current source submodule inputs a first current to the power amplifier loop submodule for current compensation, ensuring loop stability and normal loop operation.

[0007] In one possible implementation of the first aspect described above, the common-mode voltage submodule provides a first voltage to the second input terminal of the power amplifier loop submodule, which is the non-inverting input terminal (i.e., VCOM1 terminal) of the first-stage integrator included in the power amplifier loop submodule. Therefore, the audio power amplifier provided by this implementation can effectively improve the voltage margin of VCOM1, i.e., the voltage margin of VCOM1 is wider.

[0008] In one possible implementation of the first aspect described above, the first voltage is one-nth of the output stage level voltage of the power amplifier loop submodule in the first operating mode.

[0009] In one possible implementation of the first aspect described above, n is 2 or 3. Of course, n can also be set to other values ​​as needed.

[0010] In one possible implementation of the first aspect described above, the second module further includes a feedback submodule, wherein the first current generated by the current source submodule is determined based on the output stage level voltage in the first operating mode, the output stage level voltage in the second operating mode, and the resistance value of the feedback resistor corresponding to the feedback submodule.

[0011] In one possible implementation of the first aspect described above, the current source submodule includes a first resistor and is used to connect to a first voltage supply terminal and a second voltage supply terminal, wherein the first current is determined based on the voltage of the first voltage supply terminal, the voltage of the second voltage supply terminal, and the resistance value of the first resistor.

[0012] In this way, the current source submodule can provide current to the power amplifier loop submodule for current compensation, so that the loop can work normally.

[0013] In one possible implementation of the first aspect described above, the second module further includes a feedback submodule, wherein the current source submodule includes a first resistor, the resistance value of which is related to the resistance value of the feedback resistor corresponding to the feedback submodule.

[0014] In one possible implementation of the first aspect above, if the first voltage is half of the output stage level voltage of the power amplifier loop submodule in the first operating mode, the feedback submodule includes a fifth resistor, which serves as a feedback resistor, and the resistance value of the first resistor is twice the resistance value of the fifth resistor; if the first voltage is one-third of the output stage level voltage of the power amplifier loop submodule in the first operating mode, the feedback submodule includes a sixth resistor and a seventh resistor, the resistance value of the seventh resistor is twice the resistance value of the sixth resistor, and the sixth and seventh resistors serve as feedback resistors.

[0015] In one possible implementation of the first aspect above, if the first voltage is half of the output stage level voltage of the power amplifier loop submodule in the first operating mode, the magnitude of the current generated by the current source submodule (i.e., the first current) Isource = (VH - VL) / (2 * RFB), where VH is the output stage level voltage in the first operating mode, VL is the output stage level voltage in the second operating mode, and RFB is the resistance value of the fifth resistor; or the first current Isource = (DVDD - VBAT) / (2 * RFB), where DVDD is the voltage of the first voltage supply terminal connected to the current source submodule, and VBAT is the voltage of the second voltage supply terminal connected to the current source submodule.

[0016] In one possible implementation of the first aspect mentioned above, the first operating mode is a high-voltage mode and the second operating mode is a low-voltage mode.

[0017] In one possible implementation of the first aspect described above, the first module further includes a switching submodule, the output terminal of the current source submodule is connected to the first terminal of the switching submodule, the second terminal of the switching submodule is connected to the first input terminal of the power amplifier loop submodule, the switching submodule is used to be in a conducting state when the power amplifier loop submodule is in a second operating mode, so as to input the first current generated by the current source submodule to the power amplifier loop submodule, and the switching submodule is in a non-conducting state when the power amplifier loop submodule is in a first operating mode, the output terminal of the common-mode voltage submodule is connected to the second input terminal of the power amplifier loop submodule, and the voltage at the output terminal of the common-mode voltage submodule is the first voltage.

[0018] In one possible implementation of the first aspect described above, the switching submodule switches to an on / off state based on the operating mode enable switch of the power amplifier loop submodule. Specifically, if the power amplifier loop submodule operates in the first operating mode, the power amplifier loop submodule operating mode enable switch is in the first operating mode state, and the switching submodule is not on (i.e., in a non-conducting state). If the power amplifier loop submodule operates in the second operating mode, the power amplifier loop submodule operating mode enable switch is in the second operating mode state, and the switching submodule is on (i.e., in a conducting state).

[0019] In one possible implementation of the first aspect above, the switch submodule includes a first switch, with a first end of the first switch serving as the first end of the switch submodule and a second end of the first switch serving as the second end of the switch submodule.

[0020] In one possible implementation of the first aspect described above, the current source submodule includes an operational amplifier unit, a resistor unit, and a field-effect transistor (FET) unit. The operational amplifier unit includes an operational amplifier; the resistor unit includes a first resistor, a second resistor, a third resistor, and a fourth resistor; the FETs include a first FET, a second FET, a third FET, a fourth FET, a fifth FET, a sixth FET, and a seventh FET. The inverting input terminal of the operational amplifier is connected to a first power supply terminal; the non-inverting input terminal of the operational amplifier is connected to a first terminal of the first resistor and the drain of the sixth FET; the second terminal of the first resistor is connected to the first terminals of the second, third, and fourth resistors, and is also connected to a second power supply terminal; the second terminal of the second resistor is connected to the source of the third FET; and the second terminal of the third resistor is connected to the source of the fourth FET. The source of the field-effect transistor is connected; the second terminal of the fourth resistor is connected to the source of the fifth field-effect transistor; the gates of the third, fourth, and fifth field-effect transistors are connected; the drain of the third field-effect transistor is connected to the gate of the third field-effect transistor and the drain of the seventh field-effect transistor, respectively; the drain of the fourth field-effect transistor serves as the second output terminal of the current source submodule; the drain of the fifth field-effect transistor serves as the first output terminal of the current source submodule; the output terminal of the operational amplifier is connected to the gate of the first field-effect transistor; the gates of the first and second field-effect transistors are connected; the sources of the first and second field-effect transistors are connected and grounded; the drain of the first field-effect transistor is connected to the source of the sixth field-effect transistor; the drain of the second field-effect transistor is connected to the source of the seventh field-effect transistor; and the gates of the sixth and seventh field-effect transistors are connected.

[0021] In this way, current can be easily supplied to the power amplifier loop submodule, enabling the loop to operate normally.

[0022] In one possible implementation of the first aspect described above, the second module further includes a feedback submodule, the first end of which is connected to the first input end of the power amplifier loop submodule, and the second end of which is connected to the output end of the power amplifier loop submodule.

[0023] In one possible implementation of the first aspect above, if the first voltage is half of the output stage level voltage of the power amplifier loop submodule in the first operating mode, the feedback submodule includes a fifth resistor, the first end of the fifth resistor serves as the first end of the feedback submodule, and the second end of the fifth resistor serves as the second end of the feedback submodule; if the first voltage is one-third of the output stage level voltage of the power amplifier loop submodule in the first operating mode, the feedback submodule includes a sixth resistor and a seventh resistor, the first end of the sixth resistor serves as the first end of the feedback submodule, the second end of the sixth resistor serves as the second end of the feedback submodule, the first end of the seventh resistor is connected to the first end of the sixth resistor, and the second end of the seventh resistor is grounded.

[0024] In one possible implementation of the first aspect described above, the power amplifier loop submodule includes a first integrator, a second integrator, a comparator, a first capacitor, a second capacitor, an eighth resistor, a driver unit, an eighth field-effect transistor, a ninth field-effect transistor, a tenth field-effect transistor, and a second switch. The first integrator is the first-stage integrator of the power amplifier loop submodule. The inverting input of the first integrator serves as the first input of the corresponding power amplifier loop submodule, and the non-inverting input of the first integrator serves as the second input of the corresponding power amplifier loop submodule. The first terminal of the first capacitor is connected to the inverting input of the first integrator, and the second terminal of the first capacitor is connected to the output of the first integrator and the inverting input of the comparator. The first terminal of the eighth resistor is connected to the output of the first integrator, and the second terminal of the eighth resistor is connected to the first terminal of the second capacitor and the inverting input of the second integrator. The second terminal of the second capacitor is connected to the non-inverting input of the comparator and the second integrator. The output of the second integrator is connected to the output of the third integrator, which is connected to the non-inverting input of the comparator. The non-inverting input of the second integrator serves as the third input of the power amplifier loop submodule and is used to connect to the common-mode voltage submodule corresponding to the second integrator. The output of the comparator is connected to the first terminal of the driver unit. The second terminal of the driver unit is connected to the gate of the eighth field-effect transistor. The third terminal of the driver unit is connected to the gate of the ninth field-effect transistor. The source of the eighth field-effect transistor is connected to the corresponding first operating mode power supply terminal. The gate of the eighth field-effect transistor is connected to the gate of the tenth field-effect transistor. The drain of the eighth field-effect transistor is connected to the drain of the ninth field-effect transistor and is connected to the first terminal of the second switch and the corresponding voltage output terminal. The source of the ninth field-effect transistor is grounded. The source of the tenth field-effect transistor is connected to the corresponding second operating mode power supply terminal. The drain of the tenth field-effect transistor is connected to the second terminal of the second switch. The voltage output terminal is used to connect to the speaker.

[0025] In one possible implementation of the first aspect described above, the second module further includes a digital-to-analog converter submodule, the input terminal of which serves as a signal input terminal for receiving pulse signals, and the output terminal of which is connected to the first input terminal of the power amplifier loop submodule.

[0026] In one possible implementation of the first aspect above, the digital-to-analog conversion submodule includes a first current source, a second current source, a third switch, and a fourth switch, wherein the input terminal of the first current source is connected to the third voltage supply terminal, the output terminal of the first current source is connected to the first terminal of the third switch, the second terminal of the third switch is connected to the first terminal of the fourth switch, the second terminal of the fourth switch is connected to the input terminal of the second current source, the output terminal of the second current source is grounded, and the connection terminal between the second terminal of the third switch and the first terminal of the fourth switch serves as the output terminal of the corresponding digital-to-analog conversion submodule.

[0027] In one possible implementation of the first aspect described above, the audio power amplifier includes two second modules. One second module includes a first digital-to-analog converter submodule, a first power amplifier loop submodule, a first common-mode voltage submodule, and a first feedback submodule. The other second module includes a second digital-to-analog converter submodule, a second power amplifier loop submodule, a second common-mode voltage submodule, and a second feedback submodule. A switching submodule includes a first switching submodule and a second switching submodule. A current source submodule includes a first output terminal and a second output terminal. The output terminal of the first digital-to-analog converter submodule is connected to the first input terminal of the first power amplifier loop submodule. The output terminal of the first common-mode voltage submodule is connected to the second input terminal of the first power amplifier loop submodule. The first terminal of the first feedback submodule is connected to the first input terminal of the first power amplifier loop submodule, and the second terminal of the first feedback submodule is connected to the output terminal of the first power amplifier loop submodule. The output terminal of the second digital-to-analog converter submodule is connected to the first input terminal of the second power amplifier loop submodule, and the output terminal of the second common-mode voltage submodule is connected to the second input terminal of the second power amplifier loop submodule. The first terminal of the second feedback submodule is connected to the first input terminal of the second power amplifier loop submodule. The first input terminal of the second feedback submodule is connected to the first input terminal of the second power amplifier loop submodule, and the second terminal of the second feedback submodule is connected to the output terminal of the second power amplifier loop submodule. The first output terminal of the current source submodule is connected to the first terminal of the first switch submodule, and the second terminal of the first switch submodule is connected to the first input terminal of the first power amplifier loop submodule. The first switch submodule is used to be in a conducting state when the first power amplifier loop submodule is in a second operating mode, so as to input the first current generated by the current source submodule to the first power amplifier loop submodule. The first switch submodule is also in a non-conducting state when the first power amplifier loop submodule is in a first operating mode. The second output terminal of the current source submodule is connected to the first terminal of the second switch submodule, and the second terminal of the second switch submodule is connected to the first input terminal of the second power amplifier loop submodule. The second switch submodule is used to be in a conducting state when the second power amplifier loop submodule is in a second operating mode, so as to input the first current generated by the current source submodule to the second power amplifier loop submodule. The second switch submodule is also in a non-conducting state when the second power amplifier loop submodule is in a first operating mode.

[0028] Secondly, embodiments of this application provide an electronic device including the aforementioned audio power amplifier.

[0029] In one possible implementation of the second aspect described above, the electronic device may also include other components, which may be configured as needed.

[0030] The electronic device provided in this application includes the audio power amplifier provided by the first aspect and / or any possible implementation of the first aspect, and therefore can also achieve the beneficial effects (or advantages) of the audio power amplifier provided by the first aspect. Attached Figure Description

[0031] To more clearly illustrate the technical solution of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below.

[0032] Figure 1A and Figure 1B The present invention provides some structural schematic diagrams of an audio power amplifier according to some embodiments thereof.

[0033] Figure 2 This is a schematic diagram of the structure of another audio power amplifier provided in this application, according to some embodiments of this application;

[0034] Figures 3A-3F The following are some structural schematic diagrams of another audio power amplifier provided in this application, according to some embodiments of this application;

[0035] Figure 4 According to some embodiments of this application, a waveform diagram of the charging and discharging of capacitor C1 in a multi-power rail CLASSD loop is shown.

[0036] Figure 5 This is a schematic diagram of another audio power amplifier provided in this application, according to some embodiments of the present application;

[0037] Figure 6 This is a schematic diagram of the structure of an electronic device provided in this application, according to some embodiments of this application. Detailed Implementation

[0038] The technical solution of this application will be described in further detail below with reference to the accompanying drawings.

[0039] This application provides an audio power amplifier, such as a multi-rail CLASSD loop audio power amplifier. Figure 1A As shown, the audio power amplifier includes a power amplifier loop submodule and a common-mode voltage submodule. The output terminal of the common-mode voltage submodule is connected to one input terminal of the power amplifier loop submodule to provide voltage to the power amplifier loop submodule.

[0040] Furthermore, such as Figure 1B As shown, the power amplifier loop submodule includes an integrator A1 (i.e., the first-stage integrator A1), a power supply terminal VH for HV mode, a power supply terminal VL for LV mode, and other components such as capacitors and resistors. The non-inverting input terminal (VCOM1, the "+" terminal) of integrator A1 is connected to the common-mode voltage submodule as one of the input terminals of the power amplifier loop submodule.

[0041] As mentioned earlier, in a multi-rail CLASSD loop, when the output stage operates in HV mode, due to the higher HV power supply voltage, VCOM1 needs to be set to HV / 2. Conversely, when the output stage operates in LV mode, due to the lower LV power supply voltage, VCOM1 needs to be set to LV / 2. In a multi-rail CLASSD loop, when the output stage operates in LV mode, the large voltage difference between the LV and HV power supply voltages, and the fact that VCOM1 is typically equal to Vx / 2, necessitates switching VCOM1 when the output stage enters or exits the loop, or when switching operating modes. In this situation, if a mismatch exists within the loop, it can cause noise at the output, such as popping sounds. In addition, the low VL / 2 poses a challenge to the input stage voltage margin of the CLASSD loop input IDAC (i.e., current-to-analog converter) and integrator A1, and there is also the problem of low voltage margin of VCOM1.

[0042] Based on this, this application provides an audio power amplifier in which the voltage at the non-inverting input (VCOM1) of the integrator A1 (i.e., the first-stage integrator) is set to a voltage (as an example of a first voltage) related to the output stage level voltage (VH) in HV mode (as an example of a first operating mode), for example, VH / 2. That is, the common-mode voltage submodule corresponding to integrator A1 provides a voltage related to the output stage level voltage (VH) in HV mode to integrator A1. Furthermore, VCOM1 remains unchanged at VH / 2 in both HV mode and LV mode (as an example of a second operating mode). This ensures that the common-mode voltage VCOM1 of integrator A1 remains VH / 2 before and after mode switching in the multi-rail CLASSD loop.

[0043] Thus, on the one hand, due to the larger VH / 2, the voltage margin at point VCOM1 is wider when the LV output stage of the multi-power rail CLASSD loop operates in LV mode. On the other hand, during the output stage mode switching process of the multi-power rail CLASSD loop, it is not necessary to switch the VCOM1 voltage, ensuring that the voltage at the VCOM1 terminal does not change with the switching between HV and LV modes. This effectively reduces noise such as popping sounds caused during the output stage mode switching process of the multi-power rail CLASSD loop.

[0044] In this implementation, the structure of the common-mode voltage submodule can be set as needed, for example, it can include electronic devices such as resistors and capacitors, so as to achieve the purpose of the common-mode voltage submodule output voltage of VH / 2.

[0045] However, if only VCOM1 is set to VH / 2, the multi-rail CLASSD loop itself cannot be stably established, and the loop cannot function properly. Therefore, if... Figure 2 As shown, the audio power amplifier provided in this application also includes a current source submodule. The current source submodule provides Isource current (as an example of a first current) to the power amplifier loop submodule when it is in LV mode, and does not provide Isource current to the power amplifier loop submodule when it is in HV mode.

[0046] In this way, Isource current can be provided to the multi-power rail CLASSD loop through the current source submodule for current compensation, which can ensure the stability of the multi-power rail CLASSD loop and ensure its normal operation.

[0047] In summary, the audio power amplifier provided in this application ensures that the VCOM1 voltage of integrator A1 remains at VH / 2 even when the multi-power-rail CLASSD loop is in LV mode at the output stage. This allows the common-mode level VCOM1 of integrator A1 to remain at VH / 2 before and after the output stage mode switching of the multi-power-rail CLASSD loop. On one hand, this provides a wider voltage margin at VCOM1 when the output stage of the multi-power-rail CLASSD loop is in LV mode (i.e., when the output stage is in LV output mode), effectively improving the design voltage margin of VCOM1. On the other hand, during the output stage mode switching process of the multi-power-rail CLASSD loop (i.e., the switching from HV mode to LV mode), there is no need to switch the VCOM1 voltage, thereby effectively reducing noise such as popping sounds caused during the output stage mode switching process, providing better sound quality, and thus improving the user experience. On the other hand, the Isource current can be provided to the multi-power rail CLASSD loop through the current source submodule, which can ensure the stability of the multi-power rail CLASSD loop and ensure its normal operation.

[0048] Furthermore, in one implementation of this application, such as Figure 3A As shown, the audio power amplifier provided in this application includes a first digital-to-analog converter submodule 110, a first power amplifier loop submodule 120, a first common-mode voltage submodule 130, and a first feedback submodule 140, and also includes a second digital-to-analog converter submodule 210, a second power amplifier loop submodule 220, a second common-mode voltage submodule 230, and a second feedback submodule 240.

[0049] The input terminals of the first digital-to-analog converter submodule 110 and the second digital-to-analog converter submodule 210 are respectively used as signal input terminals to receive pulse signals (PWM). IN (i.e., digital signal), the first digital-to-analog converter submodule 110 and the second digital-to-analog converter submodule 210 are used to convert the received digital signal into a corresponding analog signal, which is then input to the corresponding power amplifier loop submodule. Pulse signal PWM IN The signal is generated by a digital module (e.g., a pulse width modulation (PWM) device). The generation process and related structures can be found in existing technologies. The implementation in this application uses a pulse signal PWM... IN The generation process and related structures will not be explained in detail.

[0050] The output terminal of the first digital-to-analog converter submodule 110 is connected to the first input terminal of the first power amplifier loop submodule 120. The output terminal of the first power amplifier loop submodule 120 is connected to the speaker S as a voltage output terminal. The output terminal of the first common-mode voltage submodule 130 is connected to the second input terminal of the first power amplifier loop submodule 120. The first terminal of the first feedback submodule 140 is connected to the first input terminal of the first power amplifier loop submodule 120. The second terminal of the first feedback submodule 140 is connected to the output terminal of the first power amplifier loop submodule 120.

[0051] The output terminal of the second digital-to-analog converter submodule 210 is connected to the first input terminal of the second power amplifier loop submodule 220. The output terminal of the second power amplifier loop submodule 220 is connected to the speaker as another voltage output terminal. The output terminal of the second common-mode voltage submodule 230 is connected to the second input terminal of the second power amplifier loop submodule 220. The first terminal of the second feedback submodule 240 is connected to the first input terminal of the second power amplifier loop submodule 220. The second terminal of the second feedback submodule 240 is connected to the output terminal of the second power amplifier loop submodule 220.

[0052] Furthermore, such as Figure 3B As shown, the first digital-to-analog conversion submodule 110 and the second digital-to-analog conversion submodule 210 each include a current source I. PWM (As an example of a first current source), Current Source I PWM (as an example of a second current source), switch K3 (as an example of a third switch), and switch K4 (as an example of a fourth switch). Wherein, current source I... PWM The input terminal is connected to the third voltage supply terminal (e.g., the power supply terminal for DVDD), and the current source I... PWM The output terminal of switch K3 is connected to the first terminal (i.e., the input terminal) of switch K3, and the second terminal (i.e., the output terminal) of switch K3 is connected to the first terminal (i.e., the input terminal) of switch K4. The second terminal (i.e., the output terminal) of switch K4 is connected to the current source I.PWM The input terminal is connected to the current source I. PWM The output terminal of switch K3 is grounded. The connection between the second terminal of switch K3 and the first terminal of switch K4 serves as the output terminal of the corresponding digital-to-analog converter submodule, used to connect to the first input terminal of the corresponding power amplifier loop submodule. Additionally, the control terminals of switches K3 and K4 serve as the input terminals of the corresponding digital-to-analog converter submodules, used to receive PWM pulse signals. IN .

[0053] The first power amplifier loop submodule 120 and the second power amplifier loop submodule 220 respectively include an integrator A1 (i.e., a first-stage integrator, as an example of a first integrator), an integrator A2 (i.e., a second-stage integrator, as an example of a second integrator), a comparator COMP, a capacitor C1 (as an example of a first capacitor), a capacitor C2 (as an example of a second capacitor), a resistor R2 (as an example of an eighth resistor), a drive unit D, a field-effect transistor M8 (as an example of an eighth field-effect transistor), a field-effect transistor M9 (as an example of a ninth field-effect transistor), a field-effect transistor M10 (as an example of a tenth field-effect transistor), and a switch K5 (as an example of a second switch).

[0054] In this circuit, the inverting input terminal (i.e., the first input terminal, "-") of integrator A1 serves as the first input terminal of the corresponding power amplifier loop submodule, and is used to connect to the output terminal of the corresponding digital-to-analog converter submodule. The non-inverting input terminal (i.e., the second input terminal, "+", or VCOM1 terminal) of integrator A1 serves as the second input terminal of the corresponding power amplifier loop submodule, and is used to connect to the output terminal of the corresponding common-mode voltage submodule.

[0055] The first terminal of capacitor C1 is connected to the inverting input terminal of integrator A1, and the second output terminal of capacitor C1 is connected to the output terminal of integrator A1 and the inverting input terminal (i.e., the first input terminal, "-") of comparator COMP. Capacitor C1 can thus generate Ip. c1 The current and the corresponding voltage are VC1.

[0056] The first end of resistor R2 is connected to the output of integrator A1. The second end of resistor R2 is connected to the first end of capacitor C2 and the inverting input (i.e., the first input, "-") of integrator A2. The second end of capacitor C2 is connected to the non-inverting input (i.e., the second input, "+") of comparator COMP and the output of integrator A2.

[0057] The output of integrator A2 is connected to the non-inverting input (i.e., the second input, "+") of comparator COMP. The non-inverting input (i.e., the second input, "+", or VCOM2) of integrator A2 serves as the third input of the corresponding power amplifier loop submodule and is used to connect to the common-mode voltage submodule corresponding to integrator A2.

[0058] The output of comparator COMP is connected to the first terminal of driver unit D, the second terminal of driver unit D is connected to the gate of field-effect transistor M8, and the third terminal of driver unit D is connected to the gate of field-effect transistor M9. The structure of the driver unit can be configured as needed.

[0059] The source of MOSFET M8 is connected to the corresponding first operating mode power supply terminal (i.e., the high voltage (VH) terminal), the gate of MOSFET M8 is connected to the gate of MOSFET M10, the drain of MOSFET M8 is connected to the drain of MOSFET M9, and is also connected to the first terminal of switch K5 and the corresponding output stage voltage output terminal (e.g., the first terminal of switch K5 in the first power amplifier loop submodule 120 is connected to VH). OP The output terminal is connected, and the first terminal of switch K5 in the second power amplifier loop submodule 220 is connected to V. O The output stage voltage output terminal is connected to the speaker S, driving the speaker S to output a signal. The source of MOSFET M9 is grounded, the source of MOSFET M10 is connected to the corresponding second operating mode power supply terminal (i.e., the low voltage (VL) terminal), and the drain of MOSFET M10 is connected to the second terminal of switch K5. Among them, MOSFETs M8 and M10 are P-type MOSFETs, and MOSFET M9 is an N-type MOSFET.

[0060] The structures of the first common-mode voltage submodule 130 and the second common-mode voltage submodule 230 can be configured as needed to provide the corresponding common-mode voltage to the corresponding power amplifier loop submodule.

[0061] The first feedback submodule 140 and the second feedback submodule 240 each include a resistor R. FB (As an example of a fifth resistor), resistor R FB The first terminal serves as the first terminal of the corresponding feedback submodule, connected to the inverting input terminal of integrator A1, with resistor R... FB The second terminal serves as the second terminal of the corresponding feedback submodule and is connected to the corresponding voltage output terminal. Furthermore, the resistor R in the first feedback submodule 140... FB The connection point between the first terminal and the inverting input terminal of the integrator A1 in the first power amplifier loop submodule 120 can be called the input node INT_P of the CLASSD loop integrator. The resistor R in the second feedback submodule 240 FBThe connection point between the first terminal and the inverting input terminal of the integrator A1 in the second power amplifier loop submodule 220 can be called the CLASSD loop integrator input node INT_N. Furthermore, the feedback current in the first feedback submodule 140 and the second feedback submodule 240 is I. FB .

[0062] In this implementation, the two PWM signals (e.g., PWMA and PWMB) output from the digital module are converted into PWM current I by, for example, a 1-bit current-type digital-to-analog converter (IDAC). PWM The signal is injected into the PWM loop, which includes the power amplifier loop submodule. Furthermore, the feedback loop is a second-order loop; second-order integration increases the loop gain in the low-frequency range, providing better Total Harmonic Distortion (THD) and Power Supply Rejection Ratio (PSRR) compared to a first-order integrator. Introducing resistor R2 and capacitor C2 into the compensation zero point ensures loop stability.

[0063] In the audio power amplifier provided in this implementation, the non-inverting input terminal (i.e., VCOM1 terminal) of the integrator A1 included in the first power amplifier loop submodule 120 is connected to the aforementioned first common-mode voltage submodule 130, and the non-inverting input terminal (i.e., VCOM1 terminal) of the integrator A1 included in the second power amplifier loop submodule 220 is connected to the aforementioned second common-mode voltage submodule 230.

[0064] In this implementation, the voltage at the non-inverting input (VCOM1) of integrator A1 is set to VH / 2 as described above. That is, VCOM1 remains unchanged at VH / 2 in both HV and LV modes. This ensures that the common-mode voltage VCOM1 of integrator A1 remains at VH / 2 before and after mode switching in the multi-rail CLASSD loop.

[0065] Thus, on the one hand, the voltage margin at point VCOM1 is wider when the LV output stage of the multi-power rail CLASSD loop operates in LV mode. On the other hand, during the output stage mode switching process of the multi-power rail CLASSD loop, it is not necessary to switch the VCOM1 voltage, so that the voltage at the VCOM1 terminal will not change with the switching between HV mode and LV mode, thereby effectively reducing noise such as pop-up sound caused during the output stage mode switching process of the multi-power rail CLASSD loop.

[0066] In this implementation, the structure of the first common-mode voltage submodule 130 and the second common-mode voltage submodule 230 can be set as needed. For example, they can include electronic devices such as resistors and capacitors, so as to achieve the purpose of the output voltage of the first common-mode voltage submodule 130 and the second common-mode voltage submodule 230 being VH / 2.

[0067] However, if only VCOM1 is set to VH / 2, the multi-rail CLASSD loop itself cannot be stably established, and the loop cannot function properly. For example... Figure 3C As shown, the audio power amplifier provided in this implementation also includes a current source submodule 310 (also known as an ISOURCE circuit), a first switch submodule 320, and a second switch submodule 330.

[0068] Among them, the current source submodule 310 serves as a current source ISOURCE, which is used to connect to the original loop through the first switch submodule 320 and the second switch submodule 330 when the LV output stage of the multi-power rail CLASSD loop is working in LV mode, and to provide Isource current to the first power amplifier loop submodule 120 and the second power amplifier loop submodule 220 in the loop.

[0069] Furthermore, the first output terminal of the current source submodule 310 is connected to the first terminal of the first switch submodule 320, and the second terminal of the first switch submodule 320 is connected to the first input terminal of the first power amplifier loop submodule 120. The first switch submodule 320 is used to be in a conducting state when the first power amplifier loop submodule 120 is in LV mode, so as to input the Isource current generated by the current source submodule 310 to the first power amplifier loop submodule 120. The first switch submodule 320 is in a non-conducting state when the first power amplifier loop submodule 120 is in HV mode.

[0070] The second output terminal of the current source submodule 310 is connected to the first terminal of the second switch submodule 330, and the second terminal of the second switch submodule 330 is connected to the first input terminal of the second power amplifier loop submodule 220. The second switch submodule 330 is used to be in the on state when the second power amplifier loop submodule 220 is in LV mode, so as to input the Isource current generated by the current source submodule 310 to the second power amplifier loop submodule 220. The second switch submodule 330 is in the off state when the second power amplifier loop submodule 220 is in HV mode.

[0071] Furthermore, such as Figure 3DAs shown, the current source submodule 310 includes an operational amplifier unit, a resistor unit, and a field-effect transistor (FET) unit. The operational amplifier unit includes operational amplifier OP1; the resistor unit includes resistors R1 (as an example of a first resistor), R3 (as an example of a second resistor), R4 (as an example of a third resistor), and R5 (as an example of a fourth resistor); and the FETs include FET M1 (as an example of a first FET), FET M2 (as an example of a second FET), FET M3 (as an example of a third FET), FET M4 (as an example of a fourth FET), FET M5 (as an example of a fifth FET), FET MC1 (as an example of a sixth FET), and FET MC2 (as an example of a seventh FET).

[0072] The inverting input (i.e., the first input, "-") of operational amplifier OP1 is connected to the power supply terminal DVDD (also known as VDD, as an example of the first power supply terminal). The non-inverting input (i.e., the second input, "+") of operational amplifier OP1 is connected to the first terminal of resistor R1 and the drain of field-effect transistor MC1. The second terminal of resistor R1 is connected to the first terminals of resistors R3, R4, and R5, and is also connected to the power supply terminal VBAT (i.e., the power supply terminal, as an example of the second power supply terminal). The second terminal of resistor R3 is connected to the source of field-effect transistor M3, the second terminal of resistor R4 is connected to the source of field-effect transistor M4, and the second terminal of resistor R5 is connected to the source of field-effect transistor M5. The gates of field-effect transistors M3, M4, and M5 are connected together. The drain of field-effect transistor M3 is connected to both the gate of field-effect transistor M3 and the drain of field-effect transistor MC2. The drain of field-effect transistor M4 serves as the second output terminal (i.e., Isource_N) of the current source submodule 310, and the drain of field-effect transistor M5 serves as the first output terminal (i.e., Isource_P) of the current source submodule 310. The output terminal of operational amplifier OP1 is connected to the gate of field-effect transistor M1. The gate of field-effect transistor M1 is connected to the gate of field-effect transistor M2. The source of field-effect transistor M1 is connected to the source of field-effect transistor M2 and grounded. The drain of field-effect transistor M1 is connected to the source of field-effect transistor MC1, the drain of field-effect transistor M2 is connected to the source of field-effect transistor MC2, and the gate of field-effect transistor MC1 is connected to the gate of field-effect transistor MC2.

[0073] Among them, field-effect transistors M1, M2, MC1, and MC2 can be N-type field-effect transistors, while field-effect transistors M3, M4, and M5 can be P-type field-effect transistors.

[0074] The resistance value of resistor R1 is related to the resistance value of the feedback resistor corresponding to the first feedback submodule 140 or the second feedback submodule 240. For example, the resistance value of resistor R1 is the resistance value of the resistor R included in the aforementioned first feedback submodule 140 or second feedback submodule 240. FB The resistance value is twice that of RFB, i.e., R1 = 2 * RFB.

[0075] In this implementation, the current source submodule 310 acts as the current source ISOURCE. The magnitude of the output current (i.e., the magnitude of the Isource current) can be determined based on the output stage voltage level VH in HV mode and the output stage voltage level VL in LV mode, or based on the output stage voltage level VH in HV mode, the output stage voltage level VL in LV mode, and the resistance value of resistor R1 (i.e., 2*RFB) or resistor R FB The resistance value (i.e., RFB) is determined. For example, the current magnitude of the current source ISOURCE, Isource = (VH - VL) / (2 * RFB). That is, in this implementation, in the typical loop of a multi-power rail CLASSD, a current source submodule 310 is introduced to provide a current of magnitude (VH - VL) / (2 * RFB) to the first power amplifier loop submodule 120 and the second power amplifier loop submodule 220. Here, RFB (Remote Frame Buffer) is the resistance value of the feedback resistor corresponding to the feedback submodule.

[0076] Furthermore, such as Figure 3E As shown, the first switch submodule 320 includes switch K1 (as one example of a first switch), and the second switch submodule 330 includes switch K2 (as another example of a first switch). The first terminal (i.e., input terminal) of switch K1 serves as the first terminal of the first switch submodule 320 and is connected to the first output terminal (i.e., Isource_P) of the current source submodule 310. The second terminal (i.e., output terminal) of switch K1 serves as the second terminal of the first switch submodule 320 and is connected to the inverting input terminal of integrator A1 in the first power amplifier loop submodule 120. The first terminal (i.e., input terminal) of switch K2 serves as the first terminal of the second switch submodule 330 and is connected to the second output terminal (i.e., Isource_N) of the current source submodule 310. The second terminal (i.e., output terminal) of switch K2 serves as the second terminal of the second switch submodule 330 and is connected to the inverting input terminal of integrator A1 in the second power amplifier loop submodule 220.

[0077] In this implementation, the on (closed) and off (open) states of switches K1 and K2 can be controlled by the operating mode enable switch of the output stage of the multi-power rail CLASSD loop. Specifically, the on / off state is switched according to the state of the operating mode enable switch. For example, when the output stage of the multi-power rail CLASSD loop is in HV mode, the operating mode enable switch is in HV mode, and switches K1 and K2 are off (open). When the output stage of the multi-power rail CLASSD loop switches to LV mode, the operating mode enable switch is in LV mode, and switches K1 and K2 are on (closed), thus connecting the current source submodule 310 to the subsequent loop.

[0078] Furthermore, the structure of the audio power amplifier provided in this implementation is as follows: Figure 3F As shown, the principle of the current source submodule 310 is as follows: the voltage of node 1 at the lower end of resistor R1 is DVDD by the operational amplifier OP1 clamping, thereby generating a current reference Isource bias. Two current sources with current Isource are generated by the current mirror composed of other resistors and field-effect transistors, such as current mirrors R3 / M3, R4 / M4, and R5 / M5: Isource_N and Isource_P, where Isource = (VH-VL) / (2*RFB). Isource_N is connected to the input node INT_N of the CLASSD loop integrator, and Isource_P is connected to the input node INT_P of the CLASSD loop integrator. That is, after introducing the ISOURCE circuit (i.e., current source submodule 310), when the output stage of the multi-power rail CLASSD loop switches to LV mode, the common-mode voltage of VCOM1 of integrator A1 is kept at HV / 2. In order to ensure the stability of the loop, the corresponding current is injected into the loop throughout the entire LV mode cycle by opening the ISOURCE circuit (i.e., connecting the ISOURCE to the original loop), which can make the loop stable.

[0079] The audio power amplifier provided in this implementation is a multi-rail CLASSD audio power amplifier. The voltage at the VCOM1 terminal is constantly set to VH / 2 in both HV and LV modes. Furthermore, in LV mode, the current source submodule 310 is connected to the original loop via switches K1 and K2 to supply current to the loop. This ensures that even in the LV mode of the multi-rail CLASSD loop's output stage, the VCOM1 voltage of the first-stage integrator (i.e., integrator A1) remains at VH / 2, maintaining the common-mode level VCOM1 of the first-stage integrator (i.e., integrator A1) at VH / 2 before and after the output stage mode switching. On one hand, this provides a wider voltage margin at VCOM1 when the multi-rail CLASSD loop's output stage is in LV mode (i.e., when the multi-rail CLASSD loop's output stage is in LV output mode), effectively improving the design voltage margin at VCOM1. On the other hand, during the output stage mode switching process of the multi-power-rail CLASSD loop (i.e., the switching from HV mode to LV mode), there is no need to switch the VCOM1 voltage. This effectively reduces noise such as pop-up sounds caused during the output stage mode switching process, providing better sound quality and thus improving the user experience. Furthermore, the current source submodule 310 can increase the current to the multi-power-rail CLASSD loop, ensuring its stability and normal operation.

[0080] The CLASSD loop provided in this implementation is a loop that introduces a current source Isource. The stability of the loop is analyzed below.

[0081] Taking capacitor C1 corresponding to integrator A1 in the first power amplifier loop submodule 120 as an example, the charging and discharging of capacitor C1 in one cycle is divided into four stages:

[0082] Phase 1: IC1_T1 (i.e., It1) = IPWM + Isource + (VD - 1 / 2VBAT) / RFB

[0083] Phase 2: IC1_T2 (i.e., It2) = IPWM + Isource - 1 / 2VBAT / RFB

[0084] Phase 3: IC1_T3 (i.e., It3) = -IPWM + Isource - 1 / 2VBAT / RFB

[0085] Phase 4: IC1_T4 (i.e. It4) = -IPWM + Isource + (VD - 1 / 2VBAT) / RFB

[0086] Where IC1_T1 is the current of capacitor C1 in the first stage, IC1_T2 is the current of capacitor C1 in the second stage, IC1_T3 is the current of capacitor C1 in the third stage, and IC1_T4 is the current of capacitor C1 in the fourth stage. IC1 is the aforementioned I c1 IPWM is the output current of the aforementioned digital module (i.e., PWM), which is I PWM VD refers to the output stage voltage level, which can be VH, VL, or Vp. Vp can be understood as the given supply voltage.

[0087] Since the charge and discharge are balanced throughout the entire cycle, then:

[0088] IC1_T1*t1+IC1_T2*t2=-IC1_T3*t3-IC1_T4*t4

[0089] Where t1, t2, t3, and t4 represent the time at each stage.

[0090] Therefore, we can conclude that:

[0091] (IPWM+Isource)*(t1+t2)-(IPWM-Isource)*(t3+t4)=-1 / 2*VBAT / RFB*(t1+t2+t3+t4)+VD / RFB*(t1+t4)

[0092] Where t1+t2=DIN*T, t3+t4=(1-DIN)*T, t1+t4=DOUT*T, t2+t3=(1-DOUT)*T, DIN is the duty cycle of PWM, DOUT is the duty cycle of Vop output at the positive terminal of the multi-rail CLASSD loop, T is the period of PWM and Vop, and RFB can also be called R FB Substituting this into the above equation and rearranging, we get:

[0093] D_out (i.e. DOUT)=(VBAT / (2RFB)-Isource)*RFB / VD-(IPWM*RFB) / VD(2DIN-1)

[0094] Then, such as Figure 4 As shown,

[0095] D_out (i.e., DOUT) = (VBAT / (2RFB)-Isource)*RFB / VD-(IPWM*RFB) / VD(2DIN-1) Let Isource = (VBAT-VD) / R_source, R_source = 2RFB, substituting and simplifying, we get:

[0096] Vout=Von-Vop=2*IPWM*RFB*(2*DIN-1)

[0097] Therefore, the gain of the CLASSD loop is constant at 2*IPWM*RFB, where R_source refers to resistor R1 in the current source submodule 310.

[0098] In this implementation, when the output stage level of the multi-power-rail CLASSD loop switches to HV mode, the Isource current needs to be turned off, just like in normal CLASSD operation. In the multi-power-rail CLASSD loop, when the output stage operates in LV mode, the large voltage difference between the LV and HV power supplies, coupled with the fact that the common-mode level of integrator A1 is typically set to VCOM1 = Vx / 2, necessitates switching VCOM1 when the output stage enters or exits the multi-power-rail CLASSD loop. If a mismatch exists within the loop, it can cause a popping sound at the output. Therefore, when the output stage of the CLASSD loop operates in LV mode, the Isource current needs to be turned on.

[0099] In another implementation of this application, the current source submodule 310 is used to connect to the supply terminal DVDD and the supply terminal VBAT, and the Isource current is determined according to the voltage of the supply terminal DVDD, the voltage of the supply terminal VBAT and the resistance value of the resistor R1.

[0100] For example, VH in the formula for calculating the Isource current can also be VBAT, and VL can also be DVDD. Therefore, the magnitude of the Isource current can also be Isource = (VBAT - DVDD) / 2 * RFB.

[0101] Of course, in other implementations of this application, the magnitude of the Isource current can also be calculated using other formulas based on VH, VL, and RFB, or using other formulas based on VBAT, DVDD, and RFB, or calculated using other parameters, which can be set as needed.

[0102] Furthermore, in another implementation of this application, VCOM1 can also be constantly set to VH / 3. Correspondingly, as... Figure 5 As shown, compared to the aforementioned Figure 3FThe audio power amplifier shown in this implementation includes a first feedback submodule 140 and a second feedback submodule 240, each comprising a resistor R6 (as an example of a sixth resistor) and a resistor R7 (as an example of a seventh resistor). The first terminal of resistor R6 serves as the first terminal of the corresponding feedback submodule, and the second terminal of resistor R6 serves as the second terminal of the corresponding feedback submodule. The first terminal of resistor R7 is connected to the first terminal of resistor R6, and the second terminal of resistor R7 is grounded. The resistance value of resistor R6 is RD, and the resistance value of resistor R7 is twice the resistance value of resistor R6, i.e., 2*RD.

[0103] Furthermore, in this implementation, the resistance value of resistor R1 is determined based on the resistance values ​​of resistors R6 and R7. Additionally, the formula for calculating the Isource current can also be determined based on the aforementioned VH, VL, and the feedback resistors in the feedback loop (i.e., the resistance values ​​of resistors R6 and R7).

[0104] In some other implementations of this application, VCOM1 can also be set to a voltage value related to VH other than VH / 2 and VH / 3 mentioned above, and the Isource current can also be set to other current values ​​accordingly, all of which can be set as needed.

[0105] The aforementioned first switch submodule 320 and second switch submodule 330 are examples of switch submodules included in the audio power amplifier provided in this application, and the current source submodule 310 is an example of a current source submodule 310 included in the audio power amplifier provided in this application. In other implementations of this application, the structure, number, and connection relationship of the current source submodule 310 and switch submodules included in the audio power amplifier can also be set to other structures, numbers, and connection relationships as needed.

[0106] The aforementioned first digital-to-analog converter submodule 110, first power amplifier loop submodule 120, first common-mode voltage submodule 130, and first feedback submodule 140 are examples of a second module included in the audio power amplifier provided in this application. The second digital-to-analog converter submodule 210, second power amplifier loop submodule 220, second common-mode voltage submodule 230, and second feedback submodule 240 are examples of another second module included in the audio power amplifier provided in this application. In other implementations of this application, the structure, number, and connection relationships of the second modules included in the audio power amplifier can also be configured as needed.

[0107] The aforementioned components are all examples of their corresponding device types. In other implementations, other components of the same type may be selected as needed.

[0108] The aforementioned HV mode is an example of the first operating mode, and the LV mode is an example of the second operating mode. In other implementations of this application, the first and second operating modes may also be other operating modes, and the output stage voltage level in the second operating mode is lower than the output stage voltage level in the first operating mode.

[0109] In other implementations of this application, the audio power amplifier may also be other audio power amplifiers besides the aforementioned multi-rail CLASSD loop audio power amplifier, such as a bridge-type CLASSD loop audio power amplifier.

[0110] This application also provides an electronic device, such as Figure 6 As shown, the electronic device includes the aforementioned audio power amplifier. Of course, the electronic device may also include other components.

[0111] The electronic device may be, for example, a mobile phone, tablet computer, laptop computer, PDA, mobile internet device (MID), wearable device (including smartwatches, smart bracelets, pedometers, etc.), personal digital assistant, portable media player, navigation device, in-vehicle device, video game device, set-top box, virtual reality and / or augmented reality device, Internet of Things device, industrial control device, streaming media client device, e-book, reading device, POS machine, and other devices with audio playback function.

[0112] It should be noted that the terms "first" and "second" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0113] It should be noted that some structural or methodological features may be shown in the accompanying drawings in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be necessary. Rather, in some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. Furthermore, including structural or methodological features in a particular figure does not imply that such features are required in all embodiments, and in some embodiments, these features may be omitted or may be combined with other features.

[0114] Although this application has been illustrated and described with reference to certain preferred embodiments, those skilled in the art should understand that the above description is a further detailed explanation of the application in conjunction with specific embodiments, and should not be construed as limiting the specific implementation of the application to these descriptions. Those skilled in the art can make various changes in form and detail, including some simple deductions or substitutions, without departing from the spirit and scope of this application.

Claims

1. An audio power amplifier, characterized in that, include: The module consists of a first module and a second module. The first module includes a current source submodule, and the second module includes a power amplifier loop submodule and a common-mode voltage submodule. The power amplifier loop submodule includes a first integrator, wherein the inverting input terminal of the first integrator serves as the first input terminal of the power amplifier loop submodule, and the non-inverting input terminal of the first integrator serves as the second input terminal of the power amplifier loop submodule. The output terminal of the common-mode voltage submodule is connected to the second input terminal of the power amplifier loop submodule, and is used to provide a first voltage to the power amplifier loop submodule. The first voltage is a voltage related to the output stage level voltage of the power amplifier loop submodule in the first operating mode. The output terminal of the current source submodule is connected to the first input terminal of the power amplifier loop submodule, and is used to provide a first current to the power amplifier loop submodule when the power amplifier loop submodule is in the second working mode, and not to provide the first current to the power amplifier loop submodule when the power amplifier loop submodule is in the first working mode. The second working mode is a working mode in which the output stage level voltage is lower than the output stage level voltage in the first working mode.

2. The audio power amplifier according to claim 1, characterized in that, The first voltage is one-nth of the output stage level voltage of the power amplifier loop submodule in the first operating mode.

3. The audio power amplifier according to claim 2, characterized in that, The value of n is 2 or 3.

4. The audio power amplifier according to claim 1, characterized in that, The second module further includes a feedback submodule, wherein the first current is determined based on the output stage level voltage in the first operating mode, the output stage level voltage in the second operating mode, and the resistance value of the feedback resistor corresponding to the feedback submodule.

5. The audio power amplifier according to claim 1, characterized in that, The current source submodule includes a first resistor and is used to connect to a first voltage supply terminal and a second voltage supply terminal. The first current is determined based on the voltage of the first voltage supply terminal, the voltage of the second voltage supply terminal, and the resistance value of the first resistor.

6. The audio power amplifier according to claim 1, characterized in that, The second module also includes a feedback submodule, wherein the current source submodule includes a first resistor, and the resistance value of the first resistor is related to the resistance value of the feedback resistor corresponding to the feedback submodule.

7. The audio power amplifier according to claim 6, characterized in that, If the first voltage is half of the output stage level voltage of the power amplifier loop submodule in the first working mode, the feedback submodule includes a fifth resistor, which serves as the feedback resistor, and the resistance value of the first resistor is twice the resistance value of the fifth resistor. If the first voltage is one-third of the output stage level voltage of the power amplifier loop submodule in the first operating mode, the feedback submodule includes a sixth resistor and a seventh resistor, the resistance value of the seventh resistor is twice the resistance value of the sixth resistor, and the sixth resistor and the seventh resistor serve as the feedback resistor.

8. The audio power amplifier according to claim 7, characterized in that, If the first voltage is half of the output stage level voltage of the power amplifier loop submodule in the first operating mode, the first current Isource = (VH - VL) / (2 * RFB), where VH is the output stage level voltage in the first operating mode, VL is the output stage level voltage in the second operating mode, and RFB is the resistance value of the fifth resistor; or the first current Isource = (DVDD - VBAT) / (2 * RFB), where DVDD is the voltage of the first voltage supply terminal connected to the current source submodule, and VBAT is the voltage of the second voltage supply terminal connected to the current source submodule.

9. The audio power amplifier according to claim 1, characterized in that, The first operating mode is high-voltage mode, and the second operating mode is low-voltage mode.

10. The audio power amplifier according to claim 1, characterized in that, The first module further includes a switch submodule. The output terminal of the current source submodule is connected to the first terminal of the switch submodule, and the second terminal of the switch submodule is connected to the first input terminal of the power amplifier loop submodule. The switch submodule is used to be in a conducting state when the power amplifier loop submodule is in the second operating mode, so as to input the first current generated by the current source submodule to the power amplifier loop submodule. The switch submodule is in a non-conducting state when the power amplifier loop submodule is in the first operating mode, and the voltage at the output terminal of the common-mode voltage submodule is the first voltage.

11. The audio power amplifier according to claim 10, characterized in that, The switch submodule enables the switch to switch to the on / off state through the working mode of the power amplifier loop submodule.

12. The audio power amplifier according to claim 10, characterized in that, The switch submodule includes a first switch, the first end of the first switch serving as the first end of the switch submodule, and the second end of the first switch serving as the second end of the switch submodule.

13. The audio power amplifier according to any one of claims 1-12, characterized in that, The current source submodule includes an operational amplifier unit, a resistor unit, and a field-effect transistor (FET) unit. The operational amplifier unit includes an operational amplifier; the resistor unit includes a first resistor, a second resistor, a third resistor, and a fourth resistor; and the FETs include a first FET, a second FET, a third FET, a fourth FET, a fifth FET, a sixth FET, and a seventh FET. The inverting input of the operational amplifier is connected to a first power supply terminal. The non-inverting input of the operational amplifier is connected to a first terminal of the first resistor and the drain of the sixth FET. The second terminal of the first resistor is connected to the first terminals of the second, third, and fourth resistors, and is also connected to a second power supply terminal. The second terminal of the second resistor is connected to the source of the third FET, and the second terminal of the third resistor is connected to the source of the fourth FET. The fourth resistor... The second terminal is connected to the source of the fifth field-effect transistor. The gates of the third, fourth, and fifth field-effect transistors are connected. The drain of the third field-effect transistor is connected to both the gate of the third field-effect transistor and the drain of the seventh field-effect transistor. The drain of the fourth field-effect transistor serves as the second output terminal of the current source submodule. The drain of the fifth field-effect transistor serves as the first output terminal of the current source submodule. The output terminal of the operational amplifier is connected to the gate of the first field-effect transistor. The gates of the first and second field-effect transistors are connected. The sources of the first and second field-effect transistors are connected and grounded. The drain of the first field-effect transistor is connected to the source of the sixth field-effect transistor. The drain of the second field-effect transistor is connected to the source of the seventh field-effect transistor. The gates of the sixth and seventh field-effect transistors are connected.

14. The audio power amplifier according to claim 13, characterized in that, The second module further includes a feedback submodule, the first end of which is connected to the first input end of the power amplifier loop submodule, and the second end of which is connected to the output end of the power amplifier loop submodule.

15. The audio power amplifier according to claim 14, characterized in that, If the first voltage is half of the output stage level voltage of the power amplifier loop submodule in the first working mode, the feedback submodule includes a fifth resistor, the first end of the fifth resistor serves as the first end of the feedback submodule, and the second end of the fifth resistor serves as the second end of the feedback submodule; If the first voltage is one-third of the output stage level voltage of the power amplifier loop submodule in the first operating mode, the feedback submodule includes a sixth resistor and a seventh resistor. The first end of the sixth resistor serves as the first end of the feedback submodule, the second end of the sixth resistor serves as the second end of the feedback submodule, the first end of the seventh resistor is connected to the first end of the sixth resistor, and the second end of the seventh resistor is grounded.

16. The audio power amplifier according to any one of claims 1-12, characterized in that, The power amplifier loop submodule includes a second integrator, a comparator, a first capacitor, a second capacitor, an eighth resistor, a driver unit, an eighth field-effect transistor (FET), a ninth FET, a tenth FET, and a second switch. The first integrator is the first-stage integrator of the power amplifier loop submodule. The first terminal of the first capacitor is connected to the inverting input of the first integrator, and the second terminal of the first capacitor is connected to the output of the first integrator and the inverting input of the comparator. The first terminal of the eighth resistor is connected to the output of the first integrator, and the second terminal of the eighth resistor is connected to the first terminal of the second capacitor and the inverting input of the second integrator. The second terminal of the second capacitor is connected to the non-inverting input of the comparator and the output of the second integrator. The output of the second integrator is connected to the non-inverting input of the comparator. The third input terminal of the power amplifier loop submodule is used to connect to the common-mode voltage submodule corresponding to the second integrator. The output terminal of the comparator is connected to the first terminal of the driving unit. The second terminal of the driving unit is connected to the gate of the eighth field-effect transistor. The third terminal of the driving unit is connected to the gate of the ninth field-effect transistor. The source of the eighth field-effect transistor is connected to the corresponding first operating mode power supply terminal. The gate of the eighth field-effect transistor is connected to the gate of the tenth field-effect transistor. The drain of the eighth field-effect transistor is connected to the drain of the ninth field-effect transistor and is connected to the first terminal of the second switch and the corresponding voltage output terminal. The source of the ninth field-effect transistor is grounded. The source of the tenth field-effect transistor is connected to the corresponding second operating mode power supply terminal. The drain of the tenth field-effect transistor is connected to the second terminal of the second switch. The voltage output terminal is used to connect to the speaker.

17. The audio power amplifier according to claim 16, characterized in that, The second module further includes a digital-to-analog converter submodule. The input terminal of the digital-to-analog converter submodule serves as a signal input terminal for receiving pulse signals, and the output terminal of the digital-to-analog converter submodule is connected to the first input terminal of the power amplifier loop submodule.

18. The audio power amplifier according to claim 17, characterized in that, The digital-to-analog converter submodule includes a first current source, a second current source, a third switch, and a fourth switch. The input terminal of the first current source is connected to the third voltage supply terminal, the output terminal of the first current source is connected to the first terminal of the third switch, the second terminal of the third switch is connected to the first terminal of the fourth switch, the second terminal of the fourth switch is connected to the input terminal of the second current source, the output terminal of the second current source is grounded, and the connection terminal between the second terminal of the third switch and the first terminal of the fourth switch serves as the output terminal of the corresponding digital-to-analog converter submodule.

19. The audio power amplifier according to any one of claims 1-12, characterized in that, The audio power amplifier includes two second modules. One second module includes a first digital-to-analog converter submodule, a first power amplifier loop submodule, a first common-mode voltage submodule, and a first feedback submodule. The other second module includes a second digital-to-analog converter submodule, a second power amplifier loop submodule, a second common-mode voltage submodule, and a second feedback submodule. The first module also includes a switching submodule, which includes a first switching submodule and a second switching submodule. The current source submodule includes a first output terminal and a second output terminal. The output terminal of the first digital-to-analog conversion submodule is connected to the first input terminal of the first power amplifier loop submodule, the output terminal of the first common-mode voltage submodule is connected to the second input terminal of the first power amplifier loop submodule, the first terminal of the first feedback submodule is connected to the first input terminal of the first power amplifier loop submodule, and the second terminal of the first feedback submodule is connected to the output terminal of the first power amplifier loop submodule. The output terminal of the second digital-to-analog conversion submodule is connected to the first input terminal of the second power amplifier loop submodule, the output terminal of the second common-mode voltage submodule is connected to the second input terminal of the second power amplifier loop submodule, the first terminal of the second feedback submodule is connected to the first input terminal of the second power amplifier loop submodule, and the second terminal of the second feedback submodule is connected to the output terminal of the second power amplifier loop submodule. The first output terminal of the current source submodule is connected to the first terminal of the first switch submodule, and the second terminal of the first switch submodule is connected to the first input terminal of the first power amplifier loop submodule. The first switch submodule is used to be in a conducting state when the first power amplifier loop submodule is in the second working mode, so as to input the first current generated by the current source submodule to the first power amplifier loop submodule. The first switch submodule is in a non-conducting state when the first power amplifier loop submodule is in the first working mode. The second output terminal of the current source submodule is connected to the first terminal of the second switch submodule, and the second terminal of the second switch submodule is connected to the first input terminal of the second power amplifier loop submodule. The second switch submodule is used to be in a conducting state when the second power amplifier loop submodule is in the second working mode, so as to input the first current generated by the current source submodule to the second power amplifier loop submodule, and the second switch submodule is in a non-conducting state when the second power amplifier loop submodule is in the first working mode.

20. An electronic device, characterized in that, Including the audio power amplifier as described in any one of claims 1-19.

Citation Information

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