Multi-point fast fourier transform method based on single-chip microcomputer with low-power accelerator

Abstract

The application discloses a multi-point number fast Fourier transform method based on a single-chip microcomputer with a low-power accelerator, and comprises the following steps: obtaining multi-point number experimental data; grouping multi-point number sequence x(n) according to time parity step by step; using a LEA of the single-chip microcomputer to calculate FFT of each group of small-point number parity sequence respectively; recombining small-point number FFT results in multiple stages to restore the first half of DFT of the experimental data x(n); and calculating the first half of the power spectrum of the experimental data based on a hardware multiplier of the single-chip microcomputer and storing in situ. The application uses the LEA of the single-chip microcomputer to realize FFT in the hardware aspect, which not only saves energy in application, but also improves signal processing speed; in the software aspect, when the length of the experimental data exceeds the length range that can be processed by the single-chip microcomputer with a low-power accelerator, the multi-point number is decomposed into small-point number step by step, then the LEA is used to perform FFT transform on the small-point number, and finally data recombination is performed to realize the multi-point number fast Fourier transform.

Description

Technical Field

[0001] This invention relates to the field of digital signal processing, and in particular to a multi-point fast Fourier transform method based on a microcontroller with a low-power accelerator. Background Technology

[0002] FFT is a fast algorithm of DFT, which greatly improves the computation speed of DFT, making real-time processing of digital signals possible. It is one of the most effective algorithms widely used in the field of digital signal processing.

[0003] Existing FFT algorithms are generally implemented using platforms such as microcontrollers, digital signal processors (DSPs), application-specific integrated circuits (ASICs), and field-programmable gate arrays (FPGAs).

[0004] DSPs (Digital Signal Processors) are dedicated chips for digital signal processing, well-suited for operations based on multiplication and accumulation, enabling real-time FFT processing. However, FFT processing requires large storage units, while DSP chips have limited storage resources and computational capabilities, making them unsuitable for calculations with extremely high point counts. FPGAs, as customized hardware accelerators, offer high flexibility. Their abundant internal parallel logic resources match the independent, parallel processing characteristics of the butterfly units in the FFT algorithm, increasing the data bandwidth of FFT operations by several orders of magnitude. However, FPGA development requires the use of hardware description languages, increasing development difficulty and time, and FPGA implementations consume significant power, making it difficult to meet some industrial low-power requirements. ASICs, on the other hand, are circuits that convert registers into circuits using hardware description languages. After synthesis, static timing analysis, placement and routing, and back-end design, they are optimized circuit layouts for specific digital signal processing algorithms, and finally manufactured by semiconductor manufacturers. ASICs implementing FFT offer better performance, higher reliability, and lower power consumption than DSPs and FPGAs, making them suitable for high-speed real-time processing systems and some specialized applications. However, it has poor programmability, is difficult to modify after programming, has a long development cycle, high production cost, and poor flexibility and scalability.

[0005] In high real-time systems, pipelined FFT is frequently used, mainly by utilizing the symmetry of the twitch factor to reduce the resource consumption of FFT. Patent application number 202010031509.8, entitled "Fixed-point FFT Implementation System with Optimized Resource Consumption", discloses a device that optimizes the number of computation units and uses a butterfly operation architecture. It reduces the resource consumption of fixed-point FFT operation by utilizing the symmetry of the twitch factor and minimizing the word length of each butterfly operation without sacrificing the accuracy of the calculation results through the radix-2 FFT algorithm.

[0006] Existing technologies also include parallel architectures or combinations with radix-4 and radix-2. k Algorithms are used to calculate FFT to improve computation speed. Patent application number 201410174795.8, "FFT Accelerator Based on DSP Chip," discloses an accelerator in which the FFT calculation module can perform FFT calculations in parallel according to the control signals output by the operation control module. This accelerator can realize FFT operations from small to large scales and has the advantages of high execution efficiency and high hardware resource utilization. Patent application number 201610186675.9, "Apparatus and Method for Implementing 65536-Point FFT Based on FPGA," discloses an apparatus and method. By increasing the number of data points that can be processed in one clock cycle in the input / output section, storage section, and processing section, the computation speed of FFT is accelerated. In the input interface section, parallel data input is achieved using large-width data lines, saving data input time. In the storage section, a conflict-free storage method is used, enabling simultaneous reading and writing of 16 data points per clock cycle, and the calculation results are stored in-place, saving RAM resources. In the processing section, a radix-16 processing core is used to accelerate processing speed, allowing 16 data points to be processed per clock cycle. In the output interface section, large-width parallel output technology is also employed to achieve high-speed output of processing results. Parallel processing enables faster computation speeds but consumes more hardware resources.

[0007] For systems with limited space and hardware resources, the patent application No. 201611187723.2, entitled "An FFT Reuse Method", proposes a reuse method that uses butterfly operation units for reuse and adopts semi-parallel pipelined operation to effectively balance the contradiction between internal processing speed and resource consumption, effectively reducing the demand for logic resources and meeting the needs of engineering applications. However, this method also requires the design of a compatible system to be implemented. Summary of the Invention

[0008] This invention aims to overcome the problem that existing technologies require the design of new devices and are difficult to meet the needs of some industrial applications for low-power multi-point Fast Fourier Transform. It proposes a multi-point Fast Fourier Transform method based on a microcontroller with a low-power accelerator. Specifically, it splits the multi-point sequence, uses the microcontroller's built-in LEA to quickly calculate the FFT of the finite-length discrete-time sequence, and finally recombines the results to achieve the multi-point Fast Fourier Transform.

[0009] To achieve the above objectives, the present invention adopts the following technical solution:

[0010] The multi-point Fast Fourier Transform (FFT) method based on a microcontroller with a low-power accelerator includes the following steps: S1: Obtain multi-point experimental data, i.e., a multi-point sequence x(n), n = 0, 1, 2, ..., N-1, through experimental acquisition or simulation; S2: Group the multi-point sequence x(n) according to time parity to obtain multiple different groups of few-point sequences, including even and odd sequences; S3: Calculate the FFT of each group of odd and even few-point sequences using the microcontroller's built-in LEA, and store the few-point FFT results in place; S4: Reconstruct the few-point FFT results using a recombination calculation formula to recover the first half of the DFT of the experimental data x(n), and store it in place; S5: Calculate the first half of the power spectrum of the experimental data using the microcontroller's built-in hardware multiplier, and store it in place. This invention's multi-point Fast Fourier Transform (FFT) method based on a microcontroller with a low-power accelerator is a variable-length FFT method that can meet the needs of more application scenarios. In terms of hardware, this method utilizes the microcontroller's built-in LEA to implement FFT. Compared to not using LEA under the same conditions, this not only saves energy in application but also improves signal processing speed. In terms of software, when the length of experimental data exceeds the processing range of a microcontroller with a low-power accelerator, the method decomposes the multi-point data into fewer points step by step, then uses LEA to perform FFT transformation on the fewer points, and finally reassembles the data to achieve Fast Fourier Transform of the multi-point data. In terms of memory, from data grouping to fewer-point FFT transformation and then to data reassembly, the method adopts an in-situ overlay storage method, saving the storage space required for digital signal processing.

[0011] In a preferred embodiment of the present invention, S2 specifically involves: performing a first-level decomposition on a multi-point sequence x(n) of length N according to the parity of n, dividing the multi-point sequence x(n) into even sequences x of length N / 2. 11 (n1) and odd sequence x 12 (n1); If N / 2 is still greater than M, then perform the second-level decomposition according to the parity of n1, dividing the two sets of N / 2 sequences into four subsequences x of length N / 4 each. 21 (n2), x 22 (n2), x23 (n2) and x 24 (n2); If N / 4 is still greater than M, continue to decompose according to the time parity level until the i-th level. Finally, the multi-point sequence x(n) is decomposed into 2 i Short sequences x of length M iq (n i That is, M = N / 2 i q = 1, 2, ..., 2 i n i =0,1,…,M-1. When the number of data points N is large, directly calculating the spectrum using radix-2 FFT is time-consuming, affecting real-time performance. Microcontrollers with LEA can quickly calculate FFTs; at the same clock frequency, their processing speed for a 512-point CFFT is 21-24 times faster than without LEA. However, LEA can only quickly calculate FFTs with a small number of points. When the data length N is greater than the maximum number of real sequence points M that LEA can handle, multi-point FFTs can be quickly calculated through data grouping, calling LEA, and data reassembly.

[0012] As a preferred embodiment of the present invention, the calculation formula for the FFT of each group of odd-even sequences with fewer points in S3 is as follows:

[0013] X iq (k i )

[0014]

[0015] For a small number of real sequences x with M points... iq (n i First calculate X. iq (M / 2) and temporarily store; then, use LEA to process x. iq (n i Calculate the CFFT of M / 2 points to obtain F_X iq (f i ), F_X iq (f i The real part Re(f) i ) and imaginary part Im(f i Coverage x iq (n i The data is stored in the original M*mB storage space. The DFT of a real sequence has circular conjugate symmetry; therefore, only X needs to be stored. iq (0) to X iq The value of (M / 2) can be used to recover the complex sequence X at point M. iq (k i ), and complete the subsequent data reorganization.

[0016] As a preferred embodiment of the present invention, the recombination calculation formula in S4 is as follows:

[0017]

[0018] As a preferred embodiment of the present invention, S4 specifically involves: letting r = i-1, R = 2M, The DFT of each subsequence in level r is X. rs (k r ), where s = 1, 2, ..., 2 r k r =0,1,…,R-1, calculate and save X according to the recombination calculation formula. rs (k r The first half of ) is k r =0,1,…,M-1, and temporarily store X rs (R / 2); Then, using the core formula of the radix-2 time-decimated FFT and the circular conjugate symmetry of the real sequence DFT, the first half of the FFT of each group of subsequences at level i-2 is reconstructed; then, the reconstructing is carried out step by step until the first half of the FFT of the multi-point experimental data x(n) is reconstructed.

[0019] In a preferred embodiment of the present invention, the number of data points N in the multi-point experimental data, i.e., the multi-point sequence x(n), is conventionally taken as an integer power of 2; if it is insufficient, it is padded with zeros. N-point discrete experimental data, i.e., the real sequence x(n), can be obtained through experimental data collection or simulation.

[0020] As a preferred embodiment of the present invention, the multi-point experimental data is integer data. If the space occupied by integer data in the microcontroller is m bytes, then N*m bytes of storage space are allocated in the microcontroller to store the experimental data x(n). The step-by-step decomposition does not affect the total data length, and the subsequences after each grouping are stored by overlay. In terms of memory, from data grouping to multi-point FFT transformation, and then to data recombination, the in-situ overlay storage method is used step by step, saving the storage space required for digital signal processing.

[0021] Therefore, the present invention has the following beneficial effects: The multi-point Fast Fourier Transform (FFT) method based on a microcontroller with a low-power accelerator is a variable-length FFT method that can meet the needs of more application scenarios. In terms of hardware, the method utilizes the microcontroller's built-in LEA to implement the FFT, which not only saves energy in application but also improves signal processing speed compared to not using LEA under the same conditions. In terms of software, when the length of experimental data exceeds the processing range of the microcontroller with a low-power accelerator, the multi-point data is decomposed into fewer points step by step, and then the fewer points are subjected to FFT transformation using LEA. Finally, the data is reassembled to achieve the multi-point Fast Fourier Transform. In terms of memory, from data grouping to fewer-point FFT transformation and then to data reassembly, an in-situ overlay storage method is used step by step, saving the storage space required for digital signal processing. Attached Figure Description

[0022] Figure 1 This is a flowchart of the main technical process of this invention patent.

[0023] Figure 2 This is a flowchart illustrating the specific technical solution of this invention patent.

[0024] Figure 3 It is a time-domain waveform diagram of experimental data generated by microcontroller simulation.

[0025] Figure 4 This is a schematic diagram of multi-point experimental data being decomposed into fewer-point subsequences step by step.

[0026] Figure 5 This is a schematic diagram of calculating a small number of FFTs based on LEA and storing them in place.

[0027] Figure 6 This is a schematic diagram of a few-point FFT recombining a multi-point FFT and storing it in situ.

[0028] Figure 7 This is a schematic diagram of calculating the power spectrum based on a hardware multiplier and storing it in situ.

[0029] Figure 8 It is a magnified view of the frequency domain amplitude spectrum of the experimental data generated by the microcontroller simulation.

[0030] Figure 9 This is the time-domain waveform of the collected vortex flow signal.

[0031] Figure 10 This is a flowchart of the process of quickly implementing the DFT of a 2048-point real sequence using the LEA built into the microcontroller.

[0032] Figure 11 This is a magnified view of the frequency domain amplitude spectrum of the vortex flow signal. Detailed Implementation

[0033] The present invention will now be further described with reference to the accompanying drawings and specific embodiments.

[0034] A multi-point fast Fourier transform method based on a microcontroller with a low-power accelerator is proposed. This method combines the microcontroller's own hardware resources to calculate the Fourier transform of multi-point discrete time series, thereby realizing multi-point fast Fourier transform, improving the real-time performance of power spectrum analysis, and reducing the storage space requirements. Specifically, the process includes the following steps: S1: Obtain multi-point experimental data, i.e., multi-point sequence x(n), n = 0, 1, 2, ..., N-1, through experimental acquisition or simulation; S2: Group the multi-point sequence x(n) according to time parity to obtain multiple different groups of few-point sequences, including even sequences and odd sequences; S3: Calculate the FFT of each group of few-point odd and even sequences using the built-in LEA of the microcontroller, and store the few-point FFT results in place; S4: Use the recombination calculation formula to recombine the few-point FFT results at multiple levels to recover the first half of the DFT of the experimental data x(n), and store it in place; S5: Calculate the first half of the power spectrum of the experimental data based on the hardware multiplier built into the microcontroller, and store it in place.

[0035] The advantages of this invention are as follows: The multi-point Fast Fourier Transform (FFT) method based on a microcontroller with a low-power accelerator is a variable-length FFT method that can meet the needs of more application scenarios. In terms of hardware, this method utilizes the microcontroller's built-in LEA (Linear Access Array) to implement the FFT. Compared to not using the LEA under the same conditions, this not only saves energy in application but also improves signal processing speed. For example, at a 16MHz clock frequency, implementing a 512-point FFT using the LEA, compared to not using the LEA, increases processing speed by up to 24 times and reduces energy consumption by up to 36 times. In terms of software, when the experimental data length exceeds the processing range of the microcontroller with the low-power accelerator, the multi-point data is decomposed into fewer points step by step, then the LEA is used to perform the FFT on the fewer points, and finally the data is reassembled to achieve the multi-point Fast Fourier Transform. In terms of memory, from data grouping to fewer-point FFT transformation and then to data reassembly, an in-situ overlay storage method is used step by step, saving the storage space required for digital signal processing.

[0036] Example:

[0037] The design concept of this invention is as follows: Based on multi-point experimental data acquired through experiments or simulations, a finite number of odd-even groupings are first performed; then, the DFT of the few-point odd-even sequence is quickly calculated using the LEA built into the microcontroller; and based on the core formula of the radix-2 time-decimated FFT and the circular conjugate symmetry recombination, the DFT of the multi-point experimental data is quickly calculated to improve the real-time performance of the FFT-based digital signal processing method; then, the power spectrum of the experimental data is calculated based on the FFT results of the experimental data. The calculation results of both the FFT and the power spectrum are stored in place to ensure maximum saving of storage space.

[0038] The flowchart of the technical solution of the present invention is as follows: Figure 2 As shown. First, experimental data x(n) is obtained through experimental acquisition or simulation. Second, the multi-point experimental data x(n) is grouped into multiple groups according to parity a finite number of times to obtain multiple different sets of few-point sequences, namely even sequences and odd sequences. Third, the FFT of each set of few-point odd and even sequences is calculated using the LEA built into the microcontroller, and the results of the few-point FFT are stored in place. Then, based on the circular conjugate symmetry of DFT and the core formula of radix-2 decimation-time FFT, the results of the few-point FFT are recombined in multiple levels to recover the first half of the FFT of the multi-point experimental data X(k), and stored in place. Finally, the first half of the power spectrum P(k) of the experimental data is calculated based on the hardware multiplier built into the microcontroller, and stored in place.

[0039] The following details the processing steps of the multi-point Fast Fourier Transform method based on a microcontroller with a low-power accelerator:

[0040] (1) Obtaining experimental data

[0041] FFT-based digital signal processing methods are widely used, such as in vortex flow meters. When a flow rate is given on the vortex flow meter experimental platform, the signal output by the vortex sensor is preprocessed by a conditioning circuit, appropriately amplified and filtered, and then sampled by a microcontroller to obtain discrete experimental data. Discrete experimental data can also be directly generated by the microcontroller through simulation. Therefore, an N-point discrete real sequence x(n) can be obtained through experimental acquisition or simulation. To facilitate the calculation of multi-point FFTs, the number of data points N is typically taken as an integer power of 2; if insufficient, it is padded with zeros. This invention uses... Figure 3 The following example of a 2048-point simulated sinusoidal signal illustrates the specific processing method of multi-point FFT based on a microcontroller with LEA. The sampling frequency is 2048Hz, the amplitude is 1V, the initial phase is 0rad, and the signal frequency is 10Hz.

[0042] (2) Data grouping

[0043] When the number of data points N is large, directly calculating the spectrum using radix-2 FFT is time-consuming, impacting real-time performance. Microcontrollers with LEA (Linear Aspect Ratio) can quickly calculate FFTs; at the same clock frequency, their processing speed for a 512-point FFT is 21-24 times faster than without LEA. However, LEA can only quickly calculate FFTs with a small number of points. When the data length N exceeds the maximum number of real sequence points M that LEA can process, it can be... Figure 1 The process shown involves grouping data, calling LEA, and reassembling data to quickly compute multi-point FFTs.

[0044] The specific process of data grouping is as follows: Figure 4 As shown. For a multi-point sequence x(n) of length N, the first-level decomposition is performed according to the parity of n, dividing x(n) into even sequences x of length N / 2. 11 (n1) and odd sequence x 12 (n1); If N / 2 is still greater than M, then perform the second-level decomposition according to the parity of n1, dividing the two sets of N / 2 sequences into four subsequences x of length N / 4 each. 21 (n2), x 22 (n2), x 23 (n2) and x 24 (n2); If N / 4 is still greater than M, continue to decompose according to the time parity level until the i-th level. Finally, decompose x(n) into 2 i Short sequences x of length M iq (n i That is, M = N / 2 i q = 1, 2, ..., 2 i n i =0,1,…,M-1.

[0045] The sampled real number sequence is integer data. If the space occupied by integer data in the microcontroller is mB (i.e., mByte), then N*mB of storage space will be allocated in the microcontroller to store the experimental data x(n). The step-by-step decomposition will not affect the total data length; therefore, the subsequences after each grouping are stored by overlay. The data grouping process requires a total of N*mB of space to store the data. The following process of implementing multi-point FFT based on LEA and the power spectrum calculation results are stored in place.

[0046] for Figure 3 The simulation data shown is N = 2048 real numbers. If LEA can process a maximum of M = 512 data points, then according to the above decomposition method, the 2048 simulation data points are decomposed into two levels of parity, and finally decomposed into 4 subsequences of 512 points each, which are then stored in situ.

[0047] (3) Calculate the FFT with few points

[0048] The subsequence x of level i iq (n i Let X be a real sequence of length M, and let its DFT be a complex sequence of M points. iq (k i ), where k i =0,1,…,M-1. If the microcontroller's built-in LEA is used, the M-point real sequence can be automatically combined into an M / 2-point complex sequence, and the 2... i Group x iq (n i Calculate the CFFT of M / 2 points to obtain the complex sequence F_X of M / 2 points. iq (f i ), where f i =0,1,…,M / 2-1, this sequence is X iq (k i The first half of ) is X iq (f i )=F_X iq (f i ) = CFFT[x iq (n i )).

[0049] Based on the symmetry properties of the DFT, the DFT of a real sequence has circular conjugate symmetry, therefore X iq (k i The latter half of ) can be obtained by transforming the former half, that is, when k i When M / 2+1, M / 2+2, ..., M-1, The asterisk (*) represents the conjugate symbol. When k i When X = M / 2, iq (k i The median value X of the DFT is not included in the LEA processing results and cannot be calculated based on symmetry. iq (M / 2) needs to be calculated separately according to the definition of DFT. In summary, the formula for calculating the FFT of a few-point real sequence based on LEA is:

[0050]

[0051] For a small number of real sequences x with M points iq (n i First calculate X. iq (M / 2) and temporarily store; then, use LEA to process x. iq (n i Calculate the CFFT of M / 2 points to obtain F_X iq (f i ), F_X iq (f i The real part Re(f)i ) and imaginary part Im(f i Coverage x iq (n i The data is stored in the original M*mB storage space. A schematic diagram illustrating the fast computation of the first half of a few-point real sequence's DFT based on LEA and its in-situ storage is shown below. Figure 5 As shown. The DFT of a real sequence has circular conjugate symmetry; therefore, only X needs to be stored. iq (0) to X iq The value of (M / 2) can be used to recover the complex sequence X at point M. iq (k i ), and complete the subsequent data reorganization.

[0052] for Figure 3 The simulation data shown is used to calculate the CFFT of 256 points for each of the four 512-point subsequences after the second-level decomposition using LEA. This yields the first half of the DFT of the four 512-point subsequences, i.e., X. 2q (k2), q=1,2,3,4, k2=0,1,…,255. Based on the above X iq (k i The formula can be used to recover the complete 512-point X. 2q The latter half of (k2), k2 = 257, 258, ..., 511, can be calculated from the former half. Therefore, it is only necessary to save X. 2q (0) to X 2q A complex sequence of (256), where X 2q (0) to X 2q The real and imaginary parts of (255) are in accordance with Figure 5 The in-situ storage is shown.

[0053] (4) Recombining multi-point FFT

[0054] In step (2), the experimental data are grouped according to time parity. If the result of the DFT transformation on x(n) is X(k), that is, X(k) = DFT[x(n)], k = 0, 1, ..., N-1, then X 11 (k1)=DFT[x 11 (n1)],X 12 (k1)=DFT[x 12 [n1], k1 = 0, 1, ..., N / 2-1. Let Where j is the imaginary part sign, then according to the core formula of the radix-2 time-decimation FFT, we have

[0055]

[0056] In step (3), the i-th level 2 was obtained using the LEA built into the microcontroller. iThe first half of the FFT of short sequences of length M is used below, utilizing the core formula of radix-2 time-decimation FFT, X. iq (k i The first half of ) and X iq (M / 2) can be recombined to form the (i-1)th level 2. i-1 The first half of the FFT of subsequences of length 2M. Let r = i-1, R = 2M, The DFT of each subsequence in level r is X. rs (k r ), where s = 1, 2, ..., 2 r k r If the subsequence has values ​​of 0, 1, ..., R-1, then the formula for calculating the first half of the FFT of the reconstructed r-th level R-point subsequence is:

[0057] X rs (k r )

[0058]

[0059] Calculate and save X according to the above formula. rs (k r The first half of ) is k r =0,1,…,M-1, and temporarily store X rs (R / 2). Then, using the core formula of radix-2 time-decimation FFT and the circular conjugate symmetry of real sequence DFT, the first half of the FFT of each subsequence at level i-2 can be reconstructed. This process is repeated level by level until the first half of the FFT of the multi-point experimental data x(n), i.e., the first half of X(k), is obtained. X(k) is symmetric about N / 2, therefore, only the first half needs to be retained in the FFT result.

[0060] The i-th level group 2 complex sequence X iq (k i The first half of the sequence can be used to recombine the (i-1)th level group 1 complex sequence X. rs (k r The first half of the complex sequence in the i-th stage occupies M*mB of space, and the first half of the complex sequence in the (i-1)-th stage occupies 2M*mB of space. The number of groups in the i-th stage is twice the number of groups in the (i-1)-th stage. The total storage space required for each stage is N*mB. Therefore, the recombined (i-1)-th stage X rs (k r The first half of the ) can cover the i-th level X iq (k iThe first half of the FFT is stored without needing to allocate new storage space. Similarly, from level i to level 0, storage can be performed level by level without needing to allocate new storage space. A schematic diagram of a small-point FFT recombining a large-point FFT and storing it in-situ is shown below. Figure 6 As shown.

[0061] for Figure 3 The simulation data shown is based on the 4 sets of X obtained in step (3). 2q (0) to X 2q (256) complex sequence, combined with the above X rs (k r The calculation formula can recover the first half of the DFT of the first-level two groups of 1024-point subsequences, which are X. 11 (k1) and X 12 (k1), where k1 = 0, 1, ..., 512. Save X. 1s (0) to X 1s (512) is a complex sequence, s = 1, 2, where X 1s (0) to X 1s The real and imaginary parts of (511) are according to Figure 5 The data is stored in its original location as shown. Then, based on the stored X... 1s Given the value of (k1), let i = 1, s = 1, M = 1024, and continue calling X. rs (k r The calculation formula can be used to recover the first half of the DFT of the 2048-point simulation data at level 0, namely X(k), k = 0, 1, ..., 1023. The real and imaginary parts of X(k) are stored in situ overwrite.

[0062] (5) Calculate the power spectrum

[0063] Step (4) reconstructs the first half of X(k) corresponding to the N-point experimental data x(n), i.e., the N / 2-point complex sequence. Based on X(k), the first half of the power spectrum P(k) of the experimental data can be calculated using the built-in hardware multiplier of the microcontroller. This is a long integer data of N / 2 points, occupying N*mB of storage space, which is consistent with the storage capacity occupied by the first half of X(k). Therefore, the first half of the power spectrum of multi-point experimental data can cover the first half of its FFT storage without needing to allocate new storage space. A schematic diagram of calculating the first half of the power spectrum of experimental data and storing it in place is shown below. Figure 7 As shown, for experimental data of length N, the processing of the multi-point FFT method based on a microcontroller with LEA requires only N*mB of storage space.

[0064] for Figure 3The simulation data shown is obtained by performing the FFT of the 2048-point simulation data in step (4). Then, the first half of its power spectrum is calculated, and... Figure 7 Perform in-situ storage. Convert power to amplitude, thus obtaining a locally magnified view of the amplitude spectrum of the simulation data, as shown below. Figure 8 As shown. The first half of the FFT for N-point experimental data is directly calculated using a radix-2 decimation-time FFT, which requires... Nth-order complex multiplication and N complex additions. One complex multiplication corresponds to 4 real multiplications (or simply multiplications) and 2 real additions (or simply additions), and one complex addition corresponds to 2 additions. Therefore, direct calculation requires a total of 2N log2 N multiplications and 2N log2 N additions. Using the method of this invention, the N-point experimental data is decomposed into the i-th level according to the odd or even time, then the FFT of the i-th level with fewer points is calculated, and then the first half of the FFT of the N-point experimental data is reconstructed, requiring approximately N(log2 N-1) multiplications and additions. Addition.

[0065] The comparison shows that for multi-point FFT processing, the computational complexity of the method in this invention is lower than that of FFT using radix-2 decimation-time. For few-point FFT, using the same computational method, the processing speed of a microcontroller with LEA at the same clock frequency is at least 10 times faster than that without LEA. Therefore, the multi-point FFT method based on a microcontroller with LEA can effectively improve the processing speed of multi-point FFT and enhance real-time performance.

[0066] Vortex flow meters based on digital signal processing methods often employ FFT to transform the signal from the time domain to the frequency domain, and then extract the frequency of the vortex flow signal. Real-time measurement in intelligent vortex flow meters primarily relies on the computational speed of FFT-based digital signal processing methods. This invention... Figure 9 The experimental data shown below is used as an example to verify the real-time performance and accuracy of vortex flow signal measurement based on a microcontroller with LEA. For a 50mm diameter vortex flow meter, the sampling frequency f... s With a frequency of 3333.3 Hz, a sampling point count N of 2048, and a given gas flow rate of approximately 52 Hz, the time-domain waveform of the vortex flow signal output by the vortex sensor is as follows: Figure 9 As shown.

[0067] The selected low-power microcontroller with built-in LEA can process a maximum of 512-point CFFT (i.e., M=1024). The flowchart for quickly implementing a 2048-point DFT of a real sequence using the microcontroller's built-in LEA is as follows. Figure 10As shown, the 2048-point experimental data x(n) is divided into two groups of 1024-point real sequences according to the parity of time n, namely, the even sequence and the odd sequence; using LEA, the CFFT of 512 points is calculated for the odd and even sequences respectively, to obtain the first half of the DFT of the odd and even sequences, that is, the two groups of 512-point complex sequences; then, according to the core formula, definition and circumferential conjugate symmetry, the first half of the DFT of the experimental data x(n) is reconstructed, that is, the 1024-point complex sequence X(k). The following details the specific process of the fast processing method for vortex flow signals based on a microcontroller with LEA:

[0068] For processing a given gas flow rate signal, firstly, a set of flow rate data x(n) is taken, which consists of N = 2048 real data points. Since M = 1024, the 2048 data points are grouped according to the above method, performing a first-order parity decomposition. That is, x(n) is divided into a real sequence and an even sequence x(n) of 1024 points based on the parity of time n. 11 (n1) and odd sequence x 12 (n1), at this point the subsequence length is equal to M, and there is no need to perform a second-level parity decomposition on the subsequence; secondly, according to step (3), LEA is used to decompose the dual sequence x respectively. 11 (n1) and odd sequence x 12 (n1) Calculating the CFFT of 512 points yields the first half of the DFT of two 1024-point subsequences, i.e., the 512-point complex sequence X. 11 (k1) and X 12 (k1). Then, the intermediate value X(512) of the 1024-point complex sequence X(k) is calculated separately using the definition formula; again, according to step (4), combined with the core formula of the radix-2 time-decimation FFT and the circular conjugate symmetry of the real sequence DFT, the first half of the DFT of the experimental data x(n) is recombined, that is, the 1024-point complex sequence X(k); finally, based on the first half of the DFT, the hardware multiplier of the microcontroller is used to calculate the first half of the power spectrum of the flow data, the result is stored in place to cover the first half of its DFT and converted into the corresponding amplitude spectrum. The local magnified image of the frequency domain amplitude spectrum obtained by the multi-point FFT method of the microcontroller with LEA is shown below. Figure 11 As shown, the frequency of the flow signal can be obtained after the above processing. Through actual verification, at a main frequency of 16MHz, the microcontroller completes the 2048-point FFT in about 12.1ms, which can fully meet the processing requirements of the vortex flow meter for the flow signal and realize the real-time display of the flow signal frequency.

[0069] This invention presents a multi-point Fast Fourier Transform (FFT) method based on a microcontroller with a low-power accelerator, designed to improve the real-time performance of the FFT for multi-point discrete-time series. First, experimental data is acquired through experimental data collection or simulation. Second, the multi-point experimental data is grouped hierarchically according to time parity, resulting in multiple groups of different even and odd sequences. Third, the FFT for each group of even and odd sequences is calculated using the microcontroller's built-in low-power accelerator, and the results are stored in situ. Then, based on circular conjugate symmetry and the core formula, the results are reconstructed in multiple stages to recover the first half of the discrete Fourier transform of the experimental data, which is also stored in situ. Finally, the first half of the power spectrum of the experimental data is calculated using the microcontroller's built-in hardware multiplier and stored in situ.

[0070] Terminology Explanation:

[0071] LEA: With low-power accelerator.

[0072] DFT: Discrete Fourier Transform.

[0073] FFT: Fast Fourier Transform.

[0074] CFFT: Complex Fast Fourier Transform.

[0075] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions conceived without creative effort should be included within the scope of protection of the present invention.

Claims

1. A multi-point fast Fourier transform method based on a microcontroller with a low-power accelerator, characterized by: Includes the following steps: S1: Obtain multi-point experimental data, i.e., multi-point sequences, through experimental acquisition or simulation. ; S2: Multipoint sequence Grouping by time parity step by step, we get multiple different sequences of fewer points, including even sequences and odd sequences; S3: Use the built-in LEA of the microcontroller to calculate the FFT of each group of odd and even sequences with fewer points, and store the FFT results of the fewer points in their original positions; The formulas for calculating the FFT of each set of odd-even sequences with fewer points are as follows: In the calculation formula, ; S4: Using the recombination calculation formula, the FFT results with fewer points are recombined in multiple stages to recover the experimental data. The first half of the DFT is stored in situ. The recombination calculation formula is as follows: In the recombination calculation formula, The part where q is an odd number, for In this context, q represents the even part, and j represents the imaginary part. The specific reorganization calculation is as follows: Let , , , The DFT of each subsequence at level r is ,in, , Calculate and save according to the recombination calculation formula. The first half, namely and temporarily store Then, using the core formula of radix-2 time-decimation FFT and the circular conjugate symmetry of real sequence DFT, the first half of the FFT of each subsequence at level i-2 is reconstructed; then, this process is repeated level by level until the multi-point experimental data is reconstructed. The first half of the FFT; S5: Calculate the first half of the power spectrum of the experimental data based on the hardware multiplier built into the microcontroller, and store it in place.

2. The multi-point fast Fourier transform method based on a microcontroller with a low-power accelerator according to claim 1, characterized in that, The multi-point experimental data is integer data. If the integer data occupies m bytes in the microcontroller, then N*m bytes of storage space should be allocated in the microcontroller to store the experimental data. The stepwise decomposition does not affect the total data length. The subsequences after each grouping are stored by overlay. In terms of memory, from data grouping to small-point FFT transformation, and then to data recombination, the in-situ overlay storage method is used stepwise.

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