Methods, apparatus, media, and electronic devices for determining quantum program mapping relationships

Abstract

This invention discloses a method, apparatus, medium, and electronic device for determining the mapping relationship of a quantum program. The method includes: acquiring the quantum program to be executed and the topology of a quantum chip; constructing a weighted undirected graph corresponding to the quantum program to be executed; determining the first parameter of each logical qubit in the quantum program to be executed based on the weighted undirected graph; acquiring the second parameter of each physical qubit in the quantum chip based on the topology of the quantum chip; and finally determining the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter, and the fidelity of the quantum chip, so as to maximize the fidelity of the mapping relationship of the quantum program to be executed. This solves the problem of randomness in constructing the mapping relationship of the quantum program to be executed, reduces the number of algorithm executions, optimizes execution performance, and can determine the optimal mapping of the quantum program to be executed, so that the fidelity of the acquired mapping relationship is high and the utilization of quantum chip resources is maximized.

Description

Technical Field

[0001] This invention belongs to the field of quantum computing technology, and in particular to a method, apparatus, medium and electronic device for determining quantum program mapping relationships. Background Technology

[0002] A quantum computer is a physical device that performs high-speed mathematical and logical operations, stores and processes quantum information in accordance with the laws of quantum mechanics. When a device processes and calculates quantum information and runs quantum algorithms, it is a quantum computer. Because of its ability to process mathematical problems more efficiently than ordinary computers—for example, reducing the time to crack RSA keys from hundreds of years to hours—quantum computers have become a key technology under research.

[0003] In the noisy intermediate-scale quantum computing stage, the states of individual qubits on a single physical chip are unstable. Factors such as the noise parameters of two-qubit quantum logic gates and the decoherence time of physical qubits can interfere with the effective utilization of physical qubits, thus having an unknown impact on the operation of the entire quantum circuit. For example, since the decoherence times of each physical qubit are different, if the depth of the quantum circuit that can run on the entire quantum chip is limited because the decoherence time of a certain physical qubit is short, it will inevitably lead to the waste of other physical qubit resources.

[0004] In existing technologies, determining the optimal mapping path for a quantum program to be executed usually requires initially constructing a random mapping relationship for the quantum program. However, the random construction of the mapping relationship is inherently random and cannot guarantee the actual effect of the algorithm. Only through multiple randomizations can the algorithm obtain a better mapping relationship.

[0005] Therefore, determining the mapping relationship of the quantum program to be executed, reducing the number of times the algorithm is executed, and optimizing the execution performance of the algorithm is an urgent problem to be solved. Summary of the Invention

[0006] The purpose of this invention is to provide a method, apparatus, medium, and electronic device for determining quantum program mapping relationships, in order to overcome the shortcomings of the prior art. It can solve the problem of randomness in constructing the mapping relationship of the quantum program to be executed, and can determine the optimal mapping line of the quantum program to be executed, so that the obtained mapping relationship has high fidelity and maximizes the utilization of quantum chip resources.

[0007] One embodiment of this application provides a method for determining a quantum program mapping relationship, the method comprising:

[0008] Obtain the quantum program to be executed and the topology of the quantum chip, wherein the topology is used to represent the physical qubits in the quantum chip and the connection relationships between the physical qubits;

[0009] Construct the weighted undirected graph corresponding to the quantum program to be executed;

[0010] Based on the weighted undirected graph, determine the first parameter of each logical qubit in the quantum program to be executed;

[0011] Based on the topology of the quantum chip, obtain the second parameter of each physical qubit in the quantum chip;

[0012] Based on the first parameter, the second parameter, and the fidelity of the quantum chip, the mapping relationship of the quantum program to be executed is determined so that the fidelity corresponding to the mapping relationship of the quantum program to be executed is the highest.

[0013] Optionally, the fidelity of the quantum chip includes the fidelity of the two quantum logic gates between every two physical qubits in the topology of the quantum chip and the measurement fidelity corresponding to each physical qubit.

[0014] Optionally, constructing the weighted undirected graph corresponding to the quantum program to be executed includes:

[0015] Obtain the quantum logic gates and their logical qubits in the quantum program to be executed;

[0016] Based on the quantum logic gates and their logical qubits, a weighted undirected graph corresponding to the quantum program to be executed is constructed. The weighted undirected graph includes vertices, undirected edges, and edge weights. The vertices represent the logical qubits operated by the quantum logic gates, the undirected edges represent the quantum logic gates, and the edge weights are determined according to the number of quantum logic gates operating on the same qubits.

[0017] Optionally, determining the first parameter of each logical qubit in the quantum program to be executed based on the weighted undirected graph specifically involves:

[0018] The first parameter of each logical qubit is determined based on the degree of each vertex in the weighted undirected graph, wherein the degree is determined based on the sum of the weights of the undirected edges adjacent to each vertex.

[0019] Optionally, obtaining the second parameter of each physical qubit in the quantum chip based on the quantum chip topology includes:

[0020] The number of connection edges for each physical quantum bit is determined based on the topology of the quantum chip.

[0021] The second parameter of each physical qubit is determined based on the number of connection edges of each physical qubit.

[0022] Optionally, determining the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter, and the fidelity of the quantum chip includes:

[0023] Based on the first parameter, the first logical qubit in the quantum program to be executed is determined, wherein the first parameter value of the first logical qubit is the largest.

[0024] Based on the second parameter and the fidelity of the quantum chip, the first mapping relationship of the first logical qubit is determined;

[0025] Delete the first logical qubit, and determine whether there is a second logical qubit in the quantum program to be executed, wherein the first parameter value of the second logical qubit is the largest;

[0026] If the second logical qubit does not exist in the quantum program to be executed, then the mapping relationship of all logical qubits determined by the quantum program to be executed is obtained.

[0027] Optionally, the method further includes:

[0028] If the second logical qubit exists in the quantum program to be executed, then based on the current second parameter and the fidelity of the quantum chip, the second mapping relationship of the second logical qubit is determined;

[0029] Delete the second logical qubit, update the logical qubits in the quantum program to be executed, and return to the step of determining whether the second logical qubit exists in the quantum program to be executed, until the second logical qubit does not exist in the quantum program to be executed.

[0030] One embodiment of this application provides a device for determining quantum program mapping relationships, the device comprising:

[0031] The first acquisition module is used to acquire the quantum program to be executed and the topology of the quantum chip, wherein the topology is used to represent the physical qubits in the quantum chip and the connection relationships between the physical qubits.

[0032] The building module is used to construct the weighted undirected graph corresponding to the quantum program to be executed;

[0033] The first determining module is used to determine the first parameter of each logical qubit in the quantum program to be executed based on the weighted undirected graph.

[0034] The second acquisition module is used to acquire the second parameter of each physical qubit in the quantum chip according to the topology of the quantum chip;

[0035] The second determining module is used to determine the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter and the fidelity of the quantum chip, so as to maximize the fidelity corresponding to the mapping relationship of the quantum program to be executed.

[0036] Optionally, the building module includes:

[0037] An acquisition unit is used to acquire the quantum logic gates and their logical qubits in the quantum program to be executed;

[0038] A construction unit is used to construct a weighted undirected graph corresponding to the quantum program to be executed based on the quantum logic gate and the logical qubits of its operation. The weighted undirected graph includes vertices, undirected edges, and edge weights. The vertices represent the logical qubits of the quantum logic gate operation, the undirected edges represent the quantum logic gates, and the edge weights are determined according to the number of quantum logic gates that operate on the same qubits.

[0039] Optionally, the first determining module specifically includes:

[0040] The first determining unit is used to determine the first parameter of each logical qubit based on the degree of each vertex in the weighted undirected graph, wherein the degree is determined based on the sum of the weights of the undirected edges adjacent to each vertex.

[0041] Optionally, the second acquisition module includes:

[0042] The second determining unit is used to determine the number of connection edges for each physical quantum bit based on the topology of the quantum chip.

[0043] The third determining unit is used to determine the second parameter of each physical qubit based on the number of connection edges of each physical qubit.

[0044] Optionally, the second determining module includes:

[0045] The fourth determining unit is used to determine the first logical qubit in the quantum program to be executed based on the first parameter, wherein the first parameter value of the first logical qubit is the largest.

[0046] The fifth determining unit is used to determine the first mapping relationship of the first logical qubit based on the second parameter and the fidelity of the quantum chip;

[0047] The sixth determining unit is used to delete the first logical qubit and determine whether there is a second logical qubit in the quantum program to be executed, wherein the first parameter value of the second logical qubit is the largest.

[0048] The first judgment unit is used to obtain the mapping relationship of all logical qubits determined by the quantum program to be executed if the second logical qubit does not exist in the quantum program to be executed.

[0049] Optionally, the second determining module further includes:

[0050] The second judgment unit is used to determine the second mapping relationship of the second logical qubit based on the current second parameter and the fidelity of the quantum chip if the second logical qubit exists in the quantum program to be executed.

[0051] An update unit is used to delete the second logical qubit, update the logical qubits in the quantum program to be executed, and return to the step of determining whether the second logical qubit exists in the quantum program to be executed, until the second logical qubit does not exist in the quantum program to be executed.

[0052] Another embodiment of this application provides a storage medium storing a computer program, wherein the computer program is configured to execute the method described in any of the preceding claims when running.

[0053] Another embodiment of this application provides an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the method described in any of the preceding claims.

[0054] Another embodiment of this application provides a quantum computer operating system, which determines the quantum program mapping relationship according to the method described in any of the preceding claims.

[0055] Another embodiment of this application provides a quantum computer, the quantum computer including the quantum computer operating system.

[0056] Compared with existing technologies, this application first obtains the quantum program to be executed and the topology of the quantum chip, and constructs a weighted undirected graph corresponding to the quantum program to be executed. Then, based on the weighted undirected graph, it determines the first parameter of each logical qubit in the quantum program to be executed. Next, based on the topology of the quantum chip, it obtains the second parameter of each physical qubit in the quantum chip. Finally, based on the first parameter, the second parameter, and the fidelity of the quantum chip, it determines the mapping relationship of the quantum program to be executed, so as to maximize the fidelity of the mapping relationship of the quantum program to be executed. This solves the problem of randomness in constructing the mapping relationship of the quantum program to be executed, reduces the number of algorithm executions, optimizes execution performance, and can determine the optimal initial mapping relationship of the quantum program to be executed, so that the obtained mapping relationship has high fidelity and maximizes the utilization of quantum chip resources. Attached Figure Description

[0057] Figure 1 A hardware structure block diagram of a computer terminal for a method of determining a quantum program mapping relationship provided in an embodiment of the present invention;

[0058] Figure 2 A flowchart illustrating a method for determining a quantum program mapping relationship provided in an embodiment of the present invention;

[0059] Figure 3 A schematic diagram of the topological structure of a physical qubit in a quantum chip provided in an embodiment of the present invention;

[0060] Figure 4 This is a schematic diagram of a weighted undirected graph provided in an embodiment of the present invention;

[0061] Figure 5 This is a schematic diagram of a quantum program mapping relationship determination device provided in an embodiment of the present invention. Detailed Implementation

[0062] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0063] The present invention first provides a method for determining quantum program mapping relationships, which can be applied to electronic devices, such as computer terminals, specifically ordinary computers, quantum computers, etc.

[0064] The following detailed explanation uses a computer terminal as an example. Figure 1 This is a hardware structure block diagram of a computer terminal for a method of determining quantum program mapping relationships provided in an embodiment of the present invention. Figure 1 As shown, a computer terminal may include one or more ( Figure 1Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing data are also shown. Optionally, the computer terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the computer terminal described above. For example, the computer terminal may also include components that are more complex than those described above. Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0065] The memory 104 can be used to store software programs and modules of application software, such as the program instructions / modules corresponding to the method for determining a quantum program mapping relationship in the embodiments of this application. The processor 102 executes various functional applications and data processing by running the software programs and modules stored in the memory 104, thereby implementing the above-described method. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to a computer terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0066] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider for the computer terminal. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module, used for wireless communication with the Internet.

[0067] It's important to note that a true quantum computer has a hybrid structure, comprising two main parts: a classical computer responsible for performing classical computations and control, and a quantum device responsible for running quantum programs to achieve quantum computation. A quantum program is a sequence of instructions written in a quantum language such as QRunes that can run on a quantum computer, supporting operations on quantum logic gates and ultimately enabling quantum computing. Specifically, a quantum program is a sequence of instructions that operates on quantum logic gates according to a specific timing order.

[0068] In practical applications, due to limitations in the development of quantum device hardware, quantum computing simulations are often required to verify quantum algorithms, quantum applications, and so on. Quantum computing simulation is the process of simulating the execution of a quantum program corresponding to a specific problem using a virtual architecture (i.e., a quantum virtual machine) built with the resources of a regular computer. Typically, it is necessary to construct a quantum program corresponding to a specific problem. The quantum program referred to in this embodiment of the invention is a program written in a classical language that represents qubits and their evolution, wherein qubits, quantum logic gates, etc., related to quantum computing all have corresponding classical code representations.

[0069] Quantum circuits, also known as quantum logic circuits, are a common manifestation of quantum programming and are the most widely used general-purpose quantum computing model. They represent circuits that operate on qubits under an abstract concept. They consist of qubits, circuits (timelines), and various quantum logic gates. Finally, the results are often read out through quantum measurement operations.

[0070] Unlike traditional circuits that use metal wires to transmit voltage or current signals, in quantum circuits, the circuits can be seen as being connected by time. That is, the state of a quantum bit evolves naturally over time, following the instructions of the Hamiltonian operator until it encounters a logic gate and is operated on.

[0071] A quantum program corresponds to a single quantum circuit. The quantum program described in this invention refers to this single quantum circuit, where the total number of qubits in the single quantum circuit is the same as the total number of qubits in the quantum program. This can be understood as follows: a quantum program can consist of a quantum circuit, measurement operations on the qubits within the quantum circuit, registers for storing measurement results, and control flow nodes (jump instructions). A single quantum circuit can contain dozens, hundreds, or even thousands of quantum logic gate operations. The execution of a quantum program is the process of executing all the quantum logic gates in a specific timing order. It should be noted that the timing order refers to the chronological sequence in which individual quantum logic gates are executed.

[0072] It's important to note that in classical computing, the most basic unit is the bit, and the most fundamental control mode is the logic gate. Circuit control can be achieved through combinations of logic gates. Similarly, the way to process qubits is through quantum logic gates. Quantum logic gates enable the evolution of quantum states and are the foundation of quantum circuits. Quantum logic gates include single-qubit gates, such as Hadamard gates (H-gates), Pauli-X gates (X-gates), Pauli-Y gates (Y-gates), Pauli-Z gates (Z-gates), RX gates, RY gates, RZ gates, etc.; and multi-qubit gates, such as CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc. Quantum logic gates are generally represented using unitary matrices, which are not only matrix forms but also operations and transformations. The effect of a quantum logic gate on a quantum state is generally calculated by left-multiplying the unitary matrix by the matrix corresponding to the right vector of the quantum state.

[0073] A quantum state, or the logical state of a qubit, is represented in binary in quantum algorithms (or quantum programs). For example, a set of qubits q0, q1, and q2 represents the 0th, 1st, and 2nd qubits, ordered from most significant bit to least significant bit as q2q1q0. The quantum state corresponding to this set of qubits is a superposition of the eigenstates corresponding to this set of qubits. There are a total of 2^(1 / 2) eigenstates corresponding to this set of qubits, that is, 8 eigenstates (definite states): |000>, |001>, |010>, |011>, |100>, |101>, |110>, and |111>. Each bit in each eigenstate corresponds to the qubit. For example, in the state |000>, 000 corresponds to q2q1q0 from most significant bit to least significant bit. |> is the Dirac notation.

[0074] To illustrate the logic state of a single qubit. It may be in a superposition of the states |0>, |1>, |0>, and |1> (an uncertain state), which can be specifically represented as: Where c and d are complex numbers representing the quantum state amplitude (probability amplitude), and the square of the amplitude modulus |c| 2 and |d| 2 Let |c| represent the probabilities of the |0> state and the |1> state, respectively. 2 +|d| 2 =1. In short, a quantum state is a superposition of eigenstates. When the probability of other eigenstates is 0, it is in a uniquely determined eigenstate.

[0075] See Figure 2 , Figure 2 This is a flowchart illustrating a method for determining a quantum program mapping relationship, provided in an embodiment of the present invention.

[0076] An embodiment of a method for determining a quantum program mapping relationship is provided in this embodiment. The method for determining the quantum program mapping relationship includes:

[0077] S201: Obtain a quantum program to be executed and a quantum chip topology structure, where the topology structure is used to represent physical qubits in the quantum chip and the connection relationship between physical qubits.

[0078] Specifically, a quantum program to be executed mainly consists of dozens, hundreds, or even thousands of quantum logic gates. The execution process of a quantum program is a process of executing all quantum logic gates in a certain time sequence. It should be noted that the time sequence is the time order in which a single quantum logic gate is executed.

[0079] The quantum chip topology structure is used to represent the connection relationship between physical qubits in an electronic device, and the number of physical qubits included in the topology structure needs to be greater than or equal to the number of logical qubits in the quantum program to be executed, so that the quantum chip meets the execution conditions of the quantum program. It should be noted that for the sake of distinction, the qubit structure in a quantum chip is generally referred to as a physical qubit, and the object qubit operated in a quantum circuit is referred to as a logical qubit. The mapping relationship between a logical qubit and a physical qubit refers to the relationship in which the bits between the logical qubit and the physical qubit "correspond" to each other.

[0080] Exemplarily, for a quantum program to be executed CNOT(q[0], q[1]) << CNOT(q[0], q[2]) << CNOT(q[0], q[3]) << CNOT(q[1], q[3]) << CNOT(q[0], q[1]) << CNOT(q[0], q[1]) << CNOT(q[1], q[3]), the logical qubits it operates on are q[0], q[1], q[2], q[3] respectively. Therefore, the number of physical qubits of the quantum chip that can be adapted to execute this quantum program is at least 4.

[0081] See Figure 3 , Figure 3 FIG. 19 is a schematic diagram of the topology structure of physical qubits of a quantum chip provided by this application. The quantum chip includes 6 physical qubits, namely Q[0], Q[1], Q[2], Q[3], Q[4], Q[5]. These 6 physical qubits can be capacitively coupled, and only adjacent physical qubits have a coupling relationship. Among them, Q[0] is connected to Q[1] and Q[3], Q[4] is connected to Q[1], Q[3] and Q[5], Q[2] is connected to Q[1] and Q[5], and Q[5] is connected to Q[2] and Q[4].

[0082] S202: Construct a weighted undirected graph corresponding to the quantum program to be executed.

[0083] Undirected graphs have a wide range of applications and can be used to represent the driving dependencies between events, the scheduling between tasks, etc.

[0084] A weighted undirected graph can refer to the degree of importance of an edge between vertices in an undirected graph with respect to a certain factor or index relative to a certain thing, reflecting the percentage of a certain factor or index, or emphasizing the relative importance of a certain factor or index.

[0085] In a specific implementation, constructing a weighted undirected graph corresponding to the quantum program to be executed may include the following steps:

[0086] S2021: Obtain the quantum logic gates in the quantum program to be executed and the logical qubits on which they operate.

[0087] Specifically, the quantum program to be executed can be understood as an operation sequence, which mainly includes quantum logic gates, the qubits on which the quantum logic gates operate, and measurement operations (Measure), etc.

[0088] Exemplarily, for a quantum program to be executed CNOT(q[0], q[1]) << CNOT(q[0], q[2]) << CNOT(q[0], q[3]) << CNOT(q[1], q[3]) << CNOT(q[0], q[1]) << CNOT(q[0], q[1]) << CNOT(q[1], q[3]), it contains a total of 7 quantum logic gates, and the logical qubits on which they operate are q[0], q[1], q[2], and q[3] respectively.

[0089] S2022: Based on the quantum logic gates and the logical qubits on which they operate, construct a weighted undirected graph corresponding to the quantum program to be executed. Among them, the weighted undirected graph includes: vertices, undirected edges, and the weights of the edges. The vertices are used to represent the logical qubits on which the quantum logic gates operate, the undirected edges are used to represent the quantum logic gates, and the weights of the edges are determined according to the number of quantum logic gates operating on the same qubit.

[0090] For example, based on the above-mentioned quantum program to be executed, the logical qubits of its operation are q[0], q[1], q[2], and q[3], so the weighted undirected graph corresponding to the quantum program to be executed has 4 vertices; the quantum program to be executed has a total of 7 quantum logic gates CNOT(q[0], q[1]), CNOT(q[0], q[2]), CNOT(q[0], q[3]), CNOT(q[1], q[3]), CNOT(q[0], q[1]), CNOT(q[0], q[1]), and CNOT(q[1], q[3]), among which, the quantum logic gates that operate on the same qubits are 3 CNOT(q[0], q[1]), 2 CNOT(q[1], q[3]), CNOT(q[0], q[2]), and CNOT(q[0], q[3]) and 1 CNOT(q[0], q[3]). Therefore, we can obtain four undirected edges and their corresponding weights: the undirected edge between q[0] and q[1] with a weight of 3; the undirected edge between q[0] and q[2] with a weight of 1; the undirected edge between q[0] and q[3] with a weight of 1; and the undirected edge between q[1] and q[3] with a weight of 2. Thus, we obtain the following... Figure 4 The diagram shows a weighted undirected graph.

[0091] S203: Based on the weighted undirected graph, determine the first parameter of each logical qubit in the quantum program to be executed.

[0092] Specifically, the first parameter of each logical qubit is determined based on the degree of each vertex in the weighted undirected graph, wherein the degree is determined based on the sum of the weights of the undirected edges adjacent to each vertex.

[0093] For example, such as Figure 4 As shown, the weighted undirected graph has four vertices: q[0], q[1], q[2], and q[3]. Vertex q[0] has three adjacent undirected edges: the undirected edge between q[0] and q[1] with a weight of 3; the undirected edge between q[0] and q[2] with a weight of 1; and the undirected edge between q[0] and q[3] with a weight of 1. Therefore, the first parameter value of vertex q[0] is the sum of the weights of its three adjacent undirected edges, which is 5. Similarly, the first parameter value of vertex q[1] is 5, the first parameter value of vertex q[2] is 1, and the first parameter value of vertex q[3] is 3.

[0094] S204: Based on the topology of the quantum chip, obtain the second parameter of each physical qubit in the quantum chip.

[0095] Specifically, in existing technologies, the topological structure of quantum chips may be a one-dimensional chain structure, where all physical qubits are on a single line; or it may be a two-dimensional chain structure, for example, ... Figure 3 The quantum chip topology shown is a two-dimensional chain structure.

[0096] Obtaining the second parameter of each physical qubit in the quantum chip may include the following steps:

[0097] The number of connection edges for each physical quantum bit is determined based on the topology of the quantum chip.

[0098] The second parameter of each physical qubit is determined based on the number of connection edges of each physical qubit.

[0099] For example, according to Figure 3 The quantum chip topology shown has the following connection relationships for each physical qubit: Q[0] is connected to Q[1] and Q[3], Q[4] is connected to Q[1], Q[3] and Q[5], Q[2] is connected to Q[1] and Q[5], and Q[5] is connected to Q[2] and Q[4]. Therefore, the second parameter value of physical qubit Q[0] is 2, the second parameter value of Q[1] is 3, the second parameter value of Q[2] is 2, the second parameter value of Q[3] is 2, the second parameter value of Q[4] is 3, and the second parameter value of Q[5] is 2.

[0100] S205: Determine the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter and the fidelity of the quantum chip, so as to maximize the fidelity corresponding to the mapping relationship of the quantum program to be executed.

[0101] Specifically, the fidelity of the quantum chip includes the fidelity of the two quantum logic gates between every two physical qubits in the topology of the quantum chip and the measurement fidelity corresponding to each physical qubit.

[0102] Fidelity characterizes the similarity between the output of an electronic device and the input signal. The higher the fidelity, the more realistic the sound or image output by the electronic device. In quantum chips, higher fidelity means lower noise, smaller measurement errors after running a quantum program, and thus, a result closer to the desired outcome.

[0103] For example, see Figure 3 , Figure 3 This is a schematic diagram of the topological structure of a physical qubit in a quantum chip. The quantum chip includes 6 physical qubits, where the measurement fidelities of Q[0], Q[1], Q[2], Q[3], Q[4], and Q[5] are 0.95, 0.94, 0.93, 0.92, 0.91, and 0.90, respectively.

[0104] The specific method for obtaining the dual quantum logic gate fidelity between every two physical qubits in the quantum chip topology is as follows: For physical qubits that can be directly mapped to dual quantum logic gates, their fidelity is the corresponding dual quantum logic gate fidelity. For example, the dual quantum logic gate fidelity between Q[0] and Q[1] is 0.9, the dual quantum logic gate fidelity between Q[0] and Q[3] is 0.9, the dual quantum logic gate fidelity between Q[3] and Q[4] is 0.95, and the dual quantum logic gate fidelity between Q[4] and Q[1] is 0.95. The fidelity of the two quantum logic gates between Q[1] and Q[2] is 0.85, the fidelity of the two quantum logic gates between Q[2] and Q[5] is 0.75, and the fidelity of the two quantum logic gates between Q[4] and Q[5] is 0.7. For physical qubits that cannot be directly mapped to two quantum logic gates, it is necessary to use the SWAP quantum logic gate to move the physical qubits that cannot be directly mapped to adjacent positions, and then calculate the corresponding fidelity of the two quantum logic gates.

[0105] For example, for physical qubits Q[0] and Q[1] in the topology of a quantum chip, CNOT dual quantum logic gates can be directly mapped, that is, the fidelity of the dual quantum logic gate between Q[0] and Q[1] is 0.9; if CNOT dual quantum logic gates are to be mapped on physical qubits Q[0] and Q[2], the path to obtain the fidelity of physical qubits Q[0] and Q[2] can be to insert SWAP(q[0],q[1]) and CNOT(q[1],q[2]), the fidelity of the dual quantum logic gate of SWAP(q[0],q[1]) is the cube of the fidelity of the corresponding CNOT(q[0],q[1]) dual quantum logic gate, so the fidelity of the dual quantum logic gates corresponding to SWAP(q[0],q[1]) and CNOT(q[1],q[2]) is 0.5832 (0.9*0.9*0.9*0.8). Similarly, if CNOT dual quantum logic gates are to be mapped on physical qubits Q[0] and Q[4], the path to obtain the fidelity of physical qubits Q[0] and Q[4] can be to insert SWAP(q[0],q[3]) and CNOT(q[3],q[4]). Therefore, the fidelity of the dual quantum logic gate corresponding to CNOT(q[0],q[4]) is 0.69255 (0.9*0.9*0.9*0.95).

[0106] Following the above method, taking the CNOT dual quantum logic gate as an example, Table 1 below shows the fidelity statistics of applying the CNOT dual quantum logic gate between each quantum bit.

[0107] Table 1: Statistical Table of Fidelity of CNOT Two-Quantum Logic Gate Applications Between Quantum Bits

[0108]

[0109] Determining the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter, and the fidelity of the quantum chip may include:

[0110] Step 1: Determine the first logical qubit in the quantum program to be executed based on the first parameter, wherein the first parameter value of the first logical qubit is the largest.

[0111] Specifically, according to Figure 4 As shown, a first association container is constructed to store the vertices and first parameters of the weighted undirected graph. Optionally, the first association container can be a storage container of the Standard Template Library (STL), which can provide one-to-one data processing capabilities.

[0112] The weighted undirected graph vertices (logical qubits) and the first parameter are stored in the first associated container. At this time, the stored information in the first associated container is: q[0]: 5, q[1]: 5, q[2]: 1, q[3]: 3.

[0113] Traverse the stored information in the first associated container to determine the first logical qubit in the quantum program to be executed, where the first parameter of the first logical qubit has the largest value.

[0114] Specifically, the first parameter value of logical qubit q[0] is 5, the first parameter value of logical qubit q[1] is 5, the first parameter value of logical qubit q[2] is 1, and the first parameter value of logical qubit q[3] is 3. The mapping order of logical qubits in the quantum program to be executed is determined according to the first parameter value.

[0115] Since the first parameter values ​​of logical qubit q[0] and logical qubit q[1] are the same at this time, it is acceptable to map either logical qubit q[0] or logical qubit q[1] first, which will not have much impact on the final mapping result.

[0116] Step 2: Based on the second parameter and the fidelity of the quantum chip, determine the first mapping relationship of the first logical qubit.

[0117] Optionally, when the first logical qubit q[0] is processed first, the physical qubit with the highest second parameter is obtained, namely physical qubits Q[1] and Q[4]. The second parameter values ​​of both are 3. At the same time, since the measurement fidelity of Q[1] is greater than that of Q[4], the first logical qubit q[0] is mapped to the physical qubit Q[1], and the first mapping relationship q[0]--Q[1] of the first logical qubit q[0] can be determined.

[0118] Step 3: Delete the first logical qubit and determine whether there is a second logical qubit in the quantum program to be executed, wherein the first parameter value of the second logical qubit is the largest.

[0119] For example, the first logical qubit q[0] in the first associated container is deleted to obtain the second associated container. At this time, the stored information in the second associated container is: q[1]: 5, q[2]: 1, q[3]: 3.

[0120] Determine whether a second logical qubit exists in the current second associated container, wherein the first parameter value of the second logical qubit is the largest in the second associated container.

[0121] If the second logical qubit exists in the quantum program to be executed, then a second mapping relationship of the second logical qubit is determined based on the current second parameter and the fidelity of the quantum chip.

[0122] Specifically, at this time, the first parameter value of the second logical qubit q[1] is the largest. The physical qubit with the highest fidelity in the current quantum chip is selected for mapping. Since q[0] has been mapped, and since Q[1] in the quantum chip topology has already been mapped, it is necessary to find the physical qubit with the highest fidelity among Q[0], Q[2], Q[3], Q[4], and Q[5]. At the same time, considering the overall fidelity of the circuit, according to the fidelity calculation method, we get: The calculation results are shown in Table 2 below.

[0123] Table 2: Current Quantum Chip Fidelity Statistics

[0124]

[0125] According to the table above, The highest is Therefore, the second mapping relationship of the second logical qubit q[1] is q[1]--Q[0].

[0126] Delete the second logical qubit, update the logical qubits in the quantum program to be executed, and return to the step of determining whether the second logical qubit exists in the quantum program to be executed, until the second logical qubit does not exist in the quantum program to be executed.

[0127] Following the example above, delete the second logical qubit q[1], update the logical qubit in the quantum program to be executed, and the stored information in the second associated container is updated to: q[2]: 1, q[3]: 3.

[0128] At this time, there is a second logical qubit q[3] in the quantum program to be executed. Based on the second logical qubit q[3], the current second parameter and the fidelity of the quantum chip, the second mapping relationship of the current second logical qubit is determined.

[0129] Specifically, at this time, the first parameter value of the second logical qubit q[3] is the largest. The physical qubit with the highest fidelity in the current quantum chip is selected for mapping. Since q[0] and q[1] are mapped, and since Q[0] and Q[1] in the topology of the quantum chip have been mapped, it is necessary to find the physical qubit with the highest fidelity among Q[2], Q[3], Q[4], and Q[5]. At the same time, considering the overall fidelity of the circuit, according to the fidelity calculation method, we get: The calculation results are shown in Table 3 below.

[0130] Table 3: Current Fidelity Statistics of Quantum Chips

[0131]

[0132] According to the table above, The highest is Therefore, the second mapping relationship of the second logical qubit q[3] is q[3]--Q[4].

[0133] Following the above method, continue to delete the current second logical qubit q[3], update the logical qubits in the quantum program to be executed, and return to the step of determining whether there is a second logical qubit in the quantum program to be executed.

[0134] Following the example above, delete the current second logical qubit q[3], update the logical qubit in the quantum program to be executed, and at this time the storage information in the second associated container is updated to: q[2]: 1.

[0135] At this time, there is a second logical qubit q[2] in the quantum program to be executed. Based on the second logical qubit q[2], the current second parameter and the fidelity of the quantum chip, the second mapping relationship of the current second logical qubit is determined.

[0136] Specifically, at this time, the first parameter value of the second logical qubit q[2] is the largest. The physical qubit with the highest fidelity in the current quantum chip is selected for mapping. Since q[0], q[1], and q[3] have been mapped, and since Q[0], Q[1], and Q[4] in the topology of the quantum chip have already been mapped, it is necessary to find the physical qubit with the highest fidelity among Q[2], Q[3], and Q[5]. At the same time, considering the overall fidelity of the circuit, according to the fidelity calculation method, we get: The calculation results are shown in Table 4 below.

[0137] Table 4: Current Fidelity Statistics of Quantum Chips

[0138]

[0139] According to the table above, The highest is Therefore, the second mapping relationship of the second logical qubit q[2] is q[2]--Q[2].

[0140] Step 4: If the second logical qubit does not exist in the quantum program to be executed, then obtain the mapping relationship of all logical qubits determined by the quantum program to be executed.

[0141] When there is no second logical qubit in the quantum program to be executed, that is, when the information stored in the current second associated container is empty, the mapping relationship of all logical qubits determined by the quantum program to be executed is obtained, and the mapping relationship determined by the sequentially determined quantum program to be executed is arranged in the generation order to obtain the initial mapping relationship of the quantum program to be executed: q[0]--Q[1], q[1]--Q[0], q[3]--Q[4] and q[2]--Q[2].

[0142] It should be noted that the quantum program to be executed can include single-qubit quantum logic gates, two-qubit quantum logic gates, and multi-qubit quantum logic gates. However, before determining the corresponding weighted undirected graph of the quantum program to be executed, it is necessary to first transform the multi-qubit quantum logic gates into a combination of single-qubit and two-qubit quantum logic gates. Since a single-qubit quantum logic gate can directly map logical qubits to physical qubits, the single-qubit quantum logic gates obtained after the transformation and the single-qubit quantum logic gates that already exist in the original quantum program to be executed can be deleted (without affecting the mapping relationship). Then, the weighted undirected graph corresponding to the quantum program to be executed is constructed based on the two-qubit quantum logic gates obtained after the transformation and the two-qubit quantum logic gates that already exist in the original quantum program to be executed. For ease of explanation, only a segment of the quantum program to be executed containing two-qubit quantum logic gates is used as an example here.

[0143] As can be seen, compared with the prior art, this application first obtains the quantum program to be executed and the topology of the quantum chip, constructs the weighted undirected graph corresponding to the quantum program to be executed, then determines the first parameter of each logical qubit in the quantum program to be executed based on the weighted undirected graph, then obtains the second parameter of each physical qubit in the quantum chip based on the topology of the quantum chip, and finally determines the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter and the fidelity of the quantum chip, so as to maximize the fidelity of the mapping relationship of the quantum program to be executed, solve the problem of randomness in constructing the mapping relationship of the quantum program to be executed, reduce the number of algorithm executions, optimize execution performance, and determine the optimal initial mapping relationship of the quantum program to be executed, so that the obtained mapping relationship has high fidelity and maximizes the utilization of quantum chip resources.

[0144] See Figure 5 , Figure 5 This is a schematic diagram of the structure of a quantum program mapping relationship determination device provided in an embodiment of the present invention. Figure 2 Corresponding to the process shown, the device may include:

[0145] The first acquisition module 501 is used to acquire the quantum program to be executed and the topology of the quantum chip, wherein the topology is used to represent the physical qubits in the quantum chip and the connection relationship between the physical qubits.

[0146] Module 502 is used to construct the weighted undirected graph corresponding to the quantum program to be executed;

[0147] The first determining module 503 is used to determine the first parameter of each logical qubit in the quantum program to be executed based on the weighted undirected graph.

[0148] The second acquisition module 504 is used to acquire the second parameter of each physical qubit in the quantum chip according to the topology of the quantum chip;

[0149] The second determining module 505 is used to determine the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter and the fidelity of the quantum chip, so as to maximize the fidelity corresponding to the mapping relationship of the quantum program to be executed.

[0150] Specifically, the building module includes:

[0151] An acquisition unit is used to acquire the quantum logic gates and their logical qubits in the quantum program to be executed;

[0152] A construction unit is used to construct a weighted undirected graph corresponding to the quantum program to be executed based on the quantum logic gate and the logical qubits of its operation. The weighted undirected graph includes vertices, undirected edges, and edge weights. The vertices represent the logical qubits of the quantum logic gate operation, the undirected edges represent the quantum logic gates, and the edge weights are determined according to the number of quantum logic gates that operate on the same qubits.

[0153] Specifically, the first determining module is as follows:

[0154] The first determining unit is used to determine the first parameter of each logical qubit based on the degree of each vertex in the weighted undirected graph, wherein the degree is determined based on the sum of the weights of the undirected edges adjacent to each vertex.

[0155] Specifically, the second acquisition module includes:

[0156] The second determining unit is used to determine the number of connection edges for each physical quantum bit based on the topology of the quantum chip.

[0157] The third determining unit is used to determine the second parameter of each physical qubit based on the number of connection edges of each physical qubit.

[0158] Specifically, the second determining module includes:

[0159] The fourth determining unit is used to determine the first logical qubit in the quantum program to be executed based on the first parameter, wherein the first parameter value of the first logical qubit is the largest.

[0160] The fifth determining unit is used to determine the first mapping relationship of the first logical qubit based on the second parameter and the fidelity of the quantum chip;

[0161] The sixth determining unit is used to delete the first logical qubit and determine whether there is a second logical qubit in the quantum program to be executed, wherein the first parameter value of the second logical qubit is the largest.

[0162] The first judgment unit is used to obtain the mapping relationship of all logical qubits determined by the quantum program to be executed if the second logical qubit does not exist in the quantum program to be executed.

[0163] Specifically, the second determining module further includes:

[0164] The second judgment unit is used to determine the second mapping relationship of the second logical qubit based on the current second parameter and the fidelity of the quantum chip if the second logical qubit exists in the quantum program to be executed.

[0165] An update unit is used to delete the second logical qubit, update the logical qubits in the quantum program to be executed, and return to the step of determining whether the second logical qubit exists in the quantum program to be executed, until the second logical qubit does not exist in the quantum program to be executed.

[0166] Compared with existing technologies, this application first obtains the quantum program to be executed and the topology of the quantum chip, and constructs a weighted undirected graph corresponding to the quantum program to be executed. Then, based on the weighted undirected graph, it determines the first parameter of each logical qubit in the quantum program to be executed. Next, based on the topology of the quantum chip, it obtains the second parameter of each physical qubit in the quantum chip. Finally, based on the first parameter, the second parameter, and the fidelity of the quantum chip, it determines the mapping relationship of the quantum program to be executed, so as to maximize the fidelity of the mapping relationship of the quantum program to be executed. This solves the problem of randomness in constructing the mapping relationship of the quantum program to be executed, reduces the number of algorithm executions, optimizes execution performance, and can determine the optimal initial mapping relationship of the quantum program to be executed, so that the obtained mapping relationship has high fidelity and maximizes the utilization of quantum chip resources.

[0167] This invention also provides a storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the method embodiments described above when running.

[0168] Specifically, in this embodiment, the storage medium can be configured to store a computer program for performing the following steps:

[0169] S201: Obtain the quantum program to be executed and the topology of the quantum chip, wherein the topology is used to represent the physical qubits in the quantum chip and the connection relationships between the physical qubits;

[0170] S202: Construct the weighted undirected graph corresponding to the quantum program to be executed;

[0171] S203: Determine the first parameter of each logical qubit in the quantum program to be executed based on the weighted undirected graph;

[0172] S204: Based on the topology of the quantum chip, obtain the second parameter of each physical qubit in the quantum chip;

[0173] S205: Determine the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter and the fidelity of the quantum chip, so as to maximize the fidelity corresponding to the mapping relationship of the quantum program to be executed.

[0174] Specifically, in this embodiment, the storage medium may include, but is not limited to, USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks, and other media capable of storing computer programs.

[0175] This invention also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the method embodiments described above.

[0176] Specifically, the aforementioned electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the aforementioned processor, and the input / output device is connected to the aforementioned processor.

[0177] Specifically, in this embodiment, the processor can be configured to perform the following steps via a computer program:

[0178] S201: Obtain the quantum program to be executed and the topology of the quantum chip, wherein the topology is used to represent the physical qubits in the quantum chip and the connection relationships between the physical qubits;

[0179] S202: Construct the weighted undirected graph corresponding to the quantum program to be executed;

[0180] S203: Determine the first parameter of each logical qubit in the quantum program to be executed based on the weighted undirected graph;

[0181] S204: Based on the topology of the quantum chip, obtain the second parameter of each physical qubit in the quantum chip;

[0182] S205: Determine the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter and the fidelity of the quantum chip, so as to maximize the fidelity corresponding to the mapping relationship of the quantum program to be executed.

[0183] This invention also provides a quantum computer operating system, which implements the determination of quantum program mapping relationships according to any of the above-described method embodiments provided in this invention.

[0184] Embodiments of this application also provide a quantum computer, which includes the quantum computer operating system.

[0185] The above description, based on the embodiments shown in the figures, details the structure, features, and effects of the present invention. The above description is only a preferred embodiment of the present invention, but the present invention is not limited to the scope of implementation shown in the figures. Any changes made in accordance with the concept of the present invention, or equivalent embodiments modified to have equivalent changes, that do not exceed the spirit covered by the specification and figures, should be within the protection scope of the present invention.

Claims

1. A method for determining quantum program mapping relationships, characterized in that, The method includes: Obtain the quantum program to be executed and the topology of the quantum chip, wherein the topology is used to represent the physical qubits in the quantum chip and the connection relationships between the physical qubits; Constructing a weighted undirected graph corresponding to a quantum program to be executed includes: obtaining quantum logic gates and their logical qubits in the quantum program to be executed; and constructing a weighted undirected graph corresponding to the quantum program to be executed based on the quantum logic gates and their logical qubits, wherein the weighted undirected graph includes: vertices, undirected edges, and edge weights, wherein the vertices represent the logical qubits operated by the quantum logic gates, the undirected edges represent the quantum logic gates, and the edge weights are determined according to the number of quantum logic gates operating on the same qubits. Based on the weighted undirected graph, the first parameter of each logical qubit in the quantum program to be executed is determined, specifically: based on the degree of each vertex in the weighted undirected graph, the first parameter of each logical qubit is determined, wherein the degree is determined based on the sum of the weights of the undirected edges adjacent to each vertex; Based on the topology of the quantum chip, the second parameter of each physical qubit in the quantum chip is obtained, including: determining the number of connection edges of each physical qubit based on the topology of the quantum chip; and determining the second parameter of each physical qubit based on the number of connection edges of each physical qubit. Based on the first parameter, the second parameter, and the fidelity of the quantum chip, the mapping relationship of the quantum program to be executed is determined so that the fidelity corresponding to the mapping relationship of the quantum program to be executed is the highest.

2. The method according to claim 1, characterized in that, The fidelity of the quantum chip includes the fidelity of the two quantum logic gates between every two physical qubits in the topology of the quantum chip and the measurement fidelity corresponding to each physical qubit.

3. The method according to claim 1, characterized in that, Determining the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter, and the fidelity of the quantum chip includes: Based on the first parameter, the first logical qubit in the quantum program to be executed is determined, wherein the first parameter value of the first logical qubit is the largest. Based on the second parameter and the fidelity of the quantum chip, the first mapping relationship of the first logical qubit is determined; Delete the first logical qubit, and determine whether there is a second logical qubit in the quantum program to be executed, wherein the first parameter value of the second logical qubit is the largest; If the second logical qubit does not exist in the quantum program to be executed, then the mapping relationship of all logical qubits determined by the quantum program to be executed is obtained.

4. The method according to claim 3, characterized in that, The method further includes: If the second logical qubit exists in the quantum program to be executed, then based on the current second parameter and the fidelity of the quantum chip, the second mapping relationship of the second logical qubit is determined; Delete the second logical qubit, update the logical qubits in the quantum program to be executed, and return to the step of determining whether the second logical qubit exists in the quantum program to be executed, until the second logical qubit does not exist in the quantum program to be executed.

5. A device for determining quantum program mapping relationships, characterized in that, The device includes: The first acquisition module is used to acquire the quantum program to be executed and the topology of the quantum chip, wherein the topology is used to represent the physical qubits in the quantum chip and the connection relationships between the physical qubits. A construction module is used to construct a weighted undirected graph corresponding to a quantum program to be executed, including: obtaining the quantum logic gates and their logical qubits in the quantum program to be executed; constructing a weighted undirected graph corresponding to the quantum program to be executed based on the quantum logic gates and their logical qubits, wherein the weighted undirected graph includes: vertices, undirected edges and edge weights, the vertices are used to represent the logical qubits operated by the quantum logic gates, the undirected edges are used to represent the quantum logic gates, and the weights of the edges are determined according to the number of quantum logic gates operating on the same qubits; The first determining module is used to determine the first parameter of each logical qubit in the quantum program to be executed based on the weighted undirected graph. Specifically, it determines the first parameter of each logical qubit based on the degree of each vertex in the weighted undirected graph, wherein the degree is determined based on the sum of the weights of the undirected edges adjacent to each vertex. The second acquisition module is used to acquire the second parameter of each physical qubit in the quantum chip according to the topology of the quantum chip, including: determining the number of connection edges of each physical qubit according to the topology of the quantum chip; and determining the second parameter of each physical qubit according to the number of connection edges of each physical qubit. The second determining module is used to determine the mapping relationship of the quantum program to be executed based on the first parameter, the second parameter and the fidelity of the quantum chip, so as to maximize the fidelity corresponding to the mapping relationship of the quantum program to be executed.

6. A storage medium, characterized in that, The storage medium stores a computer program, wherein the computer program is configured to execute the method described in any one of claims 1 to 4 when it is run.

7. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the method described in any one of claims 1 to 4.

8. A quantum computer operating system, characterized in that, The quantum computer operating system, according to any one of claims 1 to 4, determines the quantum program mapping relationship.

9. A quantum computer, characterized in that, The quantum computer includes the quantum computer operating system as described in claim 8.

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