A map generation method, device, equipment, storage medium and program product

Abstract

The present disclosure provides a map generation method, device, equipment, storage medium and program product. The above-mentioned map generation method can splice all regions in a main region and at least one to-be-spliced region into a target map. The target map formed by the method does not overlap in space, can naturally and seamlessly transition in shape, and can meet the topological requirements in function.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and in particular to a map generation method, apparatus, device, storage medium, and program product. Background Technology

[0002] With the popularity of open-world games, it is often necessary to piece together a large map by combining regions with different appearances, functions, and meanings, such as rooms. The piecing together of such game maps needs to meet certain requirements, such as that the piecing together regions do not overlap spatially, that the appearance should transition naturally and seamlessly, and that the regions should meet specific topological requirements in terms of function.

[0003] However, there is currently no map generation method that can simultaneously meet the above requirements. Summary of the Invention

[0004] According to a first aspect of this disclosure, a map generation method is provided, the method comprising:

[0005] Obtain a main region for generating a target map, at least one region to be stitched, and a first set corresponding to the main region and a second set corresponding to at least one of the regions to be stitched; wherein, the first set is a set of connected units of the main region, and the second set is a set of connected units of at least one of the regions to be stitched.

[0006] Based on preset splicing conditions, a first main region candidate set is determined. The first main region candidate set is obtained by splicing the connected units in the first set and the connected units in the second set, and satisfies the preset splicing conditions.

[0007] Determine the target first main region from the first main region candidate set;

[0008] Based on the set of connected units corresponding to the first main region of the target, the first set is updated, and the connected units of the region to be spliced ​​that constitute the first main region of the target in the second set are deleted, so as to obtain the updated second set;

[0009] If the updated second set is empty, the first main region of the target is determined to be the target map.

[0010] According to a second aspect of this disclosure, a map generation apparatus is provided, the apparatus comprising:

[0011] The acquisition module is configured to acquire a main region for generating a target map, at least one region to be stitched, and a first set corresponding to the main region and a second set corresponding to at least one of the regions to be stitched; wherein the first set is a set of connected units of the main region, and the second set is a set of connected units of at least one of the regions to be stitched.

[0012] The first determining module is configured to determine a first main region candidate set based on preset splicing conditions. The first main region candidate set is a set of regions obtained by splicing the connected units in the first set and the connected units in the second set, and which satisfies the preset splicing conditions.

[0013] The second determining module is configured to determine the target first main region from the first main region candidate set;

[0014] An update module is configured to update the first set based on the set of connected units corresponding to the first main region of the target, and delete the connected units of the region to be spliced ​​that constitutes the first main region of the target in the second set, so as to obtain an updated second set;

[0015] The third determination module is configured to determine the first main region of the target as the target map when the updated second set is empty.

[0016] According to a third aspect of this disclosure, an electronic device is provided, comprising: a processor; and a memory storing a program, wherein the program includes instructions that, when executed by the processor, cause the processor to perform the method according to a first aspect of this disclosure.

[0017] According to a fourth aspect of this disclosure, a non-transitory computer-readable storage medium is provided storing computer instructions, wherein the computer instructions are configured to cause the computer to perform the method described according to a first aspect of this disclosure.

[0018] According to a fifth aspect of this disclosure, a computer program product is provided, comprising a computer program, wherein the computer program, when executed by a processor, implements the method described in accordance with a first aspect of this disclosure.

[0019] One or more technical solutions provided in this disclosure can stitch together all regions of the main region and at least one region to be stitched into a target map. The target map formed by this method will not overlap in space, can transition naturally and seamlessly in appearance, and can also meet the topological requirements in function. Attached Figure Description

[0020] Figure 1 Flow of the map generation method provided for exemplary embodiments of this disclosure Figure 1 ;

[0021] Figure 2 This is a schematic diagram of a main region and at least one region to be spliced, provided for an exemplary embodiment of this disclosure;

[0022] Figure 3 Flow of the map generation method provided for exemplary embodiments of this disclosure Figure 2 ;

[0023] Figure 4 This is a schematic diagram of the splicing area provided for an exemplary embodiment of this disclosure. Figure 1 ;

[0024] Figure 5 This is a schematic diagram of the splicing area provided for an exemplary embodiment of this disclosure. Figure 2 ;

[0025] Figure 6 Flow of the map generation method provided for exemplary embodiments of this disclosure Figure 3 ;

[0026] Figure 7 This is a flowchart of a map generation method provided for exemplary embodiments of this disclosure. Figure 4 ;

[0027] Figure 8 Schematic block diagram of a map generation apparatus provided for exemplary embodiments of this disclosure;

[0028] Figure 9 A schematic block diagram of an electronic device provided for an exemplary embodiment of this disclosure;

[0029] Figure 10 A schematic block diagram of a computer system provided for an exemplary embodiment of this disclosure. Detailed Implementation

[0030] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0031] It should be understood that the steps described in the method embodiments of this disclosure may be performed in different orders and / or in parallel. Furthermore, the method embodiments may include additional steps and / or omit the steps shown. The scope of this disclosure is not limited in this respect.

[0032] The term "comprising" and its variations as used herein are open-ended, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Definitions of other terms will be given in the description below. It should be noted that the concepts of "first", "second", etc., used in this disclosure are only used to distinguish different devices, modules, or units, and are not intended to limit the order of functions performed by these devices, modules, or units or their interdependencies.

[0033] It should be noted that the terms "a" and "a plurality of" used in this disclosure are illustrative rather than restrictive, and those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0034] The names of messages or information exchanged between multiple devices in the embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.

[0035] Among related technologies, there are tile-based generation algorithms that can generate seamlessly connected local areas, such as city models, from the bottom up, meeting aesthetic requirements. However, from a global perspective, the areas generated by this algorithm are meaningless and confusing, making it difficult to further refine the game scene.

[0036] Meanwhile, in related technologies, there are also function-based generation algorithms that can generate regions that meet functional requirements, such as maps, from top to bottom. However, regions generated using this algorithm cannot meet aesthetic requirements. Each region generated by this algorithm has the same size and uniform outline shape, resulting in a rigid and unattractive appearance.

[0037] Based on this, embodiments of this disclosure provide a map generation method. This method can be executed by a terminal device or a server. The terminal device can be a mobile phone, tablet computer, desktop computer, laptop computer, or personal digital assistant (PDA), etc. The server can be a server that implements map generation. The terminal device and the server can interact to achieve the map generation function. Specifically, the interaction between the terminal device and the server can be achieved through software applications (apps) on the terminal device. The terminal device and the player can interact with each other through one or more of the following methods: keyboard, touch screen, voice interaction, or handwriting. This disclosure does not impose any limitations on this.

[0038] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0039] Figure 1 Flow of the map generation method provided for exemplary embodiments of this disclosure Figure 1 ,like Figure 1 As shown, it includes the following steps:

[0040] S101. Obtain the main region for generating the target map, at least one region to be stitched, and a first set corresponding to the main region and a second set corresponding to the at least one region to be stitched; wherein the first set is a set of connected units of the main region, and the second set is a set of connected units of the at least one region to be stitched.

[0041] This disclosure does not limit the specific types of the main area and at least one area to be pieced together. For example, the main area and the area to be pieced together can be rooms or areas in a game. The main area and the area to be pieced together can have different and diverse shapes; of course, the main area and the area to be pieced together can also have the same shape. For example, the main area can be a dragon bone room in a game, which is the room where the player spawns or a room that the player can currently access; the area to be pieced together is a candidate room to be pieced together into the dragon bone room.

[0042] The main area has connections that directly connect to the outside world. The first set is the set of all connections in the main area that directly connect to the outside world; that is, the connections in the first set are directly connected to the outside world. It should be noted that connections between different units within the main area are not included in this first set.

[0043] The area to be spliced ​​has a connection point that is directly connected to the outside world. The second set is at least one area to be spliced, that is, the set of all connections points that are directly connected to the outside world of all areas to be spliced. In other words, the second set covers all connections points that are directly connected to the outside world of all areas to be spliced.

[0044] It is understandable that when the main area and the area to be spliced ​​are rooms, the connection point can be called a "door", and the area of ​​the main area and the area to be spliced ​​other than the connection point can be called a "wall".

[0045] In one embodiment, all regions to be pieced together within the at least one region to be pieced together have the same unlock priority. This unlock priority indicates the order in which the player unlocks the regions to be pieced together; the player must explore all lower-priority regions before unlocking higher-priority regions. In this embodiment, the main region may have the same unlock priority as the regions to be pieced together, or it may have a higher unlock priority than the regions to be pieced together.

[0046] Figure 2 A schematic diagram of a main region and at least one region to be spliced, provided for an exemplary embodiment of this disclosure, is shown in the figure. The main region 201 includes three connection ports directly connected to the outside world, namely connection port 1, connection port 2, and connection port 3. The at least one region to be spliced ​​202 includes two regions to be spliced, namely region to be spliced ​​202a and region to be spliced ​​202b. Region to be spliced ​​202a includes two connection ports directly connected to the outside world, namely connection port 4 and connection port 5. Region to be spliced ​​202b includes one connection port directly connected to the outside world, namely connection port 6. Therefore, in this example, the first set is {1,2,3}, and the second set is {4,5,6}.

[0047] S102. Based on preset splicing conditions, determine a first main region candidate set. The first main region candidate set is obtained by splicing the connected units in the first set and the connected units in the second set, and satisfies the preset splicing conditions.

[0048] In this step, a set of regions that satisfy the preset splicing conditions is obtained by splicing the connected units in the first set and the connected units in the second set.

[0049] In a specific example, such as Figure 3 As shown, determining the first primary region candidate set includes the following steps:

[0050] S301. Perform a Cartesian product operation on the first set and the second set to obtain at least one concatenation expression, each of the concatenation expressions including a connected unit belonging to the first set and a connected unit belonging to the second set.

[0051] In practical applications, "-" can be used to represent the concatenation operation between connected units, and "AB" can be used to represent the concatenation state of the region obtained after connecting connected unit A and connected unit B, where A and B are two different connected units. For example, "1-4" represents the concatenation state of the region after connecting connected unit 1 and connected unit 4.

[0052] The sequence "AB, CD" can be used to represent the splicing state of the region obtained after connecting connected unit A and connected unit B, and then connecting connected unit C and connected unit D, where A, B, C, and D are four different connected units. For example, "1-4, 2-6" represents the splicing state of the region obtained after first connecting connected unit 1 and connected unit 4, and then connecting connected unit 2 and connected unit 6.

[0053] The above operations satisfy the commutative law, that is, "1-4, 2-6 = 2-6, 1-4". In other words, connecting unit 2 and unit 6 first, and then connecting unit 1 and unit 4, results in the same splicing state of the regions. At the same time, "1-4" = "4-1", meaning that connecting unit 1 and unit 4, and connecting unit 4 and unit 1, yields the same result.

[0054] It's important to note that not all operations are meaningful. For example, "1-2" is meaningless because connected unit 1 and connected unit 2 belong to the same region. Similarly, "1-4, 2-5" is meaningless because after "1-4," connected unit 2 and connected unit 5 now belong to the same region, making further concatenation pointless. Furthermore, "1-4, 1-6" is meaningless because connected unit 1 is already connected to connected unit 4, and it cannot be connected to connected unit 6.

[0055] Following the previous example, suppose the first set is {1, 2, 3} and the second set is {4, 5, 6}. Performing the Cartesian product operation on the first and second sets yields multiple concatenation expressions (1-4), (1-5), (1-6), (2-3), (2-4), (2-5), (3-4), (3-5), and (3-6). It can be seen that each concatenation expression includes connected units belonging to the first set and connected units belonging to the second set, and each concatenation expression corresponds to a possible concatenation method.

[0056] S302. For each concatenation operation, concatenate the connected units belonging to the first set with the connected units belonging to the second set to obtain the concatenated region.

[0057] In this step, two connected units in each splicing operation are spliced ​​together to obtain multiple splicing regions.

[0058] Following the example above, such as Figure 4 As shown, for the splicing operation (1-4), connecting unit 1 and connecting unit 4 are spliced ​​together to obtain splicing region 401; for the splicing operation (1-6), connecting unit 1 and connecting unit 6 are spliced ​​together to obtain splicing region 402.

[0059] It is understandable that each concatenation operation corresponds to a concatenation region, and the number of concatenation regions is the same as the number of concatenation operations.

[0060] In practical applications, a splicing operation can be used to represent a splicing region. For example, splicing operation 1-4 represents the splicing region formed by splicing connected unit 1 and connected unit 4. Splicing operation 1-4, 2-6 represents the splicing region formed by splicing connected unit 1 and connected unit 4, and then splicing connected unit 2 and connected unit 6.

[0061] S303. The set of regions in the splicing regions corresponding to each splicing operation formula that meet the preset splicing conditions is determined as the first main region candidate set.

[0062] In this step, the set of splicing regions that meet the preset splicing conditions is determined as the first main region candidate set.

[0063] The embodiments disclosed herein do not limit the specific type of the splicing condition. For example, the splicing condition can be a shape limitation. If the shape of the splicing area satisfies the shape limitation, the splicing area is determined as an element of the first main area candidate set.

[0064] Alternatively, the splicing condition can be a non-overlapping constraint. If the splicing area satisfies the non-overlapping constraint, that is, if there is no overlapping area in the splicing area, the first set is updated based on the target splicing result, and the splicing area is determined as an element of the first main region candidate set.

[0065] S103. Determine the target first main region from the above-mentioned candidate set of the first main region.

[0066] This disclosure does not limit the specific method of determining the target first main region from the aforementioned candidate set of first main regions. For example, the target first main region can be determined according to the order of the various splicing operations, that is, the splicing region with the splicing operation in the first place can be determined as the target first main region.

[0067] Alternatively, different priorities can be assigned to each region in the first primary region candidate set beforehand to determine the target first primary region. This includes determining the region with the highest priority in the first primary region candidate set as the target first primary region. For example, suppose the first primary region candidate set includes three splicing regions, namely 1-4, 1-5, and 1-6, and 1-4 has a higher priority than 1-5, and 1-5 has a higher priority than 1-4. In this case, 1-4 will be determined as the target first primary region.

[0068] S104. Based on the set of connected units corresponding to the first main region of the target, update the first set and delete the connected units of the region to be spliced ​​that constitutes the first main region of the target in the second set, to obtain the updated second set.

[0069] In this step, the set of the target first main region and its corresponding connected units is obtained, and the first set is updated based on this set, that is, the set of connected units of the target first main region is used as the updated first set. At the same time, the set of connected units of the regions to be spliced ​​that make up the target first main region is obtained, and the second set is updated by deleting this set.

[0070] Following the previous example, let's assume the first main target region is the stitching region 401 (see...). Figure 4 At this point, the first set is updated based on the splicing region 401, that is, the updated first set is {2, 3, 5}; the splicing region 401 is formed by splicing the main region 201 and the region to be spliced ​​202a. The connected units of the splicing region 202a include 4 and 5. The connected units 4 and 5 are deleted from the second set to obtain the updated second set, which is {6}.

[0071] S105. If the updated second set is empty, determine the first main target area as the target map.

[0072] In this step, when the updated second set is empty, it means that all the areas to be stitched have been stitched with the main area. At this time, the first main area is determined as the target map.

[0073] In one embodiment, if the updated second set is not empty, the method further includes: determining a second main region candidate set based on a preset splicing condition, wherein the second main region candidate set is obtained by splicing the connected units in the updated first set and the connected units in the updated second set, and satisfies the preset splicing condition.

[0074] In this step, if the updated second set is not empty, it means that the region to be spliced ​​has not been completely spliced ​​to the main region, and the splicing process should continue to obtain the second main region candidate set. The formation process of the second main region candidate set is the same as that of the first main region candidate set.

[0075] Following the previous example, let's assume the first main target region is the stitching region 401 (e.g.) Figure 4 As shown), the splicing operation corresponding to the splicing region 401 is 1-4. The updated first set is {2, 3, 5}, and the updated second set is {6}. Performing a Cartesian product operation on the updated first and second sets yields multiple splicing operations: (1-4, 2-6), (1-4, 3-6), (1-4, 5-6), as shown. Figure 5 As shown, the splicing region 501 corresponding to (1-4, 2-6) overlaps, i.e., overlapping region 502a, which does not meet the preset splicing conditions; the splicing region 502 corresponding to (1-4, 3-6) does not overlap, meets the preset splicing conditions, and can be used as an element in the second main region candidate set; the splicing region 501 corresponding to (1-4, 5-6) overlaps; the splicing region 503 corresponding to (1-4, 5-6) does not overlap, meets the preset splicing conditions, and can be used as an element in the second main region candidate set; in summary, when the target first main region is 1-4, the second main region candidate set includes (1-4, 3-6) and (1-4, 5-6).

[0076] In one embodiment, if the second primary region candidate set is not empty, such as Figure 6 As shown, the method further includes the following steps:

[0077] S601. Determine the target second primary region from the candidate set of the second primary region.

[0078] It is understandable that the method for determining the second primary region of the target is the same as the method for determining the first primary region of the target, and will not be repeated here.

[0079] S602. Based on the set of connected units corresponding to the target second main region, update the first set and delete the connected units of the region to be spliced ​​that constitutes the target second main region in the second set, to obtain the updated second set.

[0080] S603. If the updated second set is empty, determine the target second main region as the target map.

[0081] If the updated second set is empty, it means that the area to be stitched has been stitched to the main area. In this case, the target second main area is determined as the target map.

[0082] In one embodiment, such as Figure 7 As shown, when the second primary region candidate set is empty, the method further includes the following steps:

[0083] S701, Mark the first main region of the target.

[0084] In this step, if the candidate set of the second main region is empty, it means that the splicing region formed between the target first main region and the remaining splicing regions cannot meet the preset splicing conditions. At this time, the target first main region is marked.

[0085] S702. Determine a new target first main region in the unmarked regions of the first main region candidate set. Update the first set based on the set of connected units corresponding to the new target first main region, and delete the connected units of the region to be spliced ​​that constitutes the new target first main region in the second set to obtain the updated second set.

[0086] In this step, the target first primary region is redefined from the first primary region candidate set. This redefined target first primary region should be an unlabeled region. This process can be called "backtracking," which means that if a splicing region that meets the splicing conditions cannot be obtained based on the existing second primary region candidate set, backtracking is performed to the primary region candidate set generated in the previous splicing, i.e., the first primary region candidate set. An unlabeled region is selected from the first primary region candidate set as the new target first primary region, and then the subsequent splicing operation is performed.

[0087] S703. If the updated second set is empty, determine the new target first main region as the target map.

[0088] In this step, if the updated second set is empty, it means that all the areas to be stitched have been stitched into the main area. At this time, the new target first main area is determined as the target map.

[0089] One or more technical solutions provided in this disclosure can stitch together all regions of the main region and at least one region to be stitched into a target map. The target map formed by this method will not overlap in space, can transition naturally and seamlessly in appearance, and can also meet the topological requirements in function.

[0090] In practical applications, the connectivity attributes of connected units within a region can be distinguished. For example, connected units can be divided into entrances and exits. An entrance represents the connected unit where a player first enters the region, while an exit is the remaining connected units outside the region that are directly connected to the outside. In one embodiment, the second set is the set of all entrances directly connected to the outside of at least one region to be spliced. Thus, when splicing a region to be spliced ​​to a main region, splicing to the main region can only be done through the entrance of the region to be spliced.

[0091] In practical applications, the main region and the region to be stitched can be represented by a two-dimensional array or a three-dimensional array. When a two-dimensional array is used, a two-dimensional region will be obtained by stitching together the two regions; when a three-dimensional array is used, a three-dimensional region will be obtained by stitching together the two regions.

[0092] The foregoing primarily describes the solutions provided by the embodiments of this disclosure from the perspective of the server. It is understood that, in order to implement the above functions, the server includes the corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should readily recognize that, based on the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein, this disclosure can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this disclosure.

[0093] This disclosure embodiment can divide the server into functional units according to the above method example. For example, it can divide each function into a separate functional module, or it can integrate two or more functions into one processing module. The integrated module can be implemented in hardware or as a software functional module. It should be noted that the module division in this disclosure embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0094] In the case of dividing each functional module according to its corresponding functions, an exemplary embodiment of this disclosure provides a map generation apparatus, which can be a server or a chip applied to a server. Figure 8 A schematic block diagram of the functional modules of a map generation apparatus according to an exemplary embodiment of the present disclosure is shown. Figure 8 As shown, the map generation device 800 includes:

[0095] The acquisition module 801 is configured to acquire a main region for generating a target map, at least one region to be stitched, and a first set corresponding to the main region and a second set corresponding to at least one of the regions to be stitched; wherein the first set is a set of connected units of the main region, and the second set is a set of connected units of at least one of the regions to be stitched.

[0096] The first determining module 802 is configured to determine a first main region candidate set based on preset splicing conditions. The first main region candidate set is a set of regions obtained by splicing the connected units in the first set and the connected units in the second set, and satisfies the preset splicing conditions.

[0097] The second determining module 803 is configured to determine the target first main region from the first main region candidate set;

[0098] The update module 804 is configured to update the first set based on the set of connected units corresponding to the first main region of the target, and delete the connected units of the region to be spliced ​​that constitutes the first main region of the target in the second set, so as to obtain the updated second set;

[0099] The third determination module 805 is configured to determine the first main region of the target as the target map when the updated second set is empty.

[0100] In one possible implementation, the map generation device further includes a fourth determining module, which is configured to determine a second main region candidate set based on the preset stitching conditions. The second main region candidate set is a set of regions obtained by stitching together the connected units in the updated first set and the connected units in the updated second set, and satisfies the preset stitching conditions.

[0101] In one possible implementation, the map generation apparatus further includes a fifth determining module, which is configured to determine a target second main region from the second main region candidate set if the second main region candidate set is not empty;

[0102] Based on the set of connected units corresponding to the target second main region, update the first set and delete the connected units of the region to be spliced ​​that constitutes the target second main region in the second set, to obtain the updated second set;

[0103] If the updated second set is empty, the target second main region is determined to be the target map.

[0104] In one possible implementation, the map generation apparatus further includes a sixth determining module, which is configured to mark the target first main region when the second main region candidate set is empty;

[0105] In the unmarked regions of the first primary region candidate set, a new target first primary region is determined. Based on the set of connected units corresponding to the new target first primary region, the first set is updated, and the connected units of the region to be spliced ​​that constitutes the new target first primary region in the second set are deleted to obtain the updated second set.

[0106] If the updated second set is empty, the new target first main region is determined as the target map.

[0107] In one possible implementation, the first determining module 802 is further configured to determine a first main region candidate set based on preset stitching conditions, including:

[0108] Perform a Cartesian product operation on the first set and the second set to obtain at least one concatenation expression, each of the concatenation expressions including a connected unit belonging to the first set and a connected unit belonging to the second set;

[0109] For each of the splicing operations, the connected units belonging to the first set are spliced ​​with the connected units belonging to the second set to obtain the spliced ​​region;

[0110] The set of regions in the splicing regions corresponding to each splicing operation that satisfy the preset splicing condition u is determined as the first main region candidate set.

[0111] In one possible implementation, the connected units in the second set are entry points, which are used to characterize the connected units where the player first enters the area to be pieced together.

[0112] In one possible implementation, when the target map is a two-dimensional map, a two-dimensional array is used to represent the main region and the region to be stitched; when the target map is a three-dimensional map, a three-dimensional array is used to represent the main region and the region to be stitched.

[0113] In one possible implementation, each region in the first primary region candidate set has a different priority; determining the target first primary region in the first primary region candidate set includes: determining the region with the highest priority in the first primary region candidate set as the target first primary region.

[0114] This disclosure also provides an electronic device, including: at least one processor; and a memory for storing the at least one processor-executable instructions; wherein the at least one processor is configured to execute the instructions to implement the method disclosed in this disclosure.

[0115] Figure 9 This is a schematic diagram of the structure of an electronic device provided as an exemplary embodiment of this disclosure. For example... Figure 9 As shown, the electronic device 1800 includes at least one processor 1801 and a memory 1802 coupled to the processor 1801. The processor 1801 can perform the corresponding steps in the methods disclosed in the embodiments of this disclosure.

[0116] The processor 1801 described above can also be called a central processing unit (CPU), which can be an integrated circuit chip with signal processing capabilities. Each step in the method disclosed in this embodiment can be implemented by the integrated logic circuitry in the processor 1801 or by software instructions. The processor 1801 can be a general-purpose processor, a digital signal processor (DSP), an ASIC, a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this embodiment can be directly implemented by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software modules can be located in the memory 1802, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The processor 1801 reads information from the memory 1802 and, in conjunction with its hardware, completes the steps of the method described above.

[0117] Furthermore, various operations / processes according to this disclosure, implemented via software and / or firmware, can be transmitted from a storage medium or network to a computer system with a dedicated hardware architecture, such as... Figure 10 The computer system 1900 shown is equipped with the programs that constitute the software. When various programs are installed, the computer system is able to perform various functions, including those mentioned above. Figure 10 A block diagram of a computer system provided for an exemplary embodiment of this disclosure.

[0118] Computer System 1900 is intended to represent various forms of digital electronic computer devices, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. Electronic devices can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0119] like Figure 10As shown, the computer system 1900 includes a computing unit 1901, which can perform various appropriate actions and processes based on a computer program stored in a read-only memory (ROM) 1902 or a computer program loaded from a storage unit 1908 into a random access memory (RAM) 1903. The RAM 1903 may also store various programs and data required for the operation of the computer system 1900. The computing unit 1901, ROM 1902, and RAM 1903 are interconnected via a bus 1904. An input / output (I / O) interface 1905 is also connected to the bus 1904.

[0120] Multiple components in computer system 1900 are connected to I / O interface 1905, including: input unit 1906, output unit 1907, storage unit 1908, and communication unit 1909. Input unit 1906 can be any type of device capable of inputting information into computer system 1900. Input unit 1906 can receive input digital or character information and generate key signal inputs related to user settings and / or function control of the electronic device. Output unit 1907 can be any type of device capable of presenting information and may include, but is not limited to, a monitor, speaker, video / audio output terminal, vibrator, and / or printer. Storage unit 1908 may include, but is not limited to, hard disks and optical disks. Communication unit 1909 allows computer system 1900 to exchange information / data with other devices via a network such as the Internet, and may include, but is not limited to, modems, network cards, infrared communication devices, wireless communication transceivers, and / or chipsets, such as Bluetooth™ devices, WiFi devices, WiMax devices, cellular communication devices, and / or the like.

[0121] The computing unit 1901 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 1901 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 1901 performs the various methods and processes described above. For example, in some embodiments, the methods disclosed in this disclosure can be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 1908. In some embodiments, part or all of the computer program can be loaded and / or installed on the computer system 1900 via ROM 1902 and / or communication unit 1909. In some embodiments, the computing unit 1901 can be configured to perform the methods disclosed in this disclosure by any other suitable means (e.g., by means of firmware).

[0122] This disclosure also provides a computer-readable storage medium, wherein when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is able to perform the methods disclosed in this disclosure.

[0123] The computer-readable storage medium in this disclosure can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. The aforementioned computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specifically, the aforementioned computer-readable storage medium may include electrical connections based on one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0124] The aforementioned computer-readable medium may be included in the aforementioned electronic device; or it may exist independently and not assembled into the electronic device.

[0125] This disclosure also provides a computer program product, including a computer program, wherein when the computer program is executed by a processor, it implements the methods disclosed in this disclosure.

[0126] In embodiments of this disclosure, computer program code for performing the operations of this disclosure can be written in one or more programming languages ​​or a combination thereof. These programming languages ​​include, but are not limited to, object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network (including a local area network (LAN) or a wide area network (WAN)), or it can be connected to an external computer.

[0127] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0128] The modules, components, or units described in the embodiments of this disclosure can be implemented in software or hardware. The names of the modules, components, or units do not necessarily constitute a limitation on the module, component, or unit itself.

[0129] The functions described above in this document can be performed at least in part by one or more hardware logic components. For example, without limitation, exemplary hardware logic components that can be used include: field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), and so on.

[0130] The above description is merely an embodiment of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features disclosed in this disclosure that have similar functions.

[0131] While specific embodiments of this disclosure have been described in detail by way of example, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of this disclosure. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of this disclosure. The scope of this disclosure is defined by the appended claims.

Claims

1. A map generation method, characterized in that, The method includes: Obtain a main region for generating a target map, at least one region to be stitched, a first set corresponding to the main region, and a second set corresponding to the at least one region to be stitched; wherein, the first set is a set of connected units of the main region, and the second set is a set of connected units of the at least one region to be stitched. Based on preset splicing conditions, a first main region candidate set is determined. The first main region candidate set is obtained by splicing the connected units in the first set and the connected units in the second set, and satisfies the preset splicing conditions. Determine the target first main region from the first main region candidate set; Based on the set of connected units corresponding to the first main region of the target, the first set is updated, and the connected units of the region to be spliced ​​that constitute the first main region of the target in the second set are deleted, so as to obtain the updated second set; If the updated second set is empty, the first main region of the target is determined to be the target map; If the updated second set is not empty, continue to stitch the area to be stitched to the main area; The process of determining the first main region candidate set based on preset splicing conditions includes: Perform a Cartesian product operation on the first set and the second set to obtain at least one concatenation expression, each of the concatenation expressions including a connected unit belonging to the first set and a connected unit belonging to the second set; For each of the splicing operations, the connected units belonging to the first set are spliced ​​with the connected units belonging to the second set to obtain the spliced ​​region; The set of regions in the splicing regions corresponding to each splicing operation that satisfy the preset splicing conditions is determined as the first main region candidate set.

2. The method as described in claim 1, characterized in that, If the updated second set is not empty, the method further includes: determining a second main region candidate set based on the preset splicing conditions, wherein the second main region candidate set is obtained by splicing the connected units in the updated first set and the connected units in the updated second set, and satisfies the preset splicing conditions.

3. The method as described in claim 2, characterized in that, If the second primary region candidate set is not empty, the method further includes: Determine the target second main region from the second main region candidate set; Based on the set of connected units corresponding to the target second main region, update the first set and delete the connected units of the region to be spliced ​​that constitutes the target second main region in the second set, to obtain the updated second set; If the updated second set is empty, the target second main region is determined to be the target map.

4. The method as described in claim 2, characterized in that, When the second primary region candidate set is empty, the method further includes: Mark the first main region of the target; In the unmarked regions of the first primary region candidate set, a new target first primary region is determined. Based on the set of connected units corresponding to the new target first primary region, the first set is updated, and the connected units of the region to be spliced ​​that constitutes the new target first primary region in the second set are deleted to obtain the updated second set. If the updated second set is empty, the new target first main region is determined as the target map.

5. The method according to any one of claims 1 to 4, characterized in that, The connected units in the second set are entry points, which represent the connected units where the player first enters the area to be pieced together.

6. The method according to any one of claims 1 to 4, characterized in that, When the target map is a two-dimensional map, a two-dimensional array is used to represent the main region and the region to be stitched; when the target map is a three-dimensional map, a three-dimensional array is used to represent the main region and the region to be stitched.

7. The method according to any one of claims 1 to 4, characterized in that, Each region in the first primary region candidate set has a different priority; determining the target first primary region in the first primary region candidate set includes: determining the region with the highest priority in the first primary region candidate set as the target first primary region.

8. A map generation device, characterized in that, include: The acquisition module is configured to acquire a main region for generating a target map, at least one region to be stitched, and a first set corresponding to the main region and a second set corresponding to at least one of the regions to be stitched; wherein the first set is a set of connected units of the main region, and the second set is a set of connected units of at least one of the regions to be stitched. The first determining module is configured to determine a first main region candidate set based on preset splicing conditions. The first main region candidate set is a set of regions obtained by splicing the connected units in the first set and the connected units in the second set, and which satisfies the preset splicing conditions. The second determining module is configured to determine the target first main region from the first main region candidate set; An update module is configured to update the first set based on the set of connected units corresponding to the first main region of the target, and delete the connected units of the region to be spliced ​​that constitutes the first main region of the target in the second set, so as to obtain an updated second set; The third determining module is configured to determine the target first main region as the target map when the updated second set is empty; and to continue stitching the region to be stitched to the main region when the updated second set is not empty. The first determining module is specifically configured to perform a Cartesian product operation on the first set and the second set to obtain at least one concatenation expression. Each concatenation expression includes a connected unit belonging to the first set and a connected unit belonging to the second set. For each concatenation expression, the connected unit belonging to the first set and the connected unit belonging to the second set are concatenated to obtain a concatenated region. The set of regions in the concatenation regions corresponding to each concatenation expression that satisfy the preset concatenation conditions is determined as the first main region candidate set.

9. An electronic device, comprising: processor; as well as Stored program memory, The program includes instructions that, when executed by the processor, cause the processor to perform the method according to any one of claims 1-7.

10. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to perform the method according to any one of claims 1-7.

11. A computer program product comprising a computer program, wherein, The computer program, when executed by a processor, implements the method of any one of claims 1-7.

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