A laminated chip common mode inductor with embedded magnetic shield structure

Abstract

The application provides a laminated chip common mode inductor with an embedded magnetic shielding structure, which comprises an upper magnetic shielding layer, a lower magnetic shielding layer which is arranged in a spaced-apart manner opposite to the upper magnetic shielding layer, a connecting layer which connects the upper magnetic shielding layer and the lower magnetic shielding layer, a middle magnetic shielding layer which is sleeved on the connecting layer, a dielectric layer which is filled in a region enclosed by the upper magnetic shielding layer, the lower magnetic shielding layer, the connecting layer and the middle magnetic shielding layer, and two spaced-apart inductors, each of which is arranged in the middle magnetic shielding layer and is wound on the connecting layer, and the two ends of each inductor extend out of the middle magnetic shielding layer and extend into the dielectric layer. The inductor is arranged in the middle magnetic shielding layer, the middle magnetic shielding layer formed by embedding can inhibit the radiation interference of the inductor covered thereby, so that the radiation interference inhibition capability of the whole laminated chip common mode inductor can be improved. The two ends of the inductor extend into the dielectric layer, so that the laminated chip common mode inductor can be provided with end electrodes and connected with external devices.

Description

Technical Field

[0001] This application belongs to the field of electronic components technology, and more specifically, relates to a multilayer chip common-mode inductor with an embedded magnetic shielding structure. Background Technology

[0002] Inductors, as an important component of magnetic elements, are widely used in power electronic circuits, especially in power supply circuits where they are indispensable. In power supply circuits, rapid changes in current or voltage within rectifier diodes, filter capacitors, and inductors generate electromagnetic interference sources. Simultaneously, the input power supply also contains high-order harmonic noise beyond the mains frequency. If these interferences are not controlled, they will damage the load equipment.

[0003] Currently, although multilayer chip common-mode inductors manufactured using LTCC (low temperature co-fired ceramics) technology have functions such as common-mode signal suppression and interference suppression of differential-mode signals, their ability to suppress radiated interference still cannot meet the requirements, and their adaptability is poor. Summary of the Invention

[0004] The purpose of this application is to provide a multilayer chip common-mode inductor with an embedded magnetic shielding structure, so as to solve the problems existing in related technologies: the current multilayer chip common-mode inductors have insufficient ability to suppress radiated interference and poor adaptability.

[0005] To achieve the above objectives, the technical solution adopted in the embodiments of this application is as follows:

[0006] A multilayer chip common-mode inductor with an embedded magnetic shielding structure is provided, comprising:

[0007] Upper magnetic shielding layer;

[0008] The lower magnetic shielding layer is disposed at a distance from the upper magnetic shielding layer;

[0009] A connecting layer is located between the upper magnetic shielding layer and the lower magnetic shielding layer, connecting the upper magnetic shielding layer and the lower magnetic shielding layer;

[0010] A magnetic shielding layer is fitted onto the connecting layer;

[0011] A dielectric layer fills the area enclosed by the upper magnetic shielding layer, the lower magnetic shielding layer, the connecting layer, and the middle magnetic shielding layer;

[0012] Two inductors are spaced apart, each inductor is located in the intermediate magnetic shielding layer and is wound around the connecting layer, and the two ends of each inductor extend out of the intermediate magnetic shielding layer and into the dielectric layer.

[0013] In this structure, the upper and lower magnetic shielding layers are connected by a connecting layer, and a middle magnetic shielding layer is nested outside the connecting layer. A dielectric layer fills the area enclosed by the upper, lower, connecting, and middle magnetic shielding layers, thus covering the connecting layer, the middle magnetic shielding layer, and the inductor. By placing the inductor within the middle magnetic shielding layer, the embedded middle magnetic shielding layer can suppress radiated interference, thereby improving the overall radiated interference suppression capability of the multilayer chip common-mode inductor. Extending the two ends of the inductor into the dielectric layer facilitates the placement of terminal electrodes in the multilayer chip common-mode inductor and its connection to external devices.

[0014] In one embodiment, the distance between the middle magnetic shielding layer and the upper magnetic shielding layer is equal to the distance between the middle magnetic shielding layer and the lower magnetic shielding layer, and the two inductors are respectively equidistant from the upper magnetic shielding layer and the lower magnetic shielding layer.

[0015] This structure allows the multilayer chip common-mode inductor to be used on both sides without affecting its reliability.

[0016] In one embodiment, the upper magnetic shielding layer, the lower magnetic shielding layer, and the middle magnetic shielding layer are magnetic conductors made of ferrite material.

[0017] This structure allows for a significant reduction in the size of the magnetic core, meeting the needs of component manufacturing towards miniaturization and lightweight design.

[0018] In one embodiment, each inductor includes two parallel and spaced-apart wound electrodes and an electrode layer connecting the two wound electrodes; the intermediate magnetic shielding layer is provided with a first hole for forming each wound electrode and a second hole for forming each electrode layer, and each first hole communicates with the corresponding second hole; the dielectric layer is provided with a third hole for forming a portion of each wound electrode extending out of the intermediate magnetic shielding layer.

[0019] This structure allows for screen printing of the portion of each wound electrode located in the middle magnetic shielding layer via the first hole, screen printing of each electrode layer via the second hole, and screen printing of the portion of each wound electrode extending into the dielectric layer via the third hole.

[0020] In one embodiment, each of the wound electrodes includes a spiral electrode and a connecting electrode connected to the outer end of the spiral electrode extending out of the middle magnetic shielding layer. The inner ends of two adjacent spiral electrodes are connected through the corresponding electrode layers. The outer end of the spiral electrode extending out of the middle magnetic shielding layer and the connecting electrode are respectively located in the third hole.

[0021] In this structure, the second hole is a vertical through hole, and the connection of two spiral electrodes can be achieved through the electrode layer formed by screen printing in the second hole.

[0022] In one embodiment, each of the spiral electrodes includes a first electrode, a second electrode perpendicular to one end of the first electrode, a third electrode perpendicular to the end of the second electrode away from the first electrode and parallel to the first electrode, a fourth electrode perpendicular to the end of the third electrode away from the second electrode and parallel to the second electrode, a fifth electrode perpendicular to the end of the fourth electrode away from the third electrode and parallel to the third electrode, and a sixth electrode perpendicular to the end of the fifth electrode away from the fourth electrode and parallel to the fourth electrode; the inner ends of two adjacent first electrodes are connected through corresponding electrode layers, and the end of each sixth electrode away from the corresponding fifth electrode extends out of the middle magnetic shielding layer, and each connecting electrode is connected to the end of the corresponding sixth electrode extending out of the middle magnetic shielding layer.

[0023] This structure, by setting each spiral electrode as a first electrode, second electrode, third electrode, fourth electrode, fifth electrode, and sixth electrode, can achieve a spiral configuration and be wound to the target number of turns.

[0024] In one embodiment, the width of each of the connecting electrodes is greater than the width of the corresponding spiral electrode.

[0025] This structure, by increasing the width of each connecting electrode, facilitates the connection of each connecting electrode to external devices.

[0026] In one embodiment, the outer peripheral surface of each of the connecting electrodes is flush with the outer peripheral surface of the dielectric layer.

[0027] This structure places the sides of each connecting electrode on different sides of the dielectric layer, allowing for adjustment of the connection direction and angle, facilitating connection with external devices.

[0028] In one embodiment, each of the inductors is a conductor made of silver.

[0029] This structure provides advantages for silver electrodes, including stable potential, robust electrode structure, low temperature hysteresis, and suitability for use at high temperatures.

[0030] In one embodiment, the dielectric layer is an insulator made of a low dielectric constant ceramic material.

[0031] In this structure, the low dielectric constant ceramic material can reduce the interactive coupling loss between the substrate and the metal electrode, and shorten the signal propagation delay time. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or exemplary technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A three-dimensional structural schematic diagram of a multilayer chip common-mode inductor with an embedded magnetic shielding structure provided for embodiments of this application;

[0034] Figure 2 for Figure 1 Internal structure diagram;

[0035] Figure 3 for Figure 1 A schematic diagram of the decomposition process;

[0036] Figure 4 A three-dimensional structural diagram showing the connection between the upper magnetic shielding layer, the lower magnetic shielding layer, the connecting layer, and the middle magnetic shielding layer provided in an embodiment of this application;

[0037] Figure 5 A three-dimensional structural diagram of the inductor provided in an embodiment of this application;

[0038] Figure 6 This is a three-dimensional structural diagram of the wound electrode provided in an embodiment of this application.

[0039] The main markings in the attached figures are as follows:

[0040] 1. Upper magnetic shielding layer;

[0041] 2. Lower magnetic shielding layer;

[0042] 3. Connecting layer;

[0043] 4. Middle magnetic shielding layer; 41. First hole; 42. Second hole;

[0044] 5. Medium layer; 51. Third hole location;

[0045] 6. Inductor; 61. Winded electrode; 611. Spiral electrode; 6111. First electrode; 6112. Second electrode; 6113. Third electrode; 6114. Fourth electrode; 6115. Fifth electrode; 6116. Sixth electrode; 612. Connecting electrode; 62. Electrode layer. Detailed Implementation

[0046] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0047] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0048] Furthermore, the terms "first," "second," "third," "fourth," "fifth," and "sixth" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," "third," "fourth," "fifth," or "sixth" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more unless otherwise expressly specified. "Several" means one or more unless otherwise expressly specified.

[0049] In the description of this application, it should be understood that the terms "center", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0050] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0051] Throughout this specification, references to "an embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of this application. Therefore, the phrases "in one embodiment" or "in some embodiments" appear in various places throughout the specification, and not all refer to the same embodiment. Furthermore, in one or more embodiments, particular features, structures, or characteristics may be combined in any suitable manner.

[0052] Please see Figure 1 , Figure 2 and Figure 4 The multilayer chip common-mode inductor with an embedded magnetic shielding structure provided in this application embodiment will now be described. This multilayer chip common-mode inductor with an embedded magnetic shielding structure includes an upper magnetic shielding layer 1, a lower magnetic shielding layer 2, a connecting layer 3, a middle magnetic shielding layer 4, a dielectric layer 5, and two inductors 6. Both the upper magnetic shielding layer 1 and the lower magnetic shielding layer 2 can be cuboid in shape, and both have the same size. The upper magnetic shielding layer 1 and the lower magnetic shielding layer 2 are arranged parallel to each other and spaced apart. The connecting layer 3 is located between the upper magnetic shielding layer 1 and the lower magnetic shielding layer 2. The connecting layer 3 can also be cuboid or cubic in shape, and it has a top surface, a bottom surface, and four sides connecting the top and bottom surfaces. The top surface of the connecting layer 3 can be connected to the bottom surface of the upper magnetic shielding layer 1, and the bottom surface of the connecting layer 3 can be connected to the top surface of the lower magnetic shielding layer 2. A middle magnetic shielding layer 4 is fitted onto the connecting layer 3. The middle magnetic shielding layer 4 can also be cuboid in shape. A hole for the connecting layer 3 to pass through is formed in the middle of the middle magnetic shielding layer 4, and the connecting layer 3 is filled and printed in this hole. A dielectric layer 5 fills the area enclosed by the upper magnetic shielding layer 1, the lower magnetic shielding layer 2, the connecting layer 3, and the middle magnetic shielding layer 4. The dielectric layer 5 can also be cuboid in shape. The length and width of the dielectric layer 5 are the same as the length and width of the upper magnetic shielding layer 1, respectively. The thickness of the dielectric layer 5 is equal to the distance between the upper magnetic shielding layer 1 and the lower magnetic shielding layer 2. Two inductors 6 are arranged relatively spaced apart. The two inductors 6 can be arranged parallel to each other. Each inductor 6 is located in the middle magnetic shielding layer 4 and is wound around the connecting layer 3, that is, with the connecting layer 3 as the center of the winding. A hole for the connecting layer 3 to pass through is formed in the middle of each inductor 6, and the connecting layer 3 is filled and printed in this hole. Each inductor 6 has two ends extending out of the middle magnetic shielding layer 4 and into the dielectric layer 5, which facilitates the setting of terminal electrodes and connection with external devices.

[0053] In this structure, the upper magnetic shielding layer 1 and the lower magnetic shielding layer 2 are connected by a connecting layer 3, and a middle magnetic shielding layer 4 is sleeved on the outside of the connecting layer 3. The area enclosed by the upper magnetic shielding layer 1, the lower magnetic shielding layer 2, the connecting layer 3, and the middle magnetic shielding layer 4 is filled by a dielectric layer 5 to cover the connecting layer 3, the middle magnetic shielding layer 4, and the inductor 6. By placing the inductor 6 in the middle magnetic shielding layer 4, the embedded middle magnetic shielding layer 4 can suppress radiated interference of the covered inductor 6, thereby improving the overall radiated interference suppression capability of the multilayer chip common-mode inductor. By extending both ends of the inductor 6 into the dielectric layer 5, it is convenient to set the terminal electrodes of the multilayer chip common-mode inductor and connect it to external devices.

[0054] The multilayer chip common-mode inductor with an embedded magnetic shielding structure provided in this application is fabricated using the LTCC process. The fabrication method of this multilayer chip common-mode inductor with an embedded magnetic shielding structure includes the following steps:

[0055] 1. Casting: The prepared mixture is cast in a casting machine to obtain a green ceramic tape of a certain thickness for further use. Mixing can be completed in the pulping step. The components and proportions of the mixture can be adjusted according to the performance of the multilayer common mode inductor, and are not limited to a single parameter here.

[0056] 2. Cutting: The rolled green ceramic strip is cut into single-piece strips of the target size to meet the requirements of subsequent processes. The size of the strips can be determined based on the size of the multilayer common-mode inductor to be manufactured.

[0057] In some embodiments, the manufacturer can purchase pre-cut strips directly from the manufacturer, which meet the requirements for producing multilayer chip common mode inductors, thereby eliminating the need for casting and cutting steps.

[0058] 3. Printing: The screen printing process is adopted. The material strip is fixed on the multi-hole worktable by vacuum suction. After the holes are opened on each material strip, they are filled. The upper magnetic shielding layer 1, lower magnetic shielding layer 2, connecting layer 3, middle magnetic shielding layer 4, dielectric layer 5 and inductor 6 are formed by screen printing on the corresponding positions on the corresponding material strips.

[0059] 4. Stacking: Multiple printed strips are stacked sequentially. A CCD (Charge-coupled Device) lens can be used to stack the strips, improving alignment accuracy. The upper magnetic shielding layer 1, lower magnetic shielding layer 2, connecting layer 3, middle magnetic shielding layer 4, dielectric layer 5, and inductor 6 on each strip are stacked to form a block or sheet with thickness.

[0060] 5. Equalizing Pressure: Multiple stacked strips are pressed into a single shape, aligning and mixing the upper magnetic shielding layer 1, lower magnetic shielding layer 2, connecting layer 3, middle magnetic shielding layer 4, dielectric layer 5, and inductor 6 on each strip to form a pre-finished product. This pre-finished product has a complete upper magnetic shielding layer 1, lower magnetic shielding layer 2, connecting layer 3, middle magnetic shielding layer 4, dielectric layer 5, and inductor 6. A press can be used to simultaneously apply pressure to the top and bottom of the stacked strips to improve the quality of the pressed product. Equalizing pressure can be achieved using hot pressing or isostatic pressing to prevent delamination.

[0061] 6. Cutting: The pre-finished products are divided into sections according to the target size using a cutting machine.

[0062] 7. Debinding and Sintering: Place the cut product on the sintering plate in the sintering furnace, set the product sintering temperature profile, and then sinter. While ensuring uniform temperature, slowly increase the temperature to achieve debinding and sintering of the product. The sintering temperature is approximately 850℃-900℃.

[0063] The debinding and sintering process is crucial to the amount of gas in the product, the degree of bonding between particles, and the mechanical strength of the substrate. The key to the sintering process is the consistency between the sintering curve and the furnace temperature, which determines the flatness and shrinkage rate of the substrate after sintering. The heating rate should not be too fast, otherwise it will lead to poor flatness, reduced shrinkage, and even warping of the sintered substrate. A sintering furnace is used to optimize the relationship between the debinding heating rate and holding time and the product's size, number of layers, and metallization amount. Typically, debinding is performed first, followed by sintering, requiring both a debinding furnace and a sintering furnace.

[0064] 8. Post-processing: The sintered products undergo end electrode treatment, and the formed products are inspected to obtain multilayer chip common-mode inductors with embedded magnetic shielding structures that meet the requirements. Inspection includes visual inspection and testing. Visual inspection mainly checks the appearance, such as flatness, consistency, and the smoothness of the conductive strips. Testing uses a testing instrument with testing software to verify the product's wiring connections and determine whether the electrical performance of the LTCC substrate is qualified.

[0065] In one embodiment, see Figure 2 and Figure 4In one specific embodiment of the multilayer common-mode inductor with an embedded magnetic shielding structure provided in this application, the distance between the middle magnetic shielding layer 4 and the upper magnetic shielding layer 1 is equal to the distance between the middle magnetic shielding layer 4 and the lower magnetic shielding layer 2. That is, the distance between the top surface of the middle magnetic shielding layer 4 and the bottom surface of the upper magnetic shielding layer 1 is equal to the distance between the bottom surface of the middle magnetic shielding layer 4 and the top surface of the lower magnetic shielding layer 2. The two inductors 6 are equidistant from the upper magnetic shielding layer 1 and the lower magnetic shielding layer 2, respectively. That is, the distance between the upper inductor 6 and the bottom surface of the upper magnetic shielding layer 1 is equal to the distance between the lower inductor 6 and the top surface of the lower magnetic shielding layer 2. This structure allows the multilayer common-mode inductor to be used on both sides without affecting its reliability.

[0066] In one embodiment, as a specific implementation of the multilayer common-mode inductor with an embedded magnetic shielding structure provided in this application, the upper magnetic shielding layer 1, the lower magnetic shielding layer 2, and the middle magnetic shielding layer 4 are magnetic conductors made of ferrite material. Specifically, the upper magnetic shielding layer 1, the lower magnetic shielding layer 2, and the middle magnetic shielding layer 4 are formed by opening and filling holes at corresponding positions of the corresponding material strips during the printing step, followed by printing and stacking. Manganese-zinc ferrite materials with an initial permeability greater than 5000 are generally referred to as high-permeability ferrites. The main characteristic of high-permeability ferrites is their exceptionally high permeability, typically exceeding 10000, which allows for significant reduction in core size, meeting the needs of component miniaturization and lightweight design.

[0067] In one embodiment, each inductor 6 is a spiral inductor. Two oppositely positioned inductors 6 are spiral inductors. Common-mode inductors with different center frequencies correspond to different numbers of spiral inductor layers and turns. Different numbers of spiral inductor layers can be understood as different spiral inductor lengths; that is, common-mode inductors with different center frequencies correspond to different spiral inductor lengths and turns. In this embodiment, the two inductors 6 have the same length and number of turns. This structure, compared to discrete wire-wound inductors, offers advantages such as lower cost, easier integration, lower power consumption, and lower noise. By increasing the coil thickness, the ohmic loss of the inductor can be reduced, making it suitable for optimized design of low-frequency inductors.

[0068] In one embodiment, see Figure 3 and Figure 5As a specific embodiment of the multilayer common-mode inductor with an embedded magnetic shielding structure provided in this application, each inductor 6 includes two wound electrodes 61 and an electrode layer 62; the intermediate magnetic shielding layer 4 is provided with a first hole 41 for forming each wound electrode 61 and a second hole 42 for forming each electrode layer 62, and each first hole 41 is connected to the corresponding second hole 42. Specifically, the two wound electrodes 61 in each inductor 6 are arranged in parallel and spaced apart, and the tail ends of the two wound electrodes 61 can be connected through the electrode layer 62. The head ends of the two wound electrodes 61 extend out of the intermediate magnetic shielding layer 4 and into the dielectric layer 5. The portion of each wound electrode 61 located in the first hole 41 and the portion of each electrode layer 62 located in the second hole 42 are formed by opening and filling the corresponding material strips in the printing step, and then stacking and equalizing them. The dielectric layer 5 is provided with a third hole 51 for forming the portion of each wound electrode 61 extending out of the intermediate magnetic shielding layer 4. The portion of each wound electrode 61 extending into the third hole 51 is also formed during the printing process by opening and filling holes in the corresponding material strip, followed by stacking and equalization. In this structure, the portion of each wound electrode 61 located in the intermediate magnetic shielding layer 4 can be screen-printed through the first hole 41, the portion of each electrode layer 62 can be screen-printed through the second hole 42, and the portion of each wound electrode 61 extending into the dielectric layer 5 can be screen-printed through the third hole 51.

[0069] In one embodiment, see Figure 6 As a specific embodiment of the multilayer chip common-mode inductor with an embedded magnetic shielding structure provided in this application, each wound electrode 61 includes a spiral electrode 611 and a connecting electrode 612 connected to the outer end of the spiral electrode 611 extending out of the magnetic shielding layer 4. The inner ends of two adjacent spiral electrodes 611 are connected through corresponding electrode layers 62. The outer end of the spiral electrode 611 extending out of the magnetic shielding layer 4 and the connecting electrode 612 are respectively located in the third hole 51. Specifically, each spiral electrode 611 is aligned with the corresponding first hole 41, and each connecting electrode 612 is aligned with the corresponding third hole 51. The "inner end of the spiral electrode 611" can be understood as the end of the spiral electrode 611 close to the connecting layer 3, and the "outer end of the spiral electrode 611" can be understood as the other end extending out of the magnetic shielding layer 4. The inner ends of two adjacent spiral electrodes 611 are connected through the electrode layer 62 formed by silkscreen printing in the corresponding second hole 42. In this structure, the second hole 42 is a vertical through-hole, through which the electrode layer 62 formed by silkscreen printing can be used to connect the two spiral electrodes 611. The depth of the second hole 42 determines the thickness of the electrode layer 62 and also affects the performance of the multilayer chip common mode inductor. Therefore, the depths of the first hole 41, the second hole 42, and the third hole 51 can all be adjusted accordingly as needed, and no single limitation is made here.

[0070] In one embodiment, see Figure 6 As a specific embodiment of the multilayer chip common-mode inductor with an embedded magnetic shielding structure provided in this application, each spiral electrode 611 includes a first electrode 6111, a second electrode 6112, a third electrode 6113, a fourth electrode 6114, a fifth electrode 6115, and a sixth electrode 6116. The inner ends of two adjacent first electrodes 6111 are connected through corresponding electrode layers 62. The second electrode 6112 is connected to the end of the first electrode 6111 away from the connecting layer 3, and the second electrode 6112 is perpendicular to the first electrode 6111. The other ends of two adjacent first electrodes 6111 are connected through corresponding electrode layers 62. The third electrode 6113 is connected to the end of the second electrode 6112 away from the first electrode 6111, and the third electrode 6113 is perpendicular to the second electrode 6112 and parallel to the first electrode 6111. The length of the third electrode 6113 is greater than the length of the first electrode 6111. The fourth electrode 6114 is connected to the end of the third electrode 6113 furthest from the second electrode 6112. The fourth electrode 6114 is perpendicular to the third electrode 6113 and parallel to the second electrode 6112. The length of the fourth electrode 6114 is greater than the length of the second electrode 6112. The fifth electrode 6115 is connected to the end of the fourth electrode 6114 furthest from the third electrode 6113. The fifth electrode 6115 is perpendicular to the fourth electrode 6114 and parallel to the third electrode 6113. The length of the fifth electrode 6115 is greater than the length of the third electrode 6113. The sixth electrode 6116 is connected to the end of the fifth electrode 6115 furthest from the fourth electrode 6114. The sixth electrode 6116 is perpendicular to the fifth electrode 6115 and parallel to the fourth electrode 6114. The length of the sixth electrode 6116 is greater than the length of the fourth electrode 6114. The end of the sixth electrode 6116 furthest from the fifth electrode 6115 extends out of the central magnetic shielding layer 4. A connecting electrode 612 is connected to this end of the sixth electrode 6116, which is parallel to the fifth electrode 6115, and the connecting electrode 612 and the fifth electrode 6115 are located on opposite sides of the sixth electrode 6116. Correspondingly, the configuration of the first hole 41 on the corresponding material strip is consistent with the configuration of the spiral electrode 611, so that the first hole 41 can be printed to form the spiral electrode 611. The configuration of each first hole 41 will not be described in detail here. This structure, by setting each spiral electrode 611 as the first electrode 6111, the second electrode 6112, the third electrode 6113, the fourth electrode 6114, the fifth electrode 6115, and the sixth electrode 6116, can achieve a spiral configuration and be wound to the target number of turns. Of course, in other embodiments, the number of turns of the wound electrode 61 can also be adjusted according to actual needs, and is not limited here.

[0071] In one embodiment, see Figure 6 As a specific embodiment of the multilayer chip common-mode inductor with an embedded magnetic shielding structure provided in this application, the width of each connecting electrode 612 is greater than the width of the corresponding spiral electrode 611. Specifically, the first electrode 6111, second electrode 6112, third electrode 6113, fourth electrode 6114, fifth electrode 6115, and sixth electrode 6116 of each spiral electrode 611 have the same width and thickness, but different lengths; the thickness of the connecting electrode 612 is the same as the thickness of the spiral electrode 611, but the length and width of the connecting electrode 612 are different from those of the spiral electrode 611. This structure, by increasing the width of each connecting electrode 612, facilitates the connection of each connecting electrode 612 to external devices.

[0072] In one embodiment, see Figure 1 and Figure 6 As a specific embodiment of the multilayer chip common-mode inductor with an embedded magnetic shielding structure provided in this application, the outer peripheral surface of each connecting electrode 612 is flush with the outer peripheral surface of the dielectric layer 5. Specifically, the dielectric layer 5 may be in the form of a cuboid, having a top surface, a bottom surface, two narrow side surfaces, and two wide side surfaces. Each connecting electrode 612 may also be in the form of a cuboid, with the thickness of each connecting electrode 612 being significantly less than the thickness of the dielectric layer 5. Each connecting electrode 612 has a top surface, a bottom surface, two narrow side surfaces, and two wide side surfaces. One wide side surface of each connecting electrode 612 is flush with the corresponding narrow side surface of the dielectric layer 5, and another narrow side surface of each connecting electrode 612 is flush with the corresponding wide side surface of the dielectric layer 5. That is, each narrow side surface of the dielectric layer 5 has two wide side surfaces of the connecting electrode 612, and each wide side surface of the dielectric layer 5 has two narrow side surfaces of the connecting electrode 612. In this structure, the sides of each connecting electrode 612 are respectively located on different sides of the dielectric layer 5, which allows for adjustment of the connection direction and angle, facilitating connection with external devices.

[0073] In one embodiment, as a specific implementation of the multilayer chip common-mode inductor with an embedded magnetic shielding structure provided in this application, each inductor 6 is made of silver material as a conductor. This structure offers advantages such as stable potential, robust electrode structure, low temperature hysteresis, and suitability for use at high temperatures.

[0074] In one embodiment, as a specific implementation of the multilayer chip common-mode inductor with an embedded magnetic shielding structure provided in this application, the dielectric layer 5 is an insulator made of a low-dielectric-constant ceramic material. In this structure, the low-dielectric-constant ceramic material can reduce the interactive coupling loss between the substrate and the metal electrodes, shortening the signal propagation delay time.

[0075] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A multilayer chip common-mode inductor with an embedded magnetic shielding structure, characterized in that, include: Upper magnetic shielding layer; A lower magnetic shielding layer is disposed at a distance from the upper magnetic shielding layer; wherein, both the upper and lower magnetic shielding layers are rectangular parallelepipeds and have the same size; A connecting layer is located between the upper magnetic shielding layer and the lower magnetic shielding layer, connecting the upper magnetic shielding layer and the lower magnetic shielding layer; A magnetic shielding layer is fitted onto the connecting layer; A dielectric layer fills the area enclosed by the upper magnetic shielding layer, the lower magnetic shielding layer, the connecting layer, and the middle magnetic shielding layer; Two inductors spaced apart, each inductor being located in the intermediate magnetic shielding layer and wound around the connecting layer, with both ends of each inductor extending out of the intermediate magnetic shielding layer and into the dielectric layer respectively; The multilayer chip common mode inductor is fabricated using the LTCC process. Each inductor includes two parallel and spaced-apart wound electrodes and an electrode layer connecting the two wound electrodes; the intermediate magnetic shielding layer is provided with a first hole for forming each wound electrode and a second hole for forming each electrode layer, and each first hole is connected to the corresponding second hole; the dielectric layer is provided with a third hole for forming the portion of each wound electrode extending out of the intermediate magnetic shielding layer; The distance between the middle magnetic shielding layer and the upper magnetic shielding layer is equal to the distance between the middle magnetic shielding layer and the lower magnetic shielding layer, and the distances between the two inductors and the upper magnetic shielding layer and the lower magnetic shielding layer are equal, respectively. Each of the wound electrodes includes a spiral electrode and a connecting electrode connected to the outer end of the spiral electrode extending out of the middle magnetic shielding layer. The inner ends of two adjacent spiral electrodes are connected through the corresponding electrode layers. The outer end of the spiral electrode extending out of the middle magnetic shielding layer and the connecting electrode are respectively located in the third hole.

2. The multilayer chip common-mode inductor with an embedded magnetic shielding structure as described in claim 1, characterized in that: The upper magnetic shielding layer, the lower magnetic shielding layer, and the middle magnetic shielding layer are magnetic conductors made of ferrite material.

3. The multilayer chip common-mode inductor with an embedded magnetic shielding structure as described in claim 1, characterized in that: Each of the spiral electrodes includes a first electrode, a second electrode perpendicular to one end of the first electrode, a third electrode perpendicular to the end of the second electrode away from the first electrode and parallel to the first electrode, a fourth electrode perpendicular to the end of the third electrode away from the second electrode and parallel to the second electrode, a fifth electrode perpendicular to the end of the fourth electrode away from the third electrode and parallel to the third electrode, and a sixth electrode perpendicular to the end of the fifth electrode away from the fourth electrode and parallel to the fourth electrode; the inner ends of two adjacent first electrodes are connected through the corresponding electrode layers, and the end of each sixth electrode away from the corresponding fifth electrode extends out of the middle magnetic shielding layer, and each connecting electrode is connected to the end of the corresponding sixth electrode extending out of the middle magnetic shielding layer.

4. The multilayer chip common-mode inductor with an embedded magnetic shielding structure as described in claim 1, characterized in that: The width of each of the connecting electrodes is greater than the width of the corresponding spiral electrode.

5. The multilayer chip common-mode inductor with an embedded magnetic shielding structure as described in claim 1, characterized in that: The outer peripheral surface of each of the connecting electrodes is flush with the outer peripheral surface of the dielectric layer.

6. The multilayer chip common-mode inductor with an embedded magnetic shielding structure as described in any one of claims 1-5, characterized in that: Each of the aforementioned inductors is a conductor made of silver.

7. The multilayer chip common-mode inductor with an embedded magnetic shielding structure as described in any one of claims 1-5, characterized in that: The dielectric layer is an insulator made of a low dielectric constant ceramic material.

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