A semiconductor package structure

Abstract

A semiconductor package structure comprises: a first to an Nth laminated layer unit, any nth layer unit comprising an nth substrate, an nth chip and an nth heat dissipation cover covering the nth chip; N is an integer greater than or equal to 2; any j-1th layer unit further comprises a j-1th conductive connecting seat on one side of the j-1th substrate and covered by the j-1th heat dissipation cover, the j-1th conductive connecting seat having a j-1th slot; j is an integer greater than or equal to 2 and less than or equal to N; any jth layer unit further comprises a j-1th conductive connecting piece on the side of the jth substrate away from the jth chip and penetrating through the j-1th heat dissipation cover, one end of the j-1th conductive connecting piece being connected with the jth substrate and the other end of the j-1th conductive connecting piece being inserted into the j-1th slot. The semiconductor package structure has good stability and heat dissipation.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically to a semiconductor packaging structure. Background Technology

[0002] In semiconductor packaging structures, as the size of the substrate gradually shrinks, the number of chips that can be integrated inside the substrate becomes limited, leading to a single function of the semiconductor packaging structure. In order to achieve multiple functions, multiple substrates are connected, which results in a large size and poor heat dissipation of the semiconductor packaging structure. At the same time, the connection between multiple substrates is also prone to problems. Therefore, there is a need to provide a semiconductor packaging structure. Summary of the Invention

[0003] Therefore, the technical problem to be solved by the present invention is to overcome the defects of poor stability and poor heat dissipation in the semiconductor packaging structure in the prior art, thereby providing a semiconductor packaging structure.

[0004] This invention provides a semiconductor packaging structure, comprising: stacked first to Nth stacked units, wherein any nth stacked unit includes an nth substrate, an nth chip and an nth heat sink located on one side of the nth substrate, the nth heat sink covering the nth chip; N is an integer greater than or equal to 2, and n is an integer greater than or equal to 1 and less than or equal to N; a (j-1)th heat sink is located between the (j-1)th substrate and the jth substrate, and any (j-1)th stacked unit further includes: a (j-1)th conductive connector located on one side of the (j-1)th substrate and covered by the (j-1)th heat sink, the (j-1)th conductive connector having a (j-1)th slot; j is an integer greater than or equal to 2 and less than or equal to N; any jth stacked unit further includes: a (j-1)th conductive connector located on the side of the jth substrate away from the jth chip and passing through the (j-1)th heat sink, one end of the (j-1)th conductive connector being connected to the jth substrate, and the other end of the (j-1)th conductive connector being inserted into the (j-1)th slot.

[0005] Optionally, any (j-1)th conductive connector may include a female connector, and any (j-1)th conductive connector may include a pin connector.

[0006] Optionally, the cross-sectional shape of any end of the (j-1)th conductive connector facing the (j-1)th conductive connector seat, parallel to the extension direction of the (j-1)th conductive connector, includes an arc shape, a rectangle, or a triangle.

[0007] Optionally, the triangle includes obtuse triangles.

[0008] Optionally, any (j-1)th conductive connector includes a (j-1)th conductive connector body and a (j-1)th metal protective layer located on the surface of the (j-1)th conductive connector body.

[0009] Optionally, the material of the (j-1)th metal protective layer includes gold.

[0010] Optionally, the number of any (j-1)th conductive connector is one and it is a ring structure, with the (j-1)th conductive connector surrounding the (j-1)th chip; or, the number of (j-1)th conductive connectors is several, with the several (j-1)th conductive connectors surrounding the (j-1)th chip and arranged along the circumference of the (j-1)th chip.

[0011] Optionally, for any (j-1)th conductive connector on one side of the (j-1)th chip, the (j-1)th slot is arranged in a single row or multiple rows in the (j-1)th conductive connector in the direction perpendicular to the sidewall of the (j-1)th chip.

[0012] Optionally, the distance between any two adjacent (j-1)th slots is 2.0mm-3mm.

[0013] Optionally, for any (j-1)th conductive connector on one side of the (j-1)th chip, the (j-1)th conductive connector may be arranged in a single row or in multiple rows in the direction perpendicular to the sidewall of the (j-1)th chip.

[0014] Optionally, the distance between any two adjacent (j-1)th conductive connectors is 2.0 mm to 3 mm.

[0015] Optionally, a heat-dissipating adhesive layer is provided between the end of the (j-1)th conductive connector and the (j-1)th heat sink.

[0016] Optionally, any nth heat dissipation cover includes an nth top cover and an nth side plate located outside the nth top cover, the nth side plate and the nth top cover forming an nth receiving cavity, and the nth chip is located in the nth receiving cavity; there is an nth thermally conductive adhesive layer between the nth side plate and the nth substrate.

[0017] Optionally, the Nth top cover is a full-surface structure.

[0018] The technical solution of this invention has the following advantages:

[0019] The semiconductor packaging structure provided by this invention includes: stacked first to Nth stacked units, wherein any nth stacked unit includes an nth substrate, an nth chip located on one side of the nth substrate, and an nth heat sink, the nth heat sink covering the nth chip; N is an integer greater than or equal to 2, and n is an integer greater than or equal to 1 and less than or equal to N. Therefore, the semiconductor packaging structure can increase its functionality by adding stacked units along one direction; any nth stacked unit includes an nth heat sink, the nth heat sink covering the nth chip, thus the nth heat sink can dissipate the heat generated by the nth chip in the nth stacked unit in a timely manner, improving the heat dissipation effect of the semiconductor packaging structure; a (j-1)th heat sink is located between the (j-1)th substrate and the jth substrate, thus the (j-1)th heat sink can provide structural support for the jth substrate, improving the stability of the semiconductor packaging structure; any (j-1)th stacked unit further includes: a heat sink located on one side of the (j-1)th substrate and covered by the (j-1)th heat sink. The (j-1)th conductive connector is covered by a cover, and the (j-1)th conductive connector has a (j-1)th slot; j is an integer greater than or equal to 2 and less than or equal to N; any j-th stacked unit further includes: a (j-1)th conductive connector located on the side of the j-th substrate away from the j-th chip and passing through the (j-1)th heat sink, one end of the (j-1)th conductive connector is connected to the j-th substrate, and the other end of the (j-1)th conductive connector is inserted into the (j-1)th slot. Therefore, on the one hand, the j-th stacked unit and the (j-1)th stacked unit can be nested together structurally through the (j-1)th conductive connector and the (j-1)th conductive connector. Even when the semiconductor package structure is subjected to strong pulling, squeezing, or thermal shock, the j-th stacked unit and the (j-1)th stacked unit will not detach. On the other hand, the current or signal between the j-th stacked unit and the (j-1)th stacked unit can also be transmitted through the (j-1)th conductive connector and the (j-1)th conductive connector. Therefore, the semiconductor package structure has high reliability and high integration. In summary, the semiconductor package structure has good stability and good heat dissipation.

[0020] Furthermore, any (j-1)th conductive connector includes a (j-1)th conductive connector body and a (j-1)th metal protective layer located on the surface of the (j-1)th conductive connector body; preferably, the material of the (j-1)th metal protective layer includes gold, and the (j-1)th metal protective layer can improve the corrosion resistance of the (j-1)th conductive connector, reduce the contact resistance of the (j-1)th conductive connector, and improve the reliability of the (j-1)th conductive connector, so that the semiconductor packaging structure can also be applied in the high-frequency field.

[0021] Furthermore, for any (j-1)th conductive connector on one side of the (j-1)th chip, in the direction perpendicular to the sidewall of the (j-1)th chip, the (j-1)th slot is arranged in a single row or multiple rows in the (j-1)th conductive connector. The (j-1)th slot arranged in multiple rows can improve the bonding strength between the j-th stacked unit and the (j-1)th stacked unit. Even when the semiconductor package structure is subjected to strong pulling, squeezing or thermal shock, the j-th stacked unit and the (j-1)th stacked unit will not separate. Therefore, the reliability of the semiconductor package structure can be further improved.

[0022] Furthermore, for any (j-1)th conductive connector on one side of the (j-1)th chip, the (j-1)th conductive connector can be arranged in a single row or multiple rows in the direction perpendicular to the sidewall of the (j-1)th chip. Multiple rows of (j-1)th conductive connectors can make the connection between the j-th stacked unit and the (j-1)th stacked unit more robust. Even when the semiconductor package structure is subjected to strong pulling, squeezing or thermal shock, the j-th stacked unit and the (j-1)th stacked unit will not detach. Therefore, the reliability of the semiconductor package structure can be further improved. Attached Figure Description

[0023] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of a semiconductor packaging structure provided in an embodiment of the present invention;

[0025] Figure 2 This is a top view of the internal structure of the first stacked unit provided in an embodiment of the present invention;

[0026] Figure 3 This is a top view of the internal structure of the second stacked unit provided in an embodiment of the present invention;

[0027] Figure 4 A top view of a first stacked unit provided in an embodiment of the present invention;

[0028] Figure 5 A longitudinal sectional view of a first heat dissipation cover provided in an embodiment of the present invention;

[0029] Figure 6 This is a schematic diagram of the structure of a first conductive connector provided in an embodiment of the present invention;

[0030] Figure 7The structure of the first conductive connector provided in an embodiment of the present invention. Detailed Implementation

[0031] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0032] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0033] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0034] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0035] This embodiment provides a semiconductor packaging structure, including:

[0036] The stacked units are from the first stacked unit to the Nth stacked unit. Any nth stacked unit includes the nth substrate, the nth chip located on one side of the nth substrate, and the nth heat sink cover. The nth heat sink cover covers the nth chip. N is an integer greater than or equal to 2, and n is an integer greater than or equal to 1 and less than or equal to N.

[0037] The (j-1)th heat sink is located between the (j-1)th substrate and the jth substrate. Any (j-1)th stacked unit further includes: a (j-1)th conductive connector located on one side of the (j-1)th substrate and covered by the (j-1)th heat sink, wherein the (j-1)th conductive connector has a (j-1)th slot; j is an integer greater than or equal to 2 and less than or equal to N.

[0038] Any j-th stacked unit further includes: a j-1 conductive connector located on the side of the j-th substrate away from the j-th chip and passing through the j-1 heat sink, one end of the j-1 conductive connector being connected to the j-th substrate, and the other end of the j-1 conductive connector being inserted into the j-1 slot.

[0039] The semiconductor packaging structure provided in this embodiment can increase its functionality by adding stacked units along one direction; any nth stacked unit includes an nth heat sink, which covers the nth chip. Therefore, the nth heat sink can dissipate the heat generated by the nth chip in the nth stacked unit in a timely manner, improving the heat dissipation effect of the semiconductor packaging structure; the (j-1)th heat sink is located between the (j-1)th substrate and the jth substrate, so the (j-1)th heat sink can provide structural support for the jth substrate, improving the stability of the semiconductor packaging structure; any (j-1)th stacked unit also includes: a (j-1)th conductive connector located on one side of the (j-1)th substrate and covered by the (j-1)th heat sink, the (j-1)th conductive connector having a (j-1)th slot; j is an integer greater than or equal to 2 and less than or equal to N; any The j-th stacked unit further includes a j-1 conductive connector located on the side of the j-th substrate opposite to the j-th chip and passing through the j-1 heat sink. One end of the j-1 conductive connector is connected to the j-th substrate, and the other end is inserted into the j-1 slot. Therefore, on the one hand, the j-th stacked unit and the j-1 stacked unit can be nested together structurally through the j-1 conductive connector and the j-1 conductive connector. Even when the semiconductor package structure is subjected to strong pulling, squeezing, or thermal shock, the j-th stacked unit and the j-1 stacked unit will not detach. On the other hand, the current or signal between the j-th stacked unit and the j-1 stacked unit can also be transmitted through the j-1 conductive connector and the j-1 conductive connector. Therefore, the semiconductor package structure has high reliability and high integration. In summary, the semiconductor package structure can achieve multiple functions, high integration, good stability, and good heat dissipation.

[0040] In one embodiment, the number of nth chips is one or more, and the nth chips are spaced apart on one side of the nth substrate. Any nth stacked unit also includes an nth resistor / capacitor, the number of nth resistor / capacitor is one or more, and the nth resistor / capacitor is spaced apart on one side of the nth substrate. The nth heat sink covers the nth chip and the nth resistor / capacitor.

[0041] The value of N can be 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 or 12. The specific value can be selected according to the actual situation, and will not be listed one by one.

[0042] In one embodiment, any (j-1)th conductive connector includes a female connector, and any (j-1)th conductive connector includes a pin connector.

[0043] In one embodiment, the cross-sectional shape of the end of any (j-1)th conductive connector facing the (j-1)th conductive connector in a direction parallel to the extension of the (j-1)th conductive connector includes an arc, a rectangle, or a triangle; in other embodiments, the cross-sectional shape of the end of any (j-1)th conductive connector facing the (j-1)th conductive connector in a direction parallel to the extension of the (j-1)th conductive connector may also include other shapes.

[0044] In one embodiment, the triangle includes an obtuse triangle; in other embodiments, the triangle also includes an acute triangle or a right triangle.

[0045] In one embodiment, any (j-1)th conductive connector includes a (j-1)th conductive connector body and a (j-1)th metal protective layer located on the surface of the (j-1)th conductive connector body. The (j-1)th metal protective layer can improve the corrosion resistance of the (j-1)th conductive connector, reduce the contact resistance of the (j-1)th conductive connector, and improve the reliability of the (j-1)th conductive connector, so that the semiconductor packaging structure can also be applied in the high-frequency field.

[0046] In one embodiment, the material of the (j-1)th metal protective layer includes gold.

[0047] In one embodiment, the number of any (j-1)th conductive connector is one and it is a ring structure, with the (j-1)th conductive connector surrounding the (j-1)th chip.

[0048] In another embodiment, the number of (j-1)th conductive connectors is several, and these several (j-1)th conductive connectors surround the (j-1)th chip and are arranged along the circumference of the (j-1)th chip. For example, the number of (j-1)th conductive connectors is 4, and the 4 (j-1)th conductive connectors surround the (j-1)th chip and are arranged along the circumference of the (j-1)th chip.

[0049] In one embodiment, for any (j-1)th conductive connector on one side of the (j-1)th chip, the (j-1)th slot is arranged in a single row in the (j-1)th conductive connector in a direction perpendicular to the sidewall of the (j-1)th chip.

[0050] In another embodiment, for any (j-1)th conductive connector on one side of the (j-1)th chip, the (j-1)th slot is arranged in multiple rows in the (j-1)th conductive connector in the direction perpendicular to the sidewall of the (j-1)th chip. The multiple rows of (j-1)th slots make the connection between the (j)th stacked unit and the (j-1)th stacked unit more robust. Even when the semiconductor package structure is subjected to strong pulling, squeezing, or thermal shock, the (j)th stacked unit and the (j-1)th stacked unit will not detach, thus further improving the reliability of the semiconductor package structure. For example, the (j-1)th slot can be arranged in two, three, or four rows in the (j-1)th conductive connector. The specific number of rows of the (j-1)th slot in the (j-1)th conductive connector can be selected according to actual conditions and will not be listed individually.

[0051] In one embodiment, the distance between any adjacent (j-1)th slot is 2.0mm-3mm, such as 2.2mm, 2.3mm, 2.54mm, 2.6mm, or 2.7mm. If the distance between any adjacent (j-1)th slot is less than 2.0mm, it will increase the difficulty of forming the (j-1)th slot. If the distance between any adjacent (j-1)th slot is greater than 3mm, the effect of improving the bonding strength between the j-th stacked unit and the (j-1)-th stacked unit is not significant.

[0052] In one embodiment, for any (j-1)th conductive connector on one side of the (j-1)th chip, the (j-1)th conductive connector is arranged in a single row in the direction perpendicular to the sidewall of the (j-1)th chip.

[0053] In another embodiment, for any (j-1)th conductive connector on one side of the (j-1)th chip, the (j-1)th conductive connector is arranged in multiple rows in the direction perpendicular to the sidewall of the (j-1)th chip. Multiple rows of the (j-1)th conductive connector can improve the bonding strength between the j-th stacked unit and the (j-1)th stacked unit. Even when the semiconductor package structure is subjected to strong pulling, squeezing, or thermal shock, the j-th stacked unit and the (j-1)th stacked unit will not detach, thus further improving the reliability of the semiconductor package structure. For example, in the direction perpendicular to the sidewall of the (j-1)th chip, the (j-1)th conductive connector can be arranged in two, three, or four rows. The specific number of rows of the (j-1)th conductive connector in the direction perpendicular to the sidewall of the (j-1)th chip can be selected according to actual conditions and will not be listed individually.

[0054] In one embodiment, the distance between any two adjacent (j-1)th conductive connectors is 2.0 mm to 3 mm, for example, 2.2 mm, 2.3 mm, 2.54 mm, 2.6 mm, or 2.7 mm. If the distance between any two adjacent (j-1)th conductive connectors is less than 2.0 mm, it will increase the difficulty of forming the (j-1)th conductive connector on one side of the (j-1)th substrate. If the distance between any two adjacent (j-1)th conductive connectors is greater than 3 mm, the effect of improving the bonding strength between the j-th stacked unit and the (j-1)th stacked unit is not significant.

[0055] In one embodiment, a (j-1)-th thermal adhesive layer is provided between the end of the (j-1)-th conductive connector and the (j-1)-th heat sink. The (j-1)-th thermal adhesive layer can improve the heat dissipation effect of the (j-1)-th stacked unit, thereby improving the heat dissipation effect of the semiconductor package structure. The (j-1)-th thermal adhesive layer comprises thermally conductive adhesive.

[0056] In one embodiment, any nth heat sink includes an nth top cover and an nth side plate located outside the nth top cover. The nth side plate and the nth top cover form an nth receiving cavity, and the nth chip is located within the nth receiving cavity. An nth thermally conductive adhesive layer is provided between the nth side plate and the nth substrate. The nth thermally conductive adhesive layer not only improves the bonding strength between the nth substrate and the nth heat sink, but also improves the heat dissipation effect of the nth stacked unit, thereby improving the heat dissipation effect of the semiconductor packaging structure. The nth thermally conductive adhesive layer includes thermally conductive adhesive.

[0057] In one embodiment, any (j-1)th top cover also has a (j-1)th heat dissipation hole penetrating through the (j-1)th top cover. On the one hand, the (j-1)th conductive connector is inserted into the (j-1)th slot through the (j-1)th heat dissipation hole; on the other hand, the (j-1)th heat dissipation hole can also improve the heat dissipation effect of the semiconductor package structure. The (j-1)th heat dissipation hole and the (j-1)th conductive connector are arranged in a one-to-one correspondence.

[0058] In one embodiment, the Nth top cover is a full-surface structure.

[0059] The semiconductor packaging structure provided in this embodiment can be augmented by adding an N+1th stacked unit if additional functionality is required. Specifically, an Nth heat dissipation hole can be formed on the Nth top cover, an N-1th conductive connector can be formed on one side of the N-1 substrate, and an N-1th conductive connector can be formed on the side of the N+1 substrate away from the Nth chip, passing through the Nth heat dissipation cover. The N-1th conductive connector and the N-1th conductive connector are nested and connected, enabling signal transmission between the Nth stacked unit and the N+1 stacked unit using the N-1th conductive connector and the N-1th conductive connector.

[0060] The semiconductor packaging structure provided in this embodiment can be applied in high-frequency technology fields such as smart meters, instruments, laptops, computers, digital cameras, and other smart communication products and smart home appliances.

[0061] In this embodiment, in conjunction with the reference Figures 1 to 7 Taking N=2 as an example, the semiconductor packaging structure includes: a first stacked unit and a second stacked unit. The first stacked unit includes a first substrate 11, a first chip 12, a first resistive capacitor 17 and a first heat sink 13 arranged at intervals on one side of the first substrate 11, the first heat sink 13 covering the first chip 12, a first conductive connector 14 located on one side of the first substrate 11 and covered by the first heat sink 13, the first conductive connector 14 having a first slot 140, the first heat sink 13 including a first top cover and a first side plate located outside the first top cover, the first top cover also having a first heat dissipation hole 15 penetrating the first top cover, and a first thermally conductive adhesive layer 16 between the first side plate and the first substrate 11. The second stacked unit includes a second substrate 21, a second chip 22 and a second heat sink 23 located on one side of the second substrate 21, the second heat sink 23 covering the second chip 22, a first conductive connector 24 located on the side of the second substrate 21 away from the second chip 22 and passing through the first heat sink 13, the first heat sink 13 being located between the first substrate 11 and the second substrate 21, one end of the first conductive connector 24 being connected to the second substrate 21, and the other end of the first conductive connector 24 being inserted into a first slot 140, the second heat sink 23 including a second top cover and a second side plate located outside the second top cover, the second top cover being a full-surface structure, and a second thermally conductive adhesive layer 25 being present between the second side plate and the second substrate 21.

[0062] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A semiconductor packaging structure, characterized in that, include: The stacked units are from the first stacked unit to the Nth stacked unit. Any nth stacked unit includes the nth substrate, the nth chip located on one side of the nth substrate, and the nth heat sink cover. The nth heat sink cover covers the nth chip. N is an integer greater than or equal to 2, and n is an integer greater than or equal to 1 and less than or equal to N. The (j-1)th heat sink is located between the (j-1)th substrate and the jth substrate. Any (j-1)th stacked unit further includes: a (j-1)th conductive connector located on one side of the (j-1)th substrate and covered by the (j-1)th heat sink, wherein the (j-1)th conductive connector has a (j-1)th slot; j is an integer greater than or equal to 2 and less than or equal to N. Any j-th stacked unit further includes: a j-1 conductive connector located on the side of the j-th substrate away from the j-th chip and passing through the j-1 heat sink, one end of the j-1 conductive connector being connected to the j-th substrate, and the other end of the j-1 conductive connector being inserted into the j-1 slot.

2. The semiconductor packaging structure according to claim 1, characterized in that, Any (j-1)th conductive connector includes a female connector, and any (j-1)th conductive connector includes a pin connector.

3. The semiconductor packaging structure according to claim 1, characterized in that, The cross-sectional shape of any (j-1)th conductive connector end facing the (j-1)th conductive connector base, parallel to the extension direction of the (j-1)th conductive connector, includes arc, rectangle, or triangle.

4. The semiconductor packaging structure according to claim 3, characterized in that, Triangles include obtuse triangles.

5. The semiconductor packaging structure according to claim 1, characterized in that, Any (j-1)th conductive connector includes a (j-1)th conductive connector body and a (j-1)th metal protective layer located on the surface of the (j-1)th conductive connector body.

6. The semiconductor packaging structure according to claim 5, characterized in that, The material of the j-1th metallic protective layer includes gold.

7. The semiconductor packaging structure according to claim 1, characterized in that, The number of any (j-1)th conductive connector is 1 and it is in a ring structure, with the (j-1)th conductive connector surrounding the (j-1)th chip; Alternatively, the number of the (j-1)th conductive connectors is several, and the several (j-1)th conductive connectors surround the (j-1)th chip and are arranged along the circumference of the (j-1)th chip.

8. The semiconductor packaging structure according to claim 1, characterized in that, For any (j-1)th conductive connector on one side of the (j-1)th chip, in the direction perpendicular to the sidewall of the (j-1)th chip, the (j-1)th slot is arranged in a single row or multiple rows in the (j-1)th conductive connector.

9. The semiconductor packaging structure according to claim 8, characterized in that, The distance between any two adjacent (j-1)th slots is 2.0mm-3mm.

10. The semiconductor packaging structure according to claim 1, characterized in that, For any (j-1)th conductive connector on one side of the (j-1)th chip, the (j-1)th conductive connector can be arranged in a single row or multiple rows in the direction perpendicular to the sidewall of the (j-1)th chip.

11. The semiconductor packaging structure according to claim 10, characterized in that, The distance between any two adjacent (j-1)th conductive connectors is 2.0mm-3mm.

12. The semiconductor packaging structure according to claim 1, characterized in that, There is a j-1 heat dissipation adhesive layer between the end of the j-1 conductive connector and the j-1 heat dissipation cover.

13. The semiconductor packaging structure according to claim 1, characterized in that, Any nth heat dissipation cover includes an nth top cover and an nth side plate located outside the nth top cover. The nth side plate and the nth top cover form an nth receiving cavity, and the nth chip is located in the nth receiving cavity. There is an nth thermally conductive adhesive layer between the nth side plate and the nth substrate.

14. The semiconductor packaging structure according to claim 13, characterized in that, The Nth top cover is a full-surface structure.

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