Light-emitting panels and display devices

Abstract

This invention discloses a light-emitting panel and a display device, belonging to the field of light-emitting displays. The light-emitting panel includes multiple light-emitting units, each including electrically connected pixel circuits and light-emitting elements. The light-emitting panel includes a substrate and a first metal layer located on one side of the substrate. The first metal layer includes multiple first signal lines, which are electrically connected to the pixel circuits and provide high-potential signals to the pixel circuits. The light-emitting panel also includes a first transparent conductive layer located on the side of the first metal layer away from the substrate. The first transparent conductive layer includes multiple first transparent conductive portions, the orthographic projection of the first transparent conductive portions onto the plane of the substrate at least partially overlapping the orthographic projection of the first signal lines onto the plane of the substrate. The display device includes the aforementioned light-emitting panel. This invention can protect the metal conductive structure in the panel, prevent oxidative electrochemical corrosion of the metal structure, and is beneficial for improving product yield and simplifying manufacturing processes.

Description

Technical Field

[0001] This invention relates to the field of light-emitting display technology, and more specifically, to a light-emitting panel and a display device. Background Technology

[0002] Mini-LED (Mini-Light Emitting Diode), also known as sub-millimeter light-emitting diode, and Micro-LED (Micro-Light Emitting Diode), also known as micro-light-emitting diode, are self-emissive display technologies. Their advantages include being all-solid-state, long-lifespan, high brightness, low power consumption, small size, ultra-high resolution, and applicability to extreme environments such as high temperatures or radiation. Compared to OLED technology, which also features self-emissive displays, Mini-LED and Micro-LED are not only more efficient and have a longer lifespan, but their materials are also less affected by environmental factors and are relatively stable, avoiding image retention. Because Mini-LED and Micro-LED chips are smaller than conventional LED chips, and the spacing between them is also smaller, direct control of the brightness of the backlight chips allows for local dimming within a small area. This enables higher brightness uniformity and color contrast within a smaller mixing distance, significantly improving the backlight performance of existing LCD devices. This results in ultra-thin, high color rendering, and energy-saving performance in LCD devices, and they are widely used in the field of LCD technology.

[0003] When manufacturing Mini LED or Micro-LED light panels, reflective structures are typically created on the substrate to improve light utilization. Therefore, the reflective properties of the reflective materials must be highly reflective. Current technologies generally use metal materials to achieve the reflective effect. However, in high-temperature and high-humidity environments, the positively charged surface metal is prone to corrosion, which in turn threatens other conductive metal structures within the light panel. While existing technologies employ multi-layer stacking of inorganic and organic layers to improve the protection of the reflective metal, the stress mismatch between the layers and the poor adhesion between organic and inorganic materials easily lead to peeling, resulting in ineffective protection and low product yield. Furthermore, the multi-layer stacking process is complex and costly; and the limited reflectivity of the metal material prevents further improvement.

[0004] Therefore, providing a light-emitting panel and display device that can protect the conductive metal structure in the panel, prevent the metal structure from undergoing oxidative electrochemical corrosion, and improve product yield and simplify manufacturing processes is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] In view of this, the present invention provides a light-emitting panel and a display device to solve the problems in the prior art where the multi-layered structure of inorganic and organic layers in the panel provides poor protection for the metal conductive structure under high temperature and high humidity conditions, which easily affects the low product yield and results in complex processes and high costs.

[0006] The present invention provides a light-emitting panel, comprising: a plurality of light-emitting units, each light-emitting unit including an electrically connected pixel circuit and a light-emitting element; the light-emitting panel including a substrate and a first metal layer located on one side of the substrate, the first metal layer including a plurality of first signal lines, the first signal lines being electrically connected to the pixel circuits and providing high-potential signals to the pixel circuits; the light-emitting panel further including a first transparent conductive layer located on the side of the first metal layer away from the substrate; the first transparent conductive layer including a plurality of first transparent conductive portions, the orthographic projection of the first transparent conductive portions onto the plane of the substrate at least partially overlapping the orthographic projection of the first signal lines onto the plane of the substrate.

[0007] Based on the same inventive concept, the present invention also discloses a display device, which includes the above-mentioned light-emitting panel.

[0008] Compared with the prior art, the light-emitting panel and display device provided by the present invention achieve at least the following beneficial effects:

[0009] The light-emitting panel provided by this invention includes multiple light-emitting units. Each light-emitting unit includes an electrically connected pixel circuit and a light-emitting element. The pixel circuit can be a driving circuit that provides driving current to the light-emitting element, enabling the light-emitting element to emit light under the drive of the pixel circuit. The light-emitting panel includes at least a first metal layer for fabricating multiple first signal lines. The first signal lines are electrically connected to the pixel circuit and are used to provide high-potential signals to the pixel circuit; that is, the first signal lines can be understood as traces for transmitting high-potential signals. In this invention, a first transparent conductive layer is further disposed on the side of the first metal layer away from the substrate. Through patterned design, the first transparent conductive layer forms multiple first transparent conductive portions, and the orthographic projection of the first transparent conductive portion onto the plane of the substrate at least partially overlaps with the orthographic projection of the first signal line onto the plane of the substrate. That is, the first transparent conductive portion is located directly above the area where the first signal line with the high-potential signal is located, and there is at least a partial overlap with the first signal line in a direction perpendicular to the plane of the substrate. Since the first signal line, which carries a high-potential signal, transmits positive charges (high potential), it is more prone to gaining electrons and undergoing oxidation reactions under long-term high-temperature and high-humidity operating environments, easily causing corrosion and affecting product yield. However, the material of the first transparent conductive layer is a reducing conductive material, which, even if it gains electrons under long-term high-temperature and high-humidity operating environments, will not undergo oxidation reactions. Therefore, the first transparent conductive portion overlapping with the first signal line can protect the underlying metal material of the first signal line, preventing oxidative electrochemical corrosion and improving product yield. Furthermore, since this invention uses a first transparent conductive layer comprising multiple first transparent conductive portions to protect the metal conductive structure in the light-emitting panel, it eliminates the need for a multi-layered stacked structure of organic and inorganic layers in the film layer of the light-emitting panel. This simplifies the manufacturing process, reduces panel thickness, and enables a thinner panel design.

[0010] Of course, any product implementing this invention need not necessarily achieve all of the technical effects described above at the same time.

[0011] Other features and advantages of the invention will become clear from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. Attached Figure Description

[0012] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the invention and, together with their description, serve to explain the principles of the invention.

[0013] Figure 1 This is a schematic diagram of the planar structure of the light-emitting panel provided in an embodiment of the present invention;

[0014] Figure 2 yes Figure 1 A schematic diagram of a cross-sectional structure along the A-A' direction;

[0015] Figure 3 yes Figure 1 A schematic diagram of the electrical connection structure of one light-emitting unit;

[0016] Figure 4 yes Figure 1 A schematic diagram of another electrical connection structure for a light-emitting unit;

[0017] Figure 5 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention;

[0018] Figure 6 yes Figure 5 A schematic diagram of a cross-sectional structure along the B-B' direction;

[0019] Figure 7 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention;

[0020] Figure 8 yes Figure 7 A schematic diagram of a cross-sectional structure along the C-C' direction;

[0021] Figure 9 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention;

[0022] Figure 10 yes Figure 9 A schematic diagram of a cross-sectional structure along the D-D' direction;

[0023] Figure 11 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention;

[0024] Figure 12 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention;

[0025] Figure 13 yes Figure 12 A magnified view of a region containing one of the light-emitting units;

[0026] Figure 14 yes Figure 13 A schematic diagram of a cross-sectional structure along the E-E' direction;

[0027] Figure 15 yes Figure 12 Another magnified view of the area where one of the light-emitting units is located;

[0028] Figure 16 yes Figure 15 A schematic diagram of a cross-sectional structure along the F-F' direction;

[0029] Figure 17 yes Figure 12Another magnified view of the area where one of the light-emitting units is located;

[0030] Figure 18 yes Figure 17 A schematic diagram of a cross-sectional structure along the G-G' direction;

[0031] Figure 19 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention;

[0032] Figure 20 yes Figure 19 A schematic diagram of a cross-sectional structure along the H-H' direction;

[0033] Figure 21 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention;

[0034] Figure 22 yes Figure 21 A magnified view of a region containing multiple light-emitting units;

[0035] Figure 23 This is a schematic diagram of the planar structure of the display device provided in an embodiment of the present invention. Detailed Implementation

[0036] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention.

[0037] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0038] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0039] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0040] Various modifications and variations can be made to this invention without departing from its spirit or scope, as will be apparent to those skilled in the art. Therefore, this invention is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this invention can be combined with each other without contradiction.

[0041] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0042] Please refer to the reference. Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of the planar structure of the light-emitting panel provided in an embodiment of the present invention. Figure 2 yes Figure 1 A cross-sectional structural diagram along the A-A' direction (it can be understood that this is for the purpose of clearly illustrating the structure in this embodiment). Figure 1 (Transparency filling has been performed). The light-emitting panel 000 provided in this embodiment includes: a plurality of light-emitting units 00, each light-emitting unit 00 including an electrically connected pixel circuit 10 and a light-emitting element 20;

[0043] The light-emitting panel 000 includes a substrate 01 and a first metal layer 02 located on one side of the substrate 01. The first metal layer 02 includes a plurality of first signal lines 30. The first signal lines 30 are electrically connected to the pixel circuit 10 and provide a high potential signal to the pixel circuit 10.

[0044] The light-emitting panel 000 also includes a first transparent conductive layer 03, which is located on the side of the first metal layer 02 away from the substrate 01;

[0045] The first transparent conductive layer 03 includes a plurality of first transparent conductive portions 40, and the orthographic projection of the first transparent conductive portion 40 on the plane where the substrate 01 is located overlaps at least partially with the orthographic projection of the first signal line 30 on the plane where the substrate 01 is located.

[0046] Specifically, the light-emitting panel 000 provided in this embodiment can be a sub-millimeter light-emitting diode (mini LED) or micro light-emitting diode (micro LED) light-emitting panel. The light-emitting panel 000 includes multiple light-emitting units 00, which can be understood as multiple light-emitting pixel areas dividing the light-emitting panel 000. It is understood that in this embodiment... Figure 1This example only illustrates the arrangement of multiple light-emitting units 00 in an array. In actual implementation, the arrangement of multiple light-emitting units 00 in the light-emitting panel 000 includes, but is not limited to, this. In this embodiment, the light-emitting unit 00 includes an electrically connected pixel circuit 10 and a light-emitting element 20. The film structure of the light-emitting panel 000 includes a substrate 01. The pixel circuit 10 and the light-emitting element 20 can both be disposed on the substrate 01. The substrate 01 can be used as a carrier substrate for the light-emitting panel 000, used to fabricate and set the remaining structures of the light-emitting panel 000 on the substrate 01. The pixel circuit 10 can be a driving circuit that provides driving current to the light-emitting element 20, enabling the light-emitting element 20 to emit light under the drive of the pixel circuit 10. Optionally, the light-emitting element 20 in this embodiment can be any of a sub-millimeter light-emitting diode or a micro light-emitting diode. The light-emitting panel 000 of this embodiment displays images by using a high-density array of tiny light-emitting elements 20 integrated on a substrate 01 as display pixels. This reduces the pixel distance from millimeters to micrometers, and as a self-emissive display, it offers advantages such as better material stability, longer lifespan, and no image burn-in. The light-emitting panel 000 provided in this embodiment can be used directly as a display panel, thereby improving display uniformity and resolution. Alternatively, the light-emitting panel 000 provided in this embodiment can also be used as a backlight for a liquid crystal display panel, further improving the uniformity of light emission and providing uniform backlighting for the liquid crystal display panel, thus enhancing the display effect. This embodiment does not specifically limit the usage of the light-emitting panel 000; in specific implementations, the configuration can be selected according to actual needs.

[0047] The light-emitting panel 000 in this embodiment includes at least a first metal layer 02. The first metal layer 02 is located on one side of the substrate 01 and is used to create a conductive structure that enables the light-emitting panel 000 to emit light. The first metal layer 02 includes multiple first signal lines 30. The first signal lines 30 are electrically connected to the pixel circuit 10 and are used to provide a high-potential signal to the pixel circuit 10. That is, the first signal lines 30 can be understood as traces for transmitting high-potential signals. Optionally, one end of the first signal line 30 can be electrically connected to a driver chip or flexible circuit board subsequently bonded to the light-emitting panel 000, and the other end of the first signal line 30 can be electrically connected to a structure in the pixel circuit 10, such as connecting to the source or drain of the thin-film transistor included in the pixel circuit 10, so as to realize the transmission of driving signals between the driver chip or flexible circuit board and the pixel circuit 10.

[0048] In existing technologies, to ensure the reflectivity of the light-emitting panel and improve light utilization, a reflective layer of metal material is typically fabricated above the first metal layer. Furthermore, to prevent corrosion of the metal material due to the positive charge on the metal surface in high-temperature and high-humidity environments, a multi-layered structure of organic and inorganic layers is required to enhance the protection of the metal structure. However, when inorganic and organic layers are stacked, peeling is highly likely to occur between the layers, failing to effectively guarantee the protection of the metal structure within the panel, resulting in low product yield. Moreover, the multi-layer stacking process is complex and costly.

[0049] To address the aforementioned problems, this embodiment further provides a first transparent conductive layer 03 on the side of the first metal layer 02 in the light-emitting panel 000 that is away from the substrate 01, such as... Figure 1 and Figure 2 As shown, through patterned design, the first transparent conductive layer 03 forms multiple first transparent conductive portions 40, and the orthographic projection of the first transparent conductive portion 40 onto the plane of the substrate 01 at least partially overlaps with the orthographic projection of the first signal line 30 onto the plane of the substrate 01. That is, the first transparent conductive portion 40 is located directly above the area where the first signal line 30 with the high-potential signal is located, and there is at least a partial overlap with the first signal line 30 in the direction perpendicular to the plane of the substrate 01. Since the first signal line 30 with the high-potential signal transmits positive charge (high potential), it is more likely to gain electrons and undergo oxidation reaction under long-term high temperature and high humidity conditions, which can easily cause corrosion and affect product yield. In this embodiment, the material of the first transparent conductive layer 03 can be indium tin oxide (ITO). Since the first transparent conductive layer 03 is a reducing conductive material, it will not undergo oxidation even after gaining electrons under long-term high temperature and humidity conditions. Therefore, in this embodiment, the orthographic projection of the first transparent conductive portion 40 onto the plane of the substrate 01 at least partially overlaps with the orthographic projection of the first signal line 30 onto the plane of the substrate 01. The first transparent conductive portion 40 overlapping with the first signal line 30 can protect the underlying metal material of the first signal line 30, preventing oxidative electrochemical corrosion and improving product yield. Furthermore, since this embodiment uses a first transparent conductive layer 03 including multiple first transparent conductive portions 40 to protect the metal conductive structure in the light-emitting panel 000, it eliminates the need for a multi-layer stacked structure of organic and inorganic layers in the film layer of the light-emitting panel 000. This simplifies the manufacturing process, reduces panel thickness, and enables a thinner panel design.

[0050] Optionally, in this embodiment, the signal traces in the light-emitting panel 000 may also include traces connected to low-potential signals, such as negative power supply signal lines PVEE (which can be disposed in a different layer from the high-potential signal lines, i.e., located in other metal film layers other than the first metal layer 02). The negative power supply signal lines are used to provide a negative power supply signal Vpvee to the pixel circuit 10. Optionally, such as... Figure 1 and Figure 3 As shown, Figure 3 yes Figure 1 A schematic diagram of the electrical connection structure of a light-emitting unit is shown. The negative power supply signal Vpvee can be connected to the cathode of the light-emitting element 20 to provide the negative power supply signal Vpvee to the pixel circuit 10. In this embodiment, it is set in the direction Z perpendicular to the plane where the substrate 01 is located. The first transparent conductive part 40 does not overlap with the trace connected to the low-potential signal. That is, the setting position of the first transparent conductive part 40 avoids the trace connected to the low-potential signal. Since the first transparent conductive part 40 will undergo a reduction reaction under negative charge for a long time, it is easy to reduce the conductivity of the first transparent conductive part 40, which is equivalent to the corrosion problem of the first transparent conductive part 40. Therefore, the first transparent conductive part 40 avoids the trace connected to the low-potential signal, which can effectively protect the trace of the low-potential signal from the risk of corrosion, thereby improving the yield and service life of the panel.

[0051] Optional, such as Figure 2 As shown, the pixel circuit 10 in this embodiment may include at least one thin-film transistor T. The at least one thin-film transistor T may be fabricated in the film layer structure of the light-emitting panel 000 using a gate metal layer, an active layer, and a source-drain metal layer. In this embodiment, the first metal layer 02 where the first signal line 30 is located may be a source-drain metal layer, that is, the first signal line 30 and the source and drain of the thin-film transistor T are disposed on the same layer. Alternatively, the first metal layer 02 where the first signal line 30 is located may also be disposed in other positions. This embodiment does not limit this.

[0052] It is understood that in this embodiment Figure 1 This diagram only illustrates the pixel circuit 10 and the light-emitting element 20. In actual implementation, the electrical connection structure of the pixel circuit 10 and the light-emitting element 20 can be selected and configured according to actual needs. Figure 2 The diagram only illustrates a portion of the structure of the pixel circuit 10 within the light-emitting unit 00. In a specific implementation, the pixel circuit 10 may also include multiple thin-film transistor structures, such as a 7T1C circuit structure. Figure 4 As shown, Figure 4 yes Figure 1A schematic diagram of another electrical connection structure for a light-emitting unit is shown below. The pixel circuit 10 can be a circuit structure including seven thin-film transistors (T1, T2, T3, T4, T5, T6, T7) and one capacitor Cst, etc. Optionally, the first signal line 30 can be the positive power supply signal line PVDD connected to the pixel circuit 10. The working principle of the pixel circuit 10 is not described in detail in this embodiment. For details, please refer to the connection structure of the pixel circuit and the light-emitting element in related technologies. This embodiment is not specifically limited here. It can be understood that... Figure 4 The schematic electrical connection structure between the pixel circuit 10 and the light-emitting element 20 is only an example. In actual implementation, the electrical connection structure between the pixel circuit 10 and the light-emitting element 20 includes, but is not limited to, this.

[0053] It should be noted that the diagram in this embodiment is only an example of the structure of the light-emitting panel. In actual implementation, the structure of the light-emitting panel includes, but is not limited to, this. It may also include other structures that can realize the display function. For details, please refer to the structure of mini LED or micro LED light-emitting panels in related technologies. This embodiment will not elaborate on it here.

[0054] In some alternative embodiments, please refer to the references. Figure 5 and Figure 6 , Figure 5 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention. Figure 6 yes Figure 5 A cross-sectional structural diagram along the B-B' direction (it can be understood that, for the purpose of clearly illustrating the structure in this embodiment, Figure 5 (Transparency filling has been performed). In this embodiment, the orthogonal projection of the first transparent conductive part 40 on the plane where the substrate 01 is located covers the orthogonal projection of the first signal line 30 on the plane where the substrate 01 is located.

[0055] This embodiment explains that the shape of the orthographic projection of the first transparent conductive portion 40 disposed on the first transparent conductive layer 03 onto the plane of the substrate 01 can match the shape of the orthographic projection of the first signal line 30 onto the plane of the substrate 01. For example, if the orthographic projection of the first signal line 30 onto the plane of the substrate 01 is elongated, then the shape of the orthographic projection of the first transparent conductive portion 40 onto the plane of the substrate 01 can also be elongated. Furthermore, the orthographic projection of the first transparent conductive portion 40 onto the plane of the substrate 01 covers the orthographic projection of the first signal line 30 onto the plane of the substrate 01. That is, the width W1 of the orthographic projection of the first transparent conductive portion 40 onto the plane of the substrate 01 can be greater than ( Figure 5 and Figure 6 (Not shown in the image) or equal to the width W2 of the orthographic projection of the first signal line 30 onto the plane of substrate 01, such as Figure 5 and Figure 6The width of the orthographic projection of the first transparent conductive part 40 onto the plane of the substrate 01 is equal to the width of the orthographic projection of the first signal line 30 onto the plane of the substrate 01. This ensures that the orthographic projection of the first transparent conductive part 40 onto the plane of the substrate 01 exactly covers the orthographic projection of the first signal line 30 onto the plane of the substrate 01. The first transparent conductive part 40 covers at least to the edge of the first signal line 30, so that the first transparent conductive part 40 can play a better protective role in the area where the first signal line 30 is located. This can prevent the first signal line 30, which is connected to a high potential signal, from undergoing oxidation and corrosion in a long-term high temperature and high humidity environment, thereby effectively ensuring product yield.

[0056] Optional, such as Figure 7 and Figure 8 As shown, Figure 7 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention. Figure 8 yes Figure 7 A cross-sectional structural diagram along the C-C' direction (it can be understood that this is for the purpose of clearly illustrating the structure in this embodiment). Figure 7 (Transparency filling was performed), the width W1 of the orthogonal projection of the first transparent conductive part 40 onto the plane where the substrate 01 is located is greater than the width W2 of the orthogonal projection of the first signal line 30 onto the plane where the substrate 01 is located.

[0057] This embodiment explains that the shape of the orthographic projection of the first transparent conductive portion 40 disposed on the first transparent conductive layer 03 onto the plane of the substrate 01 can match the shape of the orthographic projection of the first signal line 30 onto the plane of the substrate 01. Furthermore, the width W1 of the orthographic projection of the first transparent conductive portion 40 onto the plane of the substrate 01 is greater than the width W2 of the orthographic projection of the first signal line 30 onto the plane of the substrate 01. This ensures that the orthographic projection of the first transparent conductive portion 40 onto the plane of the substrate 01 covers the orthographic projection of the first signal line 30 onto the plane of the substrate 01, while also having an area where the edge of the first transparent conductive portion 40 extends beyond the edge of the first signal line 30. This allows the first transparent conductive portion 40 to better provide protection in the area above the first signal line 30, thereby further enhancing the protective capability of the first transparent conductive portion 40 against the first signal line 30 made of metallic materials.

[0058] In some alternative embodiments, please refer to the references. Figure 4 , Figure 9 and Figure 10 , Figure 9 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention. Figure 10 yes Figure 9 A cross-sectional structural diagram along the D-D' direction (it can be understood that this is for the purpose of clearly illustrating the structure in this embodiment). Figure 9(Transparency filling has been performed). In this embodiment, multiple first signal lines 30 include a positive power signal line PVDD, and the first transparent conductive part 40 is electrically connected to the positive power signal line PVDD through a first via K1.

[0059] This embodiment explains that the first signal line 30 used to provide a high-potential signal can be a positive power supply signal line PVDD electrically connected to the pixel circuit 10, such as... Figure 4 As shown, the positive power signal line PVDD is electrically connected to the source of the driving transistor T3 in the pixel circuit 10 through the light-emitting control transistor T1, providing a high-potential positive power signal Vpvdd to the pixel circuit 10. This allows the conductive path formed by the light-emitting control transistor T1, driving transistor T3, and light-emitting control transistor T6 in the pixel circuit 10 to control the light-emitting element 20 to emit light under the voltage difference between the positive power signal Vpvdd and the negative power signal Vpvee. Since the positive power signal line PVDD needs to transmit a constantly high DC signal, this embodiment provides a first transparent conductive part 40 electrically connected to the positive power signal line PVDD through a first via K1. This means that the first transparent conductive part 40, which protects the first signal line 30, can form a parallel structure with the positive power signal line PVDD, thereby reducing the resistance of the positive power signal line PVDD and improving its ability to transmit constantly high DC signals, thus ensuring the operating performance of the pixel circuit 10.

[0060] Optional, such as Figure 9 and Figure 10 As shown, when multiple first signal lines 30 include a positive power signal line PVDD, the orthographic projection of the first transparent conductive part 40 onto the plane where the substrate 01 is located is within the range of the orthographic projection of the positive power signal line PVDD onto the plane where the substrate 01 is located.

[0061] This embodiment explains that the first signal line 30 used to provide a high-potential signal can be a positive power supply signal line PVDD electrically connected to the pixel circuit 10. When the first transparent conductive part 40 is electrically connected to the positive power supply signal line PVDD through the first via K1, so that a constantly high DC signal is also transmitted on the first transparent conductive part 40, the orthographic projection of the first transparent conductive part 40 onto the plane of the substrate 01 can be set to fall within the range of the orthographic projection of the positive power supply signal line PVDD onto the plane of the substrate 01. That is, the width W1 of the orthographic projection of the first transparent conductive part 40 onto the plane of the substrate 01 can be smaller than the width W1 of the orthographic projection of the positive power supply signal line PVDD onto the plane of the substrate 01. With a width of W2, since the first transparent conductive part 40 transmits a high DC signal and thus carries a positive charge, even if it gains electrons in a long-term high-temperature and high-humidity environment, it will be adsorbed by the first transparent conductive part 40. Furthermore, since the first transparent conductive part 40 is a reducing conductive material, even if it adsorbs electrons, it will not undergo an oxidation reaction. Therefore, even if the width of the first transparent conductive part 40 is relatively narrow, it can effectively prevent the positive power signal line PVDD below it from undergoing electrochemical corrosion. This helps to ensure product yield, and also requires only an overlapping area between the first transparent conductive part 40 and the positive power signal line PVDD, which helps to reduce the manufacturing difficulty of the first transparent conductive part 40.

[0062] Optional, such as Figure 11 As shown, Figure 11 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention (it should be understood that this diagram is for the purpose of clearly illustrating the structure in this embodiment). Figure 11 (Transparency filling has been performed). In this embodiment, the multiple first signal lines 30 may further include a power supply signal line VGH that provides a high-potential signal. Optionally, the first signal line 30 that provides the high-potential signal VGH may be located in the non-light-emitting area NFA of the light-emitting panel 000, such as in the border area of ​​the light-emitting panel 000. The light-emitting unit 00 may be located in the light-emitting area FA. The non-light-emitting area NFA may also include a scan drive circuit 50 with multiple cascaded shift register units. The power supply signal line VGH is used to provide a high-potential power supply to the scan drive circuit 50. The power supply signal line VGH is electrically connected to the input terminal of the scan drive circuit 50, and the output terminal of the scan drive circuit 50 is electrically connected to the pixel circuit 10. Further optionally, the non-light-emitting area NFA may also include a power supply signal line VGL (not shown in the figure) that provides a low-potential power supply to the scan drive circuit 50. In this embodiment, the function of the power supply signal line connected to the scan drive circuit is not described in detail. In specific implementation, the electrical connection structure of the scan drive circuit in related technologies can be referred to for understanding.

[0063] In this embodiment, the power supply signal line VGH is located in the first metal layer 02. A first transparent conductive part 40 can also be provided above the power supply signal line VGH. Further optionally, the orthogonal projection of the first transparent conductive part 40 above the power supply signal line VGH on the substrate 01 can cover the orthogonal projection of the power supply signal line VGH on the substrate 01, so as to avoid electrochemical corrosion of the power supply signal line VGH that provides high potential signals, thereby helping to protect the high potential first signal line 30 in the non-light-emitting area NFA and improve the panel yield.

[0064] It is understood that the first transparent conductive part 40 located directly above the power supply signal line VGH in this embodiment can be either insulated from the power supply signal line VGH or electrically connected to the power supply signal line VGH. This embodiment does not limit this.

[0065] In some alternative embodiments, please continue to refer to the references. Figure 1 and Figure 2 The light-emitting panel 000 also includes a first insulating layer 04 (not filled in the figure), which is located between the first metal layer 02 and the first transparent conductive layer 03. The material of the first insulating layer 04 is an organic material.

[0066] This embodiment explains that the substrate 01 side of the light-emitting panel 000 also includes a first insulating layer 04 made of organic material. The first insulating layer 04 can be understood as a planarization layer, used to cover the step difference formed after the film layer process where the thin-film transistor is located, so that the conductive structure or other film layer structure subsequently fabricated on the side of the first insulating layer 04 away from the substrate 01 will not break, which is beneficial to improving the reliability of the panel film layer structure. Since the first insulating layer 04 needs to be made of organic material to ensure its planarity, and organic materials are relatively easy to absorb water, this embodiment sets the first insulating layer 04 between the first metal layer 02 and the first transparent conductive layer 03. That is, the first transparent conductive layer 03, which plays a protective role, is located on the side of the first insulating layer 04 away from the substrate 01, so that the first transparent conductive layer 03 is above the first insulating layer 04 made of organic material, which is beneficial to further enhance the protective effect on the film layer structure below it.

[0067] In some alternative embodiments, please refer to the references. Figure 4 , Figure 12 , Figure 13 , Figure 14 , Figure 12 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention. Figure 13 yes Figure 12 A magnified view of a region containing one light-emitting unit. Figure 14 yes Figure 13 A cross-sectional structural diagram along the E-E' direction (it can be understood that this is for the purpose of clearly illustrating the structure in this embodiment). Figure 12 and Figure 13 (Transparency filling has been performed). In this embodiment, the light-emitting panel 000 also includes a second metal layer 05, which is located on the side of the first metal layer 02 away from the first transparent conductive layer 03. The second metal layer 05 includes multiple light-emitting control signal lines EM, which are electrically connected to the pixel circuit 10.

[0068] The extension direction of the light emission control signal line EM intersects with the extension direction of the first signal line 30;

[0069] In the direction Z perpendicular to the plane where the substrate 01 is located, the area where the light emission control signal line EM and the first signal line 30 overlap is the first region J1;

[0070] The light-emitting panel 000 also includes a second transparent conductive layer 06, which is located between the first metal layer 02 and the second metal layer 05.

[0071] The second transparent conductive layer 06 includes a plurality of second transparent conductive portions 60, the orthographic projection of the second transparent conductive portion 60 onto the plane where the substrate 01 is located at least partially overlaps with the orthographic projection of the first region J1 onto the plane where the substrate 01 is located.

[0072] This embodiment explains that the pixel circuit 10 of the light-emitting panel 000 is also connected to a light-emitting control signal line EM, so as to... Figure 4 Taking the electrical connection structure of the pixel circuit 10 shown as an example, the light emission control signal line EM is used to provide control signals to the gates of the light emission control transistors T1 and T6, and to control the light emission control transistors T1 and T6 to be turned off during the non-light emission stage of the light emission unit 00, and to control the light emission control transistors T1 and T6 to be turned on only during the light emission stage of the light emission unit 00, thereby forming a conduction path between the positive power supply signal line PVDD and the negative power supply signal line PVEE.

[0073] The film structure of the light-emitting panel 000 in this embodiment further includes a second metal layer 05 located on the side of the first metal layer 02 away from the first transparent conductive layer 03. The second metal layer 05 can be located on the side of the first metal layer 02 closer to the substrate 01. For example, if the first metal layer 02 is a source-drain metal layer for fabricating the source and drain electrodes of a thin-film transistor, then the second metal layer 05 can be a gate metal layer for fabricating the gate electrode of the thin-film transistor; or, if the first metal layer 02 is a source-drain metal layer for fabricating the source and drain electrodes of a thin-film transistor, then the second metal layer 05 can also be a capacitor metal layer for fabricating the electrodes of the storage capacitor in the pixel circuit 10. This embodiment does not limit this. In this embodiment, the light-emitting control signal line EM that provides the light-emitting control signal to the pixel circuit 10 is fabricated using the second metal layer 05. The extension direction of the light-emitting control signal line EM intersects with the extension direction of the first signal line 30. Optionally, such as Figure 12As shown, the extension direction of the first signal line 30 is the first direction Y, and the extension direction of the light-emitting control signal line EM can be the second direction X. This embodiment uses the example of the first direction Y and the second direction X being perpendicular to each other in a direction parallel to the plane where the substrate 01 is located. Further optionally, the light-emitting panel 000 may also include multiple scan lines and multiple data lines (not shown in the figure). The scan lines can extend along the second direction X, and the data lines can extend along the first direction Y. The scan lines are used to provide scan control signals to the reset transistors T5 and T7 and the data writing transistor T2 in the pixel circuit 10, and the data lines are used to provide data voltage signals to the pixel circuit 10. This embodiment does not elaborate on the working principle of the pixel circuit 10. In specific implementation, the light-emitting display principle of the light-emitting panel in related technologies can be referred to for understanding.

[0074] In this embodiment, the first signal line 30 and the light-emitting control signal line EM are disposed on different layers. In the direction Z perpendicular to the plane where the substrate 01 is located, the area where the light-emitting control signal line EM and the first signal line 30 overlap is the first region J1. In this embodiment, a second transparent conductive layer 06 is disposed below the first metal layer 02, that is, the second transparent conductive layer 06 is located between the first metal layer 02 and the second metal layer 05. Through patterned design, the second transparent conductive layer 06 includes a plurality of second transparent conductive parts 60. The orthographic projection of the second transparent conductive parts 60 on the plane where the substrate 01 is located overlaps at least partially with the orthographic projection of the first region J1 on the plane where the substrate 01 is located. Since the light-emitting control signal line EM is a normally low potential signal during the light-emitting stage of the light-emitting unit 00 (taking the light-emitting control transistors T1 and T6 as P-type transistors as an example), when the normally low potential light-emitting control signal line EM overlaps with the high potential first signal line 30, it is easy for electrons to be gained below the first signal line 30 in the first region J1, resulting in an oxidation reaction and corrosion of the first signal line 30 at the position of the first region J1. In this embodiment, by placing the second transparent conductive part 60 at the first region J1 where the light-emitting control signal line EM and the first signal line 30 overlap, the light-emitting control signal line EM and the first signal line 30 in the first region J1 are separated. This creates an oxidation-isolated channel and an oxidation-isolated interface below the first signal line 30 in the first region J1, preventing oxidation and corrosion of the overlapping area of ​​the low-potential light-emitting control signal line EM and the high-potential first signal line 30, i.e., the first signal line 30 in the first region J1. This also protects the lower surface of the first signal line 30, ensuring the transmission effect of the high-potential signal on the first signal line 30 and further improving product yield.

[0075] It is understood that, in this embodiment, the second transparent conductive layer 06 can be directly disposed below the first metal layer 02 (e.g., Figure 14(As shown in the figure), or an insulating layer (not shown in the figure) can be provided between the second transparent conductive layer 06 and the first metal layer 02. This embodiment does not limit this, as long as the second transparent conductive layer 06 is located between the first metal layer 02 and the second metal layer 05, thereby forming an isolation channel between the second metal layer 05 and the first metal layer 02 to achieve a protective effect.

[0076] Optional, please refer to the reference. Figure 12 , Figure 13 and Figure 15 , Figure 15 yes Figure 12 Another enlarged view of the area where one of the light-emitting units is located (it should be understood that this is done to clearly illustrate the structure in this embodiment). Figure 15 (Transparency filling has been performed). In this embodiment, the orthogonal projection of the second transparent conductive part 60 onto the plane where the substrate 01 is located covers the orthogonal projection of the first region J1 onto the plane where the substrate 01 is located.

[0077] This embodiment explains that the shape of the orthographic projection of the second transparent conductive portion 60 disposed on the second transparent conductive layer 06 onto the plane of the substrate 01 can match the shape of the orthographic projection of the first region J1 overlapping the first signal line 30 and the light-emitting control signal line EM onto the plane of the substrate 01. For example, if the orthographic projection of the first region J1 onto the plane of the substrate 01 is blocky, then the shape of the orthographic projection of the second transparent conductive portion 60 onto the plane of the substrate 01 can also be blocky, and the orthographic projection of the second transparent conductive portion 60 onto the plane of the substrate 01 covers the orthographic projection of the first region J1 onto the plane of the substrate 01, that is, the area of ​​the orthographic projection of the second transparent conductive portion 60 onto the plane of the substrate 01 can be greater than ( Figure 13 The above) or equal to ( Figure 15 (As shown) The area of ​​the first region J1 projected onto the plane of substrate 01, as shown. Figure 15 The edge of the orthographic projection of the second transparent conductive part 60 on the plane of the substrate 01 coincides with the edge of the orthographic projection of the first region J1 on the plane of the substrate 01. This ensures that the orthographic projection of the second transparent conductive part 60 on the plane of the substrate 01 covers the orthographic projection of the first region J1 on the plane of the substrate 01. This allows the second transparent conductive part 60 to effectively block the oxidation channel within the first region J1, thereby preventing corrosion of the surface of the first signal line 30 with a high potential signal facing the substrate 01 at the intersection with the low potential light-emitting control signal line EM. This effectively ensures product yield.

[0078] Further optionally, the projected area of ​​the second transparent conductive portion 60 in the plane where the substrate 01 is located in this embodiment can also be larger than the projected area of ​​the first region J1 in the plane where the substrate 01 is located, such as... Figure 13The orthographic projection of the second transparent conductive part 60 onto the plane of the substrate 01 also has a portion that extends beyond the edge of the orthographic projection of the first region J1 onto the plane of the substrate 01. This allows the orthographic projection of the second transparent conductive part 60 onto the plane of the substrate 01 to cover the orthographic projection of the first region J1 onto the plane of the substrate 01, while also increasing the protective area of ​​the first transparent conductive part 60. This further enhances the function of the second transparent conductive part 60 in blocking the oxidation channel below the first signal line 30, thereby further ensuring product yield.

[0079] It is understood that the material used to make the second transparent conductive layer 06 in this embodiment can be the same as that used to make the first transparent conductive layer 03, such as indium tin oxide semiconductor material. It should be noted that the materials used to make the second transparent conductive layer 06 and the first transparent conductive layer 03 include, but are not limited to, these materials, and can also be other reducing conductive materials. This embodiment will not elaborate on these materials.

[0080] It is understood that in this embodiment Figure 12 and Figure 13 The block diagram shows the layout structure of the pixel circuit 10 within the range of each light-emitting unit 00. In specific implementation, the layout structure of the pixel circuit 10 on the substrate 01 can be designed by the actual structure of the transistors and capacitors. This embodiment will not be described in detail here.

[0081] In some alternative embodiments, please refer to the references. Figure 12 , Figure 15 and Figure 16 , Figure 16 yes Figure 15 A cross-sectional structural diagram along the F-F' direction is shown in this embodiment. The second transparent conductive part 60 located in the second transparent conductive layer 06 is in direct contact with the first signal line 30 in the first region J1.

[0082] This embodiment explains that at the first region J1 where the first signal line 30 overlaps with the normally low signal light-emitting control signal line EM, a second transparent conductive layer 60 is disposed below the first metal layer 02 where the first signal line 30 is located, separating the light-emitting control signal line EM in the first region J1 from the first signal line 30 to form an isolated oxide interface. In this case, the second transparent conductive part 60 can be directly in contact with the first signal line 30 in the first region J1. That is, after the second transparent conductive layer 06 is fabricated, an original second transparent conductive part with the same pattern as the light-emitting control signal line EM is formed, without the need to fabricate an insulating layer, and then the fabrication can proceed directly. The first metal layer 02 is formed, and a second transparent conductive part 60 with the same width as the first signal line 30 is formed through the same mask process. The final formed second transparent conductive part 60 has the same area as the first region J1. This helps to avoid the overlapping area between the low-potential light-emitting control signal line EM and the high-potential first signal line 30, i.e., the oxidation and corrosion problem on the lower surface of the first signal line 30 in the first region J1. At the same time, it can also save a mask process, which is beneficial to improve process efficiency. Furthermore, since an insulating layer is reduced, the panel thickness can be further reduced, realizing the thin design effect of the light-emitting panel 000. Furthermore, the second transparent conductive part 60 is in direct contact with the first signal line 30, which means that the constant high DC signal of the first signal line 30 is also transmitted on the second transparent conductive part 60, that is, it carries a positive charge. Therefore, even if it gains electrons when it overlaps with the light emission control signal line EM with a constant low signal, it will be adsorbed by the second transparent conductive part 60. Since the second transparent conductive part 60 is a reducing conductive material, even if it adsorbs electrons, it will not undergo an oxidation reaction, thereby forming an interface that isolates oxidation and plays a role in protecting the first signal line 30 in the first region J1.

[0083] In some alternative embodiments, please refer to the references. Figure 12 , Figure 17 and Figure 18 , Figure 17 yes Figure 12 Another magnified view of the area where one of the light-emitting units is located. Figure 18 yes Figure 17 A schematic diagram of a cross-sectional structure along the G-G' direction (it can be understood that this is for the purpose of clearly illustrating the structure in this embodiment). Figure 17 (Transparency filling has been performed). In this embodiment, a second insulating layer 07 is included between the second transparent conductive layer 06 and the first metal layer 02. The second transparent conductive part 60 is electrically connected to the first signal line 30 of the first region J1 through the second via K2. Optionally, the orthographic projection of the second transparent conductive part 60 onto the plane of the substrate 01 is located within the orthographic projection range of the first region J1 onto the plane of the substrate 01.

[0084] This embodiment explains that a second transparent conductive part 60, used to protect the lower surface of the first signal line 30 at the first region J1 where the first signal line 30 overlaps with the light-emitting control signal line EM, can be disposed between the second metal layer 05 and the first metal layer 01. A second insulating layer 07 can also be disposed between the second transparent conductive layer 06 and the first metal layer 02. The second transparent conductive part 60 is electrically connected to the first signal line 30 in the first region J1 through a second via K2 passing through the second insulating layer 07. That is, the second transparent conductive part 60 also transmits a constant high DC signal, i.e., it carries a positive charge. Therefore, when the first region J1 overlaps with the light-emitting control signal line EM with a constant low signal, even if electrons are gained, they will be adsorbed by the positively charged second transparent conductive part 60. Since the second transparent conductive part 60 is a reducing conductive material, even if electrons are adsorbed, no oxidation reaction will occur, thus forming an interface that isolates oxidation and protects the first signal line 30 in the first region J1. In addition, the second transparent conductive part 60 and the first signal line 30 are connected in parallel through the second via K2, which helps to further reduce the resistance of the first signal line 30, improve the transmission capability of the first signal line 30 to constant high DC signals, and ensure the working performance of the pixel circuit 10.

[0085] Optionally, since the second transparent conductive part 60 is electrically connected to the first signal line 30, the orthographic projection of the second transparent conductive part 60 onto the plane of the substrate 01 can be positioned within the orthographic projection range of the first region J1 onto the plane of the substrate 01. That is, the area of ​​the orthographic projection of the second transparent conductive part 60 onto the plane of the substrate 01 can be smaller than the area of ​​the orthographic projection of the first region J1 onto the plane of the substrate 01. Since the second transparent conductive part 60 transmits a high DC signal, i.e., carries a positive charge, even if electrons are gained at the first region J1 when it overlaps with the low-voltage light-emitting control signal line EM, they will be adsorbed by the second transparent conductive part 60. This can also ensure the transmission performance of the first signal line 30. Even if the area of ​​the second transparent conductive part 60 is small and does not cover the first region J1, it can still effectively prevent electrochemical corrosion of the lower surface of the first signal line 30 in the first region J1. This is beneficial for ensuring product yield, and it is also possible to simply set an overlapping area between the second transparent conductive part 60 and the first region J1, which helps to reduce the manufacturing difficulty of the second transparent conductive part 60.

[0086] In some alternative embodiments, please refer to the references. Figure 19 and Figure 20 , Figure 19 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention. Figure 20 yes Figure 19 A schematic diagram of a cross-sectional structure along the H-H' direction (it can be understood that this is for the purpose of clearly illustrating the structure in this embodiment). Figure 19(Transparency filling has been performed). In this embodiment, the light-emitting panel 000 further includes a reflective layer 08, which is located on the side of the first transparent conductive layer 03 away from the substrate 01. The reflective layer 08 includes multiple hollow areas 08K, and the light-emitting element 20 is located in the hollow area 08K. Optionally, the reflective layer 08 is made of white oil material.

[0087] This embodiment explains that the light-emitting panel 000 can be used as a backlight for a liquid crystal display device. In this case, the light-emitting panel 000, as a backlight, needs a high light utilization rate to improve the uniformity of backlight output. Therefore, in the film structure of the light-emitting panel 000 in this embodiment, a reflective layer 08 is provided on the side of the first transparent conductive layer 03 away from the substrate 01. The reflective layer 08 has multiple hollow areas 08K. The light-emitting element 20 is located in the hollow area 08K. That is, the area of ​​the reflective layer 08 other than the light-emitting element 20 is a whole surface structure. Thus, the light utilization rate of the light emitted by the light-emitting element 20 can be improved through the reflection effect of the reflective layer 08 to meet the light output uniformity of the light-emitting panel 000.

[0088] Optionally, the reflective layer 08 in this embodiment can be made of white oil material, such as solder resist white oil. White oil material contains highly reflective materials, and its light reflectivity can reach more than 95%. Compared with the 70%-80% reflectivity of metal materials, using white oil material for reflective layer 08 can further improve the reflectivity of light-emitting panel 000. In addition, the white oil material reflective layer 08 of the entire structure (except for the hollow area 08K at the position of light-emitting element 20) can also improve the panel's scratch resistance and foreign object protection capabilities.

[0089] In some alternative embodiments, please refer to the references. Figure 21 and Figure 22 , Figure 21 This is a schematic diagram of another planar structure of the light-emitting panel provided in an embodiment of the present invention. Figure 22 yes Figure 21 A magnified view of a portion of the area where multiple light-emitting units are located (it should be understood that this is done to clearly illustrate the structure in this embodiment). Figure 21 and Figure 22 (Transparency filling was performed). In this embodiment, multiple first signal lines 30 are interconnected, and the orthographic projection of the multiple first signal lines 30 onto the plane where the substrate is located includes a mesh structure.

[0090] The plurality of first signal lines 30 include a first sub-signal line 301 extending along a first direction Y and a second sub-signal line 302 extending along a second direction X; wherein the first direction Y and the second direction X intersect.

[0091] The first transparent conductive portion 40 includes a first sub-portion 401 and a second sub-portion 402. The orthographic projection of the first sub-portion 401 onto the plane where the substrate 01 is located at least partially overlaps with the orthographic projection of the first sub-signal line 301 onto the plane where the substrate 01 is located. The orthographic projection of the second sub-portion 402 onto the plane where the substrate 01 is located at least partially overlaps with the orthographic projection of the second sub-signal line 302 onto the plane where the substrate 01 is located.

[0092] The first sub-part 401 and the second sub-part 402 are mutually insulated.

[0093] This embodiment explains that the first signal line 30 can be a positive power supply signal line PVDD used to provide a high-potential signal to the pixel circuit 10. Multiple first signal lines 30 connected to each pixel circuit 10 in the light-emitting panel 000 can be interconnected. This reduces the number of signal traces that input positive power signals to the positive power supply signal line PVDD within the frame area of ​​the light-emitting panel 000. Furthermore, by interconnecting the positive power supply signal lines PVDD connected to different light-emitting units 00, the orthographic projection of multiple first signal lines 30 onto the plane of the substrate forms a mesh structure. That is, the orthographic projection of multiple positive power supply signal lines PVDD onto the plane of the substrate 01 includes not only the first sub-signal line 301 extending longitudinally along the first direction Y, but also the second sub-signal line 302 extending laterally along the second direction X. This further increases the area occupied by the interconnected positive power supply signal lines PVDD in the light-emitting panel 000, which helps to further reduce the resistance of the positive power supply signal lines PVDD. Similarly, optionally, the negative power supply signal lines PVEE connected to each pixel circuit 10 in the light-emitting panel 000 can be interconnected. This helps reduce the number of signal traces that input negative power signals to the negative power supply signal lines PVEE within the frame area of ​​the light-emitting panel 000. Furthermore, by interconnecting the negative power supply signal lines PVEE connected to different light-emitting units 00, the orthographic projection of multiple negative power supply signal lines PVEE onto the plane of the substrate 01 becomes a mesh structure. That is, the orthographic projection of multiple negative power supply signal lines PVEE onto the plane of the substrate 01 includes not only the longitudinal segment PVEE-y extending along the first direction Y, but also the transverse segment PVEE-x extending along the second direction X. This further increases the area occupied by the interconnected negative power supply signal lines PVEE in the light-emitting panel 000, which helps to further reduce the resistance of the negative power supply signal lines PVEE.

[0094] In this embodiment, when the positive power signal line PVDD of the first signal line 30 is a mesh structure, the first transparent conductive portion 40 disposed directly above the first signal line 30 can be a non-mesh structure. Specifically, the first transparent conductive portion 40 includes a first sub-part 401 and a second sub-part 402, wherein the orthographic projection of the first sub-part 401 on the plane of the substrate 01 at least partially overlaps with the orthographic projection of the first sub-signal line 301 on the plane of the substrate 01, and the orthographic projection of the second sub-part 402 on the plane of the substrate 01 at least partially overlaps with the orthographic projection of the second sub-signal line 302 on the plane of the substrate 01, that is, the first sub-part 401 is located at the first... The first sub-signal line 301 of the first signal line 30 is directly above the second sub-signal line 302 of the first signal line 30. Although the first sub-signal line 301 and the second sub-signal line 302 are connected to each other to form a mesh structure, the first sub-part 401 and the second sub-part 402 are mutually insulated. That is, the first sub-part 401 and the second sub-part 402 are disconnected and do not form a mesh structure that is consistent with the first signal line 30. This can avoid the risk of excessive load caused by excessive capacitance of the first transparent conductive part 40 that forms a full-surface connection, thereby helping to improve the light emission quality of the light-emitting panel 000.

[0095] Optionally, in this embodiment, the positive power signal line PVDD and the negative power signal line PVEE can both be a mesh structure connected across the entire surface. This can be understood as being formed by multiple block structures connected to each other. That is, the first sub-signal line 301 and the second sub-signal line 302 are both block structures with a relatively wide width (compared to other long signal lines in the panel), rather than conventional linear metal structures. This allows the area of ​​the positive power signal line PVDD and the negative power signal line PVEE in the light-emitting panel 000, excluding the pixel circuit 10 and the light-emitting element 20, to be as large as possible without causing a short circuit. Since the positive power signal line PVDD and the negative power signal line PVEE each provide corresponding constant voltage signals, setting their shape as a block-connected structure can reduce resistance and help reduce panel power consumption.

[0096] It is understood that in this embodiment, the positive power signal line PVDD can be constructed using a structure consisting of multiple interconnected metal blocks, and the negative power signal line PVEE can also be constructed using a structure consisting of multiple interconnected metal blocks, as long as the orthogonal projection onto the substrate 01 forms a grid. Optionally, in this embodiment, a portion of the larger positive power signal line PVDD and negative power signal line PVEE can have multiple cutouts (not shown in the attached diagram). This can reduce the amount of charge accumulated locally on the large area signal lines, thereby reducing the coupling capacitance and preventing the capacitance formed by the overlapping of large conductive structures from having a coupling effect on the driving of the pixel circuit 10, which is beneficial to ensuring the light emission quality.

[0097] In some alternative embodiments, please continue to refer to the references. Figure 4 , Figure 21 and Figure 22 In this embodiment, the pixel circuit 10 includes a plurality of thin-film transistors (e.g., Figure 4 Multiple thin-film transistors in it, Figure 21 and Figure 22 (Not shown in the image) The orthographic projection of the thin-film transistor onto the plane of substrate 01 does not overlap with the orthographic projection of the first transparent conductive portion 40 onto the plane of substrate 01.

[0098] This embodiment explains that the position of the first transparent conductive portion 40 disposed in the first transparent conductive layer 03 avoids the multiple thin-film transistors (such as those in the pixel circuit 10) included in the pixel circuit 10. Figure 4 The 7 thin-film transistors in the pixel circuit 10 with the 7T1C structure shown in this embodiment can be understood as... Figure 21 and Figure 22 This is merely a block diagram illustrating the structure of the pixel circuit 10. In actual implementation, the multiple thin-film transistors in the pixel circuit 10 can be arranged within the area formed by this block diagram. In this embodiment, the multiple thin-film transistors in the pixel circuit 10 (such as...) Figure 4 The layout design of the seven transistors in the film layer on one side of the substrate 01 is not described in detail. For specific understanding, please refer to the layout design structure of the pixel circuit in the Mini LED light-emitting panel or Micro LED light-emitting panel in related technologies. In this embodiment, the orthographic projection of the large-area structure of the first signal line 30 (such as the positive power signal line PVDD) on the plane of the substrate 01 does not overlap with the orthographic projection of the corresponding thin film transistor in the pixel circuit 10 on the plane of the substrate 01. This can avoid the formation of coupling capacitance between the large-area positive power signal line PVDD and the film layer structure of the thin film transistor (such as the gate of the thin film transistor or the semiconductor active part), which would affect the control of the conduction and cutoff states of the thin film transistor, and thus help ensure the normal driving performance of the pixel circuit 10. In this embodiment, a first transparent conductive portion 40 is provided on the side of the first signal line 30 away from the substrate 01, which at least partially overlaps with the first signal line 30. Therefore, the orthogonal projection of the first transparent conductive portion 40 in the first transparent conductive layer 03 in this embodiment onto the plane where the substrate 01 is located also avoids the orthogonal projection of the thin film transistor in the pixel circuit 10 onto the plane where the substrate 01 is located. This can prevent the large area of ​​the first transparent conductive portion 40 from having a coupling effect on the thin film transistor, so as to achieve the normal driving performance of the pixel circuit 10.

[0099] In some alternative embodiments, please refer to Figure 23 , Figure 23This is a schematic diagram of the planar structure of a display device provided in an embodiment of the present invention. The display device 111 provided in this embodiment includes the light-emitting panel 000 provided in the above embodiments of the present invention. Optionally, the display device 111 can be the light-emitting panel 000 in the above embodiments of the present invention, and can be used directly for display. Alternatively, the display device 111 can also be a liquid crystal display device. In this case, the light-emitting panel 000 in this embodiment can be used as a direct-lit backlight. This embodiment does not specifically limit the type of display device 111. In specific implementation, it can be set according to actual needs. Figure 23 This embodiment uses a mobile phone as an example to illustrate the display device 111. It is understood that the display device 111 provided in this embodiment can be any other display device 111 with display functions, such as a computer, television, or vehicle-mounted display device; this invention does not impose specific limitations on this. The display device 111 provided in this embodiment has the beneficial effects of the light-emitting panel 000 provided in this embodiment. For details, please refer to the specific descriptions of the light-emitting panel 000 in the above embodiments; these will not be repeated here.

[0100] As can be seen from the above embodiments, the light-emitting panel and display device provided by the present invention achieve at least the following beneficial effects:

[0101] The light-emitting panel provided by this invention includes multiple light-emitting units. Each light-emitting unit includes an electrically connected pixel circuit and a light-emitting element. The pixel circuit can be a driving circuit that provides driving current to the light-emitting element, enabling the light-emitting element to emit light under the drive of the pixel circuit. The light-emitting panel includes at least a first metal layer for fabricating multiple first signal lines. The first signal lines are electrically connected to the pixel circuit and are used to provide high-potential signals to the pixel circuit; that is, the first signal lines can be understood as traces for transmitting high-potential signals. In this invention, a first transparent conductive layer is further disposed on the side of the first metal layer away from the substrate. Through patterned design, the first transparent conductive layer forms multiple first transparent conductive portions, and the orthographic projection of the first transparent conductive portion onto the plane of the substrate at least partially overlaps with the orthographic projection of the first signal line onto the plane of the substrate. That is, the first transparent conductive portion is located directly above the area where the first signal line with the high-potential signal is located, and there is at least a partial overlap with the first signal line in a direction perpendicular to the plane of the substrate. Since the first signal line, which carries a high-potential signal, transmits positive charges (high potential), it is more prone to gaining electrons and undergoing oxidation reactions under long-term high-temperature and high-humidity operating environments, easily causing corrosion and affecting product yield. However, the material of the first transparent conductive layer is a reducing conductive material, which, even if it gains electrons under long-term high-temperature and high-humidity operating environments, will not undergo oxidation reactions. Therefore, the first transparent conductive portion overlapping with the first signal line can protect the underlying metal material of the first signal line, preventing oxidative electrochemical corrosion and improving product yield. Furthermore, since this invention uses a first transparent conductive layer comprising multiple first transparent conductive portions to protect the metal conductive structure in the light-emitting panel, it eliminates the need for a multi-layered stacked structure of organic and inorganic layers in the film layer of the light-emitting panel. This simplifies the manufacturing process, reduces panel thickness, and enables a thinner panel design.

[0102] While specific embodiments of the invention have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A light-emitting panel, characterized in that, include: Multiple light-emitting units, each light-emitting unit comprising electrically connected pixel circuits and light-emitting elements; The light-emitting panel includes a substrate and a first metal layer located on one side of the substrate. The first metal layer includes a plurality of first signal lines, which are electrically connected to the pixel circuit and provide a high potential signal to the pixel circuit. The light-emitting panel also includes a first transparent conductive layer located on the side of the first metal layer away from the substrate. The first transparent conductive layer includes a plurality of first transparent conductive portions, and the orthographic projection of the first transparent conductive portion onto the plane where the substrate is located at least partially overlaps with the orthographic projection of the first signal line onto the plane where the substrate is located. The light-emitting panel further includes a second metal layer, which is located on the side of the first metal layer away from the first transparent conductive layer; the second metal layer includes a plurality of light-emitting control signal lines, which are electrically connected to the pixel circuit. The extension direction of the light-emitting control signal line intersects with the extension direction of the first signal line; In a direction perpendicular to the plane of the substrate, the area where the light-emitting control signal line and the first signal line overlap is the first region; The light-emitting panel further includes a second transparent conductive layer, which is located between the first metal layer and the second metal layer; The second transparent conductive layer includes a plurality of second transparent conductive portions, wherein the orthographic projection of the second transparent conductive portion onto the plane of the substrate at least partially overlaps with the orthographic projection of the first region onto the plane of the substrate.

2. The light-emitting panel according to claim 1, characterized in that, The orthographic projection of the first transparent conductive portion onto the plane of the substrate covers the orthographic projection of the first signal line onto the plane of the substrate.

3. The light-emitting panel according to claim 2, characterized in that, The width of the orthographic projection of the first transparent conductive portion onto the plane of the substrate is greater than the width of the orthographic projection of the first signal line onto the plane of the substrate.

4. The light-emitting panel according to claim 1, characterized in that, The plurality of first signal lines include a positive power signal line, and the first transparent conductive portion is electrically connected to the positive power signal line through a first via.

5. The light-emitting panel according to claim 4, characterized in that, The orthographic projection of the first transparent conductive portion onto the plane of the substrate is located within the range of the orthographic projection of the positive power signal line onto the plane of the substrate.

6. The light-emitting panel according to claim 1, characterized in that, The light-emitting panel further includes a first insulating layer, which is located between the first metal layer and the first transparent conductive layer, and the material of the first insulating layer is an organic material.

7. The light-emitting panel according to claim 1, characterized in that, The orthographic projection of the second transparent conductive portion onto the plane of the substrate covers the orthographic projection of the first region onto the plane of the substrate.

8. The light-emitting panel according to claim 7, characterized in that, The projected area of ​​the second transparent conductive portion on the plane of the substrate is greater than the projected area of ​​the first region on the plane of the substrate.

9. The light-emitting panel according to claim 1, characterized in that, The second transparent conductive part is in direct contact with the first signal line in the first region.

10. The light-emitting panel according to claim 1, characterized in that, A second insulating layer is included between the second transparent conductive layer and the first metal layer, and the second transparent conductive portion is electrically connected to the first signal line in the first region through a second via.

11. The light-emitting panel according to any one of claims 9 or 10, characterized in that, The orthographic projection of the second transparent conductive portion onto the plane of the substrate lies within the orthographic projection range of the first region onto the plane of the substrate.

12. The light-emitting panel according to claim 1, characterized in that, The light-emitting panel further includes a reflective layer, which is located on the side of the first transparent conductive layer away from the substrate; The reflective layer includes multiple hollow areas, and the light-emitting element is located in the hollow area.

13. The light-emitting panel according to claim 12, characterized in that, The reflective layer is made of white oil.

14. The light-emitting panel according to claim 1, characterized in that, The pixel circuit includes a plurality of thin-film transistors, the orthographic projection of the thin-film transistors onto the plane of the substrate not overlapping the orthographic projection of the first transparent conductive portion onto the plane of the substrate.

15. A display device, characterized in that, Includes the light-emitting panel as described in any one of claims 1-14.

Images