Protection circuit and battery pack comprising the same

Abstract

The present disclosure relates to a protection circuit and a battery pack including the same. The protection circuit of the battery pack can include a discharge control switch located on a discharge path of a battery module and configured to block or connect the discharge path, a controller configured to communicate with an external device through a plurality of battery pack communication terminals and output a control signal that controls conduction / cutoff of the discharge control switch, a blocking circuit electrically connected between the plurality of battery pack communication terminals and the controller and configured to control connection between the plurality of battery pack communication terminals and the controller, and a blocking control circuit configured to control the blocking circuit to block the connection between the plurality of battery pack communication terminals and the controller according to the control signal.

Description

[0001] This application claims priority and benefit to Korean Patent Application No. 10-2021-0136833, filed on October 14, 2021, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to a protection circuit and a battery pack including the protection circuit. Background Technology

[0003] In small battery packs, field-effect transistors (FETs) are primarily used as discharge control switches for protective operation during discharge. The FETs used for discharge control are located on the negative (or low) side or the positive (or high) side of the battery, and their position can be selected according to customer specifications or the specifications of the battery pack.

[0004] When the FET used for the discharge control switch is located on the positive side of the battery, the battery ground and the load ground are connected to each other even when the FET is in the off state when the battery and load are connected. Therefore, communication between the battery pack's communication circuit and the load's communication circuit is possible without insulating components. On the other hand, to drive the FET for the discharge control switch, additional circuitry is used separately, or an analog front-end (AFE) chip with a built-in charge pump circuit is used. Furthermore, when the FET for the discharge control switch is located on the positive side of the battery, high-speed switching of the FET can be very difficult.

[0005] High-speed switching of the FET is possible when the FET used for discharge control switching is located on the negative side of the battery. Therefore, battery packs used in vacuum cleaners, power tools, and other applications employing high-power / low-resistance battery cells and requiring rapid short-circuit current interruption are designed with the FET for discharge control switching located on the negative side of the battery. On the other hand, when the FET for discharge control switching is located on the negative side of the battery, the battery ground and the load ground are separated when the FET for discharge control switching is turned off, causing overvoltage to be applied to the communication circuitry.

[0006] The information disclosed in this background section is only intended to enhance the understanding of the background of the invention, and therefore may contain information that does not form prior art known to a person skilled in the art in that country. Summary of the Invention

[0007] Embodiments have been made to provide a protection circuit and a battery pack including the protection circuit, which can solve the overvoltage problem that occurs in a battery pack where the FET for the discharge control switch is located on the negative side of the battery when the FET for the discharge control switch is turned off.

[0008] An embodiment provides a protection circuit for a battery pack, comprising: a discharge control switch located on the discharge path of the battery module and configured to block or connect the discharge path; a controller configured to communicate with an external device via multiple battery pack communication terminals and output a control signal to control the on / off state of the discharge control switch; a blocking circuit electrically connected between the multiple battery pack communication terminals and the controller and configured to control the connection between the multiple battery pack communication terminals and the controller; and a blocking control circuit configured to control the blocking circuit to block the connection between the multiple battery pack communication terminals and the controller according to the control signal.

[0009] The blocking control circuit can be configured to block the connection between multiple battery pack communication terminals and the controller when the control signal has a voltage level that turns off the discharge control switch.

[0010] The blocking circuit may include: a first FET electrically connected between a first battery pack communication terminal and a controller among a plurality of battery pack communication terminals; and a second FET electrically connected between a second battery pack communication terminal and the controller among a plurality of battery pack communication terminals. When the control signal has a voltage level that turns off the discharge control switch, the first and second FETs can be controlled to turn off by the blocking control circuit.

[0011] The first FET may include a source terminal connected to the controller, a drain terminal connected to the communication terminal of the first battery pack, and a gate terminal connected to the blocking control circuit. The second FET may include a source terminal connected to the controller, a drain terminal connected to the communication terminal of the second battery pack, and a gate terminal connected to the blocking control circuit.

[0012] The first FET and the second FET can be N-channel MOSFETs.

[0013] The blocking circuit may further include: a first resistor connected between the gate terminal and the source terminal of the first FET; and a second resistor connected between the gate terminal and the source terminal of the second FET.

[0014] The blocking control circuit may include: a third FET electrically connected between a voltage source that outputs a first voltage and the gate terminal of the first FET and the gate terminal of the second FET; and a fourth FET electrically connected to the gate terminal of the third FET, and controlling the connection between the second voltage and the gate terminal of the third FET according to a control signal.

[0015] The third FET may include a source terminal connected to a voltage source, a drain terminal connected to the gate terminal of the first FET and the gate terminal of the second FET, and a gate terminal connected to the fourth FET. The fourth FET may include a source terminal connected to a second voltage, a drain terminal connected to the gate terminal of the third FET, and a gate terminal connected to the output terminal of the controller's output control signal.

[0016] The third FET can be a P-channel MOSFET, and the fourth FET can be an N-channel MOSFET.

[0017] The blocking control circuit may further include: a third resistor connected between the gate terminal and the source terminal of the third FET; and a fourth resistor connected between the gate terminal of the third FET and the drain terminal of the fourth FET.

[0018] The discharge control switch may be a FET comprising a source terminal connected to the negative terminal of the battery module, a drain terminal connected to the terminal of the first battery pack, and a gate terminal connected to the output terminal of the controller's output control signal.

[0019] The discharge control switch can be an N-channel MOSFET.

[0020] Another embodiment provides a battery pack including: a first battery pack terminal and a second battery pack terminal; a battery module including at least one battery cell and connected to an external device via the first battery pack terminal and the second battery pack terminal; and a protection circuit.

[0021] According to the embodiments, it is possible to solve the overvoltage problem that occurs in a battery pack where the FET used for the discharge control switch is located on the negative side of the battery when the FET used for the discharge control switch is turned off. Attached Figure Description

[0022] Figure 1 A battery pack according to an embodiment is shown schematically.

[0023] Figure 2 An example circuit diagram of a battery pack according to an embodiment is shown. Detailed Implementation

[0024] Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. The effects and characteristics of the embodiments and their implementation methods will now be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals indicate the same constituent elements, and their description will not be repeated. As those skilled in the art will recognize, the described embodiments can be modified in various different ways without departing from the spirit or scope of the invention. The embodiments are provided as examples so that this disclosure can be thorough and complete, and will fully provide those skilled in the art with aspects and features of the invention.

[0025] Therefore, to fully understand aspects and features of the invention, processes, factors, and skills that may not be necessary for those skilled in the art are not described. In the accompanying drawings, the relative dimensions of elements, layers, and regions may be exaggerated for clarity.

[0026] In this specification, the term "and / or" includes all or random combinations of a plurality of related and arranged items. When describing embodiments of the invention, the use of "may" or "can" indicates at least one embodiment of the invention. In the description of embodiments of the invention, singular terms may also include plural forms unless otherwise stated.

[0027] In this specification, terms including ordinal numbers such as first, second, etc., are used only to describe various components and should not be construed as limiting these components. These terms are only used to distinguish one component from other components. For example, a first component element may be referred to as a second component element without departing from the scope of the invention, and similarly, a second component element may be referred to as a first component element.

[0028] It will be understood that when a component or layer is referred to as being "on," "connected to," or "bonded to" another component or layer, the component or layer may be directly on, directly connected to, or directly bonded to the other component or layer, or there may be one or more intermediary components or layers. Furthermore, it will be understood that when a component or layer is referred to as being "between" two component or layers, the component or layer may be the only component or layer between the two component or layers, or there may be one or more intermediary components or layers.

[0029] Electrically connecting two components includes directly connecting the two components, and connecting the two components to another component between them. This other component may include a switch, resistor, and capacitor. When describing embodiments, the term "connected" refers to an electrical connection unless a direct connection is provided.

[0030] In the following, the protection circuit and the battery pack including the protection circuit according to the embodiment will be described in detail with reference to the accompanying drawings.

[0031] Figure 1 A battery pack according to an embodiment is shown schematically.

[0032] Reference Figure 1 According to the embodiment, the battery pack 1 may include a battery module 10, which may include one or more battery cells 11 connected in series or in parallel. The battery module 10 may be electrically connected to an external device (e.g., a load 5) through battery pack terminals P+ and P- to receive power from or supply power to an external device.

[0033] The battery pack 1 may also include a protection circuit for protecting the battery pack 1 from overvoltage, overcurrent, etc. The protection circuit may include a discharge control switch D-FET, a battery controller 20, a blocking circuit 31, a blocking control circuit 32, etc.

[0034] The discharge control switch D-FET can be electrically connected between the battery module 10 and one of the battery pack terminals. (See reference...) Figure 1 As an example, the discharge control switch D-FET can be connected between the negative terminal (ground of battery module 10) and the battery module terminal P-. The discharge control switch D-FET can perform the function of connecting or blocking the discharge path of battery module 10 according to the control of battery controller 20.

[0035] The discharge control switch D-FET can be configured as a field-effect transistor (FET). For example, the discharge control switch D-FET can be configured as an N-channel metal-oxide-semiconductor FET (MOSFET) including a source terminal connected to the negative side of the battery module 10, a drain terminal connected to the battery terminal P-, and a gate terminal connected to the battery controller 20.

[0036] When the discharge control switch D-FET is in the ON state, the discharge control switch D-FET becomes conductive to connect the discharge path between the negative terminal of the battery module 10 and the battery pack terminal P-. When the discharge control switch D-FET is in the OFF state, the discharge control switch D-FET becomes non-conductive to block the discharge path between the negative terminal of the battery module 10 and the battery pack terminal P-.

[0037] The battery controller 20 can obtain the individual cell voltage value of each battery cell constituting the battery module 10 through a voltage detection circuit (not shown). The battery controller 20 can obtain the current value flowing between the battery module 10 and the battery pack terminals P+ and P- through a current detection circuit (not shown) connected to the shunt resistor SR. The battery controller 20 can detect abnormal states of the battery pack 1 (e.g., overcurrent, overvoltage, short circuit, etc.) based on the individual cell voltage and current values ​​of the battery module 10. When an abnormal state of the battery pack 1 is detected, the battery controller 20 can output a control signal to the discharge control switch D-FET to turn off the discharge control switch D-FET. That is, when an abnormal state of the battery pack 1 is detected, the battery controller 20 can turn off the discharge control switch D-FET to block the discharge path between the battery module 10 and an external device. Besides detecting an abnormal state of the battery pack 1, when discharging needs to be stopped due to the start of charging, the battery controller 20 can block the discharge path by turning off the discharge control switch D-FET.

[0038] The battery controller 20 can be connected to the controller of an external device (e.g., the controller 50 of load 5) via battery pack communication terminals T1 and T2 to communicate with the controller of the external device. For example, the battery controller 20 can communicate with the controller of the external device via internal integrated circuit (I2C) communication. In this case, communication line L1 for sending / receiving data and communication line L2 for sending / receiving clock signals for synchronizing the sending / receiving timing can be connected between the battery controller 20 and the battery pack communication terminals T1 and T2, respectively.

[0039] On the other hand, such as Figure 1 As shown, when the discharge control switch D-FET is connected to the negative side of the battery module 10, the connection between the positive terminal of the battery module 10 and the battery pack terminal P+ remains unchanged even if the discharge control switch D-FET is turned off. Therefore, even if the discharge control switch D-FET is turned off, a voltage that increases the voltage of the battery module 10 compared to the ground of the battery pack 1 is applied to the load 5 through the battery pack terminal P+, thereby generating an overvoltage corresponding to the voltage of the battery module 10 in the communication terminals SDA and SCL of the load 5. When this overvoltage is directly transmitted to the battery controller 20 through the communication lines L1 and L2, the battery controller 20 will be damaged.

[0040] In this embodiment, to solve the problem, a blocking circuit 31 can be set at the communication lines L1 and L2 between the battery controller 20 and the battery pack communication terminals T1 and T2 of the battery pack 1.

[0041] The blocking circuit 31 is electrically connected between the communication terminals SDA and SCL of the battery controller 20 and the battery communication terminals T1 and T2 of the battery pack 1. When the discharge control switch D-FET is turned off, the blocking circuit 31 can be operated to block the connection between the battery controller 20 and the battery communication terminals T1 and T2.

[0042] The blocking control circuit 32 is connected to the output terminal DFET of the battery controller 20 for controlling the discharge control switch D-FET, and the blocking control circuit 32 can receive control signals output from the battery controller 20 to the discharge control switch D-FET. When the control signal received from the battery controller 20 indicates the off state of the discharge control switch D-FET, the blocking control circuit 32 can control the blocking circuit 31, so that the connection between the battery controller 20 and the battery pack communication terminals T1 and T2 is blocked.

[0043] Figure 2 It shows Figure 1 Example of a circuit diagram for a battery pack.

[0044] Reference Figure 2 The blocking circuit 31 may include a first FET M1 electrically connected between the first communication terminal SDA and the first battery pack communication terminal T1 of the battery controller 20. The first FET M1 can be turned on / off according to the voltage applied to the gate terminal of the first FET M1 by the blocking control circuit 32 and the voltage level of the signal output from the first communication terminal SDA of the battery controller 20. When the first FET M1 is turned on, the first FET M1 can become conductive to connect the first communication terminal SDA and the first battery pack communication terminal T1, and when the first FET M1 is turned off, the first FET M1 can become non-conductive to block the connection between the first communication terminal SDA and the first battery pack communication terminal T1.

[0045] The blocking circuit 31 may include a second FET M2 electrically connected between the second communication terminal SCL and the second battery pack communication terminal T2 of the battery controller 20. The second FET M2 can be turned on / off according to the voltage applied to the gate terminal of the second FET M2 by the blocking control circuit 32 and the voltage level of the signal output from the second communication terminal SCL of the battery controller 20. When the second FET M2 is turned on, the second FET M2 can become conductive to connect the second communication terminal SCL and the second battery pack communication terminal T2, and when the second FET M2 is turned off, the second FET M2 can become non-conductive to block the connection between the second communication terminal SCL and the second battery pack communication terminal T2.

[0046] The blocking control circuit 32 may include a third FET M3 electrically connected between the voltage source and the gate terminal of the first FET M1 and the gate terminal of the second FET M2, and a fourth FET M4 electrically connected to the gate terminal of the third FET M3.

[0047] The third FET M3 can be turned on / off according to the voltage applied to the gate terminal of the third FET M3 through the fourth FET M4. When the third FET M3 is turned on, it can conduct electricity to transfer a first voltage applied from the voltage source to the gate terminals of the first FET M1 and the second FET M2. Here, the first voltage can have a voltage level that can control the first FET M1 and the second FET M2 to be turned on.

[0048] The gate terminal of the fourth FET M4 can be connected to the output terminal DFET of the battery controller 20 for controlling the discharge control switch D-FET. The fourth FET M4 can be controlled to be turned on / off according to the control signal output through the output terminal DFET of the battery controller 20. When the control signal output through the output terminal DFET of the battery controller 20 has a voltage level for turning on the discharge control switch D-FET, the fourth FET M4 can be switched on. Conversely, when the control signal output through the output terminal DFET of the battery controller 20 has a voltage level for turning off the discharge control switch D-FET, the fourth FET M4 can be switched off. When the fourth FET M4 is on, it can become conductive to transmit a second voltage to the gate terminal of the third FET M3 to turn on the third FET M3. Here, the second voltage can have a voltage level capable of controlling the third FET M3 to be on.

[0049] Reference Figure 2As an example, the first FET M1 and the second FET M2 can be configured as N-channel MOSFETs. Furthermore, the first FET M1 may include a source terminal connected to the first communication terminal SDA of the battery controller 20, a drain terminal connected to the first battery pack communication terminal T1, and a gate terminal connected to the blocking control circuit 32. The second FET M2 may include a source terminal connected to the second communication terminal SCL of the battery controller 20, a drain terminal connected to the second battery pack communication terminal T2, and a gate terminal connected to the blocking control circuit 32. Additionally, resistors R11 and R21 are connected between the gate terminals and source terminals of the first FET M1 and the second FET M2, respectively, and resistors R12 and R22 are connected between the gate terminals of the first FET M1 and the second FET M2 and the blocking control circuit 32, respectively. When the first FET M1 and the second FET M2 are N-channel MOSFETs, the aforementioned first voltage may be a voltage greater than or equal to the threshold voltage of the first FET M1 and the second FET M2. For example, the first voltage may be 3.3V supplied from the 3.3V output terminal of the battery controller 20.

[0050] Additionally, refer to Figure 2 As an example, the third FET M3 can be configured as a P-channel MOSFET, and the fourth FET M4 can be configured as an N-channel MOSFET. Furthermore, the third FET M3 may include a source terminal connected to a voltage source supplying a first voltage, a drain terminal connected to the gate terminal of the first FET M1 and the gate terminal of the second FET M2, and a gate terminal connected to the fourth FET M4. The fourth FET M4 may include a source terminal to which a second voltage is applied, a drain terminal connected to the gate terminal of the third FET M3, and a gate terminal connected to the gate terminals of the output terminal DFET and the discharge control switch D-FET of the battery controller 20. Additionally, resistors R31 and R32 may be connected between the gate terminal and the source terminal of the third FET M3, and between the gate terminal of the third FET M3 and the drain terminal of the fourth FET M4, respectively. When the third FET M3 is a P-channel MOSFET, the aforementioned second voltage may be a ground voltage (the ground voltage of battery pack 1).

[0051] Reference Figure 2When the battery controller 20 outputs a control signal to turn on the discharge control switch D-FET, the discharge control switch D-FET and the fourth FET M4 switch on. Therefore, a ground voltage is applied to the gate terminal of the third FET M3, causing the third FET M3 to turn on, and the turned-on third FET M3 transmits the 3.3V voltage output from the battery controller 20 to the gate terminals of the first FET M1 and the second FET M2. Therefore, the first FET M1 and the second FET M2 turn on / off according to the voltage level of the signals output through the communication terminals SDA and SCL of the battery controller 20, enabling normal communication between the battery controller 20 and the load 5. In normal communication mode, when a low-level signal is output through the communication terminals SDA and SCL of the battery controller 20, the first FET M1 and the second FET M2 turn on, and therefore, the output signal of the communication terminals SDA and SCL of the battery controller 20 can be transmitted to the communication terminals of the controller 50 of the load 5. On the other hand, when a high-level signal is output through the communication terminals SDA and SCL of the battery controller 20, the first FET M1 and the second FET M2 turn off. In this case, even when the first FET M1 and the second FET M2 are turned off, a high-level signal can still pass through the pull-up resistor (see reference). Figure 1 The R51 and R52 in the data are transmitted to the communication terminals SDA and SCL of the controller 50 of the load 5.

[0052] When the battery controller 20 outputs a control signal to turn off the discharge control switch D-FET, both the discharge control switch D-FET and the fourth FET M4 are switched off. Therefore, the connection between the gate terminal of the third FET M3 and the ground of the battery pack 1 is blocked, causing the third FET (M3) to turn off, and the 3.3V supply to the gate terminals of the first FET M1 and the second FET M2 is blocked. Thus, the first FET M1 and the second FET M2 remain in the off state, independent of the signals output from the communication terminals SDA and SCL of the battery controller 20, and the communication lines L1 and L2 between the battery controller 20 and the battery pack communication terminals T1 and T2 can be disconnected.

[0053] According to the above embodiments, even without a separate insulation circuit, when the discharge control switch D-FET is turned off when it is connected to the negative side of the battery module 10, the problem of overvoltage introduced from the load 5 through the communication line can be solved.

[0054] Electronic or electrical devices and / or other related devices or components according to embodiments of the invention can be implemented using appropriate hardware, firmware (e.g., application-specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, various configurations of the aforementioned devices can be located on an integrated circuit (IC) chip or a separate IC chip. Additionally, various configurations of the aforementioned devices can be implemented on a flexible printed circuit film, a tape-and-carrier package (TCP), a printed circuit board (PCB), or a substrate. The electrical connections or interconnections described in this specification can be implemented, for example, through wiring or conductive elements on a PCB, different types of circuit carriers. Conductive elements can include, for example, metallization (such as surface metallization) and / or pins, and can comprise conductive polymers or conductive ceramics. Furthermore, electrical energy can be transmitted via electromagnetic radiation or radio access using light.

[0055] Furthermore, the various configurations of the device can be executed by at least one processor to perform the aforementioned functions. These configurations can be executed in at least one computing device, and can be processes or threads for executing computer program instructions and interacting with other system components. The computer program instructions are stored in memory that can be implemented in a computing device using standard memory devices such as random access memory (RAM). The computer program instructions can also be stored in a non-transitory computer-readable medium such as a CD-ROM or flash drive.

[0056] Furthermore, those skilled in the art must understand that various functions of a computing device can be combined or integrated into a single computing device, or the functions of a particular computing device can be distributed to at least another computing device, without departing from the scope of the embodiments of the present invention.

[0057] <Explanation of reference numerals in the attached figures>

[0058] 1: Battery pack

[0059] 5: Load

[0060] 10: Battery Module

[0061] 11: Battery cell

[0062] 20: Battery Controller

[0063] 31: Blocking circuit

[0064] 32: Blocking control circuit

[0065] 50: Load controller

[0066] D-FET: Discharge Control Switch

[0067] P+, P-: Battery pack terminals

[0068] T1, T2: communication terminals

[0069] L1, L2: Communication lines

Claims

1. A protection circuit for a battery pack, the protection circuit for the battery pack comprising: A discharge control switch is located on the discharge path of the battery module and is configured to block or connect the discharge path; The controller is configured to communicate with an external device via multiple battery pack communication terminals and output control signals to control the on / off state of the discharge control switch; A blocking circuit is electrically connected between the plurality of battery pack communication terminals and the controller, and is configured to control the connection between the plurality of battery pack communication terminals and the controller; as well as A blocking control circuit is configured to control the blocking circuit to block the connection between the plurality of battery pack communication terminals and the controller according to the control signal. The blocking control circuit includes: The third FET is electrically connected between the voltage source that outputs the first voltage and the blocking circuit; and The fourth FET is electrically connected to the gate terminal of the third FET, and controls the connection between the second voltage and the gate terminal of the third FET according to the control signal.

2. The protection circuit according to claim 1, wherein, The blocking control circuit is configured to control the blocking circuit to block the connection between the plurality of battery pack communication terminals and the controller when the control signal has a voltage level that turns off the discharge control switch.

3. The protection circuit according to claim 1, wherein, The blocking circuit includes: A first FET, electrically connected between a first battery pack communication terminal among the plurality of battery pack communication terminals and the controller; and The second FET is electrically connected between the second battery pack communication terminal, one of the plurality of battery pack communication terminals, and the controller. When the control signal has a voltage level that turns off the discharge control switch, the first FET and the second FET are controlled to be turned off by the blocking control circuit.

4. The protection circuit according to claim 3, wherein, The first FET includes a source terminal connected to the controller, a drain terminal connected to the communication terminal of the first battery pack, and a gate terminal connected to the blocking control circuit. The second FET includes a source terminal connected to the controller, a drain terminal connected to the communication terminal of the second battery pack, and a gate terminal connected to the blocking control circuit.

5. The protection circuit according to claim 4, wherein, The first FET and the second FET are N-channel MOSFETs.

6. The protection circuit according to claim 4, wherein, The blocking circuit also includes: A first resistor is connected between the gate terminal and the source terminal of the first FET; and A second resistor is connected between the gate terminal and the source terminal of the second FET.

7. The protection circuit according to claim 3, wherein, The third FET is electrically connected between the voltage source and the gate terminals of the first FET and the second FET.

8. The protection circuit according to claim 7, wherein, The third FET includes a source terminal connected to the voltage source, a drain terminal connected to the gate terminal of the first FET and the gate terminal of the second FET, and a gate terminal connected to the fourth FET. The fourth FET includes a source terminal connected to the second voltage, a drain terminal connected to the gate terminal of the third FET, and a gate terminal connected to the output terminal of the controller that outputs the control signal.

9. The protection circuit according to claim 8, wherein, The third FET is a P-channel MOSFET, and The fourth FET is an N-channel MOSFET.

10. The protection circuit according to claim 8, wherein, The blocking control circuit also includes: A third resistor is connected between the gate terminal and the source terminal of the third FET; and A fourth resistor is connected between the gate terminal of the third FET and the drain terminal of the fourth FET.

11. The protection circuit according to claim 9, wherein, The discharge control switch is a FET comprising a source terminal connected to the negative terminal of the battery module, a drain terminal connected to the first battery pack terminal, and a gate terminal connected to the output terminal of the controller that outputs the control signal.

12. The protection circuit according to claim 11, wherein, The discharge control switch is an N-channel MOSFET.

13. A battery pack, the battery pack comprising: First battery pack terminal and second battery pack terminal; A battery module includes at least one battery cell and is connected to an external device via a first battery pack terminal and a second battery pack terminal; as well as The protection circuit according to any one of claims 1 to 12.

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