Method and apparatus for improving transient performance in a multiphase voltage regulator

Abstract

This application is entitled "Method and Apparatus for Improving Transient Performance in a Multiphase Voltage Regulator". An example apparatus includes a differential amplifier (202) to compare a first voltage (104) with a droop voltage (108). The first voltage (104) corresponds to the sum of inductor currents in the multiphase voltage regulator. The droop voltage (108) corresponds to the output voltage of the multiphase voltage regulator. The differential amplifier (202) outputs a first control voltage based on this comparison. A differentiator (206) calculates the derivative of the droop voltage (108) and adjusts the ramp voltage (106) using the derivative of the droop voltage (108) to generate a second control voltage. A comparator (220) compares a reference voltage (218) with a second voltage (214). The second voltage (214) is a combination of the first and second control voltages. When the second voltage (214) is greater than the reference voltage (218), the comparator (220) outputs a voltage pulse.

Description

[0001] This application is a divisional application of Chinese Patent Application 201780054284.4 (PCT / US2017 / 050361), filed on September 6, 2017, entitled “Method and apparatus for improving transient performance in a multiphase voltage regulator”. Technical Field

[0002] This application relates generally to voltage regulators, and more specifically to methods and apparatus for improving transient performance in multiphase voltage regulators. Background Technology

[0003] Voltage regulators are circuits used in various devices to maintain a constant voltage level. Some voltage regulators include capacitors and inductors driven by switches to maintain a desired constant voltage. Multiphase regulators can use multiple phases of capacitor and inductor pairs to maintain a desired voltage. In high-current applications, multiphase voltage regulators are more efficient than single-phase voltage regulators. Constant "on-time" control can be used to control the operation of a voltage regulator. In some examples, a ramp voltage is used in such constant "on-time" control to reduce jitter in the voltage regulator's output (e.g., deviation from the desired voltage regulator output). Summary of the Invention

[0004] The examples described herein use a variable ramp modulator to improve the transient response of a multiphase voltage regulator. One example modulator includes a differential amplifier for comparing a first voltage with a droop voltage and outputting a first control voltage based on the comparison. This first voltage corresponds to the sum of inductor currents in the multiphase voltage regulator, and the droop voltage corresponds to the output voltage of the multiphase voltage regulator. Such an example modulator also includes a differentiator for calculating the derivative of the droop voltage and using this derivative to adjust the ramp voltage to generate a second control voltage. Such an example modulator also includes a comparator for comparing a reference voltage with a second voltage and outputting a voltage pulse when the second voltage is greater than the reference voltage. This second voltage is a combination of the first and second control voltages. Attached Figure Description

[0005] Figure 1 This is a diagram of an example multiphase voltage regulator with an example modulator used to improve the transient response of the example multiphase voltage regulator.

[0006] Figure 2 yes Figure 1 A block diagram of an example modulator.

[0007] Figure 3 yes Figure 1 A block diagram of an example modulator, which includes... Figure 2Hardware implementations of example ramp generators and example differentiators.

[0008] Figure 4 yes Figure 1 Alternative block diagrams for example modulators.

[0009] Figure 5 yes Figure 1 Alternative implementations of the example modulator.

[0010] Figure 6 yes Figure 1 Alternative implementations of the example modulator.

[0011] Figure 7 This is a flowchart representation of example machine-readable instructions that can be executed to implement... Figure 2 and Figure 3 Example modulator to output Figure 1 , Figure 2 and Figure 3 Example clock signal.

[0012] Figure 8 This is a flowchart representation of example machine-readable instructions that can be executed to implement... Figure 4 Example modulator to output Figure 1 and Figure 4 Example clock signal.

[0013] Figure 9 This is a flowchart representation of example machine-readable instructions that can be executed to implement... Figure 5 Example modulator to output Figure 1 and Figure 5 Example clock signal.

[0014] Figure 10 This is a flowchart representation of example machine-readable instructions that can be executed to implement... Figure 6 Example modulator to output Figure 1 and Figure 6 Example clock signal.

[0015] Figure 11 Including showing Figure 2 and Figure 3 A graph of an example signal from an example modulator.

[0016] Figure 12 Including example responses using traditional techniques and Figure 1 , Figure 2 and Figure 3 A graph comparing example responses of example modulators.

[0017] Figure 13 It is constructed to execute Figures 7-10 Example machine-readable instructions for control Figures 1-6 A block diagram of the processor platform for an example modulator. Detailed Implementation

[0018] The accompanying drawings are not to scale. Throughout the drawings and the accompanying written description, the same reference numerals will be used to denote the same or similar parts whenever possible.

[0019] Constant On-Time Current-Mode (COTCM) control is used in voltage regulation applications because it offers higher light-load efficiency, greater bandwidth design capability, and faster transient response compared to fixed-frequency peak current-mode control. Transient response is associated with the time-dependent change and / or variation of the voltage regulator's output voltage in response to transient events, such as changes in the voltage regulator's load. In some examples, COTCM control in multiphase voltage regulators uses a pulse distribution method via a modulator. The modulator compares the voltage corresponding to the sum of inductor currents from the multiphase phases (e.g., a sum current-voltage) with the voltage regulator's output voltage to trigger a duty cycle trigger pulse (e.g., a clock pulse). A phase manager is used to distribute the clock pulse to one phase of the multiphase system to operate the voltage regulator in the selected phase.

[0020] Pulse distribution methods are highly sensitive to noise. As the duty cycle and / or number of phases of the voltage regulator increase, the number of ripple cancellation points also increases. A ripple cancellation point is the point where the total current is zero (e.g., at which the phase transitions of the voltage regulator are desirable). Noise in the system can adjust the ripple cancellation point, thereby causing undesirable jitter in the voltage regulator. A ramp voltage can be applied to a modulator coupled to the voltage regulator to improve noise performance by reducing undesirable jitter. The larger the ramp, the more undesirable jitter is reduced. Conventional techniques for reducing jitter include using a fixed ramp voltage. However, such a conventional fixed ramp voltage increases the steady-state difference between the total current voltage and the droop voltage of the voltage regulator. The droop voltage is the loss of the output voltage of the COTCM control circuit driving the load. The increased difference makes it difficult for the modulator to rapidly saturate the duty cycle (e.g., increase the duty cycle) under step-up load conditions (e.g., transients), resulting in undesirable undershoot of the output voltage (e.g., leading to poor performance). A larger conventional fixed ramp results in a larger output voltage undershoot. This is problematic because it's desirable to increase the duty cycle as the load gradually increases to respond quickly to load changes without output voltage undershoot. Furthermore, as the size of such a conventional fixed ramp increases, the bandwidth decreases, which slows down the voltage regulator's response. Examples described in this paper include modulators that improve transient performance in multiphase power converters while minimizing output voltage undershoot in COTCM control.

[0021] The examples described herein use the derivative of the droop voltage to increase the slope of the ramp voltage applied to the modulator at any time during transients (e.g., during load changes) to improve transient performance. The duty cycle of the clock pulse depends on the difference between (A) the ramp voltage and (B) the droop voltage and the difference between the sum current voltage (e.g., current from multiple phases corresponding to the voltage regulator). For example, as the difference between the droop voltage and the sum current of the inductors decreases, the duty cycle of the clock pulse increases. Moreover, as the slope of the ramp voltage increases, the duty cycle of the clock pulse increases. In some examples described herein, the slope of the ramp voltage is increased during transients to increase the duty cycle. In some examples described herein, the droop voltage is increased during transients to decrease the difference between the droop voltage and the sum current voltage to increase the duty cycle. The examples described herein increase the slope of the ramp voltage and / or droop voltage by taking the derivative of the droop voltage and combining (e.g., adding) that derivative with the droop ramp and / or the droop voltage. Because the droop voltage increases rapidly in the transient state, the derivative of the droop voltage provides sufficient voltage to increase the ramp voltage and / or droop voltage in order to rapidly (e.g., significantly faster than conventional techniques) increase the duty cycle (e.g., causing saturation within the modulator). Compared to conventional techniques, the voltage modulator has significantly lower undershoot, thereby improving the transient performance of the voltage regulator.

[0022] Figure 1 The schematic diagram illustrates COTCM control in a two-phase voltage regulator 100. Alternatively, the example voltage regulator 100 may include any number of phases. The example voltage regulator 100 includes an example modulator 102, an example sum current-voltage (Visum) 104, an example voltage ramp (Vramp) 106, an example voltage droop (Vdroop) 108, an example clock 110, an example phase manager 112, and an example input voltage (Vin) 114. The first phase of the voltage regulator 100 includes an example time-on circuit (Ton) 116, a first example pulse width modulation (PWM) signal 118, an example driver 120, example switches 122 and 124, and a first example inductor 126. The second phase of the example voltage regulator 100 includes an example Ton circuit 128, a second example PWM signal 130, an example driver 132, example switches 134 and 136, and a second example inductor 138. The example voltage regulator 100 also includes an example output resistor (Rco) 140, an example output capacitor (Co) 142, an example load resistor (R1) 144, an example core voltage (Vcore) 146, an example reference voltage (Vref) 148, and an example differential amplifier 150.

[0023] Figure 1 Example modulator 102 compares example Visum 104, example Vramp 106, and example Vdroop 108 to output example clock 110. Example modulator 102 calculates the derivative of example Vdroop 108. In some examples, such as combining... Figure 2 As further described, the derivative of example Vdroop 108 is combined with Vramp 106 to increase the duty cycle of example clock 110. In some examples, such as combining... Figure 4 As further described, the derivative of example Vdroop 108 (e.g., dVdroop / dt) is combined with Vdroop 108 to increase the duty cycle of example clock 110.

[0024] Figure 1 The example phase manager 112 is a circuit that receives pulses (e.g., voltage pulses) from the example clock 110 and outputs the pulses to the first and / or second phases of the voltage regulator 100. In some examples, the phase manager 112 alternates clock pulses between the first and second phases. In some examples, the phase manager 112 is controlled by a controller and outputs pulses to the first and / or second phases based on instructions from the controller.

[0025] Figure 1Example Ton circuit 116 generates a fixed "on" time (e.g., a voltage pulse of predetermined length) to the gate of example driver 120 based on a clock pulse output from phase manager 112. The output of example Ton circuit 116 is example first PWM signal 118. Example driver 120 controls example switches 122, 124 based on example first PWM signal 118 to control the voltage / current corresponding to first inductor 126 in the first phase. For example, when example switch 122 is closed and example switch 124 is open, example Vin 114 provides voltage / charge to the first phase. When example switch 122 is open and example switch 124 is closed, the charge in the first phase is discharged to ground. Example Ton circuit 128 generates a fixed "on" time to the gate of example driver 132 based on a clock pulse output from phase manager 112. The output of example Ton circuit 128 is example second PWM signal 130. Example driver 132 controls example switches 134 and 136 based on example second PWM signal 130 to control the voltage / current corresponding to second inductor 138 in the second phase. For example, when example switch 134 is closed and example switch 136 is open, example Vin 114 provides voltage / charge to the first phase. When example switch 134 is open and example switch 136 is closed, the charge in the first phase is discharged to ground.

[0026] pass Figure 1 A first current through the first example inductor 126 is combined with a second current through the second example inductor 138. Example Visum 104 is a voltage representing the combined first and second currents. Furthermore, the voltage generated by the first example inductor 126 and the second example inductor 138 is represented by example Vcore 146. Example Vcore 146 is the output voltage of example voltage regulator 100. Example Vcore 146 is dissipated by example Rco 140 and Co 142 and can be varied based on example R1 144. Example differential amplifier 150 compares (e.g., subtracts) example Vcore 146 with example Vref 148 to produce example Vdroop 108. Example Vdroop 108 is equivalent to the difference between Vref 148 and Vcore 146. In some examples, differential amplifier 150 amplifies this difference.

[0027] Figure 2 This is what this article describes Figure 1 A block diagram of an example implementation of modulator 102, which improves performance by increasing the slope of example Vramp 106 during transient periods. Figure 1 The transient response of an example voltage regulator 100. Although combined Figure 1The example voltage regulator 100 is used to describe the example modulator 102, but the example modulator 102 can be used to improve the transient response of any type of voltage regulator. The example modulator 102 includes... Figure 1 Examples include Visum 104, Vramp 106, Vdroop 108, and clock 110. Example modulator 102 further includes example differential amplifier 202, example differential amplifier output current source 204, example differentiator 206, example adder 207, example amplifier 208, example adjusted Vramp 209, example ramp current source 210, example fixed (Ifixed) current source 212, example Ifixed current 213, example comparator node voltage (Vcmp) 214, example capacitor 216, example reference voltage (Vref) 218, and example comparator 220.

[0028] Figure 2 Example differential amplifier 202 compares example Visum 104 and example Vdroop 108 by amplifying the difference between Visum 104 and Vdroop 108. The output of example differential amplifier 202 is used as a control voltage to control example differential amplifier output current source 204 so that when the differential amplifier voltage is positive (e.g., the difference between Visum 104 and Vdroop 108 is positive), a current toward ground (e.g., differential amplifier output current) is generated, and when the differential amplifier voltage is negative (e.g., the difference between Visum 104 and Vdroop 108 is negative), a current toward example Vcmp 214 (e.g., differential amplifier output current) is generated.

[0029] Figure 2 Example differentiator 206 calculates the derivative of example Vdroop 108. Example differentiator 206 outputs dVdroop / dt (e.g., the derivative of Vdroop) to example adder 207. Example adder 207 combines (e.g., adds) dVdroop / dt to Vramp 106 to output example adjusted Vramp 209, which increases the rate of increase (e.g., slope) of example Vramp 106 when dVdroop / dt is not zero. As described above, Vdroop is based on (e.g., represented by example R1 144) the load of example voltage regulator 100 ( Figure 1 The output voltage loss is due to the rapid increase in the slope of Vdroop during transients. Therefore, example differentiator 206 adds a significant boost to Vramp 106 during transients, thereby increasing the slope of example Vramp 106 via example adjusted Vramp 209.

[0030] Figure 2Example amplifier 208 compares example adjusted Vramp 209 with ground voltage to amplify example adjusted Vramp 209. The output of example amplifier 208 is a control voltage that controls example ramp current source 210 to generate a current (e.g., a ramp current) toward Vcmp 214. Furthermore, example Ifixed current source 212 also generates example Ifixed 213 toward example Vcmp 214. The combination of example Ifixed current 213, example ramp current, and example differential amplifier output current produces example Vcmp 214. Therefore, Vcmp 214 increases as adjusted Vramp 209 increases and / or the difference between Visum 104 and Vdroop 108 decreases. The voltage of Vcmp 214 is stored in example capacitor 216 and discharged periodically or non-periodically at each pulse of example clock 110.

[0031] Figure 2 Example comparator 220 compares example Vcmp 214 with example Vref 218. When example Vref 218 is greater than example Vcmp 214, comparator 220 outputs zero volts. When example Vref 218 is less than example Vcmp 214, example comparator 220 outputs a pulse, and the charge stored in example capacitor 216 is discharged. In some examples, Vramp 106 is controlled by clock 110. In such examples, when clock 110 pulses, Vramp 106 is discharged, thereby reducing the voltage on Vcmp 214. The faster example Vcmp 214 can recover to a voltage higher than Vref 218, the faster clock 110 pulses, resulting in a faster duty cycle.

[0032] when Figure 2 When the example modulator 102 operates in steady state (e.g., not in transient state), the example Vdroop 108 will be substantially stable. Therefore, dVdroop / dt will be zero, and the modulator 102 will maintain its steady-state duty cycle. (As combined...) Figure 3Further described, the steady-state ripple (e.g., unexpected changes in Vdroop 108) is masked by the example differentiator 206. When the example modulator 102 is not operating in steady state (e.g., during the power switch on-time, power switch off-time, when switching phases, etc.), the example Vdroop 108 will increase rapidly, causing the differentiator 206 to increase the slope of the example Vramp 106 by adding dVdroop / dt to the example Vramp 106, thereby producing the example adjusted Vramp 209 via the example adder 207. Increasing the slope of the example adjusted Vramp 209 increases the slope of Vcmp 214, causing Vcmp 214 to reach Vref 218 more quickly. Because Vcmp 214 rises more quickly to reach Vcmp 214, the output clock 110 pulsates more rapidly. As described above, when clock 110 pulses, the voltage on example Vcmp214 is discharged, and this process repeats. Therefore, example modulator 102 increases the duty cycle to respond quickly to transient transitions and prevent undershoot.

[0033] Figure 3 yes Figure 1 A block diagram of an example implementation of an example modulator 102, which has Figure 2 The example hardware implementation of differentiator 206 and example hardware implementation of Vramp generator 302 are shown. Although combined Figure 1 The example voltage regulator 100 describes an example modulator 102, but the example modulator 102 can be used to improve the transient response of any type of voltage regulator. Example modulator 102 includes... Figure 1 The example includes Visum 104, Vramp 106, Vdroop 108, and an example clock 110. The example modulator 102 further includes an example differential amplifier 202, an example differential amplifier output current source 204, an example differentiator 206, an example adder 207, an example amplifier 208, an example adjusted Vramp 209, an example ramp current source 210, an example Ifixed current source 212, an example Ifixed 213, an example Vcmp 214, an example capacitor 216, an example Vref 218, and an example comparator 220. The example Vramp generator 302 includes an example transistor 304 and an example capacitor 306. The example differentiator 206 includes an example differentiator amplifier 308, an example voltage (Vn) 312, an example amplifier 310, and an example amplifier output voltage 314 (e.g., dVdroop / dt).

[0034] Figure 3Example Vramp generator 302 is the circuitry that outputs example Vramp 106. Example Vramp generator 302 includes a voltage source that charges example capacitor 306 when example transistor 304 is off (e.g., when example clock 110 is low). As example capacitor 306 charges, example Vramp 106 increases linearly to generate a ramp voltage signal. (As described above...) Figure 2 As described, when Vcmp 214 rises to a voltage higher than that of example Vref 218, example clock 110 pulses high. When example clock 110 pulses high, a pulse is applied to the gate of example transistor 304 to enable (e.g., turn on) example transistor 304, which discharges example capacitor 306, causing example Vramp 106 and example Vcmp 214 to decrease rapidly. After the pulse of example clock 110 stops, a voltage source charges example capacitor 306, thus repeating the process. Although as Figure 3 The illustration shows and describes an example Vramp generator 302, but any alternative circuitry can be used to output a ramp voltage waveform.

[0035] Figure 3 Example differentiator 206 is a circuit for increasing the slope of example Vramp 106 by taking the derivative of example Vdroop 108. Example differentiator 206 includes example differentiator amplifier 308. Example differentiator amplifier 308 receives example Vdroop 108 and produces a voltage proportional to the rate of change of example Vdroop 108 with respect to time. When Vdroop 108 is stable (e.g., during steady state), the output of example differentiator amplifier 308 will be zero volts. When Vdroop 108 increases (e.g., in transients), the output of example differentiator amplifier 308 will be a voltage representing the rate of increase (e.g., slope) (e.g., dVdroop / dt) of Vdroop 108. Alternatively, example differentiator amplifier 208 can be replaced with any kind of high-pass filter and / or band-pass filter to produce a voltage proportional to the rate of change of example Vdroop 108 with respect to time. The example differentiator 206 further includes an example amplifier 310 that compares the output of the differentiator amplifier 308 with the example Vn 312 to shield any potential dVdroop / dt associated with steady-state ripple. In this way, dVdroop / dt does not affect the steady-state control loop, thus maintaining the small-signal characteristics of the example voltage regulator 100. The comparison of the example Vn 312 with the output of the differentiator amplifier 308 allows the example amplifier 310 to output voltage during transients (e.g., example amplifier output voltage 314), thereby reducing... Figure 1The undershoot of Vcore 146. The example amplifier output voltage 314 is dVdroop / dt during the transient period and zero during the steady state. The example adder 207 adds the example amplifier output voltage 314 to the example Vramp 106 to increase the slope of Vramp 106 during the transient period by outputting the example adjusted Vramp 209. Alternatively, the example differentiator 206 may include a current source controlled by the example amplifier output voltage 314. In such an example, the adder 207 may combine the current output by the current source of the differentiator 206 (e.g., corresponding to the example amplifier output voltage) and the current output by the example Vramp generator 302, and output the example adjusted Vramp 209 based on a comparison of the two currents.

[0036] Figure 4 This is what this article describes Figure 1 A block diagram of an alternative implementation of modulator 102 for improving performance by adding example Vdroop 108 during transient periods. Figure 1 The transient response of an example voltage regulator 100. Although combined Figure 1 The example voltage regulator 100 describes an example modulator 102, but the example modulator 102 can be used to improve the transient response of any type of voltage regulator. Example modulator 102 includes... Figure 1 Examples include Visum 104, Vramp 106, Vdroop 108, and clock 110. Example modulator 102 further includes... Figure 2 The example includes a differential amplifier 202, an example differential amplifier output current source 204, an example differentiator 206, an example amplifier 208, an example ramp current source 210, an example Ifixed current source 212, an example Ifixed current source 213, an example Vcmp 214, an example capacitor 216, an example Vref 218, and an example comparator 220. The example modulator 102 further includes an example adder 400 and an example adjusted Vdroop 402.

[0037] As described above, in order to increase the duty cycle of the example clock 110, the example Vcmp 214 can be increased so that the example Vcmp 214 will reach the example Vref 218 faster to generate the pulse of the example clock 110. Figure 4 Example modulator 102 increases example Vdroop 108 during transients, which decreases the differential amplifier output, thereby reducing the current generated by differential amplifier output current source 204 and increasing the voltage of example Vcmp 214.

[0038] Figure 4The example Vdroop 108 is input to the example adder 400 and the example differentiator 206. The example differentiator 206 can be... Figure 2 or Figure 3 Example differentiator 206. However, Figure 4 The example differentiator 206 outputs dVdroop / dt to increase the example Vdroop 108, while Figure 2 and Figure 3 The example differentiator 206 outputs Vdroop / dt to increase the example Vramp 106. (As combined...) Figure 2 As described, the output of differentiator 206 is dVdroop / dt (e.g., the slope of Vdroop) during the transient period and is zero during the steady state. Example adder 400 adds example Vdroop 108 to dVdroop / dt to generate example adjusted Vdroop 402. During the steady state, because the output of differentiator 206 is zero, example adjusted Vdroop 402 is the same voltage as example Vdroop 108. During the transient period, because the output of differentiator 206 is dVdroop / dt (e.g., a positive voltage), adjusted Vdroop 402 is a higher voltage than example Vdroop 108. Because adjusted Vdroop 402 is higher than example Vdroop 108 during the transient period, the output of example differential amplifier 202 decreases. Reducing the output of example differential amplifier 202 reduces the example differential amplifier output current drawn from example Vcmp 214 (e.g., generated by example differential amplifier output current source 204 based on the output of differential amplifier 202). Reducing the example differential amplifier output current increases example Vcmp 214, thereby allowing example Vcmp 214 to reach example Vref 218 more quickly, which increases the duty cycle of example clock 110.

[0039] Figure 5 This is a block diagram of an alternative implementation of the example modulator 500 described herein, which improves upon the transient response by adding example Vdroop 108. Figure 1 The transient response of example voltage regulator 100 is shown. In this example, example modulator 500 is used instead. Figure 1 Example modulator 102. Furthermore, example modulator 500 receives... Figure 1 The example Vcore 146 is used as additional input. Although combined... Figure 1 The example voltage regulator 100 describes an example modulator 500, but the example modulator 500 can be used to improve the transient response of any type of voltage regulator. The example modulator 500 includes... Figure 1Examples include Visum 104, Vramp 106, Vdroop 108, Clock 110, and Vcore 146. Example modulator 500 further includes... Figure 2 The example includes a differential amplifier 202, an example differential amplifier output current source 204, an example amplifier 208, an example ramp current source 210, an example Ifixed current source 212, an example Ifixed current source 213, an example Vcmp 214, an example capacitor 216, an example Vref 218, and an example comparator 220. The example modulator 500 further includes... Figure 4 The example adder 400 and the example adjusted Vdroop 402 are shown. The example modulator 500 further includes an example inverting differentiator 502.

[0040] As described above, in order to increase the duty cycle of the example clock 110, the example Vcmp 214 can be increased so that the example Vcmp 214 will reach the example Vref 218 faster to generate the pulse of the example clock 110. Figure 5 Example modulator 500 increases example Vdroop 108 during transients, which decreases the differential amplifier output, causing the current generated by differential amplifier output current source 204 to decrease and increasing the voltage of example Vcmp 214.

[0041] Figure 5 Example Vdroop 108 is input to example adder 400, and example Vcore 146 is input to example inverting differentiator 502. Example inverting differentiator 502 is similar to... Figure 2 or Figure 3 Example differentiator 206. However, Figure 5 The inverting derivative of the input to the example inverting differentiator 502 (e.g., Vcore 146), while Figure 2 and Figure 3 The example differentiator 206 outputs the derivative (e.g., non-inverting). Example Vcore 146 corresponds to the inverted form of example Vdroop. Therefore, calculating the inverted derivative of example Vcore 146 is essentially equivalent to calculating the non-inverting derivative of example Vdroop 108. The output of inverting differentiator 502 is the inverted form of dVcore / dt during the transient period (e.g., the slope of Vcore) and is zero during the steady state. In some examples, inverting differentiator 502 includes a filter to remove any noise associated with example Vcore 146.

[0042] Figure 5Example adder 400 adds example Vdroop 108 to an inverted dVcore / dt to generate example adjusted Vdroop 402. During steady state, because the output of inverting differentiator 502 is zero, example adjusted Vdroop 402 is the same voltage as example Vdroop 108. During transient state, because the output of inverting differentiator 502 is an inverted dVcore / dt (e.g., a positive voltage), adjusted Vdroop 402 is a higher voltage than example Vdroop 108. Because adjusted Vdroop 402 is higher than example Vdroop 108 during transient state, the output of example differential amplifier 202 decreases. Decreasing the output of example differential amplifier 202 reduces the example differential amplifier output current drawn from example Vcmp 214 (e.g., generated by example differential amplifier output current source 204 based on the output of differential amplifier 202). Reducing the output current of the example differential amplifier increases the example Vcmp 214, thereby allowing the example Vcmp 214 to reach the example Vref218 faster, which increases the duty cycle of the example clock 110.

[0043] Figure 6 This is a block diagram of an alternative implementation of the example modulator 600 described herein, which improves upon the example modulator 106 during transients by generating an example adjusted Vramp 209. Figure 1 The transient response of example voltage regulator 100 is shown. In this example, example modulator 600 replaces... Figure 1 Example modulator 102. Furthermore, example modulator 600 receives... Figure 1 The example Vcore 146 is used as additional input. Although combined... Figure 1 The example voltage regulator 100 describes an example modulator 600, but the example modulator 600 can be used to improve the transient response of any type of voltage regulator. The example modulator 600 includes... Figure 1 Examples include Visum 104, Vramp 106, Vdroop 108, Clock 110, and Vcore 146. Example modulator 600 further includes... Figure 2 The example includes a differential amplifier 202, an example differential amplifier output current source 204, an example adder 207, an example amplifier 208, an example adjusted Vramp 106, an example ramp current source 210, an example Ifixed current source 212, an example Ifixed 213, an example Vcmp 214, an example capacitor 216, an example Vref 218, and an example comparator 220. The example modulator 600 further includes... Figure 5 Example of an inverting differentiator 502.

[0044] As described above, in order to increase the duty cycle of the example clock 110, the example Vcmp 214 can be increased so that the example Vcmp 214 will reach the example Vref 218 faster to generate the pulse of the example clock 110. Figure 6 Example modulator 600 (e.g., by generating example adjusted Vramp 207) increases example Vramp 106 during transients, which increases the voltage of example Vcmp214.

[0045] Figure 6 The example Vcore 146 is input to the example inverting differentiator 502. The example inverting differentiator 502 is similar to... Figure 2 or Figure 3 Example differentiator 206. However, Figure 6 The inverting derivative of the input to the example inverting differentiator 502 (e.g., Vcore 146), while Figure 2 and Figure 3 The example differentiator 206 outputs the derivative (e.g., non-inverting). Example Vcore 146 corresponds to the inverted form of example Vdroop. Therefore, calculating the inverted derivative of example Vcore 146 is essentially equivalent to calculating the non-inverting derivative of example Vdroop 108. The output of inverting differentiator 502 is the inverted form of dVcore / dt during the transient period (e.g., the slope of Vcore) and is zero during the steady state. In some examples, inverting differentiator 502 includes a filter to remove any noise associated with example Vcore 146.

[0046] Figure 6 Example adder 207 adds example Vramp 106 to inverted dVcore / dt to generate example adjusted Vramp 209. During steady state, because the output of inverting differentiator 502 is zero, example adjusted Vramp 209 is the same voltage as example Vramp 106. During transient state, because the output of inverting differentiator 502 is inverted dVcore / dt (e.g., a positive voltage), adjusted Vramp 209 is higher than example Vramp 106. Because adjusted Vramp 209 is higher than example Vramp 106 during transient state, the output of example amplifier 208 is increased. Increasing the output of example amplifier 208 increases the current output by example amplifier output current source 210, thereby increasing example Vcmp 214 to allow example Vcmp 214 to reach example Vref 218 more quickly, which increases the duty cycle of example clock 110.

[0047] Although Figures 2 to 4 The implementation is shown in the figure. Figure 1Example modulator 102 example mode, Figure 5 An example modulator 500 is shown, and Figure 6 An example modulator 600 is shown, but Figures 2 to 6 The components, processes, and / or devices shown may be combined, divided, rearranged, omitted, eliminated, and / or implemented in any other way. Furthermore, example differential amplifier 202, example current source 204, example differentiator 206, example adder 207, example amplifier 208, example current source 210, example current source 212, example comparator 220, example adder 400, example inverting differentiator 502, and / or more generally, Figures 2 to 4 Example modulator 102 Figure 5 Example modulator 500 and / or Figure 6 The example modulator 600 can be implemented by hardware, machine-readable instructions, software, firmware, and / or any combination of hardware, machine-readable instructions, software, and / or firmware. Thus, for example, there are example differential amplifiers 202, example current sources 204, example differentiators 206, example adders 207, example amplifiers 208, example current sources 210, example current sources 212, example comparators 220, example adders 400, example inverting differentiators 502, and / or more generally, Figures 2 to 4 Example modulator 102 Figure 5 Example modulator 500 and / or Figure 6 Any of the example modulators 600 can be implemented by one or more analog and / or digital circuits, one or more logic circuits, one or more programmable processors, one or more application-specific integrated circuits (ASICs), one or more programmable logic devices (PLDs), and / or one or more field-programmable logic devices (FPLDs). In purely software and / or firmware implementations, example differential amplifier 202, example current source 204, example differentiator 206, example adder 207, example amplifier 208, example current source 210, example current source 212, example comparator 220, example adder 400, example inverting differentiator 502, and / or more generally, Figures 2 to 4 Example modulator 102 Figure 5 Example modulator 500 and / or Figure 6 Any of the example modulators 600 is hereby explicitly defined as including tangible computer-readable storage devices or storage disks, such as memory storing software and / or firmware, digital universal discs (DVDs), high-density discs (CDs), Blu-ray discs, etc. Furthermore, Figures 2 to 4 Example modulator 102 Figure 5 The example modulator 500 and / or shown in the figure Figure 6 Example modulator 600 includes additions to or replacements Figures 7 to 10 The elements, processes and / or devices shown may include more than one of any or all of the elements, processes and devices shown.

[0048] Figure 7 The diagram shows the representation used for implementation. Figure 2 and Figure 3 A flowchart of example machine-readable instructions for example modulator 102. Figure 8 The middle shows Figure 4 Example modulator 102, Figure 9 The middle shows Figure 5 Example modulator 500, Figure 10 The middle shows Figure 6 Example modulator 600. In these examples, machine-readable instructions include those for use with modulators such as those combined below. Figure 13 The processor 1312 shown in the example processor platform 1300 describes a program executed by a processor. This program may be embodied in machine-readable instructions stored on a tangible computer-readable storage medium, such as a CD-ROM, floppy disk, hard disk drive, digital versatile disk (DVD), Blu-ray disc, or memory associated with the processor 1312; however, the entire program and / or portions thereof may alternatively be executed by a device other than the processor 1312 and / or embodied in firmware or dedicated hardware. Furthermore, although references... Figures 7 to 10 The flowchart shown illustrates the example program, but an alternative implementation can be used. Figures 2 to 4 Example modulator 102 Figure 5 Example modulator 500 and / or Figure 6 The example modulator 600 has many other methods. For example, the execution order of the boxes can be changed and / or some of the boxes described can be changed, eliminated, or combined.

[0049] As mentioned above, Figures 7 to 10 The example process can be implemented using coded instructions (e.g., computer and / or machine-readable instructions) stored on a tangible computer-readable storage medium (such as a hard disk drive, flash memory, read-only memory (ROM), high-density disk (CD), digital versatile disk (DVD), cache, random access memory (RAM), and / or any other storage device or disk), wherein information is stored for any duration (e.g., extended period of storage, permanent storage, short-term storage, temporary buffering, and / or for caching information). As used herein, the term "tangible computer-readable storage medium" is explicitly defined to include any type of computer-readable storage device and / or disk and excludes propagation signals and transmission media. As used herein, "tangible computer-readable storage medium" and "tangible machine-readable storage medium" are used interchangeably. Additionally or alternatively, Figures 7 to 10 The example process can be implemented using coded instructions (e.g., computer and / or machine-readable instructions) stored on non-transitory computer and / or machine-readable media (such as hard disk drives, flash memory, read-only memory, high-density disks, digital universal disks, caches, random access memory, and / or any other storage device or disk), wherein information is stored for any duration (e.g., extended periods of storage, permanent storage, short-term storage, temporary buffering, and / or for caching information). As used herein, the term "non-transitory computer-readable media" is explicitly defined to include any type of computer-readable storage device and / or disk and excludes propagation signals and transmission media.

[0050] Figure 7 It means that it can be generated by Figure 2 and Figure 3 Example modulator 102 performs to improve Figure 1 Example flowchart 700 shows the transient response of an example voltage regulator 100 and example machine-readable instructions. Although combined with... Figure 2 and Figure 3 Example modulator 102 describes Figure 7 These are examples of instructions, but they can be used by any type of modulator.

[0051] At box 702, example differential amplifier 202 compares example Visum 104 and example Vdroop 108 to generate the differential amplifier output voltage. (As described above...) Figure 2 The example differential amplifier output voltage controls the example differential amplifier output current source 204 to generate a current that affects the voltage of example Vcmp 214 (e.g., when the current is positive, the voltage of Vcmp 214 decreases, and when the current is negative, the voltage of Vcmp 214 increases).

[0052] At box 704 Figure 2 and Figure 3 Example differentiator 206 calculates the derivative of example Vdroop 108. At box 706, example differentiator 206 determines... Figure 1 Is the voltage regulator 100 in a transient state? In some examples, steady-state ripple may cause the differentiator 206 to add unnecessary voltage to the example Vdroop 108 in steady state. Therefore, as described above... Figure 3The differentiator 206 can screen such steady-state ripple based on this determination. If the example differentiator 206 determines that the example voltage regulator 100 is not in a transient state (e.g., the voltage regulator 100 is in a steady state), the differentiator 206 screens the dVdroop / dt voltage by setting the voltage to zero (box 708). If the differentiator 206 determines that the example voltage regulator 100 is in a transient state, the process continues to box 710.

[0053] At box 710 Figure 2 and Figure 3 Example adder 207 combines the derivative voltage (e.g., dVdroop / dt) with example Vramp 106 to generate example adjusted Vramp 209, thereby increasing the rate of example Vramp 106. In some examples, example adjusted Vramp 209 is amplified by an amplifier (e.g., Figure 2 and Figure 3 Example amplifier 208) amplifies. At box 712, example Ifixed current source 212 generates example Ifixed current 213, differential amplifier output current source 204 (e.g., based on differential amplifier output voltage) generates differential amplifier current, and example ramp current source 210 (e.g., based on adjusted ramp voltage) generates ramp current to generate example Vcmp 214.

[0054] At box 714 Figure 2 and Figure 3 Example comparator 220 compares example Vcmp 214 with example Vref 218 to determine if Vcmp 214 is greater than example Vref 218. If example comparator 220 determines that Vcmp 214 is greater than example Vref 218, then example comparator 220 outputs a clock pulse (box 716). As described above, when example clock 110 pulses, example Vramp 106 discharges and the process repeats. If example comparator 220 determines that example Vcmp 214 is not greater than example Vref 218, then the process repeats while example Vramp 106 increases until example Vcmp 214 is greater than example Vref.

[0055] Figure 8 It means that it can be generated by Figure 4 Example modulator 102 performs to improve Figure 1 Example flowchart 800 shows the transient response of an example voltage regulator 100 and example machine-readable instructions. Although combined with... Figure 4 Example modulator 102 describes Figure 8 These are examples of instructions, but they can be used by any type of modulator.

[0056] At box 802, Figure 4 Example differentiator 206 calculates the derivative of example Vdroop 108. At box 804, example differentiator 206 determines... Figure 1 Whether the voltage regulator 100 is in a transient state. In some examples, steady-state ripple may cause the differentiator 206 to add unnecessary voltage to the example Vdroop 108 in steady state. Therefore, the differentiator 206 can screen such steady-state ripple based on this determination. If the example differentiator 206 determines that the example voltage regulator 100 is not in a transient state (e.g., the voltage regulator 100 is in a steady state), the differentiator 206 screens the dVdroop / dt voltage by setting the voltage to zero (box 806). If the differentiator 206 determines that the example voltage regulator 100 is in a transient state, the process continues to box 808.

[0057] At box 808, Figure 4 Example adder 400 combines a derivative voltage (e.g., dVdroop / dt) with example Vdroop 108 to increase the rate of example Vdroop 108 by generating example adjusted Vdroop 402. At block 810, example differential amplifier 202 compares example Visum 104 and example adjusted Vdroop 402 to generate a differential amplifier output voltage. The differential amplifier output voltage controls example differential amplifier output current source 202 to generate a differential amplifier output current. At block 812, example Ifixed current source 212 generates example Ifixed current 213, differential amplifier output current source 204 (e.g., based on differential amplifier output voltage) generates a differential amplifier current, and example ramp current source 210 (e.g., based on ramp voltage) generates a ramp current to generate example Vcmp 214.

[0058] At box 814, Figure 4 Example comparator 220 compares the voltage at example Vcmp 214 with example Vref 218 to determine whether the voltage at Vcmp 214 is greater than that at example Vref 218. If example comparator 220 determines that the voltage at Vcmp 214 is greater than that at example Vref 218, then example comparator 220 outputs a clock pulse (box 816). As described above, when example clock 110 pulses, example Vramp 106 discharges and the process repeats. If example comparator 220 determines that the voltage at example Vcmp 214 is not greater than that at example Vref 218, then the process repeats as example Vramp 106 increases until example Vcmp 214 is greater than example Vref.

[0059] Figure 9 It means that it can be generated by Figure 5 Example modulator 500 performs to improve Figure 1 Example flowchart 900 shows example machine-readable instructions for the transient response of an example voltage regulator 100. Although combined with... Figure 5 Example modulator 500 describes Figure 9 These are examples of instructions, but they can be used by any type of modulator.

[0060] At position 902, Figure 5 The example inverting differentiator 502 calculates the inverting derivative of the example Vcore 146. In some examples, the inverting differentiator 502 can filter the example Vcore 146 to remove any irregularities. At box 904, the example inverting differentiator 502 determines... Figure 1 Whether the voltage regulator 100 is in a transient state. In some examples, steady-state ripple may cause the inverting differentiator 502 to add unnecessary voltage to the example Vcore 146 in steady state. Therefore, the inverting differentiator 502 can screen such steady-state ripple based on this determination. If the example inverting differentiator 502 determines that the example voltage regulator 100 is not in a transient state (e.g., the voltage regulator 100 is in a steady state), the inverting differentiator 502 screens the inverting dVcore / dt voltage by setting the voltage to zero (box 906). If the inverting differentiator 502 determines that the example voltage regulator 100 is in a transient state, the process continues to box 908.

[0061] At box 908 Figure 5 Example adder 400 combines an inverted differential voltage (e.g., inverted dVcore / dt) with example Vdroop 108 to increase the rate of example Vdroop 108 by generating example adjusted Vdroop 402. At block 910, example differential amplifier 202 compares example Visum 104 and example adjusted Vdroop 402 to generate a differential amplifier output voltage. The differential amplifier output voltage controls example differential amplifier output current source 202 to generate a differential amplifier output current. At block 912, example Ifixed current source 212 generates example Ifixed current 213, differential amplifier output current source 204 (e.g., based on differential amplifier output voltage) generates a differential amplifier current, and example ramp current source 210 (e.g., based on ramp voltage) generates a ramp current to generate example Vcmp 214.

[0062] At box 914 Figure 5Example comparator 220 compares the voltage at example Vcmp 214 with example Vref 218 to determine whether the voltage at Vcmp 214 is greater than that at example Vref 218. If example comparator 220 determines that the voltage at Vcmp 214 is greater than that at example Vref 218, then example comparator 220 outputs a clock pulse (box 916). As described above, when example clock 110 pulses, example Vramp 106 discharges and the process is repeated. If example comparator 220 determines that the voltage at example Vcmp 214 is not greater than that at example Vref 218, then the process is repeated while example Vramp 106 increases until example Vcmp 214 is greater than example Vref.

[0063] Figure 10 It means that it can be generated by Figure 6 Example modulator 600 performs to improve Figure 1 Example flowchart 1000 shows the transient response of an example voltage regulator 100 and example machine-readable instructions. Although combined with... Figure 6 Example modulator 600 describes Figure 10 The instructions are specific, but the example instructions can be used by any type of modulator.

[0064] At box 1002, Figure 6 Example differential amplifier 202 compares example Visum 104 and example Vdroop 108 to generate a differential amplifier output voltage. The example differential amplifier output voltage controls example differential amplifier output current source 204 to generate a current that affects the voltage of example Vcmp 214 (e.g., when the current is positive, the voltage of Vcmp 214 decreases, and when the current is negative, the voltage of Vcmp 214 increases).

[0065] At box 1004, Figure 6 The example inverting differentiator 502 calculates the inverting derivative of example Vcore 146. At box 1006, the example inverting differentiator 502 determines... Figure 1 Whether the voltage regulator 100 is in a transient state. In some examples, steady-state ripple may cause the inverting differentiator 502 to add unnecessary voltage to the example Vramp 106 in steady state. Therefore, the inverting differentiator 502 can screen such steady-state ripple based on this determination. If the example inverting differentiator 502 determines that the example voltage regulator 100 is not in a transient state (e.g., the voltage regulator 100 is in a steady state), the inverting differentiator 502 screens the inverting dVdroop / dt voltage by setting the voltage to zero (box 1008). If the inverting differentiator 502 determines that the example voltage regulator 100 is in a transient state, the process continues to box 1010.

[0066] At box 1010, Figure 6 Example adder 207 combines the inverted derivative voltage (e.g., inverted dVcore / dt) with example Vramp 106 to generate example adjusted Vramp 209, thereby increasing the rate of example Vramp 106. In some examples, example adjusted Vramp 209 is amplified by an amplifier (e.g., Figure 6 Example amplifier 208) amplifies. At box 1012, example Ifixed current source 212 generates example Ifixed current 213, differential amplifier output current source 204 (e.g., based on differential amplifier output voltage) generates differential amplifier current, and example ramp current source 210 (e.g., based on adjusted ramp voltage) generates ramp current to generate example Vcmp 214.

[0067] At box 1014, Figure 6 Example comparator 220 compares example Vcmp 214 with example Vref 218 to determine if Vcmp 214 is greater than example Vref 218. If example comparator 220 determines that Vcmp 214 is greater than example Vref 218, then example comparator 220 outputs a clock pulse (box 1016). As described above, when example clock 110 pulses, example Vramp 106 discharges and the process repeats. If example comparator 220 determines that example Vcmp 214 is not greater than example Vref 218, then the process repeats while example Vramp 106 increases until example Vcmp 214 is greater than example Vref.

[0068] Figure 11 It shows the use Figure 1 Example voltage regulator 100 and Figure 2 and Figure 3 Example figure 1100 shows the transient response of example modulator 102. This example figure includes... Figure 2 Examples include Visum 104, Vdroop 108, Clock 110, Vcore 146, Adjusted Vramp 209, Vcmp Voltage 214, and Vref 218. Figure 3 Example dVdroop / dt 314 (e.g., Figure 2 (Example differentiator 206 output). Example Figure 1100 further includes example first time (t1) 1102 and example second time (t2) 1104.

[0069] exist Figure 11Prior to example t1 1102, example voltage regulator 100 operates in steady state. Due to the steady-state conditions, example Visum 104, example Vdroop 108, and example Vcore 146 are substantially stable. Because example Vdroop 108 is substantially stable (e.g., the slope of Vdroop 108 is almost zero), example dVdroop / dt 314 is zero. (Combined with...) Figure 3 As described above, an amplifier (e.g., example amplifier 310) can be used to shield example voltage regulator 100. Figure 1 Any steady-state ripple. Furthermore, prior to example t1 1102, the example adjusted Vramp 209 increases at a first rate (e.g., a steady-state rate). As described above, example Vcmp 214 corresponds to the difference between (A) and (B) (e.g., the difference between example Visum 104 and example Vdroop 108), where (A) is the sum of (i) and (ii), where (i) is... Figure 2 Example Ifixed 213, (ii) is the ramp current corresponding to example adjusted Vramp 209 (e.g., output by example ramp current source 210), and (B) is... Figure 2 The differential amplifier output current (e.g., output by example differential amplifier output current source 204). Example clock 110 pulses when example Vcmp 214 becomes greater than example Vref 218. As described above, this pulse causes the example adjusted Vramp 209 to decrease rapidly, resulting in a similar decrease in example Vcmp 214.

[0070] exist Figure 11 At example t1 1102, example voltage regulator 100 enters a transient state, causing example Vcore 146 to decrease and example Vdroop 108 (which corresponds to example Vcore 146) to increase. The increase in example Vdroop 108 causes example dVdroop / dt 314 to increase rapidly. Because example dVdroop / dt 314 is added to example adjusted Vramp 209, the slope (e.g., rate of change) of example adjusted Vramp 209 increases to a second rate (e.g., transient rate), which causes the rising slope of example Vcmp 214 voltage to also increase. The increasing slope of example Vcmp 214 voltage causes example Vcmp 214 voltage to rise faster than example Vref 218, resulting in the pulses of example clock 110 being at a faster rate than in steady state (e.g., before example t1 1102), thereby increasing the duty cycle.

[0071] exist Figure 11At example t2 1104, example Vcore 146 and example Vdroop 108 become substantially stable, causing example voltage regulator 100 to return to steady state. Because example Vdroop 108 is stable, example dVdroop / dt314 returns to zero, causing the slope of example adjusted Vramp 209 to return to the steady-state rate. The slower steady-state rate reduces the rate of example Vcmp 214 voltage, resulting in pulses occurring at a lower frequency (e.g., slowing down the duty cycle of example voltage regulator 100).

[0072] Figure 12 An example conventional response 1200 of a voltage regulator using conventional techniques (e.g., a fixed ramp modulator) is shown compared with that using... Figure 1 , Figure 2 and Figure 3 Example of a variable ramp modulator 102 Figure 1 A comparison of example response 1202 of example voltage regulator 100. Example conventional response 1200 includes example conventional Vdroop 1203, example conventional Visum 1204, example conventional Vramp 1206, example conventional clock 1208, and example conventional Vcore 1210. Example variable ramp modulator response 1202 includes... Figure 2 Examples include Visum 104, Vdroop 108, the modified Vramp 209, and the clock 110. Figure 3 Example dVdroop / dt 314 (e.g., Figure 2 (Example output of differentiator 206). Figure 12 The example comparison includes example transient 1212.

[0073] like Figure 12 As shown in the example comparison, example Vdroop 1203 and example Vdroop 108 are identical, and example Visum 1204 and example Visum 104 are identical. Example Vramp 1206 of the conventional response 1200 has a constant rate of increase, resulting in example clock 1208 slightly increasing the pulse frequency (e.g., duty cycle). However, this rate of increase only occurs approximately one-third of the way through example transient 1212. Conversely, because example dVdroop / dt 314 is added to example Vdroop 108, the rate of example adjusted Vramp 209 increases significantly once transient 1212 begins. Therefore, the pulse frequency of example clock 110 increases significantly once example transient 1212 begins. Increasing the frequency of example clock 110 at the beginning of example transient 1212 will significantly reduce... Figure 1The example Vcore 146 improves transient response by reducing its undershoot. For example, as shown in the comparison between the example conventional Vcore 1210 and the example Vcore 146, the example Vcore 146 has 15 mV less undershoot than the example conventional Vcore 1210 (e.g., the example conventional Vcore 1210 has a undershoot of 20 mV, while the example Vcore 146 has a undershoot of 5 mV).

[0074] Figure 13 It is capable of execution Figures 7 to 10 Instructions to be implemented Figure 1 , Figure 2 , Figure 3 and / or Figure 4 The example modulator 102 is a block diagram of an example processor platform 1300. For example, processor platform 1300 may be a server, a personal computer, a mobile device (e.g., a mobile phone, a smartphone, or an iPad). TM Tablet computers, personal digital assistants (PDAs), internet devices, or any other type of computing device.

[0075] The processor platform 1300 in this example includes a processor 1312. The processor 1312 in this example is hardware. For example, the processor 1312 can be implemented by an integrated circuit, logic circuit, microprocessor, or controller from any desired family or manufacturer.

[0076] The processor 1312 in this example includes local memory 1313 (e.g., cache). Figure 13 Example processor 1312 execution Figures 7 to 10 Instructions to be implemented Figures 2 to 6 The example includes a differential amplifier 202, an example current source 204, an example differentiator 206, an example adder 207, an example amplifier 208, an example current source 210, an example current source 212, an example comparator 220, an example adder 400, and / or an example inverting differentiator 502, thereby implementing example modulator 102, example modulator 500, and / or example modulator 600. The processor 1312 of this example communicates via bus 1318 with main memory including volatile memory 1314 and non-volatile memory 1316. Volatile memory 1314 may be implemented by synchronous dynamic random access memory (SDRAM), dynamic random access memory (DRAM), RAMBUS dynamic random access memory (RDRAM), and / or any other type of random access memory device. Non-volatile memory 1316 may be implemented by flash memory and / or any other desired type of memory device. Access to main memory 1314, 1316 is controlled by a clock controller.

[0077] The processor platform 1300 in this example also includes interface circuitry 1320. Interface circuitry 1320 can be implemented using any type of interface standard, such as an Ethernet interface, a Universal Serial Bus (USB) interface, and / or a PCI Express interface.

[0078] In this example, one or more input devices 1322 are connected to interface circuitry 1320. The input devices 1322 allow the user to input data and commands into processor 1312. For example, the input devices may be implemented as sensors, microphones, cameras (still or video), keyboards, buttons, mice, touchscreens, trackpads, trackballs, isopoint devices, and / or voice recognition systems.

[0079] One or more output devices 1324 are also connected to the interface circuitry 1320 of this example. For example, the output device 1324 may be implemented by a display device (e.g., a light-emitting diode (LED), an organic light-emitting diode (OLED), a liquid crystal display, a cathode ray tube display (CRT), a touch screen, a haptic output device, and / or a speaker). Therefore, the interface circuitry 1320 of this example typically includes a graphics driver card, a graphics driver chip, or a graphics driver processor.

[0080] The interface circuitry 1320 in this example also includes communication devices, such as transmitters, receivers, transceivers, modems, and / or network interface cards, to facilitate the exchange of data with external machines (e.g., any type of computing device) via a network 1326 (e.g., an Ethernet connection, digital subscriber line (DSL), telephone line, coaxial cable, cellular telephone system, etc.).

[0081] The processor platform 1300 in this example also includes one or more mass storage devices 1328 for storing software and / or data. Examples of such mass storage devices 1328 include floppy disk drives, hard disk drives, high-density disc (CD) drives, Blu-ray disc drives, RAID systems, and digital universal disc (DVD) drives.

[0082] Figures 7 to 10 The encoded instructions 1332 can be stored in a mass storage device 1328, a volatile memory 1314, a non-volatile memory 1316, and / or on a removable tangible computer-readable storage medium (such as a CD or DVD).

[0083] Based on the foregoing, the methods, apparatus, and articles described above improve the transient response of multiphase voltage regulators while reducing jitter. The examples described herein calculate the derivative of the droop voltage (corresponding to the voltage regulator's output) to determine when a transient occurs. In some examples described herein, the derivative of the droop voltage is added to the ramp voltage to increase the slope of the ramp voltage (e.g., generating a variable ramp voltage). As described herein, increasing the slope of the ramp voltage increases the voltage regulator's duty cycle during the transient, which provides a faster, more efficient (e.g., lower undershoot) transient response in the voltage regulator. In some examples described herein, the derivative of the droop voltage is added to the droop voltage to increase the voltage regulator's duty cycle during the transient. Using the examples described herein, undershoot and / or overshoot can be quickly detected and corrected accordingly by increasing the duty cycle. Moreover, the examples described herein eliminate the need for a threshold for detecting undershoot, reducing the cost and complexity of multiphase voltage regulators. Furthermore, the examples described herein affect transients without affecting the steady state of the voltage regulator. Therefore, the examples described herein do not affect the small-signal characteristics of the voltage regulator and / or COTCM control.

[0084] Some conventional techniques generate a fixed ramp voltage to reduce jitter. However, such conventional techniques have a slow transient response and a large undershoot that affects the performance of the voltage regulator. The example described herein mitigates such problems by increasing the voltage (e.g., ramp voltage or droop voltage) during transients to increase the speed of the transient response and reduce the undershoot of the voltage regulator while still reducing jitter.

[0085] Modifications may be made to the described embodiments, and other embodiments are also possible within the scope of the claims.

Claims

1. A circuit for a voltage regulator, comprising: A differentiator, configured to provide a derivative of a voltage corresponding to the output voltage of the voltage regulator; as well as A comparator, coupled to the differentiator and configured to output a voltage pulse by comparing a second voltage with a first reference voltage, the second voltage corresponding to a combination of: a first voltage corresponding to the inductor current in the voltage regulator, a droop voltage corresponding to the output voltage of the voltage regulator, a ramp voltage, and the derivative of one of the voltages.

2. The circuit of claim 1, wherein the voltage regulator is a multiphase voltage regulator, and the first voltage corresponds to the sum of the inductor currents in the multiphase voltage regulator.

3. The circuit of claim 1, wherein one of the voltages is the droop voltage, and the droop voltage is the difference between the second reference voltage and the output voltage.

4. The circuit of claim 3, further comprising: A first amplifier is configured to output a first control voltage based on the difference between the first voltage and the droop voltage; as well as An adder, coupled to the differentiator, is configured to generate an adjusted ramp voltage based on a combination of the derivative of the droop voltage and the ramp voltage, wherein the second voltage corresponds to the combination of the first control voltage and the adjusted ramp voltage.

5. The circuit of claim 4, further comprising a ramp generator coupled between the output of the comparator and the adder, and the ramp generator being configured to generate the ramp voltage based on the voltage pulse, wherein the ramp generator is configured to be reset in response to the voltage pulse.

6. The circuit of claim 4, further comprising a second amplifier coupled between the adder and the comparator, the second amplifier being configured to output a second control voltage by amplifying the adjusted ramp voltage, wherein the comparator is configured to output the voltage pulse in response to the second voltage being greater than the first reference voltage.

7. The circuit of claim 6, wherein the differentiator includes a differentiator amplifier configured to receive the droop voltage and a third amplifier coupled to the output of the differentiator amplifier.

8. The circuit of claim 3, further comprising: An adder coupled to the differentiator and configured to output a combination of the droop voltage and the derivative of the droop voltage; A first amplifier, coupled between the adder and the comparator, is configured to output a first control voltage based on the difference between the first voltage and the combination of the droop voltage and the derivative of the droop voltage; as well as A second amplifier, coupled to the comparator, is configured to output a second control voltage by amplifying the ramp voltage.

9. The circuit of claim 8, further comprising a ramp generator coupled between the output of the comparator and the second amplifier, and the ramp generator being configured to generate the ramp voltage based on the voltage pulse, wherein the ramp generator is configured to be reset in response to the voltage pulse.

10. The circuit of claim 8, wherein the comparator is coupled to the output of the first amplifier and the output of the second amplifier, and wherein the comparator is configured to output the voltage pulse in response to the second voltage being greater than the first reference voltage.

11. The circuit of claim 1, wherein the voltage is the output voltage of the voltage regulator, and the differentiator is an inverting differentiator configured to provide the inverting derivative of the output voltage.

12. The circuit of claim 11, further comprising: A first amplifier is configured to output a first control voltage based on the difference between the first voltage and the droop voltage; as well as An adder, coupled between the differentiator and the comparator, is configured to generate an adjusted ramp voltage based on a combination of the inverting derivative of the output voltage and the ramp voltage, wherein the second voltage corresponds to a combination of the first control voltage and the adjusted ramp voltage.

13. The circuit of claim 12, further comprising a ramp generator coupled between the output of the comparator and the adder, and the ramp generator being configured to generate the ramp voltage based on the voltage pulse, wherein the ramp generator is configured to be reset in response to the voltage pulse.

14. The circuit of claim 12, further comprising a second amplifier coupled between the adder and the comparator, the second amplifier being configured to output a second control voltage by amplifying the adjusted ramp voltage, wherein the comparator is configured to output the voltage pulse in response to the second voltage being greater than the first reference voltage.

15. The circuit of claim 11, further comprising: An adder coupled to the inverting differentiator and configured to output a combination of the inverting derivative of the output voltage and the droop voltage; A first amplifier, coupled to the adder and configured to output a first control voltage based on the difference between the combination of the inverting derivative of the first voltage and the output voltage and the droop voltage; as well as A second amplifier, coupled to the comparator, is configured to output a second control voltage by amplifying the ramp voltage.

16. The circuit of claim 15, further comprising a ramp generator coupled between the output of the comparator and the second amplifier, and the ramp generator being configured to generate the ramp voltage based on the voltage pulse, wherein the ramp generator is configured to be reset in response to the voltage pulse.

17. The circuit of claim 15, wherein the comparator is coupled to the output of the first amplifier and the output of the second amplifier, and wherein the comparator is configured to output the voltage pulse in response to the second voltage being greater than the first reference voltage.

18. The circuit of claim 6 or 14, further comprising: A first current source is coupled to the first amplifier and configured to output a first current corresponding to the first control voltage; as well as A second current source is coupled to the adder and configured to output a second current corresponding to the second control voltage; as well as A third current source is configured to output a fixed current, and the second voltage corresponds to a combination of the first current, the second current, and the fixed current.

19. The circuit of claim 18, wherein, When the voltage regulator is in steady state, the output of the differentiator is zero, and the adjusted ramp voltage is the same as the ramp voltage.

20. The circuit of claim 18, wherein increasing the ramp voltage increases the frequency of the voltage pulse output by the comparator.

21. The circuit of claim 20, wherein the frequency of the voltage pulse output by the comparator corresponds to the duty cycle of the operation of the voltage regulator.

22. The circuit of claim 18, wherein, When the voltage regulator is in a transient state, the first rate of increase of the ramp voltage is greater than the second rate of increase of the adjusted ramp voltage.

23. The circuit of claim 2, wherein the voltage pulse is provided to at least one of the first or second phases of the multiphase voltage regulator.

24. The circuit of claim 10 or 17, further comprising: A first current source is coupled to the first amplifier and configured to output a first current corresponding to the first control voltage; as well as A second current source is coupled to the adder and configured to output a second current corresponding to the second control voltage; as well as A third current source is configured to output a fixed current, and the second voltage corresponds to a combination of the first current, the second current, and the fixed current.

25. A voltage regulator comprising: The first switch is coupled between the input terminal and the switch terminal; as well as The circuit according to any one of claims 1-17 and 23, wherein the first switch is controlled based on the voltage pulse.

26. An electronic system comprising the voltage regulator as claimed in claim 25.

27. An electronic system comprising: A voltage regulator, comprising a first switch coupled between an input terminal and a switching terminal; Memory, configured to store instructions; as well as A processor, coupled to the memory and the first switch, is configured to read and execute the instructions, wherein the instructions are configured to cause the processor, when executed, to: Generate the derivative of a voltage corresponding to the output voltage of the voltage regulator; The second voltage is generated based on a combination of the following: a first voltage corresponding to the inductor current in the voltage regulator, a droop voltage corresponding to the output voltage of the voltage regulator, a ramp voltage, and the derivative of the voltage; and A voltage pulse is generated by comparing the second voltage with a first reference voltage, wherein the first switch is controlled based on the voltage pulse.

28. The electronic system of claim 27, wherein the voltage regulator is a multiphase voltage regulator, and the first voltage corresponds to the sum of the inductor currents in the multiphase voltage regulator.

29. The electronic system of claim 27, wherein the voltage is the droop voltage, and the droop voltage is the difference between the second reference voltage and the output voltage.

30. The electronic system of claim 29, wherein the instructions are further configured to, when executed, cause the processor to: A first control voltage is generated based on the difference between the first voltage and the drooping voltage; and An adjusted ramp voltage is generated based on the derivative of the droop voltage and the combination of the ramp voltage, wherein the second voltage corresponds to the combination of the first control voltage and the adjusted ramp voltage.

31. The electronic system of claim 30, further comprising a ramp generator coupled to the processor, and the ramp generator being configured to generate the ramp voltage based on the voltage pulse, wherein the ramp generator is configured to be reset in response to the voltage pulse.

32. The electronic system of claim 30, wherein the instructions are further configured to, when executed, cause the processor to: A second control voltage is generated by amplifying the adjusted ramp voltage, and The voltage pulse is generated in response to the second voltage being greater than the first reference voltage.

33. The electronic system of claim 29, wherein the instructions are further configured to, when executed, cause the processor to: Generate a combination of the droop voltage and the derivative of the droop voltage; A first control voltage is generated based on the difference between the first voltage and the combination of the droop voltage and its derivative; and A second control voltage is generated by amplifying the ramp voltage.

34. The electronic system of claim 33, further comprising a ramp generator coupled to the processor, and the ramp generator being configured to generate the ramp voltage based on the voltage pulse, wherein the ramp generator is configured to be reset in response to the voltage pulse.

35. The electronic system of claim 33, wherein the instructions are further configured, when executed, to cause the processor to generate the voltage pulse in response to the second voltage being greater than the first reference voltage.

36. The electronic system of claim 27, wherein the voltage is the output voltage of the voltage regulator, and the instruction is further configured to, when executed, cause the processor to generate the inverted derivative of the output voltage.

37. The electronic system of claim 36, wherein the instructions are further configured to, when executed, cause the processor to: A first control voltage is generated based on the difference between the first voltage and the drooping voltage; and An adjusted ramp voltage is generated based on the combination of the inverting derivative of the output voltage and the ramp voltage, wherein the second voltage corresponds to the combination of the first control voltage and the adjusted ramp voltage.

38. The electronic system of claim 37, further comprising a ramp generator coupled to the processor, and the ramp generator being configured to generate the ramp voltage based on the voltage pulse, wherein the ramp generator is configured to be reset in response to the voltage pulse.

39. The electronic system of claim 37, wherein the instructions are further configured to, when executed, cause the processor to: A second control voltage is generated by amplifying the adjusted ramp voltage, and The voltage pulse is output in response to the second voltage being greater than the first reference voltage.

40. The electronic system of claim 36, wherein the instructions are further configured to, when executed, cause the processor to: The combination of the inverting derivative and the droop voltage that generates the output voltage; A first control voltage is generated based on the difference between the combination of the inverting derivative of the first voltage and the output voltage and the droop voltage; and A second control voltage is generated by amplifying the ramp voltage.

41. The electronic system of claim 40, further comprising a ramp generator coupled to the processor, and the ramp generator being configured to generate the ramp voltage based on the voltage pulse, wherein the ramp generator is configured to be reset in response to the voltage pulse.

42. The electronic system of claim 40, wherein the instructions are further configured, when executed, to cause the processor to generate the voltage pulse in response to the second voltage being greater than the first reference voltage.

43. The electronic system of claim 28, wherein the voltage pulse is provided to at least one of the first or second phases of the multiphase voltage regulator.

44. A method for regulating the output voltage of a voltage regulator, comprising: Generate the derivative of a voltage corresponding to the output voltage of the voltage regulator; The second voltage is generated based on a combination of the following: a first voltage corresponding to the inductor current in the voltage regulator, a droop voltage corresponding to the output voltage of the voltage regulator, a ramp voltage, and the derivative of the voltage; and A voltage pulse is generated by comparing the second voltage with a first reference voltage, wherein a first switch of the voltage regulator is controlled based on the voltage pulse.

45. The method of claim 44, wherein the voltage regulator is a multiphase voltage regulator, and the first voltage corresponds to the sum of the inductor currents in the multiphase voltage regulator.

46. ​​The method of claim 44, wherein one of the voltages is the droop voltage, and the droop voltage is the difference between the second reference voltage and the output voltage.

47. The method of claim 46, further comprising: A first control voltage is generated based on the difference between the first voltage and the drooping voltage; and An adjusted ramp voltage is generated based on the derivative of the droop voltage and the combination of the ramp voltage, wherein the second voltage corresponds to the combination of the first control voltage and the adjusted ramp voltage.

48. The method of claim 47, further comprising resetting the ramp voltage in response to the voltage pulse.

49. The method of claim 47, further comprising: A second control voltage is generated by amplifying the adjusted ramp voltage, and The voltage pulse is generated in response to the second voltage being greater than the first reference voltage.

50. The method of claim 46, further comprising: Generate a combination of the droop voltage and the derivative of the droop voltage; A first control voltage is generated based on the difference between the first voltage and the combination of the droop voltage and its derivative; and A second control voltage is generated by amplifying the ramp voltage.

51. The method of claim 50, further comprising resetting the ramp voltage in response to the voltage pulse.

52. The method of claim 50, further comprising generating the voltage pulse in response to the second voltage being greater than the first reference voltage.

53. The method of claim 44, wherein the voltage is the output voltage of the voltage regulator, the method further comprising generating the inverting derivative of the output voltage.

54. The method of claim 53, further comprising: A first control voltage is generated based on the difference between the first voltage and the drooping voltage; and An adjusted ramp voltage is generated based on the combination of the inverting derivative of the output voltage and the ramp voltage, wherein the second voltage corresponds to the combination of the first control voltage and the adjusted ramp voltage.

55. The method of claim 54, further comprising resetting the ramp voltage in response to the voltage pulse.

56. The method of claim 54, further comprising: A second control voltage is generated by amplifying the adjusted ramp voltage, and The voltage pulse is generated in response to the second voltage being greater than the first reference voltage.

57. The method of claim 53, further comprising: The combination of the inverting derivative and the droop voltage that generates the output voltage; A first control voltage is generated based on the difference between the combination of the inverting derivative of the first voltage and the output voltage and the droop voltage; and A second control voltage is generated by amplifying the ramp voltage.

58. The method of claim 57, further comprising resetting the ramp voltage in response to the voltage pulse.

59. The method of claim 57, further comprising generating the voltage pulse in response to the second voltage being greater than the first reference voltage.

60. The method of claim 45, further comprising providing the voltage pulse to at least one of the first or second phases of the multiphase voltage regulator.

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