Arrayed waveguide grating dual-chip integrated packaging structure and manufacturing method thereof

Abstract

The application relates to the technical field of communication, and provides an array waveguide grating double-chip integrated packaging structure and a manufacturing method thereof.The array waveguide grating double-chip integrated packaging structure comprises a substrate plate, a first AWG chip, a second AWG chip, a driving element and a split surface c;the first AWG chip, the second AWG chip and the driving element are arranged on the substrate plate, wherein the relative positions of the first AWG chip and the second AWG chip on the substrate plate are transverse arrangement or longitudinal arrangement; the split surface c divides the whole formed by the substrate plate, the first AWG chip and the second AWG chip into a first part s1 and a second part s2; and the two ends of the driving element are respectively connected with the first part s1 and the second part s2.The application can not only efficiently realize bidirectional transmission of light, but also realize simultaneous compensation of two AWG chips by one driving element, and has the advantages of low application cost, high integration degree, short packaging time, high coupling efficiency and good optical path transmission consistency.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to an integrated dual-chip package structure of arrayed waveguide gratings and its manufacturing method. Background Technology

[0002] Arrayed waveguide gratings (AWGs) are important optical devices based on planar lightwave circuit (PLC) integration technology, and are the preferred technology in the rapidly developing dense wavelength division multiplexing (DWDM) networks.

[0003] With changing market demands and technological advancements, AWGs have begun to transition from heated to heatless types, meaning that AWGs do not require heating during operation and are thus called heatless AWGs (AAWG: Athermal Arrayed Waveguide Grating). AAWGs eliminate the need for complex temperature control circuits and heaters, reducing costs and enhancing device stability. As purely passive devices, they save energy in communication systems and have a wider range of applications.

[0004] Chinese invention patent applications CN200910245099.0 and CN201610741788.0 disclose a heatless arrayed waveguide grating wavelength division multiplexer (WDM). This arrayed waveguide grating chip includes an input optical waveguide, an input planar waveguide, an arrayed waveguide, an output planar waveguide, and an output optical waveguide. The arrayed waveguide grating chip of the heatless WDM is divided into two parts, a first part and a second part, with the dividing surface laterally passing through the input planar waveguide. A sliding assembly is provided on a substrate, with its two ends fixed to the first part and the second part, respectively. A telescopic rod is located in the middle of the sliding assembly, and the telescopic rod is made of a material with a linear thermal expansion coefficient greater than that of the substrate. When the temperature changes, the telescopic rod expands and contracts with the temperature change, causing displacement of the first part relative to the second part. This displacement also causes relative displacement between the two divided parts of the input planar waveguide, thereby compensating for the center wavelength of the heatless arrayed waveguide grating WDM.

[0005] With the widespread application of practical applications, existing technologies can no longer effectively meet the current requirements for bidirectional transmission of optical waves. In order for the telescopic rod to function, it usually needs to rely on other auxiliary structures (such as bow-shaped or spring structures) in addition to the telescopic rod itself. This not only fails to meet the compensation for the center wavelength of more than one thermally insulated array waveguide grating wavelength division multiplexer, but also leads to instability in the optical path.

[0006] Currently, optical wave transmission requires transmission in both wavelength division multiplexing (WDM) and wavelength combination multiplexing directions. In one scenario, two independent AWG chip-packaged devices can be used to transmit light waves in different directions. In another scenario, two independent devices in the C and C+ bands can be combined and packaged to achieve a wavelength division multiplexing device that halves the channel spacing and doubles the number of channels. Both scenarios require the simultaneous use of two AWG chip modules. When connecting to optical fibers, this necessitates multiple couplings, involves complex manufacturing processes, occupies a large area, and results in high cost and low efficiency in practical applications.

[0007] Therefore, overcoming the shortcomings of the existing technology is an urgent problem to be solved in this technical field. Summary of the Invention

[0008] In view of the shortcomings of the prior art, the technical problem to be solved by the present invention is:

[0009] This invention provides an integrated packaging structure for dual-chip array waveguide gratings and its manufacturing method to solve the technical problems of complex process steps, low coupling efficiency, long packaging time, low integration, high cost, inability to simultaneously compensate two AWG chips with one driver, and unstable optical waves in the process of realizing bidirectional optical wave transmission using traditional methods.

[0010] The present invention achieves the above objectives by adopting the following technical solution:

[0011] In a first aspect, the present invention provides an integrated packaging structure for dual-chip arrayed waveguide gratings, comprising a substrate 0, a first AWG chip 1, a second AWG chip 2, a driver 3, and a partition surface c;

[0012] The first AWG chip 1, the second AWG chip 2, and the driving component 3 are disposed on the substrate 0; wherein the relative positions of the first AWG chip 1 and the second AWG chip 2 on the substrate 0 are arranged horizontally or vertically, such that the input ports or output ports of the first AWG chip 1 and the second AWG chip 2 can be separated by the dividing surface c.

[0013] The dividing surface c divides the whole consisting of the substrate 0, the first AWG chip 1 and the second AWG chip 2 into a first part s1 and a second part s2.

[0014] The driving component 3 is connected to the first part s1 and the second part s2 at both ends. The driving component 3 achieves simultaneous compensation of the first AWG chip 1 and the second AWG chip 2 by controlling the relative displacement of the first part s1 and the second part s2.

[0015] Preferably, the first AWG chip 1 includes, in sequence, a first input optical waveguide 11, a first input planar waveguide 12, a first array waveguide 13, a first output planar waveguide 14, and a first output optical waveguide 15, according to the optical wave transmission direction; the second AWG chip 2 includes, in sequence, a second input optical waveguide 21, a second input planar waveguide 22, a second array waveguide 23, a second output planar waveguide 24, and a second output optical waveguide 25, according to the optical wave transmission direction.

[0016] Preferably, the dividing surface c simultaneously divides the first input planar waveguide 12 and the second input planar waveguide 22, or the dividing surface c simultaneously divides the first output planar waveguide 14 and the second output planar waveguide 24.

[0017] Preferably, when the dividing surface c simultaneously divides the first input planar waveguide 12 and the second input planar waveguide 22, the optical axis z1 of the first input planar waveguide 12 and the optical axis z2 of the second input planar waveguide 22 are parallel; or, when the dividing surface c simultaneously divides the first output planar waveguide 14 and the second output planar waveguide 24, the optical axis w1 of the first output planar waveguide 14 and the optical axis w2 of the second output planar waveguide 24 are parallel.

[0018] Preferably, the driving component 3 includes a first fixed end 31, a second fixed end 32, and a driving rod 33. The first fixed end 31 and the second fixed end 32 are disposed at both ends of the driving rod 33 and are fixedly connected to the driving rod 33. The driving rod 33 is used to change its length under temperature changes, thereby achieving simultaneous compensation for the first AWG chip 1 and the second AWG chip 2.

[0019] Preferably, the coefficient of thermal expansion of the drive rod 33 differs from the coefficients of thermal expansion of the first AWG chip 1 and the second AWG chip 2 by a preset parameter value.

[0020] Preferably, it further includes a substrate s3 disposed under the substrate 0. When the first part s1 is fixed to the substrate s3, the two ends of the driving member 3 are respectively connected to the second part s2 and the substrate s3. Alternatively, when the second part s2 is fixed to the substrate s3, the two ends of the driving member 3 are respectively connected to the first part s1 and the substrate s3.

[0021] Preferably, it further includes a refractive index matching agent 4, which is filled between the first input planar waveguide 12 and the second input planar waveguide 22, or the refractive index matching agent 4 is filled between the first output planar waveguide 14 and the second output planar waveguide 24.

[0022] Preferably, it further includes a first fiber array 5 and a second fiber array 6, wherein the first fiber array 5 is coupled to the first input optical waveguide 11 and the second output optical waveguide 25, and the second fiber array 6 is coupled to the first output optical waveguide 15 and the second input optical waveguide 21.

[0023] Secondly, the present invention provides a method for manufacturing a dual-chip integrated package structure of an arrayed waveguide grating, comprising the following steps:

[0024] The relative positions of the first AWG chip 1 and the second AWG chip 2 on the substrate 0 are arranged horizontally or vertically, so that the input ports or output ports of the first AWG chip 1 and the second AWG chip 2 can be divided by the dividing surface c.

[0025] The substrate 0, the first AWG chip 1 and the second AWG chip 2 are divided into a first part s1 and a second part s2 by the dividing surface c.

[0026] The first part s1 and the second part s2 are connected to the two ends of the driving component 3 respectively, so that the driving component 3 can simultaneously compensate the first AWG chip 1 and the second AWG chip 2 by controlling the relative displacement of the first part s1 and the second part s2.

[0027] The refractive index matching agent 4 is filled between the first input planar waveguide 12 and the second input planar waveguide 22, or the refractive index matching agent 4 is filled between the first output planar waveguide 14 and the second output planar waveguide 24.

[0028] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:

[0029] This invention adopts a dual-chip integrated packaging structure and layout, which achieves efficient bidirectional transmission of light waves while simplifying the process steps, shortening the packaging time, increasing the integration level, and reducing the cost. Without relying on other auxiliary structures, it achieves simultaneous compensation for two AWG chips, resulting in accurate, stable, and consistent light wave transmission.

[0030] Furthermore, the present invention also provides a modified substrate mounting structure, which allows for flexible expansion of the substrate mounting method when the effective area of ​​the substrate is insufficient or the driving component is not convenient to be fully mounted on the substrate.

[0031] Furthermore, the present invention also provides a method for filling a refractive index matching agent between an input planar waveguide or an output planar waveguide, thereby minimizing optical wave transmission loss by selecting a suitable refractive index matching agent.

[0032] Furthermore, the present invention also provides a method for improving coupling efficiency. Under the dual-chip integrated packaging structure provided by the present invention, when coupled to an optical fiber array, the number of coupling operations in the prior art can be effectively reduced, thereby improving coupling efficiency. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be described in detail below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is the first chip layout diagram provided in the embodiments of the present invention;

[0035] Figure 2 This is a schematic diagram of the first structure under the first chip arrangement provided in the embodiments of the present invention;

[0036] Figure 3 This is a schematic diagram of the second structure under the first chip arrangement provided in the embodiments of the present invention;

[0037] Figure 4 This is a schematic diagram illustrating the working principle of the present invention;

[0038] Figure 5 This is a schematic diagram of the first type of driving component structure provided in an embodiment of the present invention;

[0039] Figure 6 This is a schematic diagram of the second type of driving component structure provided in an embodiment of the present invention;

[0040] Figure 7 This is a schematic diagram of the structure of the second type of drive component during installation according to an embodiment of the present invention;

[0041] Figure 8 This is a schematic diagram of the first structure heating under the first chip arrangement provided in the embodiment of the present invention;

[0042] Figure 9 This is a schematic diagram of the first structure cooling under the first chip arrangement provided in the embodiments of the present invention;

[0043] Figure 10 This is the second chip layout diagram provided in the embodiments of the present invention;

[0044] Figure 11 This is a schematic diagram of a structure under the second chip arrangement provided in the embodiment of the present invention;

[0045] Figure 12This is a schematic diagram of the temperature rise structure under the second chip arrangement provided in the embodiment of the present invention;

[0046] Figure 13 This is a schematic diagram of a structure cooling under the second chip arrangement provided in the embodiments of the present invention;

[0047] Figure 14 This is the third chip layout diagram provided in the embodiments of the present invention;

[0048] Figure 15 This is a schematic diagram of a modified substrate provided in an embodiment of the present invention;

[0049] Figure 16 This is a schematic diagram of the position of a refractive index matching agent provided in an embodiment of the present invention;

[0050] Figure 17 This is a schematic diagram of fiber array coupling under the first chip arrangement provided in the embodiment of the present invention;

[0051] Figure 18 This is a schematic diagram of fiber array coupling under the second chip arrangement provided in the embodiment of the present invention;

[0052] Figure 19 This is a schematic diagram of fiber array coupling under the third chip arrangement provided in the embodiments of the present invention;

[0053] Figure 20 This is a flowchart of a manufacturing method for a dual-chip integrated packaging structure provided by an embodiment of the present invention. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0055] In the description of this invention, the terms "inner", "outer", "longitudinal", "lateral", "upper", "lower", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and do not require that this invention must be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0056] Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0057] Example 1:

[0058] To address the technical problems of complex process steps, long packaging time, low integration, high cost, unstable light waves, and inability to simultaneously compensate two AWG chips with a single driver in traditional methods for bidirectional optical wave transmission, this invention provides an integrated dual-chip package structure for arrayed waveguide gratings, such as... Figure 2 As shown, it includes a substrate 0, a first AWG chip 1, a second AWG chip 2, a driver 3, and a partition surface c; further, in order to achieve bidirectional light transmission, the first AWG chip 1 includes, in sequence according to the light wave transmission direction, a first input optical waveguide 11, a first input planar waveguide 12, a first array waveguide 13, a first output planar waveguide 14, and a first output optical waveguide 15; the second AWG chip 2 includes, in sequence according to the light wave transmission direction, a second input optical waveguide 21, a second input planar waveguide 22, a second array waveguide 23, a second output planar waveguide 24, and a second output optical waveguide 25.

[0059] The first AWG chip 1, the second AWG chip 2, and the driving component 3 are disposed on the substrate 0; wherein, the relative positions of the first AWG chip 1 and the second AWG chip 2 on the substrate 0 are arranged horizontally or vertically, such that the input ports or output ports of both the first AWG chip 1 and the second AWG chip 2 can be separated by the dividing surface c; wherein, the vertical arrangement, such as... Figures 1-3 , Figures 7-9 and Figure 17 As shown, the first input planar waveguide 12 and the second input planar waveguide 22 are arranged opposite to each other, and the first output planar waveguide 14 and the second output planar waveguide 24 are arranged opposite to each other; the lateral arrangement is as follows: Figures 10-13 , Figures 15-16 and Figure 18 As shown, this means that the first input planar waveguide 12 and the second input planar waveguide 22 are disposed opposite each other at the same end, and the first output planar waveguide 14 and the second input output waveguide 24 are disposed at the other end, or, as... Figure 14 and Figure 19As shown, the first output planar waveguide 14 and the second input planar waveguide 24 are disposed opposite each other at the same end, and the first input planar waveguide 12 and the second input planar waveguide 22 are disposed opposite each other at the other end; further, the dividing surface c simultaneously divides the first input planar waveguide 12 and the second input planar waveguide 22, or the dividing surface c simultaneously divides the first output planar waveguide 14 and the second output planar waveguide 24. The reason why the dividing surface c simultaneously divides the input ports or output ports of both the first AWG chip 1 and the second AWG chip 2 is to achieve bidirectional symmetrical transmission of optical waves and to facilitate simultaneous compensation of the first AWG chip 1 and the second AWG chip 2; preferably, the dividing surface c simultaneously divides When the first input planar waveguide 12 and the second input planar waveguide 22 are used, the optical axis z1 of the first input planar waveguide 12 and the optical axis z2 of the second input planar waveguide 22 are parallel. Alternatively, when the dividing surface c simultaneously divides the first output planar waveguide 14 and the second output planar waveguide 24, the optical axis w1 of the first output planar waveguide 14 and the optical axis w2 of the second output planar waveguide 24 are parallel. The reason why it is preferred that the optical axes z1 and z2 are parallel, or that the optical axes w1 and w2 are parallel, is that after the first AWG chip 1 and the second AWG chip 2 are simultaneously divided by the dividing surface c, the light wave loss tends to be consistent, and the compensation amplitude also tends to be consistent, thereby improving the stability of bidirectional light wave transmission.

[0060] The dividing surface c divides the whole consisting of the substrate 0, the first AWG chip 1 and the second AWG chip 2 into a first part s1 and a second part s2.

[0061] As a typical implementation structure, in order to enable the first AWG chip 1 and the second AWG chip 2 to achieve simultaneous compensation by simultaneously driving the first part s1 or the second part s2, there is also a solution using a temperature-dependent driving component 3. Furthermore, to ensure the operational stability of the driving component 3, fixed ends are typically provided at both ends. Specifically, for example... Figures 5-6 As shown, the driving component 3 includes a first fixed end 31, a second fixed end 32, and a driving rod 33. The first fixed end 31 and the second fixed end 32 are disposed at both ends of the driving rod 33 and are fixedly connected to the driving rod 33. Figures 2-3 As shown, this represents two connection methods between the driving component 3 and the first part s1 and the second part s2, respectively. The driving rod 33 is used to change its length under temperature variations, thereby achieving simultaneous compensation for the first AWG chip 1 and the second AWG chip 2. It should be noted that... Figure 5 and Figure 6 These represent two different types of drive components 3, such as... Figure 5 As shown, the second fixed end 32 is disposed on the right side of the drive rod 33 and is fixed to the drive rod 33 on both sides; as Figure 6 As shown, the second fixed end 32 is disposed on the right side of the drive rod 33 and is fixed vertically to the drive rod 33.

[0062] To enhance understanding of the simultaneous compensation of the first AWG chip 1 and the second AWG chip 2, the following will combine... Figure 4 As shown, the working principle of how compensation is implemented in this embodiment is explained in detail.

[0063] The correlation between wavelength and temperature of the first AWG chip 1 and the second AWG chip 2 is related to the material properties. Typically, in the 1550nm band, the wavelength-temperature coefficient is 0.011nm / ℃, meaning that for every degree the temperature increases, the wavelength shifts 11pm towards longer wavelengths, and for every degree the temperature decreases, the wavelength shifts 11pm towards shorter wavelengths.

[0064] From the grating equation, n s ·d·Sinθ+n c ·=m·λ Formula 1;

[0065] Where d is the spacing between adjacent arrayed waveguides on the Rowland circle, and n s n is the effective refractive index of the planar waveguide (including the first input planar waveguide 12, the second input planar waveguide 22, the first output planar waveguide 14, and the second output planar waveguide 24). c ΔL is the effective refractive index of the arrayed waveguides (including the first arrayed waveguide 13 and the second arrayed waveguide 23), ΔL is the length difference between adjacent arrayed waveguides, m is the diffraction order, and λ is the wavelength. When the diffraction angle θ = 0, as shown... Figure 4 As shown, the focal point of the array waveguides of the first AWG chip 1 and the second AWG chip 2 is O(O'), and the center wavelength is λ0. Considering only the center input (output), when the diffraction angle θ = θ1, the focal point of the array waveguides of the first AWG chip 1 and the second AWG chip 2 deviates to point P(P'). The distance from point O(O') to P(P') in the X direction is x. Then x has the following relationship with λ:

[0066]

[0067] n g d is the refractive index of the array waveguide group, d is the spacing between adjacent array waveguides on the Rowland circle, R is the focal length of the Rowland circle, and dλ is the center wavelength variation value of the first AWG chip 1 and the second AWG chip 2.

[0068] As can be seen from the formula, the wavelength in the output array waveguide can be compensated by changing the position of the input or output array waveguide.

[0069] In the case of thermal expansion and contraction, in order to ensure that the deformation of the drive rod 33 is greater than that of the first AWG chip 1 and the second AWG chip 2, and that the range of deformation is controllable, the thermal expansion coefficient of the drive rod 33 differs from that of the first AWG chip 1 and the second AWG chip 2 by a preset parameter value. The drive rod 33 is made of, but is not limited to, metal or non-metal. A preferred solution is that the drive rod 33 is made of a material with a high expansion coefficient, such as aluminum or copper. At the same time, it is also required that the thermal expansion coefficients of the first fixed end 31 and the second fixed end 32 are the same as those of the first AWG chip 1 and the second AWG chip 2. A preferred solution is that the first fixed end 31 and the second fixed end 32 are made of a material with an expansion coefficient close to that of the first AWG chip 1 and the second AWG chip 2, such as quartz or glass, so that the relative displacement distance generated by the first fixed end 31 and the second fixed end 32 is equal in the case of thermal expansion and contraction, thereby reducing the transmission loss of light waves and improving the compensation efficiency.

[0070] Ignoring the dimensional changes of the base during temperature variations, and considering only the expansion of the drive rod, whose length is D, the change in length during temperature changes is ΔD, which satisfies the following formula:

[0071]

[0072] ΔD=dx Formula 4;

[0073] ΔD = ΔT·β·D (Formula 5)

[0074] For example, the change in wavelength of silicon dioxide AWG chips with temperature The typical value is 0.011 nm / ℃; ignoring the thermal expansion of the chip itself, the thermal expansion coefficient of the drive rod 33 is β, and ΔT is the temperature change value. The length D of the drive rod can be determined by formulas 3 / 4 / 5.

[0075] like Figure 7 As shown, the dividing surface c divides the first input planar waveguide 12 of the first AWG chip 1 into two parts, a1 and b1. At the same time, the dividing surface c divides the second input planar waveguide 22 of the second AWG chip 2 into two parts, a2 and b2.

[0076] like Figure 8As shown, when the temperature rises, the driving rod 33 extends to a length of D′ because its thermal expansion coefficient is greater than that of the first AWG chip 1 and the second AWG chip 2. This extension causes relative movement between the second part s2 connected to the first fixed end 31 and the first part s1 connected to the second fixed end 32. Specifically, from an overall perspective, the direction of movement of a1 relative to b1 of the first input planar waveguide 12 of the first AWG chip 1 is shown by the arrow. Simultaneously, the direction of movement of b2 relative to a2 of the second input planar waveguide 22 of the second AWG chip 2 is also shown by the arrow. This results in relative movement between the first AWG chip 1 and the second AWG chip 2, allowing the driving rod 3 to simultaneously compensate for wavelength changes in both the first AWG chip 1 and the second AWG chip 2 caused by temperature variations.

[0077] like Figure 9 As shown, when the temperature decreases, the driving rod 33 shortens to a length of D' because its thermal expansion coefficient is greater than that of the first AWG chip 1 and the second AWG chip 2. This shortening of the driving rod 33 causes relative movement between the second part s2 connected to the first fixed end 31 and the first part s1 connected to the second fixed end 32. Specifically, from an overall perspective, the direction of movement of a1 relative to b1 of the first input planar waveguide 12 of the first AWG chip 1 is as shown by the arrow. Simultaneously, the direction of movement of b2 relative to a2 of the second input planar waveguide 22 of the second AWG chip 2 is as shown by the arrow. This results in relative movement between the first AWG chip 1 and the second AWG chip 2, allowing the driving rod 3 to simultaneously compensate for the wavelength changes of the first AWG chip 1 and the second AWG chip 2 caused by temperature variations.

[0078] It should be noted that, in this embodiment, the example is given as follows: Figure 2 The shown dividing surface c simultaneously divides the first input planar waveguide 12 and the second input planar waveguide 22, and is used in combination as follows: Figure 5 The driving element 3 of the structure shown will be used for illustration. Obviously, those skilled in the art will find it easier to understand using a driving element 3 with the structure shown. Figure 3 The shown dividing plane c simultaneously divides the first output planar waveguide 14 and the second output planar waveguide 24, and is used in combination as follows: Figure 6 The driving component 3 shown in the diagram, or any combination thereof, can achieve the same technical solution and effects as described in this embodiment without requiring any creative effort. Other related combinations based on the same principles and connection methods will not be elaborated upon in this embodiment.

[0079] The integrated packaging structure of dual-chip array waveguide grating provided by this invention enables efficient bidirectional transmission of light waves, with simple overall process steps, short packaging time, high integration and low cost. In addition, without relying on other auxiliary structures, it can also achieve simultaneous compensation of two AWG chips, making the light wave transmission accurate, stable and consistent.

[0080] Example 2:

[0081] To enhance understanding of the present invention, based on Embodiment 1, as follows... Figure 4 And the working principle shown by the correlation formula, such as Figures 10-13 As shown, Embodiment 2 of the present invention provides a second type of integrated dual-chip package structure for arrayed waveguide gratings. The following will provide a detailed description of this embodiment in conjunction with the accompanying drawings.

[0082] like Figures 10-11 As shown, this embodiment includes a substrate 0, a first AWG chip 1, a second AWG chip 2, a driver 3, and a partition surface c; the first AWG chip 1 includes, in sequence, a first input optical waveguide 11, a first input planar waveguide 12, a first array waveguide 13, a first output planar waveguide 14, and a first output optical waveguide 15, according to the optical wave transmission direction; the second AWG chip 2 includes, in sequence, a second input optical waveguide 21, a second input planar waveguide 22, a second array waveguide 23, a second output planar waveguide 24, and a second output optical waveguide 25, according to the optical wave transmission direction.

[0083] The first AWG chip 1, the second AWG chip 2, and the driving component 3 are disposed on the substrate 0; wherein, the relative positions of the first AWG chip 1 and the second AWG chip 2 on the substrate 0 are arranged laterally, such that the input ports of the first AWG chip 1 and the second AWG chip 2 can be divided by the dividing surface c; further, the dividing surface c simultaneously divides the first input planar waveguide 12 and the second input planar waveguide 22, at which time, the optical axis z1 of the first input planar waveguide 12 and the optical axis z2 of the second input planar waveguide 22 are parallel.

[0084] The dividing surface c divides the whole consisting of the substrate 0, the first AWG chip 1 and the second AWG chip 2 into a first part s1 and a second part s2.

[0085] The driving component 3 is connected to the first part s1 and the second part s2 at both ends. The driving component 3 achieves simultaneous compensation of the first AWG chip 1 and the second AWG chip 2 by controlling the relative displacement of the first part s1 and the second part s2.

[0086] like Figure 11As shown, the dividing surface c divides the first input planar waveguide 12 of the first AWG chip 1 into two parts, a1 and b1. At the same time, the dividing surface c divides the second input planar waveguide 22 of the second AWG chip 2 into two parts, a2 and b2.

[0087] like Figure 12 As shown, when the temperature rises, the driving rod 33 extends because its thermal expansion coefficient is greater than that of the first AWG chip 1 and the second AWG chip 2. This extension causes relative movement between the second part s2 connected to the first fixed end 31 and the first part s1 connected to the second fixed end 32. Specifically, from an overall perspective, the direction of movement of a1 relative to b1 of the first input planar waveguide 12 of the first AWG chip 1 is as shown by the arrow. Simultaneously, the direction of movement of b2 relative to a2 of the second input planar waveguide 22 of the second AWG chip 2 is as shown by the arrow. This results in relative movement between the first AWG chip 1 and the second AWG chip 2, allowing the driving rod 3 to simultaneously compensate for wavelength changes in both the first AWG chip 1 and the second AWG chip 2 caused by temperature variations.

[0088] like Figure 13 As shown, when the temperature decreases, the driving rod 33 shortens because its thermal expansion coefficient is greater than that of the first AWG chip 1 and the second AWG chip 2. This shortening of the driving rod 33 causes relative movement between the second part s2 connected to the first fixed end 31 and the first part s1 connected to the second fixed end 32. Specifically, from an overall perspective, the direction of movement of a1 relative to b1 of the first input planar waveguide 12 of the first AWG chip 1 is as shown by the arrow. Simultaneously, the direction of movement of b2 relative to a2 of the second input planar waveguide 22 of the second AWG chip 2 is as shown by the arrow. This results in relative movement between the first AWG chip 1 and the second AWG chip 2, allowing the driving rod 33 to simultaneously compensate for the wavelength changes of the first AWG chip 1 and the second AWG chip 2 caused by temperature variations.

[0089] The integrated packaging structure of dual-chip array waveguide grating provided by this invention can also achieve efficient bidirectional transmission of light waves. The overall process is simple, the packaging time is short, the integration is high, and the cost is low. In addition, without relying on other auxiliary structures, it can also achieve simultaneous compensation of two AWG chips, so that the light wave transmission is accurate, stable, and has good consistency.

[0090] Example 3:

[0091] To enhance understanding of the present invention, based on Embodiment 1, as follows... Figure 4 And the working principle shown by the correlation formula, such as Figure 14 As shown, Embodiment 3 of the present invention provides a third type of integrated dual-chip package structure for arrayed waveguide gratings. The following will provide a detailed description of this embodiment in conjunction with the accompanying drawings.

[0092] like Figure 14 As shown, this embodiment includes a substrate 0, a first AWG chip 1, a second AWG chip 2, a driver 3, and a partition surface c; the first AWG chip 1 includes, in sequence, a first input optical waveguide 11, a first input planar waveguide 12, a first array waveguide 13, a first output planar waveguide 14, and a first output optical waveguide 15, according to the optical wave transmission direction; the second AWG chip 2 includes, in sequence, a second input optical waveguide 21, a second input planar waveguide 22, a second array waveguide 23, a second output planar waveguide 24, and a second output optical waveguide 25, according to the optical wave transmission direction.

[0093] The first AWG chip 1, the second AWG chip 2, and the driving component 3 are disposed on the substrate 0; wherein, the relative positions of the first AWG chip 1 and the second AWG chip 2 on the substrate 0 are arranged laterally, such that the output ports of the first AWG chip 1 and the second AWG chip 2 can be divided by the dividing surface c; further, the dividing surface c simultaneously divides the first output planar waveguide 14 and the second output planar waveguide 24, at which time, the optical axis w1 of the first output planar waveguide 14 and the optical axis w2 of the second output planar waveguide 24 are parallel.

[0094] The dividing surface c divides the whole consisting of the substrate 0, the first AWG chip 1 and the second AWG chip 2 into a first part s1 and a second part s2.

[0095] Based on the same principle and connection method as Embodiments 1 and 2, after installing the driving component 3, when the temperature changes, the driving component 3 expands and contracts due to heat, causing relative movement between the first AWG chip 1 and the second AWG chip 2. This allows the driving rod 3 to simultaneously compensate for the wavelength changes of the first AWG chip 1 and the second AWG chip 2 caused by temperature variations. Based on the same working principle as Embodiments 1 and 2, this embodiment will not repeat the details.

[0096] The integrated packaging structure of dual-chip array waveguide grating provided by this invention can also achieve efficient bidirectional transmission of light waves. The overall process is simple, the packaging time is short, the integration is high, and the cost is low. In addition, without relying on other auxiliary structures, it can also achieve simultaneous compensation of two AWG chips, so that the light wave transmission is accurate, stable, and has good consistency.

[0097] Example 4:

[0098] Based on Embodiments 1-3, in the process of the driving member 3 simultaneously compensating the first AWG chip 1 and the second AWG chip 2 by controlling the relative displacement of the first part s1 and the second part s2, in case the effective area of ​​the substrate 0 is insufficient or the driving member 3 is inconvenient to be fully set on the substrate 0, Embodiment 4 of the present invention provides a modified substrate setting structure.

[0099] like Figure 15 As shown, an integrated dual-chip package structure for an arrayed waveguide grating further includes a substrate s3 disposed under a substrate 0. When the first part s1 is fixed to the substrate s3, the two ends of the driving member 3 are respectively connected to the second part s2 and the substrate s3. Alternatively, when the second part s2 is fixed to the substrate s3, the two ends of the driving member 3 are respectively connected to the first part s1 and the substrate s3.

[0100] Based on such Figure 4 The same working principle shown can be applied when there are temperature changes such as heating and cooling. Figures 8-9 As shown and as Figures 12-13 The control of the relative displacement of the first part s1 and the second part s2 shown is used to simultaneously compensate the first AWG chip 1 and the second AWG chip 2, which will not be repeated here.

[0101] This embodiment provides a flexible and expandable substrate mounting structure when the effective area of ​​the substrate 0 is insufficient or the driving component 3 is inconvenient to be fully mounted on the substrate 0.

[0102] Example 5:

[0103] In order to reduce the optical wave transmission loss caused by the segmentation of the planar waveguide by the segmentation surface c, based on Examples 1-4, Example 5 of the present invention provides a filling method for the refractive index matching agent 4.

[0104] like Figure 16As shown, an integrated dual-chip package structure for an arrayed waveguide grating further includes a refractive index matching agent 4. The refractive index matching agent 4 is filled between the first input planar waveguide 12 and the second input planar waveguide 22, or between the first output planar waveguide 14 and the second output planar waveguide 24. The refractive index matching agent 4 is made of an elastic material and will not impede the relative movement between any two objects in the first part s1, the second part s2, and the substrate s3 when the temperature changes. As a preferred embodiment, the refractive index matching agent 4 uses a material with the same refractive index as the divided planar waveguides, thus minimizing optical wave transmission loss. It should be noted that the length range of the refractive index matching agent 4 needs to cover the maximum distance range of the relative displacement between the first part s1 and the second part s2.

[0105] In this embodiment, the transmission performance of light waves is maintained by filling with refractive index matching agent 4.

[0106] Example 6:

[0107] To further improve process efficiency, based on Examples 1-5, Example 6 of the present invention also provides a method for improving coupling efficiency.

[0108] like Figures 17-9 As shown, an integrated dual-chip package structure for arrayed waveguide gratings further includes a first fiber array 5 and a second fiber array 6. The first fiber array 5 is coupled to the first input optical waveguide 11 and the second output optical waveguide 25, and the second fiber array 6 is coupled to the first output optical waveguide 15 and the second input optical waveguide 21. In actual implementation, by arranging the first input optical waveguide 11 and the second output optical waveguide at equal intervals on the same side, and arranging the first output optical waveguide 15 and the second input optical waveguide 21 at equal intervals on the same side, only one fiber array needs to be coupled to each side (only two couplings are required). Compared to the traditional stacking of two single-chip package structures (which requires four couplings), the coupling efficiency is improved.

[0109] Example 7:

[0110] To address the technical problems of complex manufacturing processes, long packaging times, low integration, high costs, inability to simultaneously compensate two AWG chips with a single driver, and unstable optical waves in traditional methods for achieving bidirectional optical wave transmission, this invention provides a manufacturing method for an integrated dual-chip package structure of arrayed waveguide gratings, comprising the following steps:

[0111] Step S101: Arrange the relative positions of the first AWG chip 1 and the second AWG chip 2 on the substrate 0 in a horizontal or vertical arrangement, so that the input ports or output ports of the first AWG chip 1 and the second AWG chip 2 can be separated by the dividing surface c.

[0112] The first AWG chip 1 and the second AWG chip 2 are arranged horizontally or vertically on the substrate 0, meaning they are arranged at 180 degrees horizontally or vertically while ensuring bidirectional light wave transmission. Specifically, the arrangement aims to ensure that the input ports or output ports of both the first AWG chip 1 and the second AWG chip 2 are simultaneously accessible via the dividing surface c. It should be noted that, for ease of process implementation, the dividing surface c is preferably a straight dividing surface, and the input ports or output ports of both chips are preferably parallel. However, the dividing surface c can also be a curved dividing surface or a combination of a straight and a curved dividing surface, achieving the same technical effect.

[0113] Step S102: The substrate 0, the first AWG chip 1 and the second AWG chip 2 are divided into a first part s1 and a second part s2 using the dividing surface c.

[0114] The above three parts are divided into two parts, the first part s1 and the second part s2, which can be connected to the two ends of the driving component 3 in step S103 respectively. In this way, the relative displacement of the first part s1 and the second part s2 can be controlled by the driving component 3 to achieve simultaneous compensation of the first AWG chip 1 and the second AWG chip 2.

[0115] Step S103: Connect the first part s1 and the second part s2 to the two ends of the driving component 3 respectively, so that the driving component 3 can simultaneously compensate the first AWG chip 1 and the second AWG chip 2 by controlling the relative displacement of the first part s1 and the second part s2.

[0116] The connection method can be direct fixation or indirect fixation, it can be mechanical fixation or adhesive fixation, with the premise of ensuring that the fixation is firm and does not loosen.

[0117] In summary, the present invention provides a manufacturing method for an integrated dual-chip package structure of arrayed waveguide gratings, which enables efficient bidirectional transmission of light waves. The overall process is simple, the packaging time is short, the coupling efficiency is high, the integration is high, and the cost is low. In addition, without relying on other auxiliary structures, it can also achieve simultaneous compensation of two AWG chips, resulting in accurate, stable, and consistent light wave transmission.

[0118] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A dual-chip integrated packaging structure for arrayed waveguide gratings, characterized in that, include: Substrate (0), first AWG chip (1), second AWG chip (2), driver (3) and dividing surface c; The first AWG chip (1), the second AWG chip (2), and the driving component (3) are disposed on the substrate (0); wherein, the relative positions of the first AWG chip (1) and the second AWG chip (2) on the substrate (0) are arranged horizontally or vertically, specifically, arranged at 180 degrees in the horizontal direction or 180 degrees in the vertical direction, so as to realize the bidirectional symmetrical transmission of light waves, so that the input ports or output ports of the first AWG chip (1) and the second AWG chip (2) can be simultaneously cut by the dividing surface c; the driving component (3) includes a first fixed end (31), a second fixed end (32), and a driving rod (33), the first fixed end (31) and the second fixed end (32) are disposed at both ends of the driving rod (33) and are fixedly connected to the driving rod (33); The coefficient of thermal expansion of the drive rod (33) is greater than that of the first AWG chip (1) and the second AWG chip (2); the coefficients of thermal expansion of the first fixed end (31) and the second fixed end (32) are the same as those of the first AWG chip (1) and the second AWG chip (2); The dividing surface c divides the whole consisting of the substrate (0), the first AWG chip (1) and the second AWG chip (2) into a first part s1 and a second part s2. The driving component (3) is connected to the first part s1 and the second part s2 at both ends respectively. The driving component (3) achieves simultaneous compensation of the first AWG chip (1) and the second AWG chip (2) by controlling the relative displacement of the first part s1 and the second part s2. It also includes a first fiber array (5) and a second fiber array (6), wherein the first fiber array (5) is coupled to the first input optical waveguide (11) of the first AWG chip (1) and the second output optical waveguide (25) of the second AWG chip (2), and the second fiber array (6) is coupled to the first output optical waveguide (15) of the first AWG chip (1) and the second input optical waveguide (21) of the second AWG chip (2); the first input optical waveguide (11) and the second output optical waveguide (25) are arranged at equal intervals on the same side, and the first output optical waveguide (15) and the second input optical waveguide (21) are arranged at equal intervals on the same side.

2. The integrated dual-chip packaging structure of the arrayed waveguide grating according to claim 1, characterized in that, The first AWG chip (1) includes, in sequence, a first input optical waveguide (11), a first input planar waveguide (12), a first array waveguide (13), a first output planar waveguide (14), and a first output optical waveguide (15) according to the direction of optical wave transmission; the second AWG chip (2) includes, in sequence, a second input optical waveguide (21), a second input planar waveguide (22), a second array waveguide (23), a second output planar waveguide (24), and a second output optical waveguide (25) according to the direction of optical wave transmission.

3. The integrated dual-chip packaging structure of the arrayed waveguide grating according to claim 2, characterized in that, The dividing surface c simultaneously divides the first input planar waveguide (12) and the second input planar waveguide (22), or, The dividing surface c simultaneously divides the first output planar waveguide (14) and the second output planar waveguide (24).

4. The integrated dual-chip packaging structure of the arrayed waveguide grating according to claim 3, characterized in that, When the dividing surface c simultaneously divides the first input planar waveguide (12) and the second input planar waveguide (22), the optical axis z1 of the first input planar waveguide (12) and the optical axis z2 of the second input planar waveguide (22) are parallel, or, When the dividing surface c simultaneously divides the first output planar waveguide (14) and the second output planar waveguide (24), the optical axis w1 of the first output planar waveguide (14) and the optical axis w2 of the second output planar waveguide (24) are parallel.

5. The integrated dual-chip packaging structure of the arrayed waveguide grating according to claim 1, characterized in that, The drive rod (33) is used to change its length under temperature changes, thereby achieving simultaneous compensation for the first AWG chip (1) and the second AWG chip (2).

6. The integrated dual-chip packaging structure of the arrayed waveguide grating according to claim 5, characterized in that, The coefficient of thermal expansion of the drive rod (33) differs from the coefficients of thermal expansion of the first AWG chip (1) and the second AWG chip (2) by a preset parameter value.

7. The integrated dual-chip package structure of the arrayed waveguide grating according to claim 1, characterized in that, It also includes a substrate s3 disposed under the substrate plate (0). When the first part s1 is fixed to the substrate s3, the two ends of the driving member (3) are respectively connected to the second part s2 and the substrate s3, or... When the second part s2 is fixed to the substrate s3, the two ends of the driving member (3) are respectively connected to the first part s1 and the substrate s3.

8. The integrated dual-chip package structure of the arrayed waveguide grating according to any one of claims 2-4, characterized in that, It also includes a refractive index matching agent (4), which fills the space between the first input planar waveguide (12) and the second input planar waveguide (22), or, The refractive index matching agent (4) is filled between the first output planar waveguide (14) and the second output planar waveguide (24).

9. A method for manufacturing a dual-chip integrated package structure of an arrayed waveguide grating as described in any one of claims 1-8, characterized in that, Includes the following steps: The relative positions of the first AWG chip (1) and the second AWG chip (2) on the substrate (0) are arranged horizontally or vertically, so that the input ports or output ports of the first AWG chip (1) and the second AWG chip (2) can be separated by the dividing surface c. The substrate (0), the first AWG chip (1) and the second AWG chip (2) are divided into a first part s1 and a second part s2 by using the dividing surface c; The first part s1 and the second part s2 are connected to the two ends of the drive unit (3) respectively, so that the drive unit (3) can simultaneously compensate the first AWG chip (1) and the second AWG chip (2) by controlling the relative displacement of the first part s1 and the second part s2.

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