A method for reducing the thickness of a ring-shaped wafer ultra-thin sheet

Abstract

The application relates to a ring type wafer ultra-thin slice thinning method and belongs to the technical field of semiconductor processing. The method comprises the following steps: S1, providing a wafer, wherein the wafer comprises a functional surface and a back surface opposite to the functional surface; S2, forming a protective layer on the functional surface of the wafer; covering a protective adhesive tape on the protective layer; S3, placing the wafer in a grinding device to start grinding the front surface of the wafer; the grinding device comprises a chuck and a grinding pad arranged opposite to the chuck; and S4, cleaning the wafer. Through the arrangement of the grinding pad, the grinding surface with low rotating speed can be used to stably protect the grinding surface with high rotating speed, cracks of the grinding surface are prevented, and the quality of wafer surface processing is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor processing technology, and in particular to a method for thinning annular wafers into ultrathin sheets. Background Technology

[0002] Chip thinning generally refers to the chemical or physical polishing of the two surfaces of a wafer that do not contain components, reducing the wafer thickness to a predetermined value to facilitate subsequent dicing and packaging. This process requires that the wafer remain undamaged and that the components on it remain undamaged. With the development of 3D packaging technology, the requirements for thinning processes are becoming increasingly stringent. Not only is thinning of a single wafer necessary, but there is also a need to thin the back side of two bonded wafers.

[0003] As wafer circuit design becomes increasingly complex, the gap between the central and edge regions of the wafer becomes larger and larger. With the increase in memory storage capacity and the increase in the number of packaging layers, the wafer thickness is required to be thinner and thinner. Existing wafer grinding and dicing processes (DAG) are extremely prone to problems such as wafer back and edge cracking and wafer warping after the functional surface protective film is removed when grinding to below 100um. Summary of the Invention

[0004] Therefore, it is necessary to provide a method for thinning ring-shaped wafers to improve the quality of wafer surface thinning processes. The technical solution of this invention is as follows:

[0005] A method for thinning annular wafers into ultrathin sheets includes the following specific steps:

[0006] A wafer is provided, the wafer including a functional facet and a back facet opposite to the functional facet;

[0007] Before grinding the wafer, the surface of the wafer is pretreated with an etching solution to remove impurities, and then the surface of the wafer is cleaned.

[0008] Optionally, the etching solution is an acidic solution, which can be a commonly used wafer acid etching solution, for example, composed of nitric acid (HNO3), hydrofluoric acid (HF) and some buffer acids (CH3COCH, H3PO4).

[0009] A protective layer is formed on the functional surface of the wafer using chemical vapor deposition (CVD) with HMDS vapor under reduced pressure to form an HMDS layer on the functional surface 110 of the wafer (at this time, the HMDS layer is an HMDS monolayer and is in a fluid state); then the HMDS layer is annealed to solidify the HMDS layer and improve the stress of the HMDS layer and its adhesion strength to the wafer.

[0010] Optionally, the protective layer is made of silicone.

[0011] Optionally, the material of the protective layer is hexamethyldisiloxane.

[0012] Optionally, the step of forming the protective layer includes: forming a hexamethyldisiloxane layer on the functional surface of the wafer by chemical vapor deposition, followed by an annealing process to form the protective layer.

[0013] Optionally, the annealing process includes: controlling the annealing temperature at 180°C in an inert gas environment and annealing continuously for 2 to 3 hours.

[0014] Optionally, the inert gas is nitrogen.

[0015] A protective layer is formed on the functional surface of the wafer;

[0016] Protective tape is applied to the protective layer to prevent impurities generated during the backside grinding process from contaminating the functional surfaces of the wafer, and to prevent direct contact between the wafer functional surfaces and the grinding equipment (such as a chuck for holding the wafer), which could damage the functional surfaces and reduce the quality of the resulting chip.

[0017] Grinding and thinning process is performed at the edge of the wafer:

[0018] Furthermore, the etching solution is an acidic solution that fixes the wafer in a rotating device, and a grinding device is used to thin the surface of the wafer;

[0019] The wafer is placed in a grinding apparatus, and the functional surfaces of the wafer are ground.

[0020] The wafer is cleaned.

[0021] Furthermore, the wet cleaning process described in this embodiment includes the following steps:

[0022] The phenol solution has a volume concentration greater than or equal to 20%, the cleaning temperature is 70-90°C, and the cleaning is continued for 3-10 minutes to remove the protective layer.

[0023] The wafer is placed on the grinding apparatus to begin grinding:

[0024] The wafer polishing apparatus includes a chuck and a polishing pad disposed opposite to the chuck. The chuck is used to hold the wafer on its surface, and the polishing pad is disposed opposite to the chuck.

[0025] For the initial grinding, there are no speed requirements for the grinding wheel. Once it reaches 94% of the grinding volume, start controlling the rotation speeds of grinding pads a, b, and c. It is worth noting that the speeds should be a > b > c. This reduces the axial force on the wafer surface and creates a stepped surface distribution, facilitating multi-depth feed processing of the wafer surface.

[0026] At the same time, the grinding surface with a low rotation speed can be fixed and stabilized to protect the grinding surface with a high rotation speed, preventing cracks from appearing on the grinding surface. This is beneficial to improving the quality of wafer surface processing, preventing wafer breakage, and eliminating the need for secondary grinding, thus improving efficiency.

[0027] This process, followed by conventional thinning operations, can effectively improve the uniformity of the silicon wafer thickness after thinning and greatly reduce the wafer breakage rate.

[0028] Flip the wafer so that its functional side is facing up, and remove the protective tape and protective layer;

[0029] The wafer is then cleaned.

[0030] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0031] 1. By using a ring-shaped machining method with different rotational speeds from the outer edge of the wafer inwards to grind the wafer surface, the axial force on the wafer surface can be reduced, and the ground surface can be distributed in a stepped manner. This facilitates multi-depth feed machining of the wafer surface, reduces the force on the ground surface, and at the same time, the grinding surface with a lower rotational speed can be fixed and stabilized to protect the grinding surface with a higher rotational speed, preventing cracks from appearing on the ground surface. This is beneficial to improving the quality of wafer surface processing, preventing wafer breakage, and eliminating the need for secondary grinding, thus improving efficiency.

[0032] 2. By generating a protective layer and applying adhesive tape, the wafer can be attached to the surface of the polishing pad to increase the support effect on the wafer surface and ensure that the surface of the wafer will not vibrate axially when it rotates, which is beneficial to improving the quality of wafer surface thinning processing. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a schematic diagram of the grinding apparatus according to an embodiment of this application;

[0035] Figure 2 for Figure 1 A top view of the grinding pad in the grinding apparatus shown.

[0036] Explanation of reference numerals in the attached figures:

[0037] 100. Wafer; 210. Chuck; 220. Grinding pad. Detailed Implementation

[0038] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0039] The present invention relates to a method for thinning annular wafers into ultrathin wafers, comprising the following specific steps:

[0040] A wafer is provided, the wafer including a functional facet and a back facet opposite to the functional facet;

[0041] Before grinding the wafer, the surface of the wafer is pretreated with an etching solution to remove impurities, and then the surface of the wafer is cleaned.

[0042] A protective layer is formed on the functional surface of the wafer using chemical vapor deposition (CVD) with HMDS vapor under reduced pressure to form an HMDS layer on the functional surface 110 of the wafer 100 (at this time, the HMDS layer is an HMDS monolayer and is in a fluid state); then the HMDS layer is annealed to solidify the HMDS layer and improve the stress of the HMDS layer and its adhesion strength to the wafer 100.

[0043] Optionally, the protective layer is made of silicone.

[0044] Optionally, the material of the protective layer is hexamethyldisiloxane.

[0045] Optionally, the step of forming the protective layer includes: forming a hexamethyldisiloxane layer on the functional surface of the wafer by chemical vapor deposition, followed by an annealing process to form the protective layer.

[0046] Optionally, the annealing process includes: controlling the annealing temperature at 180°C in an inert gas environment and annealing continuously for 2 to 3 hours.

[0047] Optionally, the inert gas is nitrogen.

[0048] A protective layer is formed on the functional surface of the wafer;

[0049] Protective tape is applied to the protective layer to prevent impurities generated during the grinding process from contaminating the functional surfaces of the wafer and to prevent the wafer functional surfaces from directly contacting the grinding device (such as a chuck for fixing the wafer) and causing damage to the wafer functional surfaces, thereby reducing the quality of the formed chip.

[0050] Grinding and thinning process is performed at the edge of the wafer:

[0051] Furthermore, the etching solution is an acidic solution that fixes the wafer in a rotating device, and a grinding device is used to thin the surface of the wafer;

[0052] The wafer 100 is placed in a grinding device, and the functional surfaces of the wafer 100 are ground.

[0053] The wafer 100 is cleaned.

[0054] Furthermore, the wet cleaning process described in this embodiment includes the following steps:

[0055] The phenol solution has a volume concentration greater than or equal to 20%, the cleaning temperature is 70-90°C, and the cleaning is continued for 3-10 minutes to remove the protective layer.

[0056] The wafer is placed on the grinding apparatus to begin grinding:

[0057] Figure 1 A schematic diagram of the structure of a wafer grinding apparatus in the prior art is shown; as follows: Figure 1 As shown, the wafer polishing apparatus includes a chuck 210 and a polishing pad 220 disposed opposite to the chuck. The chuck 210 is used to support the wafer 100 on its surface, and the polishing pad 220 is disposed opposite to the chuck 210.

[0058] like Figure 2 As shown, the initial grinding does not require a specific speed for the grinding wheel. Once 94% of the grinding depth has been achieved, the rotational speeds of grinding pads a, b, and c are controlled. It is important to note that the speeds should be a > b > c. This reduces the axial force on the wafer surface and creates a stepped surface distribution, facilitating multi-depth feed processing of the wafer surface. It should be noted that the grinding pad 220 is connected to the power structure in the grinding apparatus; its connection only needs to be sufficient to control the rotational speeds of a, b, and c. The specific structure and connection method are not limited.

[0059] At the same time, the grinding surface with a low rotation speed can be fixed and stabilized to protect the grinding surface with a high rotation speed, preventing cracks from appearing on the grinding surface. This is beneficial to improving the quality of wafer surface processing, preventing wafer breakage, and eliminating the need for secondary grinding, thus improving efficiency.

[0060] This process, followed by conventional thinning operations, can effectively improve the uniformity of the silicon wafer thickness after thinning and greatly reduce the wafer breakage rate.

[0061] Flip the wafer so that its functional side is facing up, and remove the protective tape and protective layer;

[0062] The wafer 100 is then cleaned.

[0063] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0064] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for thinning annular wafers into ultrathin sheets, characterized in that, include: S1. A wafer is provided, the wafer including a functional side and a back side opposite to the functional side; S2. A protective layer is formed on the functional surface of the wafer; Cover the protective layer with protective tape; S3. Place the wafer in the grinding device and begin grinding the back side of the wafer; The polishing apparatus includes a chuck and polishing pads disposed opposite to the chuck. The chuck (210) is used to support a wafer (100) on its surface. The polishing pads (220) include polishing pads a, b, and c arranged coaxially and with gradually increasing diameters. For the initial grinding, there are no requirements on the speed of the grinding wheel. Once the grinding amount reaches 94%, start controlling the rotation speed of grinding pad a to be greater than that of grinding pad b, and the rotation speed of grinding pad b to be greater than that of grinding pad c. S4. The wafer is cleaned.

2. The method for thinning annular wafers according to claim 1, characterized in that, Before step S2, the process further includes: pre-treating the surface of the wafer with an etching solution to remove impurities from the wafer surface, and then cleaning the surface of the wafer.

3. The method for thinning annular wafers according to claim 2, characterized in that, The corrosive liquid is an acidic solution.

4. The method for thinning annular wafers according to claim 1, characterized in that, In step S2, the material of the protective layer is organosilicon.

5. The method for thinning annular wafers according to claim 4, characterized in that, The protective layer is made of hexamethyldisiloxane.

6. The method for thinning annular wafers according to claim 1, characterized in that, In step S2, the method for preparing the protective layer includes: forming a protective layer material on the functional surface of the wafer by chemical vapor deposition, followed by an annealing process to form the protective layer.

7. The method for thinning annular wafers according to claim 6, characterized in that, The annealing process includes: annealing at a temperature of 180–200°C for 2–3 hours in an inert gas environment.

8. The method for thinning annular wafers according to claim 7, characterized in that, The inert gas is nitrogen.

9. The method for thinning annular wafers according to claim 1, characterized in that, In step S4, the cleaning treatment is specifically a wet cleaning process, and the steps of the wet cleaning process include: The protective layer is removed by cleaning with a phenol solution, wherein the volume concentration of the phenol solution is greater than or equal to 20%, the cleaning temperature is 70-90°C, and the cleaning is continued for 3-10 minutes.

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