Packaging device, memory device, and semiconductor device

Abstract

The present application provides a packaging device. The packaging device includes a first integrated circuit die, a second integrated circuit die, a first input / output pin, and a first electrostatic discharge protection element. The first integrated circuit die includes a first internal circuit and a first input / output pad disposed on the first integrated circuit die and coupled to the first internal circuit. The second integrated circuit die is stacked on the first integrated circuit die. The second integrated circuit die includes a second internal circuit and a second input / output pad disposed on the second integrated circuit die and coupled to the second internal circuit. The first input / output pin is coupled to the first integrated circuit die and the second integrated circuit die. The electrostatic discharge protection element of the present application can reduce the capacitance of the input / output pad of the integrated circuit die, thereby achieving better signal quality, which is conducive to high-performance computing and reducing the operating voltage of the signal.

Images