IGBT half-bridge module overvoltage peak extraction circuit, system and method

Abstract

The application discloses an IGBT half-bridge module overvoltage peak value extraction circuit, system and method, and relates to the technical field of IGBT module overvoltage peak value extraction. The peak value extraction circuit comprises a bridge arm voltage extraction circuit, a translation amplification circuit, a peak value holding circuit and an RC discharge equivalent circuit. The bridge arm voltage extraction circuit is used for reducing the bearing voltage of the half-bridge module in a proportional manner. The bearing voltage is the module voltage between the collector of the upper half-bridge IGBT and the emitter of the lower half-bridge IGBT. The translation amplification circuit is used for downwardly shifting the output signal of the bridge arm voltage extraction circuit and amplifying the signal related to the overvoltage peak value. The peak value holding circuit is used for extracting the maximum value of the output signal of the translation amplification circuit. The RC discharge equivalent circuit is used for equivalently discharging the peak value extracted by the peak value holding circuit in the form of a capacitor-resistor discharge time. The application can detect the overvoltage sharp peak of the IGBT module in real time, and timely deliver the overvoltage sharp peak to the drivers of the upper and lower half-bridges, so as to help the drivers to make adjustment according to the overvoltage sharp peak state.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to an overvoltage peak extraction circuit, system and method for IGBT half-bridge modules. Background Technology

[0002] As the most commonly used and critical control module in power converters, the reliability of IGBT modules has always been a key concern in the industrial field. During power conversion system operation, the high switching rate of IGBT modules, influenced by the stray inductance of the DC bus, can lead to excessively high voltage spikes. These voltage spikes in IGBTs have two aspects: firstly, the overvoltage spike caused by the IGBT turn-off transient during the decrease in collector current; secondly, the overvoltage spike caused by the reverse recovery characteristics of the IGBT's anti-parallel diode, which acts as a freewheeling diode, resulting in excessively high collector current overshoot and an excessively high rate of decline from the peak value. Both types of spikes are significant factors contributing to IGBT breakdown and reduced IGBT reliability.

[0003] Many institutions are researching gate drivers with higher performance, characterized by the ability to dynamically adjust the gate of the IGBT during switching transients based on actual operating conditions, achieving a trade-off between voltage spike suppression, switching speed, and switching losses. If the driver suppresses voltage spikes too little, it will lead to high switching speeds and high switching losses. Furthermore, under low bus voltages, the IGBT has a higher overvoltage margin, and the IGBT spike can be appropriately increased to further reduce switching losses. Therefore, to determine whether the IGBT gate adjustment is reasonable, it is necessary to extract overvoltage spikes in real time. However, currently, there is a lack of circuits specifically designed for extracting IGBT overvoltage spikes. Therefore, developing a circuit for extracting IGBT overvoltage spikes is an urgent problem to be solved. Summary of the Invention

[0004] The purpose of this invention is to provide an overvoltage peak extraction circuit, system, and method for IGBT half-bridge modules to solve the above-mentioned technical problems.

[0005] In a first aspect, the present invention discloses an overvoltage peak extraction circuit for an IGBT half-bridge module, comprising a bridge arm voltage extraction circuit, a translation amplification circuit, a peak holding circuit, and an RC discharge equivalent circuit, wherein the bridge arm voltage extraction circuit, the translation amplification circuit, the peak holding circuit, and the RC discharge equivalent circuit are connected in sequence.

[0006] The bridge arm voltage extraction circuit is used to proportionally reduce the withstand voltage of the half-bridge module; the withstand voltage is the module voltage between the collector of the upper half-bridge IGBT and the emitter of the lower half-bridge IGBT.

[0007] The translation amplifier circuit is used to shift the output signal of the bridge arm voltage extraction circuit downward and amplify the signal related to the overvoltage peak.

[0008] The peak hold circuit is used to extract the maximum value of the output signal of the translation amplifier circuit;

[0009] The RC discharge equivalent circuit is used to convert the peak value extracted by the peak holding circuit into an equivalent value in the form of capacitor and resistor discharge time.

[0010] In one embodiment, the translation amplifier circuit includes resistors R4, R5, R6, and R7, and operational amplifier OP2; one end of resistor R4 receives node voltage V1; the other end of resistor R4 is connected to one end of resistor R5 and the positive input terminal of operational amplifier OP2; the negative input terminal of operational amplifier OP2 is connected to one end of resistor R6 and one end of resistor R7; the other end of resistor R6 is connected to a reference voltage V. REF1 The other end of the resistor R7 is connected to the output terminal of the operational amplifier OP2, which outputs the node voltage V2.

[0011] In one embodiment, the translation amplifier circuit further includes diode rectifiers D1 and D2 to remove the bus voltage portion that is unrelated to the overvoltage peak value; the output terminal of operational amplifier OP2 is connected to the anode of diode D1; the anode of diode D2 is grounded, and the cathode of diode D1 is connected to the cathode of diode D2.

[0012] In one embodiment, the peak hold circuit and the RC discharge equivalent circuit include an error compensation circuit, which comprises diode D3, capacitors C4 and C5, and buffer B. UF1 Junction field-effect transistor J1, resistor R9, operational amplifier OP3; the anode of diode D3 is connected to the negative input terminal of transconductance operational amplifier OT1, the negative input terminal of comparator CP1, and buffer B. UF1 The output terminal of the transistor is connected; the cathode of diode D3 is connected to one end of capacitor C4; the other end of capacitor C4 is connected to the output terminal of transconductance operational amplifier OT1 and the base of transistor Q2; the positive input terminal of operational amplifier OP3 is connected to the positive input terminal of transconductance operational amplifier OT1; the negative input terminal of operational amplifier OP3 is connected to the output terminal of operational amplifier OP3, one end of capacitor C5, and the emitter of transistor Q3; the other end of capacitor C5 is grounded; the gate of junction field-effect transistor J1 is connected to one end of resistor R9 and receives junction voltage V3; the drain of junction field-effect transistor J1 is connected to power supply V. CC The source of the junction field-effect transistor J1 is connected to one end of the resistor R9 and the input of the buffer; the other end of the resistor R9 is grounded.

[0013] Secondly, the present invention also provides an overvoltage peak extraction system for an IGBT half-bridge module, the overvoltage peak extraction system comprising: the aforementioned peak extraction circuit, logic unit, adjustable gate amplifier, and adjustable gate amplifier; wherein,

[0014] The aforementioned peak extraction circuit is used for online monitoring of overvoltage spikes caused by the switching transients of the IGBT half-bridge module;

[0015] The logic unit is used to determine the attribution of the spike and adjust the turn-on and turn-off rates of the half-bridge IGBT according to the size and attribution of the spike.

[0016] The logic unit receives the lower half-bridge IGBT switching signal V. PWM1 Upper half-bridge IGBT switching signal V PWM2 and the output signal V of the peak extraction circuit OS and outputs a control signal V to the peak extraction circuit. SW1 and V SW2 The logic unit outputs adjustment signals V to the adjustable gate amplifier 1 according to the peak assignment. SD The adjustable gate amplifier 2 outputs an adjustment signal V. SU ;

[0017] The adjustable gate amplifier 1 adjusts according to the received adjustment signal V SD The turn-off rate of the lower half-bridge IGBT is adjusted according to the received adjustment signal V. SU The turn-off rate of the upper half-bridge IGBT is adjusted.

[0018] In one embodiment, the logic unit can be divided into logic unit 1 and logic unit 2, wherein logic unit 1 receives the lower half-bridge IGBT switching signal V. PWM1 The status signal V of the upper half-bridge Q and the output signal V of the peak extraction circuit OS and outputs a control signal V to the peak extraction circuit. SW1 and V SW2 Output adjustment signal V to adjustable gate amplifier 1 SD The logic unit 2 receives the upper half-bridge IGBT switching signal V. PWM2 and output adjustment signal V to adjustable gate amplifier 2. SU .

[0019] In one embodiment, the overvoltage spikes include overvoltage spikes of the upper and lower half-bridge IGBTs and overvoltage spikes of the anti-parallel diodes of the upper and lower half-bridge IGBTs.

[0020] In one embodiment, determining the attribution of the spike specifically includes: receiving an enable signal V from the lower half-bridge driver. PWM1 Within a very short time afterward, the detected peak value was attributed to the reverse recovery overvoltage spike V of the anti-parallel diode of the upper half-bridge IGBT. PKDU ;

[0021] The lower half-bridge driver receives the turn-off signal V. PWM1 Within a very short time afterward, the detected peak value was attributed to the turn-off overvoltage spike V of the lower half-bridge IGBT. PKID ;

[0022] The lower half-bridge driver receives a signal including the turn-on signal V. PWM2 State signal V Q Within a very short time, the detected peak value is attributed to the reverse recovery overvoltage spike V of the anti-parallel diode of the lower half-bridge IGBT. PKDD ;

[0023] The lower half-bridge driver receives a signal including the shutdown signal V. PWM2 State signal V Q Within a very short time afterward, the detected peak value is attributed to the turn-off overvoltage spike V of the upper half-bridge IGBT. PKIU .

[0024] In one embodiment, adjusting the turn-on and turn-off rates of the half-bridge IGBT based on the magnitude and attribution of the overvoltage spike specifically includes:

[0025] When the peak value is the peak value of the lower half-bridge IGBT turn-off overvoltage V PKID The logic unit is based on V PKID The magnitude of the adjustment signal V during the turn-off transient of the lower half-bridge IGBT changes. SD The adjustable gate amplifier 1 adjusts the turn-off rate of the lower half-bridge IGBT;

[0026] When the peak value is the reverse recovery overvoltage spike of the anti-parallel diode of the upper half-bridge IGBT, the logic unit determines the voltage based on V. PKDU The magnitude of the adjustment signal V during the turn-on transient of the lower half-bridge IGBT changes. SD The adjustable gate amplifier 1 adjusts the turn-on rate of the lower half-bridge IGBT;

[0027] When the peak value is the peak value of the upper half-bridge IGBT turn-off overvoltage V PKIU The logic unit is based on V PKIU The magnitude of the change affects the adjustment signal V during the transient turn-off of the upper half-bridge IGBT. SU The adjustable gate amplifier 2 adjusts the turn-off rate of the upper half-bridge IGBT;

[0028] When the peak value is the reverse recovery overvoltage spike V of the anti-parallel diode of the lower half-bridge IGBTPKDD The logic unit is based on V PKDD The magnitude of the change in the adjustment signal V during the turn-on transient of the upper half-bridge IGBT SU The adjustable gate amplifier 2 adjusts the turn-on rate of the upper half-bridge IGBT.

[0029] Thirdly, this invention discloses a method for extracting overvoltage peak values ​​from an IGBT half-bridge module, the method comprising:

[0030] The above-mentioned peak extraction circuit is used to monitor the overvoltage spikes caused by the switching transients of the IGBT half-bridge module in real time.

[0031] The attribution of the overvoltage spike is determined by the peak value detected within a very short time after the turn-on and turn-off signals received by the half-bridge driver.

[0032] The turn-on and turn-off rates of the half-bridge IGBT are adjusted according to the size and origin of the overvoltage spike.

[0033] Beneficial effects of this invention:

[0034] This invention requires only one peak extraction circuit to detect spikes caused by four types of components within the IGBT module. It then categorizes the extracted peaks based on the IGBT module's switching state and transmits them to the corresponding drivers. This invention enables real-time monitoring of the overvoltage spike states of the IGBT and anti-parallel diodes in both the upper and lower half-bridge drivers, allowing the drivers to adjust accordingly. Attached image description:

[0035] The accompanying drawings, as part of this invention, are provided to further illustrate the invention. The illustrative embodiments and descriptions of the invention are used to explain the invention, but do not constitute an undue limitation thereof. Clearly, the drawings described below are merely some embodiments, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0036] Figure 1 This is a connection block diagram of the peak extraction circuit for an IGBT half-bridge module provided in an embodiment of the present invention;

[0037] Figure 2 This is a schematic diagram of the peak extraction circuit for an IGBT half-bridge module provided in an embodiment of the present invention;

[0038] Figure 3 This is a schematic diagram of the peak extraction circuit compensation circuit for an IGBT half-bridge module provided in an embodiment of the present invention;

[0039] Figure 4 A connection block diagram of an IGBT half-bridge module overvoltage peak extraction system is provided as an embodiment of the present invention;

[0040] Figure 5 The connection block diagram of the IGBT half-bridge module overvoltage peak extraction system provided in another embodiment of the present invention is shown.

[0041] It should be noted that these accompanying drawings and textual descriptions are not intended to limit the scope of the invention in any way, but rather to illustrate the concept of the invention to those skilled in the art by referring to specific embodiments. Detailed implementation method:

[0042] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0043] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0044] The optional embodiments of this disclosure are described in detail below with reference to the accompanying drawings.

[0045] Figure 1 This invention presents a connection block diagram of an IGBT half-bridge module overvoltage peak extraction circuit. The circuit includes a bridge arm voltage extraction circuit, a shift amplification circuit, a peak hold circuit, and an RC discharge equivalent circuit, which are sequentially connected. The bridge arm voltage extraction circuit is used to proportionally reduce the withstand voltage of the half-bridge module; the withstand voltage is the module voltage between the collector of the upper half-bridge IGBT and the emitter of the lower half-bridge IGBT. The shift amplification circuit is used to shift the output signal of the bridge arm voltage extraction circuit downwards and amplify the signal related to the overvoltage peak. The peak hold circuit is used to extract the maximum value of the output signal of the shift amplification circuit. The RC discharge equivalent circuit is used to convert the peak value extracted by the peak hold circuit into an equivalent value in the form of capacitor and resistor discharge time.

[0046] Specifically, the first input terminal of the bridge arm voltage extraction circuit receives the voltage V from the half-bridge module. IGBT The second input terminal receives the control signal V. SW1 The voltage at the first output terminal is connected to the input terminal of the shift amplifier circuit. The output terminal of the shift amplifier circuit is connected to the input terminal of the peak hold circuit. The output terminal of the peak hold circuit is connected to the first input terminal of the RC discharge equivalent circuit. The second input terminal of the RC discharge equivalent circuit receives the control signal V. SW2 The output of the RC discharge equivalent circuit is the output signal V. OS .

[0047] Figure 2 The following is a schematic diagram of the peak extraction circuit of the IGBT half-bridge module provided in an embodiment of this application. The specific connection relationship of the components in the peak extraction circuit is described in detail below.

[0048] In this application, the bridge arm voltage extraction circuit includes: resistors R1, R2, and R3; capacitors C1 and C2; transistor Q1; and operational amplifier OP1. One end of resistor R1 and capacitor C1 is connected to the collector of the upper half-bridge IGBT. The other end of resistor R1 and capacitor C1, one end of resistor R2, one end of capacitor C2, and one end of resistor R3 are connected to the positive input terminal of operational amplifier OP1. The other end of resistor R2 and capacitor C2 is connected to the emitter of the lower half-bridge IGBT, and the emitter of the lower half-bridge IGBT is grounded. The collector of transistor Q1 is connected to the other end of resistor R3. The base of transistor Q1 receives the control signal V. SW1 The source of transistor Q1 is connected to the positive power supply voltage V. CC The negative input terminal of op-amp OP1 is connected to the output terminal of op-amp OP1, and the output node voltage V1 is generated.

[0049] Furthermore, in the bridge arm voltage extraction circuit, when the IGBT half-bridge module is not subjected to high voltage, the signal V SW1 When switch Q1 is turned on, the output voltage V1 of the bridge arm voltage extraction circuit is:

[0050]

[0051] Until the IGBT half-bridge module withstands the bus voltage V DC After that, signal V SW1 With switch Q1 turned off, the output voltage V1 of the bridge arm voltage extraction circuit is:

[0052]

[0053] In this application, the translation amplifier circuit includes: resistors R4, R5, R6, and R7, and operational amplifier OP2; one end of resistor R4 receives the node voltage V1; the other end of resistor R4 is connected to one end of resistor R5 and the positive input terminal of operational amplifier OP2; the negative input terminal of operational amplifier OP2 is connected to one end of resistor R6 and one end of resistor R7; the other end of resistor R6 is connected to the reference voltage V. REF1 The other end of resistor R7 is connected to the output terminal of operational amplifier OP2, which outputs node voltage V2.

[0054] Furthermore, the output voltage V2 in the shift amplifier circuit is:

[0055]

[0056] Where R7 = R5, R4 = R6, and the amplification factor k of the translation amplifier circuit is R5 / R4.

[0057] Reference level V REF1 The setting principle is that the IGBT half-bridge module withstands the bus voltage V. DC Furthermore, when the IGBT is in the off state, the output voltage V2 is equal to zero. This means that when an overvoltage spike occurs during the IGBT switching transient, the bus voltage portion of the output voltage V2 is removed, leaving only the overvoltage peak portion. Therefore, V REF1 for:

[0058]

[0059] In one possible embodiment, the shift amplifier circuit further includes diode rectifiers D1 and D2 to remove the bus voltage portion that is unrelated to the overvoltage peak value; the output terminal of operational amplifier OP2 is connected to the anode of diode D1; the anode of diode D2 is grounded, and the cathode of diode D1 is connected to the cathode of diode D2.

[0060] In this application, the peak hold circuit includes: a transconductance operational amplifier OT1, a transistor Q2, and a capacitor C3. The positive input terminal of the transconductance operational amplifier OT1 receives the node voltage V2; the output terminal of the transconductance operational amplifier OT1 is connected to the base of the transistor Q2; and the collector of the transistor Q2 is connected to the positive power supply voltage V2. CC One end of capacitor C3 is grounded; the negative input terminal of transconductance operational amplifier OT1 is connected to the source of transistor Q2, and the other end of capacitor C3 is connected to the output node voltage V3.

[0061] In the peak hold circuit, as the input voltage V2 increases with time, transistor Q2 remains on, and the output voltage V3 increases along with V2.

[0062] V3 = V2 (4)

[0063] When the input voltage V2 decreases over time, transistor Q2 turns off, and the output voltage V3 remains unchanged. The output voltage V3 is the peak value of V2.

[0064] In this embodiment, the RC discharge equivalent circuit includes: a resistor R8, a transistor Q3, and a comparator CP1. One end of the resistor R8 is connected to the negative input terminal of the comparator CP1 and receives the node voltage V3; the other end of the resistor R8 is connected to the collector of the transistor Q3; the source of the transistor Q3 is grounded; and the base of the transistor Q3 receives the control signal V. SW2 The positive input terminal of comparator CP1 is connected to the reference voltage V. REF2 The comparator CP1 outputs signal V. OS .

[0065] In the RC discharge equivalent circuit, when the input voltage V3 reaches the peak value of V2, the control signal V SW2 When transistor Q3 is turned on, the voltage of capacitor C3 starts to discharge from V3.

[0066] When voltage V3 is less than reference voltage V REF2 Output level V OS The voltage level flips from low to high until the voltage V3 drops to V2, at which point capacitor C3 stops discharging, and the control signal V... SW2 Then turn off transistor Q3.

[0067] Furthermore, from the turn-on of switch Q3 to the output level V OS The time t for the transition from low to high level pk Represented as:

[0068]

[0069] Let V IGBT The peak value is V IGBTpk Then, from equations (2)(3)(4)(5), we can obtain the result from time t. pk Equivalent to the peak value V IGBTpk for:

[0070]

[0071] Reference Figure 3 It illustrates an error compensation circuit for a peak hold circuit and an RC discharge equivalent circuit provided in an exemplary embodiment of the present invention, including diode D3, capacitors C4 and C5, and buffer B. UF1 Junction field-effect transistor J1, resistor R9, operational amplifier OP3;

[0072] The anode of diode D3 is connected to the negative input terminal of transconductance operational amplifier OT1, the negative input terminal of comparator CP1, and buffer B. UF1 The output terminal of the transistor is connected; the cathode of diode D3 is connected to one end of capacitor C4; the other end of capacitor C4 is connected to the output terminal of transconductance operational amplifier OT1 and the base of transistor Q2; the positive input terminal of operational amplifier OP3 is connected to the positive input terminal of transconductance operational amplifier OT1; the negative input terminal of operational amplifier OP3 is connected to the output terminal of operational amplifier OP3, one end of capacitor C5 is connected to the emitter of transistor Q3; the other end of capacitor C5 is grounded; the gate of junction field-effect transistor J1 is connected to one end of resistor R9 and receives junction voltage V3; the drain of junction field-effect transistor J1 is connected to power supply V. CC The source of junction field-effect transistor J1 is connected to one end of resistor R9, which is also the input of the buffer; the other end of resistor R9 is grounded.

[0073] The working principle of the compensation circuit: When transistor Q2 transitions from turn-on to turn-off, capacitor C3 charges the junction capacitance of transistor Q2, causing a drop in voltage V3 across capacitor C3 and resulting in measurement error. Diode D3 charges the junction capacitance of transistor Q2 through the compensation circuit, compensating for the reduced charge in capacitor C3, preventing the drop in V3, and improving the accuracy of the sampled peak value. Because the internal resistance at the input of comparator CP1 causes the extracted peak value to decrease slowly during the holding period, buffer B... UF1 This improves the overall circuit's drive load capability, and the junction field-effect transistor J1 further increases the buffer B. UF1 The input impedance helps mitigate the drop in V3 and improves the stability of the peak hold process. When the source of transistor Q3 is directly grounded, a floating offset voltage will be generated due to the change in the voltage difference between the collector and source of transistor Q3. The op-amp OP3 uses voltage V2 as a reference value for the source of transistor Q3. The follower formed by op-amp OP3 acts as an isolation unit, preventing voltage V2 from being directly connected to the source of transistor Q3. The offset voltage will be stabilized at a very small value. The function of capacitor C5 is to attenuate the pulse interference of voltage V2 on the common-mode voltage.

[0074] Reference Figure 4 This diagram illustrates a connection block diagram of an IGBT half-bridge module overvoltage peak extraction system according to an exemplary embodiment of the present invention. This IGBT half-bridge module overvoltage peak extraction system can be implemented as all or part of a terminal through software, hardware, or a combination of both. The overvoltage peak extraction system includes: the aforementioned peak extraction circuit, attribution determination module, logic unit, adjustable gate amplifier 1, and adjustable gate amplifier 2; wherein,

[0075] The aforementioned peak extraction circuit is used for online monitoring of overvoltage spikes caused by the switching transients of the IGBT half-bridge module;

[0076] The logic unit is used to determine the attribution of the spike and adjust the turn-on and turn-off rates of the half-bridge IGBT according to the size and attribution of the spike.

[0077] The logic unit receives the lower half-bridge IGBT switching signal V. PWM1 Upper half-bridge IGBT switching signal V PWM2 and the output signal V of the peak extraction circuit OS and outputs a control signal V to the peak extraction circuit. SW1 and V SW2 The logic unit outputs adjustment signals V to the adjustable gate amplifier 1 according to the peak value assignment. SD The adjustable gate amplifier 2 outputs an adjustment signal V. SU The adjustable gate amplifier 1 adjusts according to the received adjustment signal V. SDThe turn-off rate of the lower half-bridge IGBT is adjusted according to the received adjustment signal V. SU The turn-off rate of the upper half-bridge IGBT is adjusted.

[0078] The aforementioned peak extraction circuit, attribution determination module, logic unit, adjustable gate amplifier 1, and adjustable gate amplifier 2 can be included within the bridge driver.

[0079] In an optional embodiment, the logic unit can be divided into logic unit 1 and logic unit 2, wherein logic unit 1 receives the lower half-bridge IGBT switching signal V. PWM1 The status signal V of the upper half-bridge Q and the output signal V of the peak extraction circuit OS and outputs a control signal V to the peak extraction circuit. SW1 and V SW2 Output adjustment signal V to adjustable gate amplifier 1 SD The logic unit 2 receives the upper half-bridge IGBT switching signal V. PWM2 and output adjustment signal V to adjustable gate amplifier 2. SU Logic unit 1, the peak extraction circuit, and the adjustable gate amplifier 1 are contained within the upper half-bridge driver, while logic unit 2 and the adjustable gate amplifier 21 are contained within the lower half-bridge driver. For example... Figure 5 As shown.

[0080] Furthermore, the overvoltage spikes caused by the switching transients of the IGBT half-bridge module include the turn-off overvoltage spikes of the upper and lower half-bridge IGBTs and the reverse recovery overvoltage spikes of the anti-parallel diodes of the upper and lower half-bridge IGBTs.

[0081] Furthermore, determining the spike attribution specifically includes: receiving the enable signal V in the lower half-bridge driver. PWM1 Within a very short time afterward, the detected peak value was attributed to the reverse recovery overvoltage spike V of the anti-parallel diode of the upper half-bridge IGBT. PKDU The lower half-bridge driver receives the shutdown signal V. PWM1 Within a very short time afterward, the detected peak value was attributed to the turn-off overvoltage spike V of the lower half-bridge IGBT. PKID The lower half-bridge driver receives the turn-on signal V. PWM2 State signal V Q Within a very short time, the detected peak value is attributed to the reverse recovery overvoltage spike V of the anti-parallel diode of the lower half-bridge IGBT. PKDD Within a very short time after the lower half-bridge driver receives the turn-off signal from the signal isolator regarding the upper half-bridge IGBT, the detected peak value is attributed to the turn-off overvoltage spike V of the upper half-bridge IGBT. PKIU .

[0082] Furthermore, the turn-off rate of the half-bridge IGBT is adjusted based on the magnitude and attribution of the overvoltage spike, specifically including:

[0083] When the peak value is the peak value of the lower half-bridge IGBT turn-off overvoltage V PKID The logic unit is based on V PKID The magnitude of the adjustment signal V during the turn-off transient of the lower half-bridge IGBT changes. SD The adjustable gate amplifier 1 adjusts the turn-off rate of the lower half-bridge IGBT; when the peak value is the reverse recovery overvoltage spike of the anti-parallel diode of the upper half-bridge IGBT, the logic unit adjusts the turn-off rate according to V. PKDU The magnitude of the adjustment signal V during the turn-on transient of the lower half-bridge IGBT changes. SD Adjustable gate amplifier 1 regulates the turn-on rate of the lower half-bridge IGBT; when the peak value is the peak value of the upper half-bridge IGBT turn-off overvoltage V... PKIU The logic unit is based on V PKIU The magnitude of the adjustment signal V during the turn-off transient of the upper half-bridge IGBT SU The adjustable gate amplifier 2 adjusts the turn-off rate of the upper half-bridge IGBT; when the peak value is the reverse recovery overvoltage spike V of the anti-parallel diode of the lower half-bridge IGBT... PKDD The logic unit is based on V PKDD The magnitude of the adjustment signal V during the turn-on transient of the upper half-bridge IGBT SU The adjustable gate amplifier 2 adjusts the turn-on rate of the upper half-bridge IGBT.

[0084] This invention also provides a method for extracting overvoltage peak values ​​from an IGBT half-bridge module. This method adjusts the turn-off rate of the IGBT half-bridge module by detecting overvoltage spikes. The method includes:

[0085] The above-mentioned peak extraction circuit is used to monitor the overvoltage spikes caused by the switching transients of the IGBT half-bridge module in real time.

[0086] The attribution of the overvoltage spike is determined by the peak value detected within a very short time after the turn-on and turn-off signals received by the half-bridge driver.

[0087] The turn-on and turn-off rates of the half-bridge IGBT are adjusted according to the size and origin of the overvoltage spike.

[0088] It should be noted that the IGBT half-bridge module overvoltage peak extraction method and the IGBT half-bridge module overvoltage peak extraction system embodiment provided in the above embodiments belong to the same concept. The implementation process is detailed in the IGBT half-bridge module overvoltage peak extraction system embodiment, and will not be repeated here.

[0089] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0090] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features found in other embodiments but not others, combinations of features from different embodiments are also within the scope of protection of this invention and form different embodiments. For example, in the embodiments described above, those skilled in the art can use them in combination based on known technical solutions and the technical problems to be solved by this application.

[0091] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-described technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. An overvoltage peak extraction circuit for an IGBT half-bridge module, characterized in that, It includes a bridge arm voltage extraction circuit, a translation amplification circuit, a peak hold circuit, and an RC discharge equivalent circuit, which are connected in sequence. The bridge arm voltage extraction circuit is used to proportionally reduce the withstand voltage of the half-bridge module; the withstand voltage is the module voltage between the collector of the upper half-bridge IGBT and the emitter of the lower half-bridge IGBT. The translation amplifier circuit is used to shift the output signal of the bridge arm voltage extraction circuit downward and amplify the signal related to the overvoltage peak. The peak hold circuit is used to extract the maximum value of the output signal of the translation amplifier circuit; The RC discharge equivalent circuit is used to convert the peak value extracted by the peak holding circuit into an equivalent value in the form of capacitor and resistor discharge time.

2. The IGBT half-bridge module overvoltage peak extraction circuit according to claim 1, characterized in that, The translation amplifier circuit includes resistors R4, R5, R6, and R7, and operational amplifier OP2; One end of resistor R4 receives node voltage V1; the other end of resistor R4 is connected to one end of resistor R5 and the positive input terminal of operational amplifier OP2; the negative input terminal of operational amplifier OP2 is connected to one end of resistor R6 and one end of resistor R7; the other end of resistor R6 is connected to reference voltage V. REF1 The other end of the resistor R7 is connected to the output terminal of the operational amplifier OP2, which outputs the node voltage V2.

3. The IGBT half-bridge module overvoltage peak extraction circuit according to claim 2, characterized in that, The translation amplifier circuit also includes diode rectifiers D1 and D2, which remove the bus voltage portion that is unrelated to the overvoltage peak value; the output terminal of operational amplifier OP2 is connected to the anode of diode D1; the anode of diode D2 is grounded, and the cathode of diode D1 is connected to the cathode of diode D2.

4. The IGBT half-bridge module overvoltage peak extraction circuit according to claim 1, characterized in that, The peak hold circuit and the RC discharge equivalent circuit also include an error compensation circuit, which includes diode D3, capacitors C4 and C5, and buffer B. UF1 Junction field-effect transistor J1, resistor R9, operational amplifier OP3; the anode of diode D3 is connected to the negative input terminal of transconductance operational amplifier OT1, the negative input terminal of comparator CP1, and buffer B. UF1 The output terminal of the transistor is connected; the cathode of diode D3 is connected to one end of capacitor C4; the other end of capacitor C4 is connected to the output terminal of transconductance operational amplifier OT1 and the base of transistor Q2; the positive input terminal of operational amplifier OP3 is connected to the positive input terminal of transconductance operational amplifier OT1; the negative input terminal of operational amplifier OP3 is connected to the output terminal of operational amplifier OP3, one end of capacitor C5, and the emitter of transistor Q3; the other end of capacitor C5 is grounded; the gate of junction field-effect transistor J1 is connected to one end of resistor R9 and receives junction voltage V3; the drain of junction field-effect transistor J1 is connected to power supply V. CC The source of the junction field-effect transistor J1 is connected to one end of the resistor R9 and the input of the buffer; the other end of the resistor R9 is grounded.

5. An overvoltage peak extraction system for an IGBT half-bridge module, characterized in that, The overvoltage peak extraction system comprises: the peak extraction circuit, logic unit, adjustable gate amplifier 1, and adjustable gate amplifier 2 as described in any one of claims 1-4; wherein... The peak extraction circuit according to any one of claims 1-4 is used for online monitoring of overvoltage spikes caused by switching transients of the IGBT half-bridge module. The logic unit is used to determine the attribution of the spike and adjust the turn-on and turn-off rates of the half-bridge IGBT according to the size and attribution of the spike. The logic unit receives the lower half-bridge IGBT switching signal V. PWM1 Upper half-bridge IGBT switching signal V PWM2 and the output signal V of the peak extraction circuit OS and outputs a control signal V to the peak extraction circuit. SW1 and V SW2 The logic unit outputs adjustment signals V to the adjustable gate amplifier 1 according to the peak assignment. SD The adjustable gate amplifier 2 outputs an adjustment signal V. SU ; The adjustable gate amplifier 1 adjusts according to the received adjustment signal V SD The turn-on and turn-off rates of the lower half-bridge IGBT are adjusted according to the received adjustment signal V. SU The turn-on and turn-off rates of the upper half-bridge IGBTs are adjusted.

6. The IGBT half-bridge module overvoltage peak extraction system according to claim 5, characterized in that, The logic unit can be divided into logic unit 1 and logic unit 2. Logic unit 1 receives the lower half-bridge IGBT switching signal V. PWM1 The status signal V of the upper half-bridge Q and the output signal V of the peak extraction circuit OS and outputs a control signal V to the peak extraction circuit. SW1 and V SW2 Output adjustment signal V to adjustable gate amplifier 1 SD The logic unit 2 receives the upper half-bridge IGBT switching signal V. PWM2 and output adjustment signal V to adjustable gate amplifier 2. SU .

7. The IGBT half-bridge module overvoltage peak extraction system according to claim 5, characterized in that, The overvoltage spikes include overvoltage spikes of the upper and lower half-bridge IGBTs and overvoltage spikes of the anti-parallel diodes of the upper and lower half-bridge IGBTs.

8. The IGBT half-bridge module overvoltage peak extraction system according to claim 7, characterized in that: The determination of the peak's attribution specifically includes: The lower half-bridge driver receives the turn-on signal V. PWM1 Within a very short time afterward, the detected peak value was attributed to the reverse recovery overvoltage spike V of the anti-parallel diode of the upper half-bridge IGBT. PKDU ; The lower half-bridge driver receives the turn-off signal V. PWM1 Within a very short time afterward, the detected peak value was attributed to the turn-off overvoltage spike V of the lower half-bridge IGBT. PKID ; The lower half-bridge driver receives a signal including the turn-on signal V. PWM2 State signal V Q Within a very short time, the detected peak value is attributed to the reverse recovery overvoltage spike V of the anti-parallel diode of the lower half-bridge IGBT. PKDD ; The lower half-bridge driver receives a signal including the shutdown signal V. PWM2 State signal V Q Within a very short time afterward, the detected peak value is attributed to the turn-off overvoltage spike V of the upper half-bridge IGBT. PKIU .

9. The IGBT half-bridge module overvoltage peak extraction system according to claim 8, characterized in that, The turn-on and turn-off rates of the half-bridge IGBT are adjusted based on the magnitude and attribution of the overvoltage spikes, specifically including: When the peak value is the peak value of the lower half-bridge IGBT turn-off overvoltage V PKID The logic unit is based on V PKID The magnitude of the adjustment signal V during the turn-off transient of the lower half-bridge IGBT changes. SD The adjustable gate amplifier 1 adjusts the turn-off rate of the lower half-bridge IGBT; When the peak value is the reverse recovery overvoltage spike of the anti-parallel diode of the upper half-bridge IGBT, the logic unit determines the voltage based on V. PKDU The magnitude of the adjustment signal V during the turn-on transient of the lower half-bridge IGBT changes. SD The adjustable gate amplifier 1 adjusts the turn-on rate of the lower half-bridge IGBT; When the peak value is the peak value of the upper half-bridge IGBT turn-off overvoltage V PKIU The logic unit is based on V PKIU The magnitude of the change affects the adjustment signal V during the transient turn-off of the upper half-bridge IGBT. SU The adjustable gate amplifier 2 adjusts the turn-off rate of the upper half-bridge IGBT; When the peak value is the reverse recovery overvoltage spike V of the anti-parallel diode of the lower half-bridge IGBT PKDD The logic unit is based on V PKDD The magnitude of the change in the adjustment signal V during the turn-on transient of the upper half-bridge IGBT SU The adjustable gate amplifier 2 adjusts the turn-on rate of the upper half-bridge IGBT.

10. A method for extracting overvoltage peak values ​​from an IGBT half-bridge module, characterized in that, This method adjusts the turn-off rate of the IGBT half-bridge module by detecting overvoltage spikes in the IGBT half-bridge module. The method includes: The peak extraction circuit described in any one of claims 1-4 is used to monitor in real time the overvoltage spikes caused by the switching transients of the IGBT half-bridge module. The attribution of the overvoltage spike is determined by the peak value detected within a very short time after the turn-on and turn-off signals received by the half-bridge driver. The turn-on and turn-off rates of the half-bridge IGBT are adjusted according to the size and origin of the overvoltage spike.

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