A RAM test coverage collection method, device and universal interface component

Abstract

The application relates to the technical field of memory detection, in particular to a RAM test coverage collection method and device. The RAM test coverage collection method comprises the following steps: instantiating a general interface component according to the parameters of RAM in a test environment; the test environment comprises a conflict source and the RAM; a connection between the conflict source and the instantiated general interface component is established; data sent by the conflict source when accessing the RAM is collected based on the connection through the instantiated general interface component; and the test coverage is determined according to the collected data sent by the conflict source. The general interface component is instantiated and distinguished through different parameters for different RAMs, can adapt to the RAM in different test environments, and realizes unified and general RAM test coverage collection.

Description

Technical Field

[0001] This invention relates to the field of memory testing technology, and in particular to a method, apparatus, universal interface component, and computing device for collecting RAM test coverage. Background Technology

[0002] Random Access Memory (RAM) is an internal memory that directly exchanges data with the Central Processing Unit (CPU). It can be read and written at any time and is very fast, typically serving as temporary data storage for the operating system or other running programs.

[0003] To determine if there are problems with CPU accessing RAM, we can conduct read and write tests on the CPU to RAM. During the testing process, we can use coverage data to ensure the comprehensiveness of the test.

[0004] In most existing technologies, coverage is collected through waveform inspection or specific coverage collection after each test event is covered. This is cumbersome and there is no unified or universal RAM test coverage collection scheme. Summary of the Invention

[0005] In view of the above-mentioned problems of the prior art, this application provides a RAM test coverage collection method and apparatus, which can achieve the universality and comprehensiveness of RAM test coverage collection.

[0006] To achieve the above objectives, the first aspect of this application provides a RAM test coverage collection method, comprising:

[0007] A generic interface component is instantiated based on the parameters of RAM in the test environment; the test environment includes conflict sources and RAM.

[0008] Establish a connection between the conflict source and the instantiated generic interface component;

[0009] The instantiated generic interface component collects the data sent when accessing RAM based on the connection source of the conflict.

[0010] The test coverage is determined based on the data sent by the collected conflict sources.

[0011] This implementation introduces a universal interface component, which is passively instantiated in the RAM testing environment. It spreads out the data sent by conflict sources when accessing RAM in a batch manner, without requiring special stimulus, and then performs coverage collection. This universal interface component is instantiated and differentiated for different RAMs using different parameters. It can adapt to RAMs in different testing environments, achieving unified and universal RAM test coverage collection.

[0012] As one possible implementation of the first aspect, data sent when the conflict source accesses RAM is collected, including:

[0013] According to the clock sequence, the data sent by the conflict source when accessing RAM is collected sequentially at a certain sampling period, and stored in each register in turn;

[0014] The test coverage is determined based on the data sent by the conflict sources, including: determining the test coverage by comparing the data sent by the conflict sources stored in each register.

[0015] As one possible implementation of the first aspect, determining test coverage includes: determining whether the test requirement points are covered based on the data sent by the collected conflict sources;

[0016] Calculate test coverage based on whether the test requirements are covered.

[0017] As one possible implementation of the first aspect, the RAM parameters include at least one of the following: data bit width, address line length, number of collision sources, length of the collision window to be counted, and whether parity time slots are required.

[0018] A second aspect of this application provides a RAM test coverage collection device, comprising:

[0019] The instantiation module is used to instantiate a general interface component based on the parameters of RAM in the test environment; the test environment includes conflict sources and RAM.

[0020] The connection module is used to establish a connection between the conflict source and the instantiated generic interface component.

[0021] The acquisition module is used to acquire data sent when accessing RAM based on the connection conflict source through the instantiated general interface component;

[0022] The test coverage determination module is used to determine test coverage based on the data sent by the collected conflict sources.

[0023] As one possible implementation of the second aspect, the acquisition module is specifically used to: sequentially acquire the data sent by the conflict source when accessing RAM according to the clock sequence and at a certain sampling period, and store it into each register in sequence;

[0024] The test coverage determination module is specifically used to determine test coverage by comparing the data sent by the conflict sources stored in each register.

[0025] As one possible implementation of the second aspect, determining test coverage includes:

[0026] Determine whether the test requirements are covered based on the data sent by the collected conflict sources;

[0027] Calculate test coverage based on whether the test requirements are covered.

[0028] As one possible implementation of the second aspect, the RAM parameters include at least one of the following: data bit width, address line length, number of collision sources, length of the collision window to be counted, and whether parity time slots are required.

[0029] The third aspect of this application provides a general interface component for a RAM test coverage collection method, which can be instantiated according to the parameters of RAM in the test environment;

[0030] The instantiated generic interface component includes an interface for establishing a connection with the source of the conflict;

[0031] The instantiated general-purpose interface component also includes multiple registers for storing data sent when a conflict source accesses RAM in clock order.

[0032] A fourth aspect of this application provides a computing device, comprising:

[0033] processor, and

[0034] A memory storing program instructions that, when executed by the processor, cause the processor to perform the RAM test coverage collection method as described above.

[0035] These and other aspects of the invention will become more apparent from the following description of several embodiments. Attached Figure Description

[0036] The various features of the present invention and the relationships between them are further explained below with reference to the accompanying drawings. The drawings are exemplary; some features are not shown to scale, and some drawings may omit conventional features in the field of this application that are not essential to this application, or additional features that are not essential to this application may be shown. The combination of features shown in the drawings is not intended to limit the present application. Furthermore, throughout this specification, the same reference numerals refer to the same things. Specific descriptions of the drawings are as follows:

[0037] Figure 1This is a flowchart of the RAM test coverage collection method provided in the first embodiment of this application;

[0038] Figure 2 This is a flowchart of the RAM test coverage collection method provided in the second embodiment of this application;

[0039] Figure 3 This is a schematic diagram of the structure of the general interface component provided in the embodiments of this application;

[0040] Figure 4 A schematic diagram of the RAM test coverage collection device provided in this application embodiment;

[0041] Figure 5 This is a schematic structural diagram of a computing device 900 provided in an embodiment of this application. Detailed Implementation

[0042] The technical solutions provided in this application will be further described below with reference to the accompanying drawings and embodiments. It should be understood that the system architecture and business scenarios provided in the embodiments of this application are mainly for illustrating possible implementations of the technical solutions of this application and should not be construed as the sole limitation on the technical solutions of this application. Those skilled in the art will recognize that the technical solutions provided in this application are equally applicable to similar technical problems as system architectures evolve and new business scenarios emerge.

[0043] It should be understood that the RAM test coverage collection scheme provided in this application includes a RAM test coverage collection method, apparatus, general interface component, computing device, and computer-readable storage medium. Since these technical solutions solve problems based on the same or similar principles, some repetitive details may not be repeated in the following descriptions of specific embodiments. However, it should be considered that these specific embodiments have mutual references and can be combined with each other.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. In case of any inconsistency, the meaning set forth in this specification or derived from the content described herein shall prevail. Furthermore, the terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application. To accurately describe the technical content of this application and to accurately understand the invention, the following explanations or definitions of the terms used in this specification are provided before describing specific embodiments:

[0045] Instantiation: In this embodiment of the application, it refers to configuring a general interface component using parameter passing.

[0046] Encapsulation: Enclosing processes and data, so that access to the data can only be done through a defined interface;

[0047] Test coverage: A measure of the degree to which tests are completed; it is usually based on a certain coverage criterion to measure the execution of test cases in order to determine whether the tests have been executed sufficiently.

[0048] Enable: Responsible for controlling the input and output of control signals;

[0049] Simulation: Using simulation hardware and software to conduct simulation experiments, and with the help of numerical calculations and problem solving, to reflect the behavior or process of a system.

[0050] The RAM test coverage collection scheme provided in this application is mainly used for RAM test coverage collection to determine the comprehensiveness of the test.

[0051] The first embodiment of this application provides a RAM test coverage collection method, such as... Figure 1 As shown, Figure 1 A flowchart of the RAM test coverage collection method provided in the first embodiment of this application.

[0052] S101: Instantiate a general interface component based on the parameters of RAM in the test environment.

[0053] In order to call the generic interface component in this embodiment in the RAM test environment, the generic interface component needs to be instantiated; wherein, the test environment includes the conflict source and RAM.

[0054] During instantiation, the `interface` keyword can be used to declare the generic interface component, and parameters will be passed to the generic interface component during instantiation to complete the encapsulation.

[0055] Furthermore, the general interface component can be instantiated with appropriate parameters based on different RAM testing conditions, enabling comprehensive handling of RAM in various testing environments. For example, the general interface component can be instantiated based on parameters such as the RAM's data bit width, data address, access conflict sources, number of conflict sources, and parity timing in the RAM testing environment.

[0056] S102: Establish the connection between the conflict source and the instantiated generic interface component.

[0057] The connection between the conflict source and the instantiated general interface component can be achieved by connecting the conflict source enable and the general interface component enable, so that the general interface component can obtain the conflict source enable data; by connecting the conflict source data address and the general interface component data address, so that the general interface component can obtain the conflict source data address data; and by connecting the conflict source data (data) and the general interface component data, so that the general interface component can obtain the data sent by each conflict source when accessing RAM.

[0058] S103: Data sent when accessing RAM based on a connection source is collected through the instantiated general interface component.

[0059] The clock signal (Clk, Clock) corresponding to each data point is registered in the corresponding clock register. This general-purpose interface component includes multiple registers, which can transmit the data sent by the collision source when accessing RAM according to the clock sequence through a scalar method. This general-purpose interface component can sample data according to a preset clock sampling frequency and the order of the collision sources.

[0060] S104: Determine test coverage based on the data sent by the collected conflict sources.

[0061] In this implementation, the instantiated general interface component is invoked in the RAM testing environment, and RAM testing is performed. Then, the data sent by the conflict sources collected by the general interface component is monitored to determine the test coverage. Furthermore, the functional coverage of each conflict source can be collected through data monitoring such as RAM test simulation, and the test progress and comprehensiveness can be determined through coverage collection.

[0062] This implementation introduces a universal interface component, which is passively instantiated in the RAM testing environment. Coverage collection can be performed after simulation regression without requiring special stimulus. This universal interface component instantiates and differentiates itself for different RAMs using different parameters, adapting to various RAM tests. This achieves a unified and universal RAM test coverage collection.

[0063] The following describes a specific implementation method for collecting RAM test coverage, further illustrating an embodiment of this application. In this embodiment, it is assumed that the environment to be tested includes one RAM and two CPUs. The two CPUs can access the RAM. Since the test involves the conflicting access scenarios of these two CPUs to the RAM (e.g., simultaneous access to the same address), these two CPUs are referred to as two conflict sources in this example. After instantiating the general interface component of this application with reference to the RAM parameters and interfacing it with the two CPU interfaces, the CPU access data can be monitored when the two CPUs access the RAM (i.e., send data to the RAM), and stored in a register. The test coverage can then be determined based on the data in the register. The following refers to... Figure 2 The flowchart of the second embodiment of the RAM test coverage collection method provided in this embodiment is shown in detail. This embodiment includes the following steps:

[0064] S201: Instantiate the general interface components according to the parameters of RAM in the test environment.

[0065] This embodiment provides a general interface component. A general interface component pfs_acl_frm_conf_vif can be defined using the interface (interface operation keyword). This general interface component includes multiple registers, which will be described in detail in step S204.

[0066] Based on RAM testing results, the generic interface component is instantiated using RAM parameters. This involves passing RAM parameters to the generic interface component to configure it. For example, parameters such as RAM data width, address lines, access conflict sources, number of conflict sources, and parity slots are passed to the generic interface component to complete the instantiation. The instantiated generic interface component then has the same parameter configuration as the RAM in the test environment.

[0067] For example, in a specific RAM test environment, parameters can be passed when instantiating this generic interface component in the following way:

[0068] confilict_if #(186,11,2,5,0);

[0069] Where #(186,11,2,5,0) are the parameters passed to the general interface component during instantiation, namely: 186-bit data width, 11-bit address bus, 2 conflict sources for accessing RAM, 5-bit conflict window length (number of Clks to be accessed) for accessing RAM, and no odd / even time slots (1 is required, 0 is not required, i.e., full time slots).

[0070] As described above, the instantiation of the general interface component in the RAM test environment is completed through the above parameter passing.

[0071] In this embodiment, for different RAM test requirements, a general interface component can be instantiated using the parameters of the RAM to adapt to the parameter requirements such as RAM data bit width and the number of conflict sources accessing the RAM in the RAM test. In the example of `confilict_if #(186,11,2,5,0)`, there are two conflict sources accessing the RAM in the RAM test, namely the two CPUs mentioned above, which are denoted as source_0 and source_1 respectively.

[0072] In addition, when the test environment changes, the parameters of the general interface component can be changed again by passing parameters, that is, the general interface component can be re-instantiated, so that the general interface component can cope with different RAM widths, depths, delays, etc., thus enabling it to comprehensively cope with various RAMs.

[0073] S202: Establish test requirement points for two conflicting sources accessing RAM.

[0074] Based on the testing requirements, test requirement points are established for the two conflict sources in the above RAM test. The test requirement points will record the data of the conflict sources, and each conflict source can have multiple test requirement points of the same number.

[0075] For example, the RAM test environment in this example includes two CPUs, denoted as source_0 and source_1, which are two conflict sources. The Covergroup function can be used to create test requirement points that conform to source_0 and source_1 respectively. That is, using the data of source_0 as the current set, test requirement points for source_1 to access RAM are created; and using the data of source_1 as the current set, test requirement points for source_0 to access RAM are created.

[0076] For example, using the data from source_0 as the current set, the test requirement point for source_1 to access RAM can be established as follows:

[0077] `covergroup conflic for 2 all` (defines a total of 2 conflict sources).

[0078] (ref logic source_0, (defining source_0 as the current set);

[0079] ref logic[CONF_IF_DEALY*2:0] source_1_map, (defining the test requirement point of source_1 as source_1_map);

[0080] ref logic [CONF IF_ADDR-1:0] addr_0, (defines the data address of source_0)

[0081] ref logic [CONF_IF_ADDR-1:0] addr_1 (defines the data address of source_1).

[0082] S203: Connect the conflict source to the instantiated general interface component so that the instantiated general interface component can monitor the data sent by the conflict source when accessing RAM.

[0083] The connections here include: connecting the enable of the conflict source and the enable of the general interface component so that the general interface component can obtain the enable data of the conflict source; connecting the data address of the conflict source with the data address of the general interface component so that the general interface component can obtain the data address data of the conflict source; and connecting the data of the conflict source with the data of the general interface component so that the general interface component can obtain the data sent by each conflict source when accessing RAM. The following shows an example of connecting the conflict source and the instantiated general interface component through the assign function, where [0] represents the conflict source source_0 and [1] represents the conflict source source_1:

[0084] Connect the enable of conflict source [0] to the enable of the general interface component:

[0085] assign pfs_acl_frm_conf_vif .in_conf_ena [0]=

[0086] `PFS_ACL_TOP_DUT_INST_PATH. U_acl_wrapper.frer_elim_active;

[0087] Connect the data address of the conflict source [0] to the data address of the general interface component:

[0088] assign pfs_acl_frm_conf_vif .in_conf_addr [0]=

[0089] `PFS_ACL_TOP_DUT_INST_PATH. U_acl_wrapper.stream_hd1;

[0090] Connect the data from the conflict source [0] with the data from the general interface component:

[0091] assign pfs_acl_frm_conf_vif .in_conf_data [0]=

[0092] `PFS_ACL_TOP_DUT_INST_PATH. U_acl_wrapper. stream_wr_data;

[0093] Connect the enable of the conflict source [1] to the enable of the general interface component:

[0094] assign pfs_acl_frm_conf_vif .in_conf_ena [1]=

[0095] `PFS_ACL_TOP_DUT_INST_PATH. U_acl_wrapper.ticks_update_flag;

[0096] Connect the data address of the conflict source [1] to the data address of the general interface component:

[0097] assign pfs_acl_frm_conf_vif .in_conf_addr [1]=

[0098] `PFS_ACL_TOP_DUT_INST_PATH. U_acl_wrapper. ticks_update_num;

[0099] Connect the data from the conflict source [1] with the data from the general interface component:

[0100] assign pfs_acl_frm_conf_vif .in_conf_data [1]=

[0101] `PFS_ACL_TOP_DUT_INST_PATH. U_acl_wrapper. ticks_update_data.

[0102] This means that in the test environment, each conflict source has already established a connection with the RAM (including conflict source enable, data address, and data connection with RAM). Therefore, each conflict source can initiate access, and each RAM can receive the access. Through this step, it is equivalent to simultaneously establishing the above connection relationship between the general interface component and each conflict source, so that when each conflict source initiates access to the RAM, the general interface component can receive the access.

[0103] S204: The instantiated general interface component collects the data sent by each conflict source when accessing RAM through the established connection with each conflict source.

[0104] like Figure 3 This is a schematic diagram of the structure of the general interface component provided in this embodiment, which includes multiple registers.

[0105] When a conflict source accesses RAM, since the instantiated general interface component has already established a connection with the conflict source, it will collect the data sent by the conflict source when accessing RAM through the established data address connection and data connection. This data may include the RAM address to be read / written, the data read / written to the corresponding RAM address, etc.

[0106] This general-purpose interface component, based on clock sequence, samples the data sent by the conflict source when accessing RAM in a scalar manner, corresponding to each clock cycle (Clk), into multiple registers of the general-purpose interface component. This general-purpose interface component can store the data at each Clk in different registers within itself, thus spreading out the data from different times according to time.

[0107] For example, suppose the general interface component includes N registers: D0, D1, D2...Dn, and the length of the collision window to be counted is 5. Then, during sampling, 5 Clk data points are sampled each time. For instance, the first sample of source_0 data is placed in register D0. The second sample of source_1 data is sampled, and the data from D0 is moved to register D1, while the second sample remains in register D0. Then, during the third sample, source_0 data is sampled again, and the third sample is in register D0. The data from the second sample is moved to register D1, the data from the first sample is moved to register D2, and so on.

[0108] S205: Compare the data of each conflict source obtained through the instantiated general interface component to determine whether the data of each conflict source can be matched and recorded in the corresponding test requirement point.

[0109] After the general interface component obtains the data of each conflict source, the data of each conflict source should be recorded in its corresponding test requirement point. Therefore, by comparing the data in each register, it can be determined whether the data of each conflict source can be recorded in the corresponding test requirement point, and thus determine whether the function to be tested can be covered.

[0110] For example, when testing for conflicts where source_0 and source_1 simultaneously access the same read address, the data corresponding to the conflict sources source_0 and source_1 recorded in the registers can be compared. This comparison involves examining the accessed RAM addresses to determine if a test for simultaneous access to the same read address exists and whether the test requirement is met. Specifically, if the data from each conflict source can be recorded in the test requirement, it indicates that the test function for simultaneous access to the same read address in RAM testing is covered (implemented). If the data from one conflict source cannot be recorded in the corresponding test requirement, it indicates that the test function for simultaneous access to the same read address in RAM testing has not been implemented.

[0111] The items to be compared can also include accessing the same write address during conflict times, full address access, etc. The comparison is the same as the example of simultaneously accessing the same read address mentioned above, so it will not be repeated here.

[0112] S206: Perform coverage collection.

[0113] The RAM test coverage can be obtained by finding the covered and uncovered test requirements, as well as the percentage of covered test requirements.

[0114] For example, in RAM testing, the test items (comparing each other) for conflict sources source_0 and source_1 include simultaneous access to the same read address, access to the same address within a conflict period, and full address access. Assume each conflict source corresponds to one test requirement point, meaning the total number of test requirement points is 3. If simultaneous access to the same read address and access to the same address within a conflict period occur, the data from each conflict source can be recorded in the corresponding test requirement point. During full address access, the data from source_0 can be recorded in the corresponding test requirement point, while the data from source_1 cannot. This indicates that the number of covered test requirement points is 2, and the percentage of covered test requirement points is 66.67%, meaning the RAM test coverage rate is 66.67%.

[0115] In some implementations, coverage can be collected through simulation. The simulation monitoring results (files) show the covered and uncovered test requirements in the RAM test, as well as the percentage of covered test requirements, i.e., the test coverage.

[0116] Coverage rate can be used to track testing progress. When the coverage rate does not meet the requirements, supplementary tests and verifications can be added to the uncovered test requirements in the corresponding verification scenarios.

[0117] Another aspect of this application's embodiments also provides a general interface component for a RAM test coverage collection method, such as... Figure 3 As shown.

[0118] The generic interface component can be instantiated based on the parameters of the RAM in the test environment;

[0119] The instantiated generic interface component includes an interface for establishing a connection with the source of the conflict;

[0120] The instantiated general-purpose interface component also includes multiple registers for storing data sent when a conflict source accesses RAM in clock order.

[0121] The general-purpose interface component provided in this embodiment is instantiated as a passive module in the RAM testing environment. It requires no special stimulus and can perform coverage collection after simulation regression. This general-purpose interface component instantiates and differentiates different RAMs using different parameters, enabling it to adapt to various RAM tests. This achieves a unified and universal RAM test coverage collection.

[0122] Based on an inventive concept, this application also provides a RAM test coverage collection device 400. For example... Figure 4 As shown, Figure 4 This is a schematic diagram of the RAM test coverage collection device 400 provided in this embodiment. The RAM test coverage collection device 400 in this embodiment is specifically used to perform steps S101-S104 and any optional examples thereof. For details, please refer to the detailed description in the method embodiment; a brief summary is provided below:

[0123] Instantiation module 401 is used to instantiate a general interface component according to the parameters of RAM in the test environment; the test environment includes conflict sources and RAM;

[0124] Connection module 402 is used to establish a connection between the conflict source and the instantiated generic interface component;

[0125] The acquisition module 403 is used to acquire data sent when accessing RAM based on the connection acquisition conflict source through the instantiated general interface component;

[0126] The test coverage determination module 404 is used to determine the test coverage based on the data sent by the collected conflict sources.

[0127] In some implementations, the acquisition module 403 is specifically used to: acquire the data sent by the conflict source when accessing RAM according to the clock sequence and at a certain sampling period, and store it into each register in sequence;

[0128] The test coverage determination module is specifically used to determine test coverage by comparing the data sent by the conflict sources stored in each register.

[0129] In some implementations, the test coverage determination module 404 includes the following steps when determining test coverage:

[0130] Determine whether the test requirements are covered based on the data sent by the collected conflict sources;

[0131] Calculate test coverage based on whether the test requirements are covered.

[0132] In some implementations, the parameters of the RAM include at least one of the following: data bit width, address line length, number of collision sources, length of the collision window to be counted, and whether parity time slots are required.

[0133] The aforementioned RAM test coverage collection device 400, instantiated as a passive module in the environment, can achieve coverage collection without special stimulation. Furthermore, coverage collection can also be performed after simulation regression. The aforementioned general interface component instantiates and differentiates different RAMs using different parameters, adapting to various RAM tests. This achieves a unified and universal RAM test coverage collection.

[0134] Figure 5 This is a schematic structural diagram of a computing device 900 provided in an embodiment of this application. This computing device can serve as a RAM test coverage collection apparatus, executing various optional embodiments of the above-described RAM test coverage collection method. The computing device can be a terminal, or a chip or chip system within the terminal. Figure 5 As shown, the computing device 900 includes: a processor 910, a memory 920, and a communication interface 930.

[0135] It should be understood that Figure 5 The communication interface 930 in the computing device 900 shown can be used to communicate with other devices, and may specifically include one or more transceiver circuits or interface circuits.

[0136] The processor 910 can be connected to the memory 920. The memory 920 can be used to store the program code and data. Therefore, the memory 920 can be a storage unit inside the processor 910, an external storage unit independent of the processor 910, or a component that includes both the storage unit inside the processor 910 and the external storage unit independent of the processor 910.

[0137] Optionally, the computing device 900 may also include a bus. The memory 920 and communication interface 930 can be connected to the processor 910 via the bus. The bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 The symbol is represented by a line without an arrow, but this does not mean that there is only one bus or one type of bus.

[0138] It should be understood that in the embodiments of this application, the processor 910 may be a central processing unit (CPU). The processor may also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor. Alternatively, the processor 910 may employ one or more integrated circuits to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0139] The memory 920 may include read-only memory and random access memory, and provides instructions and data to the processor 910. A portion of the processor 910 may also include non-volatile random access memory. For example, the processor 910 may also store device type information.

[0140] When the computing device 900 is running, the processor 910 executes computer execution instructions stored in the memory 920 to perform any of the operational steps of the above method and any of the optional embodiments thereof.

[0141] It should be understood that the computing device 900 according to the embodiments of this application can correspond to the corresponding subject in executing the methods according to the various embodiments of this application, and the above and other operations and / or functions of each module in the computing device 900 are respectively for implementing the corresponding processes of the methods of this embodiment. For the sake of brevity, they will not be described in detail here.

[0142] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0143] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0144] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0145] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0146] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0147] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0148] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, is used to perform the above-described method, which includes at least one of the schemes described in the above embodiments.

[0149] The computer storage medium in this application embodiment can be any combination of one or more computer-readable media. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. For example, a computer-readable storage medium can be, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0150] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0151] The program code contained on a computer-readable medium may be transmitted using any suitable medium, including, but not limited to, wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0152] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider). Furthermore, the terms "first," "second," "third," etc., or similar terms such as module A, module B, module C, etc., used in the specification and claims are only used to distinguish similar objects and do not represent a specific ordering of objects. It is understood that a specific order or sequence can be interchanged where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0153] In the above description, the labels of the steps involved, such as S110, S120, etc., do not mean that the steps will necessarily be executed. The order of the steps can be interchanged or executed simultaneously if permitted.

[0154] The term "comprising" as used in the specification and claims should not be construed as limiting itself to what follows; it does not exclude other elements or steps. Therefore, it should be interpreted as specifying the presence of the mentioned feature, integral, step, or component, but does not exclude the presence or addition of one or more other features, integrals, steps, or components, or groups thereof. Thus, the statement "device comprising means A and B" should not be limited to a device consisting solely of components A and B.

[0155] The terms "an embodiment" or "an embodiment" as used in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in at least one embodiment of this application. Therefore, the terms "in one embodiment" or "in an embodiment" appearing throughout this specification do not necessarily refer to the same embodiment, but may refer to the same embodiment. Furthermore, in one or more embodiments, the particular features, structures, or characteristics can be combined in any suitable manner, as will be apparent to those skilled in the art from this disclosure.

[0156] Note that the above are merely preferred embodiments and the technical principles employed in this application. Those skilled in the art will understand that this application is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of this application. Therefore, although this application has been described in detail through the above embodiments, this application is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of this application, all of which fall within the scope of protection of this application.

Claims

1. A method for collecting RAM test coverage, characterized in that, include: Instantiate a general interface component based on the parameters of RAM in the test environment; The test environment includes the conflict source and the RAM; Establish a connection between the conflict source and the instantiated generic interface component; The instantiated generic interface component collects data sent by the conflict source when accessing the RAM based on the connection. The test coverage is determined based on the data sent by the collected conflict sources; The acquisition of data sent when the conflict source accesses the RAM includes: According to the clock sequence, the data sent by the conflict source when accessing the RAM is collected sequentially at a certain sampling period, and stored in each register in turn; Determining the test coverage based on the data sent by the conflict source includes: comparing the data sent by the conflict source stored in each register to determine the test coverage.

2. The method according to claim 1, characterized in that, Determining test coverage includes: Determine whether the test requirement points are covered based on the data sent by the collected conflict source; The test coverage rate is calculated based on whether the test requirement points are covered.

3. The method according to claim 1, characterized in that, The parameters of the RAM include at least one of the following: data bit width, address line length, number of conflict sources, length of the conflict window to be counted, and whether parity time slots are required.

4. A RAM test coverage collection device, characterized in that, include: The instantiation module is used to instantiate a general interface component based on the parameters of RAM in the test environment. The test environment includes the conflict source and the RAM; The connection module is used to establish a connection between the conflict source and the instantiated general interface component; The acquisition module is used to acquire data sent by the conflict source when accessing the RAM based on the connection through the instantiated general interface component; The test coverage determination module is used to determine the test coverage based on the data sent by the collected conflict source; Specifically, the acquisition module is used to: sequentially acquire the data sent by the conflict source when accessing the RAM according to the clock sequence and at a certain sampling period, and store it in each register in sequence; the test coverage determination module is used to: determine the test coverage by comparing the data sent by the conflict source stored in each register.

5. The apparatus according to claim 4, characterized in that, Determining test coverage includes: Determine whether the test requirement points are covered based on the data sent by the collected conflict source; The test coverage rate is calculated based on whether the test requirement points are covered.

6. The apparatus according to claim 4, characterized in that, The parameters of the RAM include at least one of the following: data bit width, address line length, number of conflict sources, length of the conflict window to be counted, and whether parity time slots are required.

7. A universal interface component for the RAM test coverage collection method according to any one of claims 1 to 3, characterized in that, The general interface component can be instantiated according to the parameters of RAM in the test environment; The instantiated generic interface component includes an interface for establishing a connection with the source of the conflict; The instantiated general interface component also includes multiple registers for storing data sent by the conflict source when accessing the RAM in clock order.

8. A computing device, characterized in that, include: processor, and A memory having program instructions stored thereon, which, when executed by the processor, cause the processor to perform the RAM test coverage collection method according to any one of claims 1 to 3.

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