Automatic generation methods, systems and electronic equipment for electrical schematics
By performing connectivity set analysis and decoupling on EICD data, and combining block merging and force-directed algorithm to optimize the layout, electrical schematic diagrams are automatically generated, solving the problems of low design efficiency and inconsistent style, and realizing efficient and standardized electrical schematic diagram generation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- COMMERCIAL AIRCRAFT CORP OF CHINA LTD
- Filing Date
- 2022-11-29
- Publication Date
- 2026-07-31
AI Technical Summary
Existing technologies often result in inefficient electrical schematic design, are prone to errors, and suffer from inconsistent design styles, which negatively impact readability.
By acquiring EICD data for connectivity set analysis and decoupling, matching the connectivity set type with the drawing page, drawing blocks, and making adjustments in the drawing page, including merging identical objects and using force-directed algorithms to optimize the layout, an electrical schematic diagram is generated.
It improves design efficiency, reduces error rates, and produces electrical schematics with a consistent style, enhancing readability and aesthetics.
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Figure CN116011156B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of this application relate to the field of electrical schematic design technology, and in particular to a method, system and electronic device for automatically generating electrical schematics. Background Technology
[0002] With the continuous development of science and technology, complex equipment such as airplanes, ships, and automobiles are becoming increasingly functional, and the interconnections between various systems are becoming more and more complex, resulting in increasingly complex electrical schematic diagrams. The traditional model of relying on manual design of electrical schematic diagrams can no longer meet the increasingly complex engineering application needs and the increasingly tight engineering design cycle. It is necessary to adopt automated methods, using software and algorithms to replace designers in electrical schematic diagram design, thereby improving design efficiency and design quality.
[0003] Electrical schematic diagrams are an important part of system electrical design, used to describe the working principle of equipment and the electrical interface relationships between them. The current method of relying on manual design of electrical schematic diagrams has several drawbacks: manual design is time-consuming and labor-intensive, and inevitably prone to basic errors; different designers have different drawing habits, leading to inconsistent design styles and affecting the overall aesthetics and readability. Summary of the Invention
[0004] The embodiments of this application provide an automatic electrical schematic generation method, system, and electronic device to solve the technical problems of low efficiency, easy error, and inconsistent design style affecting readability in the prior art.
[0005] To address the aforementioned technical problems, embodiments of this application disclose the following technical solutions:
[0006] Firstly, a method for automatically generating electrical schematic diagrams is provided, including:
[0007] Match the connected set data and connected set type with the graph page;
[0008] Based on the connected set data and the connected set type, a graph block is drawn;
[0009] The obtained blocks are adjusted in the drawing page and then output to obtain the electrical schematic diagram.
[0010] In conjunction with the first aspect, the method for obtaining the connected set type includes:
[0011] Acquire EICD data, and perform connected set analysis and decoupling on the EICD data to obtain connected set data;
[0012] The data structure of the connected set data is analyzed to obtain the connected set type;
[0013] The connected set type includes one or more of the following: simple connected type, equipotential type, bus type, and relay type.
[0014] In conjunction with the first aspect, the method for matching connected set data and connected set type with the graph page includes:
[0015] The connected sets are pre-grouped according to their functions, and connected sets in the same group are placed on the same page.
[0016] The number of pages is determined based on the capacity of the illustrations.
[0017] In conjunction with the first aspect, the method for drawing and obtaining a tile based on the connected set data and the connected set type includes the following steps:
[0018] Based on electrical schematic drawing standards, design specifications, and historical electrical schematic data, obtain the rules for drawing digital diagrams and the drawing methods corresponding to each type of connected set;
[0019] Based on the digital drawing rules and methods, as well as the acquired connected set data and the connected set type, a block is drawn.
[0020] In conjunction with the first aspect, the method for adjusting the obtained blocks in the drawing page includes the following steps:
[0021] Merge different blocks based on the objects contained within them;
[0022] The positions of the merged blocks are arranged according to the scope of the page.
[0023] In conjunction with the first aspect, the method for merging different blocks based on the objects contained in the blocks includes the following steps:
[0024] Within the same drawing page, portions of different drawing blocks that contain the same object are merged;
[0025] Adjust the elements in the merged block accordingly;
[0026] The objects include devices and connectors, and the elements include pins, labels, symbols, and lines of the block.
[0027] In conjunction with the first aspect, the method for arranging the positions of the merged blocks according to the range of the drawing page includes the following steps:
[0028] Determine the effective area of the drawing page;
[0029] Obtain the dimensions of the block;
[0030] Delineate the minimum rectangular frame in the drawing page according to the size of the block;
[0031] Arrange the obtained minimum rectangles on the drawing page;
[0032] The force between adjacent smallest rectangular frames is calculated using a force-guided algorithm;
[0033] The position of the minimum rectangle is adjusted according to the applied force;
[0034] The dimensions include the overall length and width of the block.
[0035] Secondly, an automatic electrical schematic diagram generation system is provided, the system comprising:
[0036] The pattern pagination module is used to match patterns with connected set data and connected set types.
[0037] A tile drawing module is used to draw tiles based on the connected set data and the connected set type.
[0038] The block adjustment module is used to adjust the obtained blocks in the drawing page and then output them to obtain an electrical schematic diagram.
[0039] In conjunction with the second aspect, the system further includes a data analysis module, which is used to acquire EICD data, perform connected set analysis and decoupling on the EICD data to obtain connected set data, and parse the connected set data to obtain the connected set type.
[0040] In conjunction with the second aspect, the block adjustment module includes a block merging module and a drawing layout module;
[0041] The tile merging module is used to merge parts of the tile that have the same function and attributes, and to adjust the elements in the merged tile accordingly.
[0042] The image layout module is used to determine the effective area of the image page; obtain the size of the image block; define the minimum rectangle in the image page according to the size of the image block; arrange the obtained minimum rectangles on the image page; calculate the interaction force between adjacent minimum rectangles using a force-guided algorithm; and finally adjust the position of the minimum rectangles according to the interaction force.
[0043] In conjunction with the second aspect, the system also includes:
[0044] A basic database is used to store the EICD data required for generating electrical schematics;
[0045] An electrical symbol and drawing frame library, which stores the electrical symbols and standard drawing frames required for electrical schematic diagrams;
[0046] A standard component library is used to store the attributes of standard components related to electrical schematic diagrams, including standard component part numbers and their attribute information. There is an association between the standard component library and the electrical symbol and drawing frame library.
[0047] Thirdly, an electronic device is provided, including a memory and a processor; the memory is used to store a computer program; the processor is used to implement the automatic electrical schematic generation method as described in the first aspect when the computer program is executed.
[0048] One of the above technical solutions has the following advantages or beneficial effects:
[0049] Compared with existing technologies, this application provides an automatic electrical schematic diagram generation method, system, and electronic device, comprising: matching connected set data and connected set type with a drawing page; drawing blocks according to the connected set data and connected set type; adjusting the obtained blocks in the drawing page and then outputting them to obtain an electrical schematic diagram. The automatic electrical schematic diagram generation method provided in this application can automatically generate electrical schematic diagrams, greatly improving design efficiency and quality, and reducing the design error rate; furthermore, the output electrical schematic diagram is paginated based on system functions, with a unified style, more standardized drawings, and better readability compared to manually drawn diagrams. Attached Figure Description
[0050] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.
[0051] Figure 1 This is a schematic diagram of the method flow provided in the embodiments of this application;
[0052] Figure 2 This is a schematic diagram illustrating the method implementation steps provided in the embodiments of this application;
[0053] Figure 3 This is a schematic diagram of the system structure provided in the embodiments of this application;
[0054] Figure 4 This is a schematic diagram of the drawing structure of block 1 provided in the embodiments of this application;
[0055] Figure 5 This is a schematic diagram of the drawing structure of block 2 provided in the embodiments of this application;
[0056] Figure 6 This is a schematic diagram of the drawing structure of block 3 provided in the embodiments of this application;
[0057] Figure 7 This is a schematic diagram of the drawing structure of block 4 provided in the embodiments of this application;
[0058] Figure 8 This is a schematic diagram of the structure of the merged blocks in Figure 1 provided in an embodiment of this application;
[0059] Figure 9 Provided for the embodiments of this application Figure 8 A schematic diagram after the pattern is output.
[0060] Figure 10 Provided for the embodiments of this application Figure 7 A schematic diagram of the output pattern. Detailed Implementation
[0061] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0062] The specific implementation methods of this application are illustrated below through examples:
[0063] like Figure 1 As shown, an automatic generation method for electrical schematic diagrams includes:
[0064] S1: Match the connected set data and connected set type with the graph page;
[0065] The specific steps are as follows:
[0066] First, EICD data is acquired, and then connected set analysis and decoupling are performed to obtain connected set data. The Electrical Interface Control Document (EICD) is used to reduce the complexity of the EICD data through decoupling. A connected set refers to a set of logical signals between two or more devices that express the same function. On one hand, by analyzing the input data (by parsing the connection relationships between devices and connectors and the system functions they carry), the EICD data can be divided into several connected sets, each acting as an independent unit. On the other hand, since each type of connected set has its typical data characteristics, the type of connected set can be determined by parsing the data within a single connected set. After processing by the data analysis module, the EICD data is divided into blocks and classified, simplifying the problem and greatly improving design efficiency. Connected set types include simple connected, equipotential, bus, and relay types, among others.
[0067] Based on the function of connected sets, pregroup connected sets and place connected sets in the same group on the same page;
[0068] Pregrouping the blocks formed by the connected sets according to the function codes of the identification logic signals;
[0069] Prioritize placing connected sets within the same group on the same drawing page to ensure the integrity of system functionality after drawing pagination;
[0070] The number of connected sets in a single drawing page is determined based on the number of drawing pages;
[0071] By setting the maximum number of logic signals allowed in each drawing page, the connected sets in the drawing page are effectively prevented from becoming too crowded, which would affect the aesthetics and readability of the drawing. The maximum number of signals allowed is determined based on the range of the drawing page and historical drawing data.
[0072] The number of pages is determined based on the number of connected sets set;
[0073] The number of pages for an electrical drawing is determined by pagination, as well as the data of the electrical schematic diagram corresponding to each page.
[0074] S2: Draw a block based on the connected set data and the connected set type;
[0075] S201: Based on electrical schematic diagram drawing standards, design specifications, and historical electrical schematic diagram data, obtain the rules for drawing digital diagrams and the drawing methods corresponding to various types of connected sets;
[0076] A block refers to an electrical diagram corresponding to a single connected set of data. Based on electrical schematic drawing standards, design specifications, and historical electrical schematic data, rules for drawing digital diagrams and typical drawing methods for various connected sets can be extracted.
[0077] Digital drawing rules include general rules and specific rules. General rules refer to the rules that electrical drawings must generally follow. For example, signal flow rules can ensure that signals always flow from left to right by controlling the relative positions of devices; wiring rules can ensure that logic signals are laid out on the drawing along the grid with the shortest non-overlapping path.
[0078] Specialized rules refer to rules specifically used for drawing electrical schematics. Users can adjust them independently on the interactive interface. For example, pin placement rules can determine the arrangement of pins on devices and connectors by the vertical spacing between signal groups and between signals within a group; electrical equipment drawing rules can determine the width and height of the device based on the length of the device pin signal names and the pin arrangement on the device.
[0079] S202: Draw blocks based on digital drawing rules and methods, as well as the obtained connected set data and connected set types;
[0080] Based on the refined digital drawing rules and the typical drawing methods corresponding to various connected sets, blocks are drawn and named. Generally speaking, each type of element in an electrical schematic diagram has its own specific naming rules. Therefore, based on the object names in the input data, the type of each object (such as equipment, connectors, relays, and grounding) can be identified, and the corresponding electrical symbols can be obtained. These symbols are then combined according to the digital drawing rules of the typical drawing methods corresponding to connected sets to form a complete block. The electrical symbols are drawn using dedicated adaptive electrical symbol drawing rules or by directly retrieving standard electrical symbols.
[0081] S3: Adjust the obtained blocks in the drawing page and then output them to obtain the electrical schematic diagram;
[0082] On the same drawing page, merge the parts of different blocks that contain the same object;
[0083] Adjust the elements in the merged block accordingly;
[0084] The objects include devices and connectors, and the elements include the pins, labels, symbols, and lines of the blocks.
[0085] The specific steps are as follows:
[0086] After pagination, each page is assigned several blocks. These blocks may contain the same devices or connectors. Therefore, block merging can be used to combine identical devices or connectors together, making the blocks more concise and increasing page utilization. Block merging also improves the overall readability of the drawing. Block merging mainly involves merging devices and connectors. After merging, other elements within the block need to be adjusted accordingly, such as shifting electrical symbols and pins, reconstructing logic signal connections, and relabeling drawing information. After multiple iterations, block merging ends when no more devices or connectors on the drawing can be merged.
[0087] After the merging is completed, the positions of the merged blocks need to be arranged according to the scope of the drawing page;
[0088] First, the valid area of the drawing page needs to be determined;
[0089] Next, obtain the dimensions of the block;
[0090] Define the minimum rectangular frame on the drawing page according to the size of the block;
[0091] Arrange the obtained minimum rectangles on the drawing page;
[0092] The force between adjacent smallest rectangles is calculated using a force-oriented algorithm;
[0093] The position of the smallest rectangle is adjusted according to the applied force;
[0094] The dimensions include the overall length and width of the block.
[0095] The specific steps are as follows:
[0096] Since each drawing page has a fixed frame to limit its area, there are certain regions within the page where blocks cannot be placed. Therefore, it is necessary to determine the effective area for each drawing page. Then, the size of each individual block is calculated, which is the size of the smallest rectangle that can accommodate the block element. Next, all the obtained rectangles are sorted by area, and each rectangle is placed on the drawing page in a non-overlapping order to form a preliminary drawing layout. Finally, the drawing layout is optimized using a force-directed algorithm to achieve an optimal distance between blocks and between blocks and boundaries, thus completing the drawing layout. The force-directed algorithm calculates the forces between rectangles and between rectangles and boundaries, iteratively minimizing the overall energy.
[0097] like Figure 3As shown, this application provides an automatic electrical schematic diagram generation system. The system includes a data layer, an algorithm layer, and an application layer. The data layer includes a basic database, an electrical symbol and diagram library, and a standard component library. The algorithm layer includes a data analysis module, a diagram pagination module, a block drawing module, and a block adjustment module. The application layer includes a diagram output module, wherein the block adjustment module includes a block merging module and a diagram layout module.
[0098] The data analysis module is used to acquire EICD data, perform connected set analysis and decoupling on the EICD data to obtain connected set data, and parse the connected set data to obtain the connected set type;
[0099] By performing connectivity set analysis on the input data shown in Tables 1 and 2, it can be concluded that the input data mainly includes four function codes. The set of logic signals corresponding to each function code represents a connected set, which is named connected set 1 (corresponding to function code F2911-01), connected set 2 (corresponding to function code F2911-02), connected set 3 (corresponding to function code F2911-03), and connected set 4 (corresponding to function code F2911-04). By analyzing the data characteristics of the input data, it can be concluded that connected set 1 is equipotential, connected set 2 is simply connected, and connected sets 3 and 4 are bus-type. Each connected set will be drawn as a separate block.
[0100]
[0101]
[0102] Table 1
[0103]
[0104] Table 2
[0105] The diagram pagination module is used to match diagram pages with connected set data and connected set type, solving the matching problem between connected set data and diagram pages;
[0106] For example, assuming the drawing sheet used is A3 size, the maximum number of logic signals that a single drawing sheet can hold is 20. As shown in Tables 1 and 2, the input data contains 23 logic signals, which need to be split into two drawing sheets. The number of logic signals corresponding to connected sets 1, 2, 3, and 4 are 4, 1, 9, and 9, respectively. Therefore, following the principle that the maximum number of logic signals per sheet should not exceed 20, connected sets 1, 2, and 3 are assigned to drawing sheet 1, and connected set 4 is assigned to drawing sheet 2.
[0107] The block drawing module is used to draw blocks based on connected set data and connected set type, solving the problem of drawing patterns for a single connected set;
[0108] Block drawing must follow the signal flow principle, i.e., signal output terminals are placed on the left and signal receiver terminals on the right. The width of device and connector symbols is determined by the length of the signal name string and the pin name string, respectively. The height of the device and connector symbols is determined by the number of pins placed on the connector and device. The pin arrangement of devices and connectors is randomized while adhering to the principle of adjacent pins within the same signal group. The spacing between devices and the spacing between pins are pre-defined values. Typical drawing methods for blocks corresponding to connected sets 1, 2, 3, and 4 are as follows: Figures 4 to 7 As shown.
[0109] The block adjustment module is used to adjust the obtained blocks in the drawing page and then output them to obtain the electrical schematic diagram. The block adjustment module includes a block merging module and a drawing layout module.
[0110] The block merging module is used to merge parts of blocks that have the same function and attributes; and to adjust the elements in the merged blocks accordingly, thus solving the problem of scattered map information affecting the readability of the map.
[0111] Because blocks 1, 2, and 3 are all placed on page 1 and contain the same devices and connectors, a block merging operation is required. Block 4, placed separately on page 2, does not require merging. After one iteration, the same devices (DEV2901) and connectors (CON2901-1) in blocks 1, 2, and 3 are merged on the same side. The pins on the devices and connectors are rearranged. The relative positions of the remaining objects and connector pins in blocks 2 and 3 remain unchanged, and the entire block is shifted to the designated position. The drawing information (such as logic signal numbers, device numbers, etc.) is re-labeled according to the latest position. An example after block merging is shown below. Figure 8 As shown, block 1, block 2, block 3 and block 4 correspond to connected sets 1, 2, 3 and 4, respectively.
[0112] The drawing layout module solves the problem of placing multiple merged drawing blocks on the drawing page;
[0113] When considering the layout of blocks, the effective area of the drawing page and the size of the blocks need to be determined first; then, the minimum required rectangles are drawn on the drawing page according to the size of the blocks; the multiple minimum rectangles are arranged on the drawing page; then, the force-directed algorithm is used to calculate the interaction force between adjacent minimum rectangles; finally, the position of the minimum rectangles is adjusted according to the interaction force.
[0114] Since there is only one independent block after the blocks of page 1 and page 2 are merged, the force-directed algorithm can determine that the block is placed in the center of the page.
[0115] The drawing output module is used to output complete drawings. An example of its output is shown below. Figure 9 for Figure 8 The schematic diagram obtained after the drawing is output; Figure 10 for Figure 7 The schematic diagram obtained after the pattern is output.
[0116] The basic database in this application is used to store the EICD data required for generating electrical schematics; the data includes logic signal attribute data, basic pattern attribute data, electrical equipment attribute data, EWIS component attribute data such as connectors, etc.
[0117] The Electrical Symbols and Drawing Frames Library is used to store the electrical symbols and standard drawing frames required for electrical schematics;
[0118] In electrical schematics, electrical symbols can be divided into two categories: fixed electrical symbols and adaptive electrical symbols. Fixed electrical symbols have fixed shapes and sizes, such as grounding symbols, terminal symbols, and tail accessory symbols. Adaptive electrical symbols only specify their shapes, while their sizes are determined by digital drawing rules, such as equipment symbols, connector symbols, and logic signal symbols.
[0119] The standard drawing frame is mainly used to carry the basic attributes of electrical schematic diagrams, such as drawing name, page number, drawing number and drawing validity, and specifies the size of the drawing and the range of the valid area of the drawing;
[0120] The standard component library is used to store the attributes of standard components related to electrical schematics, including part numbers and attribute information of standard components such as connectors. There is a relationship between the standard component library and the electrical symbol and drawing frame library. Each standard component should have a matching electrical symbol in the electrical symbol and drawing frame library.
[0121] This application also provides an electronic device, including a memory and a processor; the memory is used to store a computer program; the processor is used to implement the above-described method for automatically generating electrical schematic diagrams when the computer program is executed.
[0122] The above provides a detailed description of an automatic electrical schematic diagram generation method, system, and electronic device provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. An electrical schematic automatic generation method characterized by, include: Acquire EICD data, and perform connected set analysis and decoupling on the EICD data to obtain connected set data. The connected set in the connected set data refers to a set of logical signals that express the same function between two or more devices. The data structure of the connected set data is analyzed to obtain the connected set type, which includes one or more of the following types: simply connected, equipotential, bus, and relay. Match the connected set data and the connected set type with the diagram page; Based on the connected set data and the connected set type, a graph block is drawn; The obtained blocks are adjusted in the drawing page and then output to obtain the electrical schematic diagram.
2. The electrical schematic automatic generation method of claim 1, wherein, The method for matching the connected set data and the connected set type with the page includes: The connected sets are pre-grouped according to their functions, and connected sets in the same group are placed on the same page. The number of pages is determined based on the capacity of the illustrations.
3. The method for automatically generating electrical schematic diagrams as described in claim 1, characterized in that, The method for drawing and obtaining tiles based on the connected set data and the connected set type includes the following steps: Based on electrical schematic drawing standards, design specifications, and historical electrical schematic data, obtain the rules for drawing digital diagrams and the drawing methods corresponding to each type of connected set; Based on the digital drawing rules and methods, as well as the acquired connected set data and the connected set type, a block is drawn.
4. The method for automatically generating electrical schematic diagrams as described in claim 1, characterized in that, The method for adjusting the obtained tiles in the drawing page includes the following steps: Merge different blocks based on the objects contained within them; The positions of the merged blocks are arranged according to the scope of the page.
5. The method for automatically generating electrical schematic diagrams as described in claim 4, characterized in that, The method for merging different blocks based on the objects contained in the blocks includes the following steps: Within the same drawing page, portions of different drawing blocks that contain the same object are merged; Adjust the elements in the merged block accordingly; The objects include devices and connectors, and the elements include pins, labels, symbols, and lines of the block.
6. The method for automatically generating electrical schematic diagrams as described in claim 4, characterized in that, The method for arranging the positions of the merged blocks according to the range of the page includes the following steps: Determine the effective area of the drawing page; Obtain the dimensions of the block; Delineate the minimum rectangular frame in the drawing page according to the size of the block; Arrange the obtained minimum rectangles on the drawing page; The force between adjacent smallest rectangular frames is calculated using a force-guided algorithm; The position of the minimum rectangle is adjusted according to the applied force; The dimensions include the overall length and width of the block.
7. An automatic electrical schematic diagram generation system, characterized in that, The system includes: The data analysis module is used to acquire EICD data, perform connected set analysis and decoupling on the EICD data to obtain connected set data. The connected set in the connected set data refers to a set of logical signals between two or more devices that express the same function. The data structure of the connected set data is parsed to obtain the connected set type. The connected set type includes one or more of the following: simple connected type, equipotential type, bus type, and relay type. The pattern pagination module is used to match the pattern page with the connected set data and the connected set type; A tile drawing module is used to draw tiles based on the connected set data and the connected set type. The block adjustment module is used to adjust the obtained blocks in the drawing page and then output them to obtain an electrical schematic diagram.
8. The automatic electrical schematic generation system as described in claim 7, characterized in that, The aforementioned block adjustment module includes a block merging module and a drawing layout module; The tile merging module is used to merge parts of the tile that have the same function and attributes, and to adjust the elements in the merged tile accordingly. The image layout module is used to determine the effective area of the image page; obtain the size of the image block; define the minimum rectangle in the image page according to the size of the image block; arrange the obtained minimum rectangles on the image page; calculate the interaction force between adjacent minimum rectangles using a force-guided algorithm; and finally adjust the position of the minimum rectangles according to the interaction force.
9. The automatic electrical schematic generation system as described in claim 7, characterized in that, The system also includes: A basic database is used to store the EICD data required for generating electrical schematics; An electrical symbol and drawing frame library, which stores the electrical symbols and standard drawing frames required for electrical schematic diagrams; A standard component library is used to store the attributes of standard components related to electrical schematic diagrams, including standard component part numbers and their attribute information. There is an association between the standard component library and the electrical symbol and drawing frame library.
10. An electronic device, characterized in that: It includes a memory and a processor; the memory is used to store a computer program; the processor is used to implement the automatic generation method of electrical schematic diagrams as described in any one of claims 1 to 6 when the computer program is executed.