High-resolution ultra-thin LED display for AR, VR devices and method of manufacturing the same

Abstract

The present invention relates to a high-resolution ultra-thin LED display and a manufacturing method thereof, and more particularly to a display having very high resolution and optical characteristics by introducing an ultra-thin LED element and a manufacturing method capable of manufacturing the same with a very low defect rate.

Description

Technical Field

[0001] This invention relates to displays for use in augmented reality (AR) and virtual reality (VR) devices, and to high-resolution ultrathin LED displays that ensure high resolution by incorporating LED elements of the display into ultrathin LEDs, and a method for manufacturing the same. Background Technology

[0002] Augmented reality (AR) and virtual reality (VR) technologies simultaneously display the real world and virtual images, or display virtual reality itself. They involve overlaying virtual objects onto the real world. When the virtual images superimposed on real-world objects in real time possess a high degree of realism, it can reach a point where the wearer has difficulty distinguishing between the real-world and virtual images. Technologies aiming for this are also called Mixed Reality (MR). Augmented reality technology is a hybrid VR system that integrates real and virtual environments, and it is currently being actively researched and developed in many countries.

[0003] AR and VR technologies work by projecting information such as virtual images generated by computer graphics. These virtual images enhance the visual effects of specific elements in the augmented reality environment or display information relevant to the real world. This augmented reality technology is applied to displays in wearable devices such as glasses or helmets. AR and VR devices encompass all the functions of current smartphones, thus maximizing the wearer's cognitive abilities regarding visual information. Major global companies are investing heavily in their development with the expectation that all computing interfaces will become AR and VR displays in the future.

[0004] However, the displays used in AR and VR devices that have been developed in the past or are currently under development have low resolution, thus having the problem of low resolution.

[0005] When comparing brightness, response speed, resolution, and contrast for use in AR / VR displays, micro-LEDs are considered the most effective display compared to existing LCD, LCoS, DLP, and OLED displays. However, in the case of micro-LEDs, it is well known that to manufacture high-resolution displays and meet the required resolution, micro-LEDs with a size of 1μm to 5μm are needed. When using them to manufacture sub-pixels, during the transmission of micro-LEDs, manufacturing defects (such as missing LED elements within the pixel or misalignment) can occur, resulting in dark spots on the display and thus causing display defects (see [reference]). Figure 1 Part A).

[0006] Currently, there are many types of micro-LEDs under development. In particular, micro-LEDs and nano-LEDs among various LEDs can achieve excellent color reproduction and high efficiency. They are also environmentally friendly materials, and therefore, are used as core materials for various light sources and displays. In response to this market situation, research is currently underway to develop coated nanocable LEDs using novel nanorod LED structures or new manufacturing processes.

[0007] With research in these materials fields, televisions (TVs) utilizing red, green, and blue micro-LEDs have recently become commercially available. Micro-LED displays and various light sources offer high performance, theoretical lifespan, and high efficiency. However, each micro-LED must be individually configured on a miniaturized electrode within a limited area. Therefore, for electrode assemblies using pick-and-place technology to configure micro-LEDs on electrodes, considering high costs, high process defect rates, and low productivity, the limitations of the technology make it difficult to manufacture truly high-resolution commercial displays or light sources of various sizes, shapes, and brightnesses for smartphones and televisions. Furthermore, it is even more difficult to achieve nano-LEDs, smaller than micro-LEDs, by individually configuring each micro-LED on an electrode using the same pick-and-place technology.

[0008] To overcome this difficulty, the inventor disclosed an ultra-small LED electrode assembly in Korean Patent Publication No. 10-1490758, which is manufactured by the following process: after adding a solution mixed with nanorod-shaped LEDs to the electrodes, an electric field is formed between two different electrodes, so that multiple nanorod-shaped LED elements are magnetically aligned on the electrodes.

[0009] However, in the disclosed technology, when LED elements are aligned by an electric field, they must have a rod-shaped shape with a large aspect ratio formed long along one direction. As mentioned above, the rod-shaped LED elements with a large aspect ratio tend to settle quickly in the solvent, making it difficult to ink the LED elements. Therefore, it is difficult to achieve large-area electrode assemblies by inkjet printing.

[0010] Furthermore, the horizontal assembly of components on two dissimilar electrodes—that is, assembling the semiconductor layers within the component with their stacking directions parallel to the peripheral surfaces of the electrodes—results in a small light-extracting area and poor efficiency. Specifically, for nanorod-type LEDs, it is well known that LED wafers are manufactured using a top-down method employing hybrid nanopatterning processes and dry / wet etching, or grown directly on a substrate using a bottom-up method. In such nanorod-type LEDs, the long axis of the LED is aligned with the stacking direction—that is, the stacking direction of each layer in the p-GaN / InGaN multiple quantum well (MQW) / n-GaN or p-GaN / InGaN multiple quantum well / n-GaN / InGaN stacked structures. Therefore, the light-emitting area is narrow. Due to this narrow area, relative surface defects have a significant impact on efficiency reduction, making it difficult to optimize the electron-hole recombination rate, resulting in a significant decrease in luminous efficiency compared to the original wafer.

[0011] Furthermore, two distinct electrodes, which are formed to make the nanorod-shaped LED element emit light, need to be formed on the same plane, thus posing a challenge in electrode design.

[0012] Existing technical documents Patent documents Korean Patent Publication No. 10-1490758 (Publication Date: March 26, 2019) Summary of the Invention Technical issues The inventors of this invention have developed a novel ultrathin LED electrode assembly that solves the problems of low resolution and display defects caused by LED element defects and alignment errors within pixels in displays made of micro-LEDs, and provide an AR / VR device display using this ultrathin LED electrode assembly and a method for manufacturing the same.

[0013] Technical solution The high-resolution ultrathin LED display of the present invention, for solving the problems described above, includes an ultrathin LED electrode assembly comprising: a plurality of lower electrodes formed on a substrate; a plurality of pixel units formed on the lower electrodes; an insulating layer formed on the substrate and the plurality of pixel units; and a plurality of upper electrodes formed on the insulating layer, wherein each of the plurality of pixel units includes a sub-pixel unit, and the sub-pixel unit includes a plurality of ultrathin LED elements.

[0014] In a preferred embodiment of the present invention, the sub-pixel unit includes three or more ultra-thin LED elements, which may include one or more selected from ultra-thin blue LED elements, ultra-thin green LED elements and ultra-thin red LED elements.

[0015] In a preferred embodiment of the present invention, the plurality of pixel units each include 3 to 4 sub-pixel units, and the 3 to 4 sub-pixel units may each include 3 to 30 ultra-thin LED elements.

[0016] In a preferred embodiment of the present invention, the above-mentioned 3 to 4 sub-pixel units can be circles, rectangles or squares.

[0017] In a preferred embodiment of the present invention, the length ratio of the horizontal to the vertical direction of the above-mentioned 3 to 4 sub-pixel units can be 1:1.0 to 1:10.0, respectively.

[0018] In a preferred embodiment of the present invention, the plurality of pixel units each include three sub-pixel units, the three sub-pixel units including: a first sub-pixel unit including an ultra-thin blue LED element; a second sub-pixel unit including an ultra-thin red LED element; and a third sub-pixel unit including an ultra-thin red LED element.

[0019] In a preferred embodiment of the present invention, each of the above-mentioned 3 to 4 sub-pixel units may include an ultra-thin blue LED element.

[0020] In a preferred embodiment of the present invention, when all three to four sub-pixel units include ultra-thin blue LED elements, one or more color-changing layers selected from green and red color-changing layers may be stacked on the upper part of the upper electrode.

[0021] In a preferred embodiment of the present invention, one or more filters selected from short-wavelength filter (SWPF) and long-wavelength filter (LWPF) may be formed between the upper electrode and the color-changing layer.

[0022] In a preferred embodiment of the present invention, the plurality of ultra-thin LED elements constituting the sub-pixel unit of the high-resolution ultra-thin LED display of the present invention may be respectively stacked with a first conductive semiconductor layer, a photoactive layer and a second conductive semiconductor layer.

[0023] In a preferred embodiment of the present invention, the first conductive semiconductor layer of the ultra-thin LED element can be vertically disposed within the sub-pixel unit such that the first conductive semiconductor layer of the ultra-thin LED element faces the lower electrode.

[0024] As a preferred embodiment of the present invention, the cross-sectional shape of the ultra-thin LED element may include one or more shapes selected from circles, ellipses and polygons (trilaterals, quadrilaterals, pentagons, hexagons, octagons, decagons, trapezoids, rhombuses, stars, etc.). Multiple ultra-thin LED elements may be composed of elements with the same cross-sectional shape or may be composed of a mixture of elements with different cross-sectional shapes.

[0025] As a preferred embodiment of the present invention, the ultrathin LED element includes one or more selected from the following LED elements: a dot-type LED element or a disc-type LED element, the thickness of which is less than 2000 nm along the stacking direction of the multiple layers, and the ratio between the thickness of the dot-type LED element and the length of the long axis in the cross-section perpendicular to the stacking direction is 1:0.5 to 1:1.5; or the ratio between the thickness of the disc-type LED element and the length of the long axis in the cross-section perpendicular to the stacking direction is 1:1.5 to 1:5.0; and a micro-nanofin LED element, the thickness of which is 100 nm to 2000 nm along the stacking direction of the multiple layers, and the length of the long axis in the cross-section perpendicular to the stacking direction is 100 nm to 6000 nm, and the ratio between the thickness and the length of the long axis is 1:3 or more.

[0026] In a preferred embodiment of the present invention, the LED electrode assembly includes: a lower electrode line, including one or more lower electrodes; a plurality of ultra-thin LED elements, vertically disposed on the lower electrodes along the stacking direction of the plurality of layers; and an upper electrode line, disposed on the plurality of ultra-thin LED elements, including one or more lower electrodes.

[0027] As a preferred embodiment of the present invention, the ultra-thin LED element may further include an arrangement induction layer on one side and both sides of the arrangement area where the ultra-thin LED element is to be arranged in the thickness direction and in the lower electrode, wherein the ultra-thin LED element is arranged vertically along the thickness direction.

[0028] In a preferred embodiment of the present invention, the above-mentioned alignment induction layer may be a magnetic layer, a charge layer, or a bonding layer.

[0029] In a preferred embodiment of the present invention, the area of ​​the largest surface of the ultra-thin LED element can be less than 1 / 3 of the area of ​​the sub-pixel.

[0030] In a preferred embodiment of the present invention, the first conductive semiconductor layer of the ultra-thin LED element is an n-type group III nitride semiconductor layer. An electron delay layer may also be included on the opposite side facing the first conductive semiconductor layer (which is adjacent to the photoactive layer) so that the number of electrons and holes recombinating in the photoactive layer reaches a balance.

[0031] In a preferred embodiment of the present invention, the electron delay layer may also be a group III nitride semiconductor with a doping concentration lower than that of the first conductive semiconductor layer.

[0032] In a preferred embodiment of the present invention, the second conductive semiconductor layer of the ultrathin LED element is a p-type group III nitride semiconductor layer. An electron delay layer may also be included on the opposite side facing the second conductive semiconductor layer (which is adjacent to the photoactive layer) so that the number of electrons and holes recombinating in the photoactive layer reaches a balance.

[0033] In a preferred embodiment of the present invention, the above-mentioned electronic delay layer may further include one or more selected from CdS, GaS, ZnS, CdSe, CaSe, ZnSe, CdTe, GaTe, SiC, ZnO, ZnMgO, SnO2, TiO2, In2O3, Ga2O3, Si, poly(para-phenylene vinylene) and its derivatives, polyaniline, poly(3-alkylthiophene) and poly(paraphenylene)

[0034] In a preferred embodiment of the present invention, the first conductive semiconductor layer of the ultra-thin LED element is an n-type group III nitride semiconductor layer, and the second conductive semiconductor layer is a p-type group III nitride semiconductor layer. It may also include at least one of the following coatings: a hole-driving coating that surrounds the exposed side of the second conductive semiconductor layer or the exposed side of the second conductive semiconductor layer and at least a portion of the exposed side of the photoactive layer to move holes on the surface side of the exposed side to the center side; and an electron-driving coating that surrounds the exposed side of the first conductive semiconductor layer to move electrons on the surface side of the exposed side to the center side.

[0035] As a preferred embodiment of the present invention, the ultra-thin LED element includes both the hole-driving cladding and the electron-driving cladding, wherein the electron-driving cladding can be configured as the outermost cladding surrounding the sides of the first conductive semiconductor layer, the photoactive layer and the second conductive semiconductor layer.

[0036] In a preferred embodiment of the present invention, the aforementioned hole-driven membrane may further comprise materials selected from AlN. X One or more of ZrO2, MoO, Sc2O3, La2O3, MgO, Y2O3, Al2O3, Ga2O3, TiO2, ZnS, Ta2O5 and n-MoS2.

[0037] In a preferred embodiment of the present invention, the electron-driven coating may further include materials selected from Al2O3, HfO2, and SiN.x SiO2, ZrO2, Sc2O3, AlN x And one or more of Ga2O3.

[0038] In a preferred embodiment of the present invention, when the ultrathin LED element is a micro-nano fin LED element, a polarization induction layer may also be stacked on the upper part of the second conductive semiconductor layer of the micro-nano fin LED element.

[0039] In a preferred embodiment of the present invention, when the ultrathin LED element is a micro-nano fin LED element, the first conductive semiconductor layer or polarization induction layer of the micro-nano fin LED element can be configured to contact at least two adjacent lower electrodes.

[0040] In a preferred embodiment of the present invention, the polarization induction layer can be configured such that the polarities at both ends of the micro-nano fin LED element in the length direction are different.

[0041] In a preferred embodiment of the present invention, the polarization induction layer is made of a first polarization induction layer and a second polarization induction layer arranged adjacent to each other along the length direction of the micro-nano fin LED element, and the polarities of the first polarization induction layer and the second polarization induction layer may be different. In this case, for example, the first polarization induction layer is ITO, and the second polarization induction layer may be a metal, a dielectric, or a semiconductor.

[0042] In a preferred embodiment of the present invention, the length of the above-mentioned micro-nano fin LED element is 100nm to 6000nm, and the thickness is 100nm to 2000nm.

[0043] In a preferred embodiment of the present invention, the length-to-thickness ratio of the micro-nano fin LED element can be 3:1 or higher.

[0044] In a preferred embodiment of the present invention, a protrusion with a specified width and thickness may be formed on the lower surface of the first conductive semiconductor layer of the micro-nano fin LED element along the length direction of the element.

[0045] As a preferred embodiment of the present invention, the width of the protrusion can be formed to have a length of less than 50% compared to the width of the micro-nano fin LED element.

[0046] As a preferred embodiment of the present invention, the light-emitting area of ​​the above-mentioned micro-nano fin LED element can exceed twice the cross-sectional area of ​​the micro-nano fin LED element.

[0047] In a preferred embodiment of the present invention, pores may be formed in the first conductive semiconductor layer (n-type conductive semiconductor layer) portion of the ultrathin LED element (dot type, disk type and / or micro-nano fin type LED element).

[0048] In a preferred embodiment of the present invention, the above-mentioned LED electrode assembly may also be formed on a flexible substrate.

[0049] As a preferred embodiment of the present invention, the high-resolution ultra-thin LED display of the present invention described above can have a resolution of 450 PPI to 3000 PPI (pixels per inch).

[0050] As a preferred embodiment of the present invention, the high-resolution ultra-thin LED display of the present invention described above can be used as a display panel for AR and VR devices.

[0051] Another object of the present invention relates to a method for manufacturing a high-resolution ultrathin LED display including an ultrathin LED electrode assembly, the ultrathin LED electrode assembly being formed by performing a process comprising the following steps: step (1), preparing a lower electrode line including a lower electrode; step (2), forming a plurality of pixel units on the lower electrode; and step (3), forming an upper electrode line including an upper electrode in such a manner as to electrically connect to the opposite side of an ultrathin LED element (which faces one side of the ultrathin LED element assembled on the lower electrode).

[0052] Between step (2) and step (3), the following step may also be included: filling the area around the ultra-thin LED element in each pixel unit with an insulator to form an insulating layer.

[0053] As a preferred embodiment of the present invention, each of the above-mentioned pixel units in step (2) is formed by a sub-pixel unit including a plurality of ultra-thin LED elements. The sub-pixel units can be formed by printing on the lower electrode using inkjet printing, laser-supported transfer printing, stamp transfer printing, magnetic field-induced printing and / or electric field-induced printing to form a plurality of ultra-thin LED elements.

[0054] In a preferred embodiment of the present invention, when the above printing method is laser-supported multi-chip transfer printing, a process including the following steps can be performed: step (1), preparing a plurality of lower electrodes to be formed on a substrate; and step (2), forming a plurality of pixel units by transferring them onto the lower electrodes using laser-supported multi-chip transfer printing.

[0055] As a preferred embodiment of the present invention, for the above-mentioned laser-supported multi-chip transmission printing method, in the above-mentioned step (2), each pixel unit may include multiple ultra-thin LED elements.

[0056] As a preferred embodiment of the present invention, for the above-mentioned laser-supported multi-chip transfer printing method, the above step (2) can be performed by transferring the ultra-thin LED element onto the lower electrode by irradiating a laser onto one side of the transfer film through the opening of the mask, thereby forming a pixel unit including multiple ultra-thin LED elements on the lower electrode. The transfer film includes a donor film and multiple ultra-thin LED elements arranged on the upper part of the donor film. The transfer can be performed by irradiating a laser in the direction of the lower part of the donor film.

[0057] In a preferred embodiment of the present invention, for the above-mentioned laser-supported multi-chip transmission printing method, the above-mentioned multiple ultra-thin LED elements are respectively stacked with a second conductive semiconductor layer, a photoactive layer and a first conductive semiconductor layer, and the second conductive semiconductor layer or the first conductive semiconductor layer of the above-mentioned ultra-thin LED elements can be vertically arranged towards the donor film.

[0058] As a preferred embodiment of the present invention, for the above-mentioned laser-supported multi-chip transmission printing method, the donor film may include a polydimethylsiloxane stamp film, a polyimide film including a dynamic release layer, an elastic polymer microstructure stamp film, or a shape memory polymer film.

[0059] As a preferred embodiment of the present invention, for the above-mentioned laser-supported multi-chip transmission printing method, when the transfer in step (2) is performed, the above-mentioned mask is formed with multiple openings, and the laser is irradiated through the multiple openings respectively. Thus, more than three ultra-thin LED elements can be transferred on the lower electrode simultaneously through each opening.

[0060] As a preferred embodiment of the present invention, when the above printing method is inkjet printing and the ultrathin LED element is a dot-type LED element or a disk-type LED element, step (2) may also perform the following steps: step (2-1), processing an ink composition including multiple ultrathin LED elements on the lower electrode; and step (2-2), assembling the ultrathin LED element vertically along the thickness direction on the lower electrode.

[0061] In a preferred embodiment of the present invention, in step (2-1) above, a magnetic layer is further provided on one side of the thickness direction of the ultra-thin LED element and on the arrangement area within the lower electrode where the ultra-thin LED element is to be arranged. In step (2-2) above, a magnetic field can also be formed along the direction perpendicular to the circumferential surface of the lower electrode to make the ultra-thin LED element vertically assembled on the lower electrode along the thickness direction, so as to move the ultra-thin LED element to the arrangement area above and arrange it vertically along the thickness direction.

[0062] In a preferred embodiment of the present invention, in step (2-1) above, a first charge layer with positive or negative charge is provided on one side of the thickness direction of the ultra-thin LED element, and a second charge layer with the opposite charge to the first charge layer is provided on the arrangement area in the lower electrode where the ultra-thin LED element is to be arranged. In step (2-2) above, the ultra-thin LED element is moved to the arrangement area, and an electric field can be formed along the direction perpendicular to the circumferential surface of the lower electrode so that it can be arranged vertically along the thickness direction.

[0063] In a preferred embodiment of the present invention, in step (2-2) above, the ultrathin LED element is vertically assembled on the configuration area by chemical bonding mediated by a bonding layer (located between one side of the ultrathin LED element in the thickness direction and the configuration area in the lower electrode of the ultrathin LED element to be configured). The bonding layer may be disposed on one side of the ultrathin LED element in the thickness direction and on either side or both sides of the configuration area.

[0064] As a preferred embodiment of the present invention, when the printing method is inkjet printing and the ultrathin LED element is a micro-nano fin LED element, the LED electrode assembly can be manufactured by performing a process including the following steps: step (1), applying an ink composition containing a plurality of micro-nano fin LED elements to a lower electrode line comprising a plurality of lower electrodes spaced at a predetermined interval along a horizontal direction; step (2), applying an assembly voltage to the lower electrode line to magnetically align the first conductive semiconductor layer or polarization induction layer of the micro-nano fin LED element in the solution to contact at least two adjacent lower electrodes; and step (3), forming an upper electrode line on the magnetically aligned plurality of micro-nano fin LED elements.

[0065] As a preferred embodiment of the present invention, step (2) above may also perform a process including the following steps: step (2-1), applying an assembly voltage to the lower electrode line to magnetically align the first conductive semiconductor layer or polarization induction layer of the micro-nano fin LED element in the solution with at least two adjacent lower electrodes; step (2-2), forming a current-carrying metal layer for connecting the side of the first conductive semiconductor layer or polarization induction layer of each micro-nano fin LED element in contact with at least two lower electrodes to the at least two lower electrodes; and step (2-3), not covering the upper surface of the magnetically aligned plurality of micro-nano fin LED elements, thereby forming an insulating layer on the lower electrode line.

[0066] The following defines the terminology used in this invention.

[0067] According to the description of examples of the present invention, when describing the formation of layers, areas, patterns or substrates on layers, areas, or multiple patterns, "on", "upper", "under", "lower", and "lower" include both the meanings of "directly" and "indirectly".

[0068] The effects of the invention The ultra-thin LED element of this invention, applied to high-resolution ultra-thin LED displays, significantly reduces the exposed photoactive layer area while increasing the light-emitting area of ​​the element. This prevents or minimizes efficiency reduction caused by surface defects, thereby enabling high-quality electrode components. Furthermore, the LED element used minimizes the reduction in electron-hole recombination efficiency and the resulting decrease in luminous efficiency caused by uneven electron and hole velocities, and facilitates the easier fabrication of electrode components.

[0069] As described above, compared to conventional LED displays such as micro-LEDs, the ultra-thin LED display of the present invention, manufactured using ultra-thin LED elements, has the effects of reduced thickness, improved response speed, increased front-end area, increased viewing angle, and increased brightness. Furthermore, it can reduce the display defect rate caused by LED element defects and alignment errors during the manufacturing of sub-pixels. Attached Figure Description

[0070] Figure 1 Part A and Part B are schematic diagrams illustrating examples of process defects when transmitting LED elements for manufacturing a display. Part A shows a defect example generated when using conventional micro LED elements, and Part B shows a defect example generated when using LED elements with the ultra-thin LED elements of the present invention.

[0071] Figure 2 is a diagram of an ultra-thin LED electrode assembly utilizing ultra-thin LED elements (type 1, dot type, disk type) according to an embodiment of the present invention. Figure 1 Figure 2 is a top view of the ultra-thin LED electrode assembly, based on... Figure 1 A cross-sectional view of the X-X' boundary.

[0072] Figure 3 This is a perspective view of an ultra-thin LED element (type 1) used in one embodiment of the present invention.

[0073] Figure 4 According to Figure 3 A cross-sectional view of the Y-Y' boundary.

[0074] Figures 5a to 5c This diagram illustrates several embodiments of an alignment-inducing layer for an ultrathin LED element (type 1) that can be disposed in one embodiment of the present invention.

[0075] Figure 6 This is a schematic diagram used to illustrate the balance between electrons and holes in an LED element.

[0076] Figure 7 This is a perspective view of an ultra-thin LED element (type 1) used in one embodiment of the present invention.

[0077] Figure 8 This is a cross-sectional view of an ultra-thin LED element (type 1) used in one embodiment of the present invention.

[0078] Figure 9 and Figure 10 This is a schematic diagram of a method 1 for manufacturing an ultra-thin LED element (type 1) used in an embodiment of the present invention.

[0079] Figure 11 This is a schematic diagram of a method 2 for manufacturing an ultra-thin LED element (type 1) used in an embodiment of the present invention.

[0080] Figure 12 This is a schematic diagram of a manufacturing method for an ultra-thin LED element (type 1) used in one embodiment of the present invention.

[0081] Figures 13 to 15 The diagram illustrates a step of a method for manufacturing an ultrathin LED electrode assembly using an ultrathin LED element (type II, micro-nano fin type) according to an embodiment of the present invention.

[0082] Figure 16 This is a diagram of a micro-nano finned LED electrode assembly according to an embodiment of the present invention. Figure 16 a is a top view of the micro-nano finned LED electrode assembly. Figure 16 b is based on Figure 16 A cross-sectional view of the X-X' boundary of a.

[0083] Figure 17 This is a perspective view of the micro-nano fin LED element included in one embodiment of the present invention, according to... Figure 18 A cross-sectional view of the X-X' boundary, based on Figure 19 A cross-sectional view of the Y-Y' boundary.

[0084] Figure 20a and Figure 20b The diagrams show a first rod-shaped element having a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer stacked along the thickness direction, and a second rod-shaped element having a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer stacked along the length direction.

[0085] Figure 21 This is a schematic diagram illustrating the manufacturing process of a micro-nano fin LED element included in one embodiment of the present invention.

[0086] Figure 22 and Figure 23 This is a scanning electron microscope (SEM) image of a specific step in the manufacturing method of an ultrathin LED element (type 1) used in an embodiment of the present invention.

[0087] Figure 24 This is a SEM image of an ultrathin LED element (type 1) used in one embodiment of the present invention.

[0088] Figure 25 This is a SEM image of the LED wafer remaining after manufacturing the ultra-thin LED element (type 1) in one embodiment of the present invention.

[0089] Figure 26 To generate an hourly absorbance chart that normalizes the spectral area of ​​the visible light region from 380 nm to 780 nm by using the absorbance of each wavelength measured hourly, in which ultra-thin LED elements (Type 1) and rod-shaped LED elements are dispersed in an acetone ink composition.

[0090] Explanation of reference numerals in the attached figures 10: First conductive semiconductor layer; 20: Photoactive layer 30: Second conductive semiconductor layer; 40: Lower electrode layer 60: Upper electrode layer; 80: Protective coating 90: Polarization-induced layer; 91: First polarization-induced layer 92: Second polarization-induced layer 100, 101, 103, 104, 105, 106, 107: Ultra-thin LED components 200, 310: Lower electrode wire 211, 212, 213, 214, 311, 312: Lower electrode (or first electrode) 300, 320: Upper electrode wire 301, 302, 321, 322: Upper electrode (or second electrode) 400: Substrate (or substrate) 500: Electrically conductive metal layer 600: Insulating layer; 1000, 1001: Ultra-thin LED electrode assembly Detailed Implementation The embodiments of the present invention are described in detail below to enable those skilled in the art to readily implement them. The present invention can be implemented in various different ways and is not limited to the embodiments described herein.

[0091] like Figure 1 As shown in the simplified diagram in Part A, in displays manufactured using conventional micro-LED elements, each pixel includes one or a small number of micro-LED elements when forming the electrode LED assembly. Therefore, problems such as missing (damaged) LED elements or detachment from the electrode lines (alignment errors) can lead to dark spots. However, as... Figure 1 As shown in the simplified diagram in Part B, this invention utilizes ultra-thin LED elements to manufacture electrode LED assemblies. This assembly is composed of multiple sub-pixels within a single pixel unit, and each sub-pixel is composed of multiple ultra-thin LED elements. Therefore, even if a portion of an LED element is missed during transmission or detached from the electrode line, no dark spots or other defects are generated due to the absence of damaged or misaligned LED elements within the pixel unit, thus preventing display defects. Furthermore, this invention provides a high-resolution LED display capable of ensuring high resolution (ppi).

[0092] As described above, the high-resolution ultrathin LED display of the present invention includes an ultrathin LED electrode assembly incorporating ultrathin LED elements.

[0093] like Figure 2a As shown in the simplified diagram, the ultra-thin LED electrode assembly includes an ultra-thin LED electrode assembly comprising: a plurality of lower electrodes 310 formed (deposited) on a substrate 400; a plurality of pixel units formed on the lower electrodes; an insulating layer 600 formed on the substrate and the upper part of the plurality of pixel units; and a plurality of upper electrodes 320 formed on the insulating layer. Each pixel unit includes a sub-pixel unit, and the sub-pixel unit includes a plurality of ultra-thin LED elements 100.

[0094] The aforementioned sub-pixel unit includes three or more ultra-thin LED elements, preferably three to 30 ultra-thin LED elements, more preferably ten to 30 ultra-thin LED elements, and the aforementioned ultra-thin LED elements may include one or more LED elements selected from ultra-thin blue LED elements, ultra-thin green LED elements, and ultra-thin red LED elements.

[0095] Furthermore, each pixel unit includes 3 to 4 sub-pixel units, and each of the 3 to 4 sub-pixel units may include 3 or more ultra-thin LED elements. Preferably, it may include 3 to 30 ultra-thin LED elements, and more preferably, it may include 10 to 30 ultra-thin LED elements.

[0096] For example, a preferred instance, such as Figure 2b As shown in the simplified diagram, when a pixel unit is composed of 3 sub-pixel units, it can be composed of a first sub-pixel unit, a second sub-pixel unit, and a third sub-pixel unit.

[0097] The aforementioned 2 to 3 sub-pixel units can be rectangles or squares. In the case of rectangles, the ratio of the horizontal to the vertical length of the aforementioned 3 to 4 sub-pixel units can be 1:1.0 to 1:10.0.

[0098] Furthermore, each pixel unit may also include: a first sub-pixel unit including an ultra-thin blue LED element; a second sub-pixel unit including an ultra-thin green LED element; and a third sub-pixel unit including an ultra-thin red LED element.

[0099] Furthermore, when the display is a blue source color display, the two to three sub-pixel units constituting each pixel unit may each include an ultra-thin blue LED element. In this case, one or more color-changing layers selected from green color-changing layers and red color-changing layers may be stacked on the upper part of the upper electrode.

[0100] The aforementioned green color-changing layer can be used without limitation with materials commonly used in blue source color generation methods. For example, in a preferred embodiment, it may include materials selected from SrGa2S4:Eu, (Sr,Ca)3SiO5:Eu, (Sr,Ba,Ca)SiO4:Eu, Li2SrSiO4:Eu, Sr3SiO4:Ce,Li, β-SiALON:Eu, CaSc2O4:Ce, Ca3Sc2Si3O 12 :Ce, Caα-SiALON:Yb, Caα-SiALON:Eu, Liα-SiALON:Eu, Ta3Al5O 12 :Ce, Sr2Si5N8:Ce, SrSi2O2N2:Eu, BaSi2O2N2:Eu, Ba3Si6O 12The phosphor may be one or more of N2:Eu, γ-AlON:Mn and γ-AlON:Mn,Mg, but is not limited to these.

[0101] The aforementioned green color-changing layer can be used without limitation with materials commonly used in blue source color generation methods. For example, in another preferred embodiment, it may include one or more quantum dots or nanoparticles selected from InP / ZnSe / ZnS quantum dots, InP / GaP / ZnS quantum dots, ZnSe / ZnS quantum dots, CsPbBr3 nanoparticles, and Cs3MnBr5 nanoparticles, and is not limited thereto.

[0102] The aforementioned red color-changing layer can be used without limitation with any phosphor used in blue source color generation methods. For example, in one preferred embodiment, it may include one or more phosphors selected from (Sr,Ca)AlSiN3:Eu, CaAlSiN3:Eu, (Sr,Ca)S:Eu, CaSiN2:Ce, SrSiN2:Eu, Ba2Si5N8:Eu, CaS:Eu, CaS:Eu,Ce, SrS:Eu, SrS:Eu,Ce, and Sr2Si5N8:Eu, but is not limited thereto. Furthermore, as in another example of the aforementioned red color-changing layer, it may include one or more quantum dots or nanoparticles selected from InP / ZnSe / ZnS quantum dots, InP / GaP / ZnS quantum dots, ZnSe / ZnS quantum dots, CsPb(Br,I)3 nanoparticles, and CsMnBr3 nanoparticles, but is not limited thereto.

[0103] Furthermore, one or more filters selected from short-wavelength filters and long-wavelength filters may be formed between the upper electrode and the color-changing layer. The short-wavelength filter may be a multilayer film of a repeating high-refractive / low-refractive material, and preferably, in one example, it may be [0.5SiO2 / TiO2 / 0.5SiO2]. m (m = number of repeating layers, m is 7 or more), but is not limited to this. Furthermore, the aforementioned long-wavelength filter can be a multilayer film of repeating high-refractive / low-refractive material films; as a preferred example, it can be [0.5TiO2 / SiO2 / 0.5TiO2]. m (m = number of repeating layers, m is 7 or more).

[0104] The multiple ultra-thin LED elements constituting the above-mentioned sub-pixel unit are LED elements having a first conductive semiconductor layer, a photoactive layer and a second conductive semiconductor layer stacked on top of each other. The first conductive semiconductor layer of the ultra-thin LED element can be vertically arranged in the sub-pixel unit in a direction facing the lower electrode.

[0105] The cross-sectional shape of the aforementioned ultra-thin LED element may include one or more shapes selected from circles, ellipses, and polygons (trilaterals, quadrilaterals, pentagons, hexagons, octagons, decagons, trapezoids, rhombuses, stars, etc.). Multiple ultra-thin LED elements may be composed of elements with the same cross-sectional shape or may be composed of elements with different cross-sectional shapes to form a sub-pixel unit.

[0106] Furthermore, the aforementioned ultra-thin LED element can be a dot-type or disk-type LED element (Type 1), or it can be a micro-nano fin-type LED element (Type 2).

[0107] In this invention, the ultrathin LED element may further include an alignment induction layer, which is used to vertically align the ultrathin LED element along the thickness direction on one side and both sides of the alignment area where the ultrathin LED element is to be aligned in the lower electrode.

[0108] Furthermore, the aforementioned arrangement-inducing layer can be a magnetic layer, a charge layer, or a binding layer.

[0109] Furthermore, in the aforementioned ultra-thin LED element, the area of ​​the largest surface can be less than 1 / 3 of the sub-pixel area, preferably 1 / 50 to 1 / 3, and more preferably 1 / 30 to 1 / 3.

[0110] The first conductive semiconductor layer of the aforementioned ultrathin LED element is an n-type group III nitride semiconductor layer. An electron delay layer may also be included on the opposite side of the first conductive semiconductor layer (which is adjacent to the photoactive layer) so that the electrons and holes recombine in the photoactive layer reach a balance.

[0111] Furthermore, the aforementioned electron delay layer can also be a group III nitride semiconductor with a doping concentration lower than that of the aforementioned first conductive semiconductor layer.

[0112] Furthermore, the second conductive semiconductor layer of the aforementioned ultrathin LED element is a p-type group III nitride semiconductor layer, and an electron delay layer may also be included on the opposite side facing the second conductive semiconductor layer (which is adjacent to the photoactive layer), so that the number of electrons and holes recombinating in the photoactive layer reaches a balance.

[0113] Furthermore, the aforementioned electronic delay layer may also include one or more selected from CdS, GaS, ZnS, CdSe, CaSe, ZnSe, CdTe, GaTe, SiC, ZnO, ZnMgO, SnO2, TiO2, In2O3, Ga2O3, Si, poly(p-styrene) and its derivatives, polyaniline, poly(3-alkylthiophene) and poly(p-phenylene).

[0114] Furthermore, the first conductive semiconductor layer of the aforementioned ultrathin LED element is an n-type group III nitride semiconductor layer, and the second conductive semiconductor layer is a p-type group III nitride semiconductor layer. It may also include at least one of the following encapsulation films: a hole-driving encapsulation film, which surrounds the exposed side of the second conductive semiconductor layer or the exposed side of the second conductive semiconductor layer and at least a portion of the exposed side of the photoactive layer to move holes on the surface side of the exposed side to the center side; and an electron-driving encapsulation film, which surrounds the exposed side of the aforementioned first conductive semiconductor layer to move electrons on the surface side of the exposed side to the center side.

[0115] Furthermore, the aforementioned ultrathin LED element includes both the hole-driving cladding and the electron-driving cladding, and the electron-driving cladding can also be configured as the outermost cladding surrounding the sides of the first conductive semiconductor layer, the photoactive layer, and the second conductive semiconductor layer.

[0116] Furthermore, the aforementioned cavitation-driven membrane may also include components selected from AlN. X One or more of ZrO2, MoO, Sc2O3, La2O3, MgO, Y2O3, Al2O3, Ga2O3, TiO2, ZnS, Ta2O5 and n-MoS2.

[0117] Furthermore, the aforementioned electron-driven coating may also include materials selected from Al2O3, HfO2, and SiN. x SiO2, ZrO2, Sc2O3, AlN x And one or more of Ga2O3.

[0118] In the above-mentioned ultra-thin LED electrode assembly, the substrate is preferably a flexible substrate.

[0119] Furthermore, the aforementioned LED electrode components can also be encapsulated using encapsulation materials.

[0120] The high-resolution ultrathin LED display including the ultrathin LED electrode assembly described above is formed by performing a process including the following steps: step (1), preparing a lower electrode line including a lower electrode; step (2), forming a plurality of pixel units on the lower electrode; and step (3), forming an upper electrode line including an upper electrode in such a way as to electrically connect to the opposite side of the ultrathin LED element (which faces one side of the ultrathin LED element assembled on the lower electrode).

[0121] Between step (2) and step (3), the following step may also be included: filling the area around the ultra-thin LED element in each pixel unit with an insulator to form an insulating layer.

[0122] Each pixel unit in step (2) above is formed by a sub-pixel unit comprising multiple ultra-thin LED elements. The sub-pixel unit can be formed by printing on the lower electrode using inkjet printing, laser-supported transfer printing, stamp transfer printing, magnetic field-induced printing and / or electric field-induced printing to form multiple ultra-thin LED elements.

[0123] A preferred example of the laser-supported multi-chip transmission printing method described above is explained below.

[0124] The ultrathin LED electrode assembly of the present invention can be manufactured by performing a process including the following steps: step (1), preparing a plurality of lower electrodes to be formed on a substrate; and step (2), forming a plurality of pixel units on the lower electrodes by laser-supported multi-chip transfer printing.

[0125] Furthermore, after performing step (2), a process including the following steps can also be performed: step (3), filling the area around the ultra-thin LED element with an insulator to form an insulating layer; and step (4), forming an upper electrode in such a way that it is electrically connected to the opposite side of the ultra-thin LED element (which is assembled on the lower electrode) on one side.

[0126] Each pixel unit in step (2) is formed by a sub-pixel unit comprising multiple ultra-thin LED elements. The sub-pixel unit can be formed by printing multiple ultra-thin LED elements on the lower electrode using laser-supported multi-chip transfer printing.

[0127] More specifically, in the above-mentioned laser-supported multi-chip transfer printing method, ultra-thin LED elements are transferred onto the lower electrode by irradiating a laser onto one side of a transfer film through the openings of a mask with multiple openings. Thus, a pixel unit including multiple ultra-thin LED elements can be formed on the lower electrode. The transfer film includes a donor film and multiple ultra-thin LED elements arranged on the upper part of the donor film, and the transfer can be performed by irradiating a laser in the direction below the donor film.

[0128] Furthermore, lasers are irradiated through the aforementioned multiple openings, thereby allowing more than three ultra-thin LED elements to be simultaneously transferred onto the lower electrode through each opening. This allows for adjustment of the number of ultra-thin LED elements, which are transferred by adjusting the size of the mask openings and the configuration, quantity, and / or size of the ultra-thin LED elements formed on the donor film of the transfer film.

[0129] At this time, the transfer film includes a donor film and a plurality of ultra-thin LED elements arranged on the upper part of the donor film, which can be irradiated with laser in the direction below the donor film to perform the transfer.

[0130] Furthermore, the aforementioned multiple ultrathin LED elements are respectively stacked with a second conductive semiconductor layer, a photoactive layer, and a first conductive semiconductor layer. If a laser is irradiated in the donor film direction of the transfer film to transfer the ultrathin LED elements, the order of the inner layers of the ultrathin LED elements is reversed. Thus, an ultrathin LED element in which the first conductive semiconductor layer, the photoactive layer, and the second conductive semiconductor layer are stacked in sequence on the lower electrode can be formed and disposed.

[0131] At this point, laser-supported multi-chip transfer printing can be performed by various methods, as previously explained. Preferably, the donor film within the transfer film is used according to the laser-supported multi-chip transfer printing method.

[0132] The donor membrane mentioned above may include a polydimethylsiloxane stamp membrane, a polyimide membrane including a dynamic release layer, an elastic polymer microstructure stamp membrane, or a shape memory polymer membrane.

[0133] Using the aforementioned transfer film, pixel units (or sub-pixel units) are formed on the lower electrode using laser-supported multi-chip transfer printing. This prevents the problem of pn junction flipping of ultra-thin LED elements within pixel units (or sub-pixel units), which occurs at a high rate, when pixel units are formed using conventional inkjet printing methods.

[0134] Multiple ultra-thin LED elements simultaneously transferred onto the lower electrode by lasers irradiated from the same opening in the mask form a pixel unit or a sub-pixel unit. Two or three of the aforementioned sub-pixel units can form a pixel unit.

[0135] The high-resolution ultra-thin LED display of the present invention described above can have a resolution of 450 PPI to 3000 PPI, preferably 600 PPI to 2000 PPI, and more preferably 800 PPI to 2000 PPI. For example... Figure 1 As shown in Part A, when manufacturing conventional micro displays with a PPI of less than 1000, problems such as missing LED elements and misalignment causing dark spots also exist. However, as... Figure 1 As shown in the simplified diagram of Part B, in this invention, when manufacturing a display with a resolution of 1000 PPI to 3000 PPI or higher, multiple LED elements are included within the sub-pixel unit, and defects such as missing LED elements and dark spots caused by alignment errors can be prevented.

[0136] Furthermore, the high-resolution ultra-thin LED display of the present invention can have a density of 100,000 cd / m². 2 With brightness exceeding 0.1ms and a fast response time of less than 0.1ms, it can be applied to various displays, and preferably to displays for AR and VR devices.

[0137] Hereinafter, the above-mentioned ultra-thin LED electrode assembly will be divided into cases using the first type of ultra-thin LED element (dot type or disk type ultra-thin LED element) and the second type of ultra-thin LED element (micro-nano fin ultra-thin LED element), and a preferred example will be described.

[0138] [Type 1 (dot or disk type) ultra-thin LED electrode element and LED electrode assembly] The following is for reference Figure 2a and Figure 2b This describes an LED electrode assembly manufactured from a first-type ultrathin LED element.

[0139] An embodiment of the present invention provides an ultra-thin LED electrode assembly 1000 comprising: a lower electrode line 310, including lower electrodes 311 and 312; a plurality of ultra-thin LED elements 101 disposed on the lower electrodes 311 and 312; and an upper electrode line 320, including upper electrodes 321 and 322 disposed in contact with the upper part of the ultra-thin LED elements 101.

[0140] First, before explaining each structure in detail, the electrode lines used to make the ultra-thin LED element emit light will be explained.

[0141] The ultrathin LED electrode assembly 1000 includes an upper electrode line 320 and a lower electrode line 310 arranged facing each other on the upper and lower parts of the ultrathin LED element 101. The upper electrode line 320 and the lower electrode line 310 are not arranged in a horizontal direction. Therefore, the complex electrode lines of conventional electrode assemblies caused by electric field induction are avoided by arranging two electrodes with ultra-small thickness and width in a horizontal direction with micro- or nano-unit spacing in a plane with a limited area. This makes the electrode design very simple and easier to implement.

[0142] In particular, such as Figure 2a and Figure 2b As shown, regardless of the electrode design of the lower electrode line 310, the upper electrode line 320 can be configured to make electrical contact with the upper surface of the configured ultra-thin LED element 101. Therefore, it has the advantage of being very easy to design or implement the electrodes. In particular, Figure 2 shows that the upper electrodes 321 and 322 are independent and can also be implemented to contact the upper surface of all ultra-thin LED elements configured with only one upper electrode. Compared with the past, this has the advantage of greatly simplifying the implementation of the electrode lines.

[0143] Furthermore, the lower electrode line 310 and the upper electrode line 320 may be provided with a plurality of lower electrodes 311, 312 and upper electrodes 321, 322 respectively. Their number, spacing, configuration shape, etc. can be appropriately modified according to the size of the LED electrode assembly to be realized. Therefore, the present invention is not particularly limited thereto.

[0144] Furthermore, when the upper electrode line 320 is designed to make electrical contact with the upper part of the ultra-thin LED element 101 encapsulated on the lower electrode line 310, the number, arrangement, and shape are not limited. However, as Figure 2a When the lower electrode lines 310 are arranged side by side along one direction, the upper electrode lines 320 can be arranged perpendicular to the aforementioned direction. This electrode configuration is widely used in existing displays and the like, and has the advantage of being able to directly use the electrode configurations and control technologies from the display field.

[0145] Furthermore, the lower electrode line 310 and the upper electrode line 320 can have the materials, shapes, widths, and thicknesses of electrodes commonly used in LED electrode assemblies, and can be manufactured using known methods. Therefore, the present invention does not specifically limit them. For example, the lower electrodes 311, 312 and the upper electrodes 321, 322 can each independently be made of aluminum, chromium, gold, silver, copper, graphene, ITO, AZO, or alloys thereof, with widths ranging from 0.1 μm to 50 μm and thicknesses ranging from 0.1 μm to 100 μm, but can be appropriately modified considering the size of the target LED electrode assembly.

[0146] According to one embodiment of the present invention, configuration regions S1, S2, S3, and S4 for configuring ultra-thin LED elements 101 can be formed on the lower electrodes 311 and 312. The configuration regions S1, S2, S3, and S4 can be configured in various ways depending on the purpose, such as... Figure 2a As shown, they can be placed between configuration areas at specified intervals, or, with... Figure 2a As shown, the entire area on the lower electrodes 311 and 312 can also be a configuration area.

[0147] Next, the ultra-thin LED element 101 disposed between the lower electrode line 310 and the upper electrode line 320 will be described.

[0148] Reference Figure 3 and Figure 4As described above, an ultrathin LED element 101 according to an embodiment of the present invention includes a first conductive semiconductor layer 10, a photoactive layer 20 and a second conductive semiconductor layer 30. In addition, it may also include: an upper electrode layer 60 formed under the first conductive semiconductor layer 10; a lower electrode layer 40 formed on the second conductive semiconductor layer 30; and an alignment induction layer 70 formed on the outermost side of the second conductive semiconductor layer 30.

[0149] The aforementioned multiple layers are stacked along any direction. In a dot-type LED, the ratio between the thickness in the stacking direction and the length of the major axis in the cross-section perpendicular to the stacking direction satisfies 1:0.5 to 1:1.5, preferably 1:0.8 to 1:1.2, and more preferably 1:0.9 to 1:1.1.

[0150] Furthermore, in disk-type LEDs, the ratio between the thickness in the stacking direction and the length of the major axis in the cross-section perpendicular to the stacking direction satisfies 1:1.5 to 1:5.0, preferably 1:1.5 to 1:3.0, and more preferably 1:1.5 to 1:2.5. Therefore, when inkjet ink is used to realize ultra-thin LED elements, it exhibits excellent dispersibility in the dispersion medium, does not settle for a long time, and is conducive to maintaining the dispersed state.

[0151] Furthermore, due to the suitable geometry for this ink-based structure, no additional additives are needed to maintain the dispersed state, offering the advantage of preventing contamination of the lower electrode line 310 or circuit board caused by additional additives. Moreover, when ink containing ultra-thin LED elements is printed on the lower electrode line 310, in conventional nanorod-type LED elements with large aspect ratios, almost all elements are horizontally positioned on the electrode. Ultra-thin LED elements have the advantage of reducing the probability of horizontal arrangement on the electrode. Furthermore, when assembling on the electrode along the thickness direction, the probability of assembling multiple elements in different directions is reduced. In other words, the probability of p-type conductive semiconductor layers and n-type conductive semiconductor layers being assembled on the lower electrode in different directions reduces electrical hazards caused by reverse alignment, thereby improving lifespan. Note that in the case of a circular cross-sectional shape, the length of the major axis refers to the diameter; in the case of an elliptical cross-sectional shape, the length of the major axis refers to the length of the major axis; and in the case of a polygonal cross-sectional shape, the length of the major axis refers to the length of the longest side. In addition, when the cross-section of an ultra-thin LED element varies along the thickness direction, the aforementioned cross-section refers to the largest surface in the cross-section.

[0152] Furthermore, the ratio between the length of the minor axis and the length of the major axis in the aforementioned cross-section satisfies 1:0.5 to 1:1.5, preferably 1:0.8 to 1:1.2, and more preferably 1:0.9 to 1:1.1, which is more conducive to achieving the aforementioned objective of the present invention. Even if the ratio between the thickness and the length of the major axis satisfies 1:0.5 to 1:1.5, if the ratio between the length of the minor axis and the length of the major axis in the cross-section exceeds 1:0.5 to 1:1.5, the LED element is difficult to maintain a dispersed state in the dispersion medium for a long time, and therefore is not suitable for ink-making. Moreover, in order to maintain the dispersed state in the dispersion medium for a long time for LED elements with a geometry that is not suitable for ink-making, additives are required, which has the problem of contamination of the driving electrode or circuit board caused by the use of additives. Here, the length of the minor axis in the cross-section refers to the longest length of the axis perpendicular to the major axis.

[0153] in addition, Figure 3 The ultrathin LED element 101 shown has a cross-sectional area of ​​the same size perpendicular to the stacking direction of the multiple layers, but is not limited to this, and the size of the cross-section may vary depending on the thickness.

[0154] And, as Figure 3 As shown, the shape of the ultra-thin LED element 101 can be a cylinder, but it is not limited to this. It can be a polyhedron, octahedron, decahedron, or even a non-standard shape with a star shape.

[0155] According to one embodiment of the present invention, in the ultra-thin LED element 101, the sedimentation rate during ink formation is slow, resulting in excellent dispersion retention performance that allows the maximum surface area to be 25 μm. 2 Below, 9μm is more preferred. 2 Below, 4μm is more preferred. 2 Hereinafter, 0.1 μm is preferred. 2 ~2.5μm 2 The area of ​​the largest surface refers to the maximum value among the areas of the projected LED elements. If the area of ​​the largest surface is greater than 25μm... 2 It has a fast settling speed, which may reduce its dispersion and retention performance, making it unsuitable for manufacturing inks. Alternatively, it may contain additional additives for ink production, or it may have limitations that require the use of specific dispersion media.

[0156] According to one embodiment of the present invention, the thickness of the ultra-thin LED element 101 can be less than 2.5 μm, more preferably less than 1.5 μm, thereby making it more suitable for maintaining a dispersed state for a long time when ink is formed.

[0157] However, in the case of LED elements, when the thickness is made very thin, the sites where electrons and holes bind detach from the photoactive layer 20, thereby reducing luminous efficiency. In particular, when multiple ultra-thin LED elements are realized by etching a large area of ​​LED wafer, the thicknesses of the first conductive semiconductor layer, the photoactive layer, and the second conductive semiconductor layer are already determined in the LED wafer state. To achieve the desired luminous efficiency, these problems inevitably occur when only a portion of the wafer is etched in a manner different from the predetermined thicknesses of each layer. This change in the position of the electron-hole binding sites occurs due to the velocity difference between electrons and holes moving within the conductive semiconductor layer. For example, in the conductive semiconductor layer, which is n-type GaN, the electron mobility is 200 cm⁻¹. 2 / Vs, conversely, in the conductive semiconductor layer of p-type GaN, the hole mobility is only 5cm. 2 / Vs, due to the uneven electron-hole velocity as described above, the position where electrons and holes combine varies depending on the thickness of the conductive semiconductor layer as p-type GaN and the thickness of the conductive semiconductor layer as n-type GaN, and they can detach from the photoactive layer.

[0158] In this regard, refer to Figure 6 To illustrate, in an LED element 200 with a diameter of approximately 600 nm, which consists of an n-type GaN conductive semiconductor layer 210, a photoactive layer 220, and a p-type GaN conductive semiconductor layer 230, considering the electron mobility of the n-type GaN conductive semiconductor layer 210 and the hole mobility of the p-type GaN conductive semiconductor layer 230, when the thickness is designed to balance the number of electrons and holes recombinating at position A2 within the photoactive layer 220, the thickness h of the n-type GaN conductive semiconductor layer 210 must be very thick. Therefore, unless the thickness of the p-type GaN conductive semiconductor layer 230 is made extremely thin, the possibility of realizing a rod-shaped LED element is very high. In other words, when the thickness of each layer is determined by the position where the number of recombinating electrons and holes is balanced by the photoactive layer 220, the smaller the length of the major axis of the cross-section perpendicular to the thickness direction, the greater the aspect ratio between the thickness of the LED element and the length of the major axis of the cross-section. Therefore, even if the number of holes and electrons recombinating in the photoactive layer is balanced, it is not suitable to realize an ink-like structure. Furthermore, when the thickness of the n-type GaN conductive semiconductor layer 210 is made thinner to suit the ink, the position where the number of recombinated electrons and holes reaches equilibrium can be formed at any position A3 within the p-type GaN conductive semiconductor layer 230, thereby reducing the luminous efficiency.

[0159] Therefore, the ultrathin LED element provided in one embodiment of the present invention has a geometry suitable for implementation as ink, and the number of holes and electrons recombinating in the above-mentioned photoactive layer is balanced. Thus, to prevent a decrease in luminous efficiency, an electron delay layer may be further included at a position adjacent to the n-type conductive semiconductor layer. Referring to this... Figure 7 To explain, when the first conductive semiconductor layer is an n-type conductive semiconductor, the ultra-thin LED element 102 can have an electron delay layer 50 disposed on the first conductive semiconductor layer 10. Therefore, even if the thickness of the first conductive semiconductor layer 10 is made thin, a decrease in luminous efficiency can be prevented. Furthermore, the thinner thickness of the first conductive semiconductor layer 10 reduces the probability of electrons being trapped by surface defects as they move along the thickness direction of the first conductive semiconductor layer 10, thus minimizing luminous loss.

[0160] For example, the aforementioned electron delay layer 50 may include one or more materials selected from CdS, GaS, ZnS, CdSe, CaSe, ZnSe, CdTe, GaTe, SiC, ZnO, ZnMgO, SnO2, TiO2, In2O3, Ga2O3, Si, poly(p-styrene) and its derivatives, polyaniline, poly(3-alkylthiophene), and poly(p-phenylene). Furthermore, the thickness of the aforementioned electron delay layer 50 may be from 1 nm to 100 nm, but is not limited to this; appropriate changes can be made by considering the materials of the n-type conductive semiconductor layer, the electron delay layer, etc.

[0161] The following describes in detail each layer of the ultra-thin LED elements 101 and 102 according to an embodiment of the present invention.

[0162] One of the first conductive semiconductor layer 10 and the second conductive semiconductor layer 30 is an n-type semiconductor layer, and the other can be a p-type semiconductor layer. The n-type semiconductor layer and the p-type semiconductor layer can be any known semiconductor layer used in light-emitting diodes without limitation. For example, the n-type semiconductor layer and the p-type semiconductor layer can include III-V semiconductors called group III nitride materials, especially binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen.

[0163] For example, the first conductive semiconductor layer 10 can be an n-type semiconductor layer. In this case, the n-type semiconductor layer can be a semiconductor layer with In... x Al y Ga 1-x-yThe semiconductor material is composed of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), for example, it can be one or more selected from InAlGaN, GaN, AlGaN, InGaN, AlN, InN, etc., and can be doped with a first conductive dopant (e.g., Si, Ge, Sn, etc.). According to a preferred embodiment of the present invention, the thickness of the first conductive semiconductor layer 10 can be 100nm to 1800nm, but is not limited thereto. Preferably, the thickness of the first conductive semiconductor layer 10 can be thicker than or equal to the thickness of the second conductive semiconductor layer 30.

[0164] Furthermore, the second conductive semiconductor layer 30 can be a p-type semiconductor layer. In this case, the p-type semiconductor layer can be a layer with In... x Al y Ga 1-x-y The semiconductor material with the composition N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be, for example, one or more selected from InAlGaN, GaN, AlGaN, InGaN, AlN, InN, etc., and can be doped with a second conductive dopant (e.g., Mg). According to a preferred embodiment of the present invention, the thickness of the second conductive semiconductor layer 30 can be 50nm to 150nm, but is not limited thereto. Preferably, the thickness of the second conductive semiconductor layer 30 can be thinner than or equal to the thickness of the first conductive semiconductor layer 10.

[0165] Furthermore, the photoactive layer 20 located between the first conductive semiconductor layer 10 and the second conductive semiconductor layer 30 can be formed in a single quantum well or multiple quantum well structure. The photoactive layer 20 can be any photoactive layer included in typical LED elements used in lighting, displays, etc., without limitation. A metal protective layer (not shown) doped with conductive dopants can also be formed above and / or below the photoactive layer 20. This metal protective layer doped with conductive dopants can be implemented by an AlGaN layer or an InAlGaN layer. Additionally, materials such as AlGaN and AlInGaN can also be used as the photoactive layer 20. In this photoactive layer 20, when an electric field is applied to the element, electrons and holes moving from the conductive semiconductor layer to the photoactive layer, located above and below the photoactive layer respectively, combine in the photoactive layer to form electron-hole pairs, thereby emitting light. According to a preferred embodiment of the present invention, the thickness of the photoactive layer 20 can be 50 nm to 200 nm, but is not limited thereto.

[0166] Furthermore, an upper electrode layer 60 may be provided below the first conductive semiconductor layer 10. Alternatively, an electron delay layer 50 may be provided between the first conductive semiconductor layer 10 and the upper electrode layer 60. And, a lower electrode layer 40 may be provided above the second conductive semiconductor layer 30.

[0167] The lower electrode layer 40 and the upper electrode layer 60 described above can be any electrode layers commonly used in LED elements. Each of the lower electrode layer 40 and the upper electrode layer 60 is independently a single layer formed from one of Cr, Ti, Al, Au, Ni, ITO, and their oxides or alloys, or a composite layer formed by mixing two or more single layers or two or more materials. For example, ... Figure 4 As shown, the ultrathin LED element 102 may have a lower electrode layer 40 on the second conductive semiconductor layer 30, on which an ITO electrode layer and a Ti / Au composite layer 41 are stacked. Furthermore, the thickness of the lower electrode layer 40 and the upper electrode layer 60 may each be independently between 10 nm and 500 nm, but are not limited thereto.

[0168] Furthermore, an alignment guiding layer for vertically arranging the ultra-thin LED element along the thickness direction can be formed on one side of the thickness direction of the ultra-thin LED element and on any one or both sides of the arrangement regions S1, S2, S3, and S4 within the lower electrodes 311 and 312 where the ultra-thin LED element is to be arranged. This alignment guiding layer functions to induce the ultra-thin LED element 101 to move to a target region on the lower electrodes 311 and 312, for example, the arrangement regions S1, S2, S3, and S4, thus vertically arranging the ultra-thin LED element 101 on the lower electrodes 311 and 312. This alignment guiding layer can be formed on the side of the ultra-thin LED element 101 and / or on the target region on the lower electrodes 311 and 312, for example, on the arrangement regions S1, S2, S3, and S4.

[0169] The case where an alignment-inducing layer is formed only on the lower electrodes 311 and 312 will be described. In this case, the alignment-inducing layer can be a bonding layer that is chemically bonded to the metal portion of the ultra-thin LED element 101, such as, for example, the lower electrode layer and / or the upper electrode layer. In this case, for example, the bonding layer can be a layer formed in a manner that exposes thiol groups to the outside.

[0170] Furthermore, the formation of an alignment induction layer on the ultra-thin LED element 101 will be explained, such as... Figure 3 and Figures 5a to 5c As shown, the lower electrode layer 40 may further include an alignment induction layer 70. The material of the alignment induction layer 70 can vary depending on the specific induction and bonding method. For example, the alignment induction layer 70 can be a charge layer carrying positive or negative charges; specifically, such as... Figure 5a As shown, this can be a negatively charged charge layer 71. In this charge layer 71, ultra-thin LED elements are induced onto the lower electrode and can be vertically assembled thereon via electrophoresis, as described later. Alternatively, as... Figure 5bAs shown, the alignment-inducing layer can be a binding layer 72, where functional groups exposed on the binding layer 72 form chemical bonds with other functional groups disposed on the first electrode. Alternatively, they can be chemically bonded to the lower electrode of the metallic material, or, for example, through adsorption. Furthermore, as... Figure 5c As shown, the above-mentioned arrangement induction layer 70 can be a magnetic layer 73. Under a magnetic field, the magnetic layer 73 can be assembled on the lower electrodes 311 and 312.

[0171] Furthermore, when the alignment induction layer 70 disposed on the ultrathin LED element is a charge layer 71, a charge layer with a charge opposite to that of the charge layer 71 disposed on the ultrathin LED element can be disposed in the arrangement area within the lower electrodes 311, 312. This provides the advantage of better inducing the ultrathin LED element to the arrangement area and better elevating the ultrathin LED element. The charge layer is not limited to materials suitable for forming layers or coatings while carrying either positive or negative charges.

[0172] Furthermore, when the alignment induction layer 70 disposed on the ultra-thin LED element is a magnetic layer 73, a magnetic layer may also be included in the arrangement area within the lower electrodes 311, 312. This provides the advantage of better guiding the ultra-thin LED element to the arrangement area and better erecting the ultra-thin LED element. The magnetic layer is a strongly magnetic or paramagnetic material.

[0173] in addition, Figure 3 and Figure 4 The diagram shows the alignment induction layer 70 located on the lower electrode layer 40, but it is not limited to this; the alignment induction layer 70 can also be configured to be located on the upper electrode layer 60. In other words, the alignment induction layer 70 can be disposed on the ultrathin LED element as either side of the thickness direction of the ultrathin LED element, i.e., as the top or bottom layer.

[0174] Furthermore, in the ultra-thin LED element 101, when the surface parallel to the stacking direction is referred to as the side surface, a protective film 80 surrounding the side surface of the element may also be included. The aforementioned protective film 80 performs the function of protecting the surfaces of the first conductive semiconductor layer 10, the photoactive layer 20, and the second conductive semiconductor layer 30. Moreover, in a manufacturing method of the ultra-thin LED element described later, the process of separating multiple LED pillars after etching the LED wafer along the thickness direction can perform the function of protecting the first conductive semiconductor layer 10.

[0175] For example, the protective coating 80 may include one or more materials selected from silicon nitride (Si3N4), silicon dioxide (SiO2), aluminum oxide (Al2O3), hafnium dioxide (HfO2), zirconium oxide (ZrO2), yttrium oxide (Y2O3), titanium dioxide (TiO2), aluminum nitride (AlN), and gallium nitride (GaN). The thickness of the protective coating 80 may be 5 nm to 100 nm, more preferably 30 nm to 100 nm, thereby facilitating the protection of the first conductive semiconductor layer 10 in the process of separating the LED pillars described later.

[0176] In addition, such as Figure 8 As shown, in order to have improved luminous efficiency in addition to the protective function of the protective coating, an ultra-thin LED element 103 of an embodiment of the present invention may be configured with a protective coating 80'. The protective coating 80' includes: a hole-driving coating 81, which surrounds the exposed side of the second conductive semiconductor layer 30 or the exposed side of the second conductive semiconductor layer 30 and at least a portion of the exposed side of the photoactive layer 20, to move holes on the surface side of the exposed side to the center side; and an electron-driving coating 82, which surrounds the exposed side of the first conductive semiconductor layer 10, to move electrons on the surface side of the exposed side to the center side.

[0177] A portion of the charge moving from the first conductive semiconductor layer 10 to the photoactive layer 20 and a portion of the holes moving from the second conductive semiconductor layer 30 to the photoactive layer 20 can move along the side surface. In this case, due to defects present on the surface, electron or hole quenching occurs, which may lead to a decrease in luminous efficiency. Even if a protective coating is provided, the problem of quenching caused by defects generated on the surface of the element before the protective coating is provided cannot be avoided. However, when a protective coating 80' is formed by a hole-driven coating 81 and an electron-driven coating 82, electrons and holes are concentrated on the central side of the element to induce them to move along the direction of the photoactive layer. Therefore, even if defects exist on the surface of the element before the protective coating is formed, the loss of luminous efficiency caused by surface defects can be prevented.

[0178] For example, the aforementioned hole-driven membrane 81 may include components selected from AlN. X One or more of the following are selected from the group consisting of ZrO2, MoO, Sc2O3, La2O3, MgO, Y2O3, Al2O3, Ga2O3, TiO2, ZnS, Ta2O5, and n-MoS2: the electron-driven coating 82 may include Al2O3, HfO2, SiN... x SiO2, ZrO2, Sc2O3, AlN x It consists of one or more of the groups consisting of Ga2O3.

[0179] And, as Figure 8 As shown, when the ultra-thin LED element is provided with both a hole-driving cladding 81 and an electron-driving cladding 82, the electron-driving cladding 82 can be configured as the outermost cladding surrounding the sides of the first conductive semiconductor layer 10, the photoactive layer 20, and the second conductive semiconductor layer 30.

[0180] Furthermore, the thickness of the aforementioned hole-driven membrane 81 and electron-driven membrane 82 can each independently range from 1 nm to 50 nm.

[0181] In addition, the first conductive semiconductor layer 10, photoactive layer 20 and second conductive semiconductor layer 30 of the ultrathin LED element can be included as the smallest components of the ultrathin LED element. Other phosphor layers, quantum dot layers, other active layers, semiconductor layers, hole block layers and / or electrode layers may also be included above / below each layer.

[0182] When the ultrathin LED electrode assembly 1000 described above is manufactured by inkjet printing, it can be manufactured by the manufacturing method described later. Specifically, it can be manufactured by performing the following steps: step (1), preparing a lower electrode line including a lower electrode; step (2), forming a plurality of pixel units on the lower electrode; and step (3), forming an upper electrode line including an upper electrode in such a way as to electrically connect with the opposite side of the ultrathin LED element (which faces one side of the ultrathin LED element assembled on the lower electrode).

[0183] Furthermore, step (2) above can also perform the following steps: step (2-1), processing an ink composition including multiple ultra-thin LED elements on the lower electrode; and step (2-2), assembling ultra-thin LED elements vertically along the thickness direction on the lower electrode.

[0184] In the following description of the manufacturing method, the contents described in the above-described ultra-thin LED electrode assembly 1000 will be omitted.

[0185] As step (1) of the present invention, the step of preparing a lower electrode line 310 including lower electrodes 311 and 312 is performed.

[0186] The aforementioned lower electrodes 311 and 312 can be implemented using known methods and various known electrode patterns; this invention is not particularly limited thereto. For example, as shown... Figure 1The plurality of lower electrodes 311, 312 can be implemented in a pattern that is arranged side-by-side at predetermined intervals. The lower electrodes 311, 312 can be formed on a substrate (or base plate) 400. For example, the substrate 400 can be any of a glass substrate, a crystal substrate, a sapphire substrate, a plastic substrate, and a flexible polymer film. For another example, the substrate 400 can be transparent. However, it is not limited to the exemplified types; any type of substrate commonly used to form electrodes can be used.

[0187] The area of ​​the substrate (or base plate) 400 is not limited, and can be varied by considering the area of ​​the lower electrodes 311 and 312 formed on the substrate 400. Furthermore, the thickness of the substrate 400 can be from 100 μm to 1 mm, but is not limited to this.

[0188] Subsequently, in step (2-1) of step (2) of the present invention, the ultrathin LED element comprises a stacked first conductive semiconductor layer 10, a photoactive layer 20, and a second conductive semiconductor layer 30, wherein the ratio between the thickness in the stacking direction and the length of the major axis in the cross-section perpendicular to the stacking direction can be 1:0.5 to 1:1.5 or 1:1.5 to 1:5.0. Furthermore, the step of processing an ink composition comprising a plurality of the ultrathin LED elements 101 on the lower electrodes 311 and 312 is performed.

[0189] The aforementioned ultrathin-film LED element 101 is prepared from a plurality of ink-based ink compositions, and the ultrathin-film LED element assembly 100 composed of a plurality of ultrathin-film LED elements 101 can be transmitted through... Figure 9 and Figure 10 Manufacturing method 1 shown or Figure 11 The manufacturing process is carried out using manufacturing method 2 shown in the figure. When the n-type III nitride semiconductor layer is a doped n-type III nitride semiconductor layer, manufacturing method 1 can be selected; when the n-type III nitride semiconductor layer is undoped, manufacturing method 2 can be used.

[0190] In manufacturing methods 1 and 2, the process involves manufacturing an LED chip 100a and fabricating a chip comprising multiple LED structures. Figure 9 100h Figure 11 The process from LED wafer 100a to LED structure fabrication (including multiple LED structures) is the same up to 100h. The methods differ. Figure 9 100h Figure 11 The process up to 100h will be described using manufacturing method 1.

[0191] First, refer to Figure 9 Manufacturing method 1 will be described.

[0192] Manufacturing method 1 may include: step (A), preparing LED chip 100a ( Figure 9 (a) of the LED chip 100a); step (B) is to pattern the upper part of the LED chip 100a in such a way that the plane perpendicular to the direction in which multiple layers are stacked in a single LED structure has a target shape and size. Figure 9 (b) and (c) portions), etched vertically to at least a portion of the thickness of the first conductive semiconductor layer 10, thereby forming a plurality of LED structures. Figure 9 (d) to (h) portions); step (C), forming a protective film in a manner that surrounds the exposed surface of each LED structure and exposes the upper surface of the first portion between adjacent LED structures to the outside. Figure 9 (i) to (j); Step (D), after immersing the LED chip in the electrolyte, after electrically connecting the other terminal of the power supply, which is electrically connected to one terminal of the power supply, to the electrode immersed in the electrolyte, a power supply is applied to form multiple pores in the first part. Figure 9 (k) portion); step (E), applying ultrasonic waves to the LED wafer to separate multiple LED structures from the first portion having multiple pores ( Figure 9 (o part).

[0193] The LED wafer 100a prepared in step (A) is commercially available and can be used without restriction. For example, the LED wafer 100a includes at least a substrate 1, a first conductive semiconductor layer 10, a photoactive layer 20, and a second conductive semiconductor layer 30. In this case, the first conductive semiconductor layer 10 can be an n-type III nitride semiconductor layer, and the second conductive semiconductor layer 30 can be a p-type III nitride semiconductor layer. Furthermore, after etching the n-type III nitride semiconductor layer to a target thickness, the remaining LED structure on the LED wafer can be separated through steps (C) to (E). Therefore, the thickness of the n-type III nitride semiconductor layer within the LED wafer is not limited, and the presence or absence of an additional sacrificial layer can be disregarded when selecting a wafer.

[0194] Furthermore, each layer within the aforementioned LED chip 100a may have a c-plane crystalline structure.

[0195] Furthermore, the aforementioned LED chip 100a may have already undergone a cleaning process. The cleaning process can appropriately employ conventional chip cleaning solutions and processes; therefore, the present invention is not particularly limited thereto. For example, the aforementioned cleaning solution may be isopropanol, acetone, and hydrochloric acid, but is not limited to these.

[0196] Subsequently, before performing step (B), a step of forming a lower electrode layer 40 on the second conductive semiconductor layer 30, which is a p-type group III nitride semiconductor layer, can be performed. The lower electrode layer 40 can be formed by conventional methods for forming electrodes on semiconductor layers, such as by deposition via sputtering. As described above, the material of the lower electrode layer 40 can be ITO, and it can be formed with a thickness of approximately 150 nm. After the deposition process, the lower electrode layer 40 can also undergo a rapid thermal annealing process, such as processing at 600°C for 10 minutes, but this can be appropriately adjusted considering the thickness and material of the electrode layer; therefore, the present invention is not particularly limited thereto.

[0197] Next, as step (B), the upper part of the LED chip is patterned in such a way that the plane perpendicular to the direction in which multiple layers are stacked in a single LED structure has a target shape and size. Figure 9 (b) to (c) of the above). Specifically, a mask pattern layer may be formed on the upper surface of the lower electrode layer 40. The mask pattern layer may be formed using known methods and materials used when etching the LED chip. The pattern of the pattern layer may be formed by applying conventional photolithography or nanoimprinting processes.

[0198] For example, such as Figure 9 As shown in section (f), the mask pattern layer can be a stack of a first mask layer 2, a second mask layer 3, and a resin pattern layer 4' with a predetermined pattern formed on the lower electrode layer 40. A brief description of the method for forming the mask pattern layer is provided, for example, by depositing the first mask layer 2 and the second mask layer 3 on the lower electrode layer 40, and then forming the resin layer 4', which will become the source of the resin pattern layer 4', on the second mask layer 3. Figure 9 After removing the residual resin portion 4a of resin layer 4 by conventional methods such as reactive ion etching (RIE), (parts (b) and (c)) of resin layer 4 Figure 9 (d) portion), by etching the second mask layer 3 and the first mask layer 2 respectively according to the pattern of the resin pattern layer 4'. Figure 9 The first mask layer 2 can be formed from silicon dioxide, and the second mask layer 3 can be a metal layer such as aluminum or nickel. These etching processes can be performed by RIE and inductively coupled plasma (ICP), respectively. In addition, when etching the first mask layer 2, the resin pattern layer 4' can also be removed (see 100f).

[0199] Furthermore, the resin layer 4, which is the source of the resin pattern layer 4', can be formed by nanoimprinting. After manufacturing a corresponding mold on the target pattern template, the resin layer is formed by processing the resin in the mold. The resin layer 4 is then transferred to the wafer stack 100b on which the first mask layer 2 is provided on the lower electrode layer 40 and the resin layer 4 is provided on the wafer stack 100b on which the second mask layer 3 is formed. By removing the mold, the wafer stack 100c on which the resin layer 4 is formed can be realized.

[0200] In addition, a method for forming patterns by nanoimprinting is described, but it is not limited to this. The pattern can be formed by photolithography using known photosensitive materials, or by known laser interference etching, electron beam etching, etc.

[0201] After that, as Figure 9 As shown in section (g), based on the pattern of the mask pattern layers 2 and 3 formed on the lower electrode layer 40, etching is performed along a direction perpendicular to the surface of the LED wafer 100f to a portion of the thickness of the first conductive semiconductor layer 10, which is an n-type III nitride semiconductor layer. This allows the fabrication of an LED wafer 100g with LED structures. The etching can be performed using conventional dry etching methods such as ICP and KOH / TAMH wet etching. During this etching process, the second mask layer 3, which constitutes the mask pattern layer Al, is removed. Then, the first mask layer 2, which is silicon dioxide, present on the lower electrode layer 40 constituting each LED structure within the LED wafer 100g, is removed. This allows the fabrication of an LED wafer 100h with multiple LED structures.

[0202] Subsequently, as step (C), a step of forming a protective film 80a on an LED wafer 100h having multiple LED structures formed thereon can be performed, such that the exposed surface of each LED structure is surrounded by a predetermined thickness and the upper surface S1 of the first portion a between adjacent LED structures is exposed to the outside. Figure 9 (i) and (j) parts). The protective film 80a described above is used to prevent damage to the LED structure caused by the execution step (D) described later. At the same time, when the LED structure separated from the LED chip continues to remain on the side, it can also perform the function of protecting the side surface of the separated individual LED structures from external stimuli.

[0203] Reference Figure 10Steps (C) to (E) will be explained. Specifically, step (C) can be performed by performing the following steps: step (C-1), depositing a protective coating material on an LED wafer 100h on which multiple LED structures are formed, such that the protective coating 80a surrounds the exposed surface of each LED structure with a specified thickness; and step (C-2), removing the protective coating deposited on the upper surface S1 of the first portion a between adjacent LED structures, exposing the upper surface S1 of the first portion a between LED structures to the outside.

[0204] The above step (C-1) is the step of depositing a protective coating material on the LED wafer 100h on which multiple LED structures are formed. Figure 10 (a) In this case, the protective coating material can be a known material that is not chemically affected by the electrolyte in the subsequent steps. For example, the material of the protective coating 80 described above can be used without limitation. For example, it can include one or more selected from silicon nitride, silicon dioxide, aluminum oxide, hafnium dioxide, zirconium oxide, yttrium oxide, lanthanum oxide (La2O3), scandium oxide (Sc2O3), titanium dioxide, aluminum nitride, and gallium nitride. Furthermore, the thickness of the protective coating 80a formed by the deposition of the protective coating material can be 5 nm to 100 nm, more preferably 30 nm to 100 nm. If the thickness of the protective coating 80a is less than 5 nm, it is difficult to prevent damage to the LED structure caused by the electrolyte in the subsequent step (D). When the thickness of the protective coating 80a is greater than 100 nm, there may be an increase in manufacturing costs and problems with interconnection between LED structures.

[0205] Next, step (C-2) is to remove the protective coating deposited on the upper surface S1 of the first portion a between adjacent LED structures to expose the upper surface S1 of the first portion a between the LED structures to the outside. Figure 10 (b) Due to the execution of step (C-1), a protective coating material is also deposited on the upper surface S1 of the first part a between adjacent LED structures. As a result, the electrolyte cannot come into contact with the first conductive semiconductor layer 10, which is an n-type group III nitride semiconductor, and thus the target pore cannot be formed in the first part a. Therefore, the step of exposing the first part a to the outside by removing the protective coating material covering the upper surface S1 of the first part a is performed. At this time, considering the protective coating material, the removal of the protective coating material can be performed by a known dry or wet etching method.

[0206] Furthermore, according to one embodiment of the present invention, the protective film 80a formed in step (C) is a temporary protective film for preventing damage to the LED structure caused by performing step (C). Between step (D) and step (E), a step may also be included to remove the aforementioned temporary protective film and form a surface protective film surrounding the sides of the LED structure. That is, as... Figure 9 As shown, the protective film 5' in step (C) is only provided as a temporary protective film to prevent damage to the LED structure in step (D). Figure 9 The surface protective film 80, which removes the surface of the LED structure before performing step (E) and performs the function of preventing surface damage to the LED structure, can be formed in a manner that covers the side of the LED structure. Figure 9 (m) part).

[0207] in addition, Figure 9 The illustrated embodiment presents the inconvenience of forming two protective films; however, this can be considered in light of the planar shape, size, and spacing between the manufactured LED structures. Furthermore, when step (D) is performed, partial damage to the protective film may occur. If the damaged protective film remains on the final individual LED structure and is used as a surface protective film, it may be difficult to properly perform the surface protection function. Therefore, it is more advantageous to reapply the protective film after removing the protective film from step (D), depending on the circumstances.

[0208] The explanation is as described above. Figure 9 The manufacturing process shown involves depositing a temporary protective coating material 5 onto an LED wafer 100h on which multiple LED structures are formed. Figure 9 (i) The temporary protective coating material 5 deposited on the upper surface S1 of the first part a of the first conductive semiconductor layer 10 (which is a doped n-type III nitride semiconductor layer between adjacent LED structures of the LED wafer 100i on which the protective coating material 5 is deposited) is etched, thereby forming a protective coating 5' as a temporary protective coating protecting the sides and top of multiple LED structures. Step (D) described later is performed. Figure 9 After the (k) portion), the protective coating 5' is removed by etching. Figure 9 (l) portion), as a surface protective coating for protecting the surface of the LED structure, after depositing the protective coating material on the LED chip 100l, the protective coating material formed on the upper part of each LED structure is removed, thereby forming a protective coating 80 surrounding the sides of the LED structure. Figure 9(m) portion). At this time, not only can the protective coating material formed on the upper part of the LED structure be removed, but also the protective coating material deposited on the upper surface S1 of the first portion a of the first conductive semiconductor layer 10 (which is a doped n-type III group nitride semiconductor layer between adjacent LED structures of the LED wafer 100m) can be removed together. As a result, the bubble generating solvent in step (3) described later can come into contact with the upper surface S1 of the first portion a, and the bubbles generated by the ultrasonic waves can penetrate into the pores P formed in the first portion a, thereby separating the LED structure through the bubbles.

[0209] In addition, the temporary protective coating material and the surface protective coating material are the same as the materials described above for the protective coating, and the coating thickness can also be achieved within the thickness range of the protective coating described above.

[0210] Subsequently, as step (D) of manufacturing method 1, the following steps are performed: after immersing the LED chip in the electrolyte, after electrically connecting the other terminal of the power supply which is electrically connected to any terminal of the power supply to the electrode immersed in the electrolyte, the power supply is applied to form a plurality of pores in the first part.

[0211] Specifically, refer to Figure 10 To illustrate, an LED chip 100h2 with a protective coating 80a is electrically connected to either terminal of a power supply, for example, to the anode. The other terminal of the power supply, for example, the cathode, is electrically connected to an electrode immersed in an electrolyte. When a power supply is applied, an LED chip 100h3 can be manufactured in which a plurality of pores P are formed in the first portion a of the first conductive semiconductor layer 10, which is a doped n-type III nitride semiconductor. At this time, the pores P are formed from the upper surface S1 of the first portion a of the first conductive semiconductor layer 10, which is in direct contact with the electrolyte, along the thickness direction and the side direction corresponding to the lower part of each LED structure.

[0212] The electrolyte used in step (D) above may include one or more oxyacids selected from the group consisting of oxalic acid, phosphoric acid, sulfurous acid, sulfuric acid, carbonic acid, acetic acid, chlorous acid, bromic acid, nitrous acid, and nitric acid. More preferably, oxalic acid may be used, which has the advantage of minimizing damage to the first conductive semiconductor layer. Furthermore, the electrode may be made of platinum (Pt), carbon (C), nickel (Ni), or gold (Au), for example, a platinum electrode. In step (D), a voltage of 3V or higher may be applied as a power source for 1 minute to 24 hours, thereby smoothly forming pores P up to the first portion a side corresponding to the lower part of each LED structure. This allows for easier separation of the LED structure from the wafer in step (E). More preferably, the voltage may be 10V or higher, and more preferably, 30V or lower may be applied.

[0213] When a voltage less than 3V is applied, even with increased power supply application time, it is impossible to smoothly form pores on the first portion a side corresponding to the lower part of each LED structure. Therefore, separation is difficult via the later step (E). Even if separation occurs, the shape of the separated cross-section of each LED structure may differ, making it difficult for multiple LED structures to exhibit uniform characteristics. Furthermore, when a voltage greater than 30V is applied, pores may form up to the second portion b, which is connected to the first portion a of the doped n-type III nitride semiconductor layer and serves as the lower end of the LED structure. This can induce a decrease in luminous efficacy. Preferably, in the later step (E), the separation of the LED structure is performed at the boundary between the first portion a and the second portion b of the doped n-type III nitride semiconductor layer. However, due to the pores formed on the second portion b side, separation can be performed at any position on the second portion b side beyond the aforementioned boundary position. This makes it difficult to obtain an LED structure with an n-type semiconductor layer that is thinner than the thickness of an ultra-thin design. Furthermore, regarding the power application time, similar to the effect of voltage intensity, if the application time is longer, there is a risk that pores will form up to the second part b outside the target part. Conversely, if the application time is shorter, it is difficult to form pores smoothly, making it difficult to separate the LED structure.

[0214] After step (D) and before step (E) described later, the following step may also be performed: After separating the LED structures from the wafer, an LED wafer 100h4 is manufactured in a manner that allows it to be electrically connected to the lower electrode layer 40 side, by removing the protective film formed on the upper surface of each LED structure in the protective film 80a. Furthermore, since only the protective film formed on the upper surface of the LED structures is removed, the protective film 80 formed on the side surface of the LED structures remains, thereby enabling the function of protecting the side surface of the LED structures from external influences.

[0215] Furthermore, after step (D) and before step (E) described later, the step of forming other layers on the lower electrode layer 40 of the LED structure may be performed. For example, the other layers may be a Ti / Au composite layer or an alignment-inducing layer 70 formed from the lower electrode layer material on the lower electrode layer 40, which is an ITO layer (see [reference]). Figure 9 (n) part).

[0216] Next, as step (E) of manufacturing method 1, a step is performed to separate multiple LED structures from the first part a, where multiple pores P are formed, by applying ultrasonic waves to the LED wafer 100h4. At this time, the ultrasonic waves can be applied directly to the LED wafer 100h4 where pores are formed, or the LED wafer 100h4 can be immersed in a solvent and ultrasonic waves applied indirectly. However, the method of using the physical force of the ultrasonic waves themselves to disintegrate the pores P in the first part a cannot smoothly disintegrate the pores. When excessive pores are formed in order to smoothly disintegrate the pores, there is a risk that pores will form up to the second part b of the LED structure, which may lead to a decrease in the quality of the LED structure.

[0217] Therefore, according to an embodiment of the present invention, the above step (E) can be performed by a sonochemistry method. Specifically, after immersing the LED wafer 100h4 in a bubble-forming solution (or solvent) 76, ultrasound is applied to the bubble-forming solution (or solvent) 76, and the energy generated by the explosion of the growing bubbles in the pores, generated by the sonochemistry mechanism, disintegrates the pores, thereby separating multiple LED structures. Specifically, the ultrasound alternately generates relatively high and relatively low pressure portions along the direction of sound wave movement. The generated bubbles repeatedly compress and expand while passing through the high and low pressure portions, thereby growing into bubbles with higher temperatures and pressures and disintegrating. When disintegrating, for example, it becomes a local hot spot generating a high temperature of 4000K and a high pressure of 1000 atmospheres. Utilizing the pores generated in the LED wafer by the disintegration as described above, the LED structures can be separated from the wafer. Ultimately, ultrasound generates and grows bubbles in a bubble-forming solution (or solvent), and only performs the function of moving and penetrating the generated bubbles into the pores P of the first part a. Then, through the pore collapse mechanism of the external force generated when the unstable bubbles with high temperature and pressure that have penetrated into the pores P explode, the pores P can be easily separated from the LED chip. Thus, an LED assembly 100' including multiple ultra-thin LED elements 101' can be obtained.

[0218] The solution (or solvent) can be used without restriction: When ultrasound is applied, the bubble-forming solution (or solvent) 76 generates bubbles, and the bubbles have high pressure and temperature. Preferably, the bubble-forming solution (or solvent) can be a vapor pressure of 100 mmHg (20°C) or less. For example, a vapor pressure of 80 mmHg (20°C) or less, 60 mmHg (20°C) or less, 50 mmHg (20°C) or less, 40 mmHg (20°C) or less, 30 mmHg (20°C) or less, 20 mmHg (20°C) or less, or 10 mmHg (20°C) or less can be used. When a solvent with a vapor pressure greater than 100 mmHg (20°C) is used, normal separation may not be possible in a short time, which may lead to prolonged manufacturing time and increased production costs. For example, the bubble-forming solution 76 that satisfies the physical properties described above can be one or more selected from the group consisting of γ-butylacetone, propylene glycol methyl ether acetate, methylpyrrolidone, and 2-methylethanol. Alternatively, a room-temperature bubble-forming solution (or solvent) can be used. For example, a solution (or solvent) with a vapor pressure of 100 mmHg at a temperature of 20°C can be used. However, unlike this, step (E) can be performed by adjusting the conditions of execution (E) so that the vapor pressure of the bubble-forming solution (or solvent) under the above conditions is below 100 mmHg (for example, a lower temperature condition). In this case, a wider range of solvents can be used; for example, solvents such as water, acetone, chloroform, and alcohols can be used.

[0219] Furthermore, the wavelength of the ultrasound applied in step (E) can be applied at a frequency that causes ultrasonic chemistry, specifically, at a frequency that allows bubbles to grow and collapse in a way that creates local hotspots of high pressure and temperature when they disintegrate. For example, the applied ultrasound can be 20 kHz to 2 MHz, and the application time can be from 1 minute to 24 hours. This allows for easy separation of the LED structure from the LED chip. However, even if the wavelength of the applied ultrasound is within this range, if the intensity is low or the application time is short, there is a risk that the number of LED structures that cannot be separated from the LED chip or that are not separated may increase. Furthermore, if the intensity of the applied ultrasound is high or the application time is long, there is a risk of damage to the LED structure.

[0220] A pore can be formed in the first conductive semiconductor layer (n-type conductive semiconductor layer) of each LED structure separated by the ultrasonic application in step (E) and the pores formed in step (D) above.

[0221] In addition, in order to form an upper electrode layer 60 on the first conductive semiconductor layer 10, before performing the above-described step (E), the following step may also be performed: In order to form other layers on the first conductive semiconductor layer 10, such as the upper electrode layer 60 or an electron delay layer (not shown), a support film 9 is attached to the LED chip 100n. Figure 9 After the (o) part), step (E) is performed, which allows the multiple LED structures to be separated in a state with the support film 9 attached. Figure 9 (p) portion). Then, with the support film 9 attached, an upper electrode layer 60 is formed on the upper part of multiple LED structures by known methods such as deposition. Figure 9 (q) portion), when the support film is removed, an assembly 100 of multiple ultra-thin LED elements 101 can be obtained.

[0222] Then, refer to Figure 11 The method for manufacturing ultra-thin LED components using manufacturing method 2 will be described.

[0223] As described above, the method for forming an LED wafer 100h (with multiple LED structures) using an LED wafer is the same as manufacturing method 1. Subsequently, the LED wafer 100h with multiple LED structures can be manufactured through the following steps: Step (i), forming an insulating film 8 to cover the exposed sides of the multiple LED structures. Figure 11 (b) of the above); step (ii), removing a portion of the insulating film formed on the upper part of the first conductive semiconductor layer 10, so that the upper surface S1 of the first conductive semiconductor layer 10 between adjacent LED structures is exposed ( Figure 11 (c) Part); Step (iii), by passing the upper part S1 of the exposed first conductive semiconductor layer, the first conductive semiconductor layer 10 is further etched along the thickness direction, thereby forming a first conductive semiconductor layer portion exposed below the first conductive semiconductor layer of the LED pillar with an side length equivalent to a predetermined thickness toward the LED pillar with the insulating film 8' formed. Figure 11 (c) portion); step (iv), etching the exposed portion of the first conductive semiconductor layer from both sides toward the center side ( Figure 11 (d) part); step (v), remove the above insulating film 8 ( Figure 11 (e) part); step (vi), forming a protective film 80 on the sides of the multiple LED structures. Figure 11 (f) part); step (vii), removing the protective film formed on the upper part of the multiple LED structures, so that the lower electrode layer 40 is exposed ( Figure 11 (g) part); step (ⅷ), forming an alignment induction layer 70 on the lower electrode layer 40 ( Figure 11(h) and step (x), separating multiple LED structures from the LED wafer to manufacture an ultrathin LED assembly 100" comprising multiple ultrathin LED elements 100". Furthermore, the above-described manufacturing method 2 can be performed using known methods for manufacturing LED elements, the entire contents of Korean Patent Application No. 2020-0050884 filed by the inventors of this invention are incorporated herein by reference, and detailed descriptions of each step of manufacturing method 2 will be omitted here.

[0224] At this point, in step (ⅸ), the separation of multiple LED structures can be achieved by cutting with a cutting tool or by removing the adhesive film.

[0225] Additionally, such as through Figure 8 In detail, as a protective coating, a protective coating 80' can be formed, consisting of a hole-driven coating 81 and an electron-driven coating 82 to improve luminous efficiency, as described above. Figure 12 Explain its manufacturing method.

[0226] With the above Figures 9 to 11 The difference is that when etching along the vertical direction, it does not etch to a portion of the first conductive semiconductor layer 10, which is an n-type semiconductor, but only until the first etching reaches a portion of the second conductive semiconductor layer 30 or the photoactive layer 20, or the photoactive layer 20. Figure 12 After (a) portion), the second etching continues until a portion of the thickness of the first conductive semiconductor layer 10 is reached. Figure 12 (c) The process of depositing coating material on both sides and removing the coating material between multiple LED structures is performed. Figure 12 (b), (d), and (e) of the text.

[0227] Specifically, the following process is performed: when etching the LED chip along the vertical direction, the etching does not proceed to a portion of the first conductive semiconductor layer 10, which is an n-type semiconductor, but first etches to a portion of the second conductive semiconductor layer 30 or the second conductive semiconductor layer 30 and the photoactive layer 20 or the photoactive layer 20. Figure 12 (a) portion), after the deposited cavities push the coating material 81a ( Figure 12 (b) Remove the hole-driving coating material formed between the LED structures. Then, the following process can be performed: perform a second etching to the specified thickness of the first conductive semiconductor layer 10. Figure 12 (c) Next, after depositing electron-driven coating material 82a on the LED structure having hole-driven coating 81b ( Figure 12 (d) portion), and again remove the electron-driven encapsulation material formed between the LED structures S1 ( Figure 12(e) of the above. Figures 9 to 11 The process of separating LED structures in ( Figure 9 Below the (k) part, Figure 10 (d) below) or Figure 11 The process of separating LED structures in ( Figure 11 (d) below) to separate the ultra-thin LED element 103 from the LED chip.

[0228] The ultra-thin LED elements 101, 102, and 103 obtained by the above method can be realized by an ink composition. The ink composition may also include dispersion media and other additives found in known inkjet ink compositions; this invention is not particularly limited thereto. However, as described above, the thickness of the ultra-thin LED elements 101, 102, and 103 and the length of the long axis of the cross-section perpendicular to the stacking direction satisfy the specific ratio described above, thereby having the advantage of delayed precipitation during ink formation and maintaining a dispersed state for a long time. Furthermore, the concentration of the ultra-thin LED elements 101, 102, and 103 dispersed in the ink composition and the viscosity of the ink composition can be designed in a manner suitable for an inkjet printing apparatus for printing ink compositions; this invention is not particularly limited thereto. Moreover, the inkjet printing apparatus is a device that can print an ink composition containing ultra-thin LED elements onto a lower electrode, and can be a known method employing piezoelectric or electrostatic methods; therefore, this invention is not particularly limited to an inkjet printing apparatus or a specific method for printing onto a lower electrode using it.

[0229] Subsequently, as step (2-2) of the present invention, the following steps are performed: processing is performed on the lower electrodes 311 and 312, for example, so that the ultra-thin LED elements 101, 102 and 103 printed by the inkjet printing device are erected along the thickness direction and assembled on the lower electrodes 311 and 312.

[0230] After multiple ultrathin LED elements 101, 102, and 103 dispersed in the ink composition are printed on the lower electrode, not all ultrathin LED elements are disposed in the disposal area within the lower electrode where the ultrathin LED elements are to be disposed. Furthermore, even if the ultrathin LED elements 101, 102, and 103 are located within the aforementioned disposal area, not all ultrathin LED elements are vertically disposed on the lower electrode along the thickness direction.

[0231] Therefore, as described in the ultra-thin LED electrode assembly 1000, the ultra-thin LED elements 101, 102, and 103 may include an arrangement induction layer 70 that vertically arranges the ultra-thin LED elements 101, 102, and 103 along the thickness direction on one side and both sides of the arrangement area where the ultra-thin LED elements are to be arranged in the lower electrodes 311 and 312.

[0232] Specifically, refer to Figure 13 To explain, when the arrangement induction layer 70 is a charge layer 71 carrying either a positive or negative charge, after printing the ink composition including the ultra-thin LED element, in order to move the ultra-thin LED element 104 to the aforementioned arrangement area by electrophoresis during or before printing and to arrange it vertically along the thickness direction, an electric field can be formed along the direction perpendicular to the circumferential surface of the lower electrode 311. Furthermore, to facilitate the movement of the ultra-thin LED element to the aforementioned arrangement area and its vertical arrangement, when the charge layer disposed on the ultra-thin LED element is a first charge layer carrying either a positive or negative charge, a second charge layer carrying a charge opposite to that of the first charge layer can be disposed on the arrangement area within the lower electrode. For example, the thickness of the first and second charge layers can be from 0.1 nm to 500 nm, but the thickness only needs to be sufficient to carry a charge; the present invention is not particularly limited thereto.

[0233] Furthermore, the strength of the electric field used to move the ultra-thin LED elements to the configuration area and arrange them vertically by electrophoresis can be appropriately changed by considering the number and size of the ultra-thin LED elements in the ink composition. Therefore, the present invention is not particularly limited thereto.

[0234] Or, refer to Figure 14 In the case where the arrangement induction layer 70 is a bonding layer 72, the ultrathin LED element 105 can be vertically assembled on the configuration area through chemical bonding mediated by the bonding layer 72. In this case, the bonding layer 72 can be disposed on one side of the ultrathin LED element 105 in the thickness direction and / or on the configuration area.

[0235] Furthermore, as an example, the aforementioned binding layer can be formed by exposing thiol groups, amino groups, carboxyl groups, and single strands of DNA to the outside. Specifically, it can be formed using compounds such as aminoethanethiol, 1,2-ethanedithiol, 1,4-butanedithiol, 3-mercaptopropionic acid, and NH2-terminated single strands of DNA. Moreover, the aforementioned chemical bonding can be covalent or non-covalent. For example, in the case of a binding layer where thiol groups are exposed to the outside, it can be non-covalently bonded to the lower electrode, which is a metal. Furthermore, the reaction rate is very slow when amino and carboxyl groups combine to form amide bonds. Therefore, by adding 1-ethyl-3-(3-dimethylaminopropyl)carbodiimide (EDC) to form the carboxyl group as an active ester intermediate, the addition of a primary amine as a strong nucleophile can rapidly form the amide bond. To stabilize the ester intermediate using EDC, sulfo N-hydroxysuccinimide (NHS) is used to stabilize the amide bond. Moreover, the above chemical bonding can be covalent or non-covalent. For example, in the case of a bonding layer with the thiol group exposed on the outside, it can be non-covalently bonded to the lower electrode, which is a metal. Furthermore, the aforementioned bonding layer may include a first bonding layer formed on the side of the ultra-thin LED element and a second bonding layer formed on the side of the lower electrode. Through the complementary bonding between the first connecting group in the first bonding layer and the second connecting group in the second bonding layer, the ultra-thin LED element can be vertically assembled on the lower electrode.

[0236] Or, refer to Figure 15 In the case where the arrangement induction layer 70 is a magnetic layer 73, in order to move the ultrathin LED element 106 to the aforementioned arrangement area by magnetic force and to arrange it vertically along the thickness direction, after printing the ink composition including the ultrathin LED element, a magnetic field is formed along the direction perpendicular to the circumferential surface of the lower electrode 311, either simultaneously with or before printing. Furthermore, to facilitate the movement of the ultrathin LED element 106 to the aforementioned arrangement area and to arrange it vertically, a magnetic layer may also be formed on the arrangement area within the lower electrode. This magnetic layer can be a paramagnetic material or a strongly magnetic material. And, as an example, the thickness of the magnetic layer 73 can be from 0.1 nm to 500 nm; the present invention is not particularly limited to this.

[0237] Subsequently, the steps of fixing the ultra-thin LED elements 104, 105, and 106, which are erected on the lower electrodes 311 and 312, to the lower electrodes 311 and 312 and making ohmic contact with the lower electrodes 311 and 312 can be performed. For example, the fixing and ohmic contact can be performed using a rapid thermal annealing (RTA) process at the interface between the lower electrodes and the ultra-thin LED elements. Alternatively, after providing a low-melting-point fixing layer on the arrangement area within the lower electrodes 311 and 312, after erecting the ultra-thin LED elements 104, 105, and 106 on the arrangement area, heat is applied to melt and solidify the fixing layer, thereby firmly fixing the ultra-thin LED elements 104, 105, and 106 to the lower electrodes 311 and 312. For example, the fixing layer can be a conventional solder using electrical materials.

[0238] In addition, to improve the electrical connectivity between the ultra-thin LED elements 104, 105, 106 and the lower electrodes 311, 312, a step of forming a current-carrying metal layer 500 may be included after step (2-2). The aforementioned current-carrying metal layer 500 can be manufactured by applying a photolithography process using a photosensitive material to pattern the lines to be deposited for the current-carrying metal layer, followed by deposition of the current-carrying metal layer, or by patterning the deposited metal layer and then etching it. This process can be performed using known methods, and the entire contents of Korean Patent Application No. 10-2016-0181410 filed by the inventors of this invention are incorporated herein by reference.

[0239] Furthermore, between steps (2) and (3), in order to electrically insulate the lower electrode line 320, a step of forming an insulating layer 600 of a specified thickness on the lower electrode line 310 may also be performed. The insulating layer 600 can be formed by depositing known insulating materials, such as SiO2 or SiN, for example, by plasma-enhanced chemical vapor deposition (PECVD). x The insulating material can be either an insulating material deposited using metal-organic chemical vapor deposition (MOCVD) or an insulating material such as AlN or GaN deposited using atomic layer deposition (ALD). Preferably, the insulating layer 600 is formed without covering the upper surfaces of the vertically assembled ultrathin LED elements 104, 105, and 106. To achieve this, the insulating layer can be formed by deposition up to the thickness that does not cover the upper surfaces of the ultrathin LED elements 104, 105, and 106, or by depositing an insulating layer up to the thickness that covers the upper surfaces of the ultrathin LED elements 104, 105, and 106, followed by dry etching until the upper surfaces of the ultrathin LED elements 104, 105, and 106 are exposed.

[0240] Next, as step (3) of the present invention, an upper electrode line 320, including upper electrodes 321 and 322, is formed by electrically connecting the upper electrode lines 320 to opposite sides of the ultra-thin LED elements 104, 105, and 106 (which are electrically connected to the lower electrodes 311 and 312). After the upper electrode line 320 is patterned using known photolithography, an electrode material is deposited or deposited, which can be achieved by dry and / or wet etching. At this time, the electrode material can be a conventional electrode material used as an electrode for electrical materials, and the present invention is not particularly limited thereto.

[0241] Next, a preferred example of a micro-nano fin-type ultrathin LED electrode element and an LED electrode assembly utilizing the same will be described.

[0242] [Type II (Micro-Nanofin) Ultrathin LED Electrode Element and LED Electrode Assembly] The following is for reference Figure 16 and Figure 17 This describes the sub-pixel units within an LED electrode assembly manufactured from a second-type ultrathin LED element. Figure 16 The blank space represents a pixel unit within the LED electrode assembly. The aforementioned pixel unit, as shown in the simplified diagram, comprises three sub-pixel units (first sub-pixel unit to third sub-pixel unit) that include six micro-nano fin LED electrode elements.

[0243] A micro-nano fin LED electrode assembly 1001 according to an embodiment of the present invention includes: a lower electrode line 200, including a plurality of electrodes 211, 212, 213, 214 spaced horizontally at predetermined intervals; a plurality of micro-nano fin LED elements 107 disposed on the lower electrode line 200; and an upper electrode line 300 disposed in contact with the upper part of the micro-nano fin LED elements 107.

[0244] First, before explaining each structure in detail, the electrode lines that magnetically align the micro-nano fin LED elements and enable them to emit light will be explained.

[0245] The micro-nano fin LED electrode assembly 1001 includes an upper electrode line 300 and a lower electrode line 200 arranged facing each other at the upper and lower parts of the micro-nano fin LED element 107. The upper electrode line 300 and the lower electrode line 200 are not arranged horizontally. Therefore, the complex electrode lines of existing field-induced electrode assemblies, which involve arranging two electrodes (implemented with ultra-small thickness and width) horizontally within a defined area with micro or nano-unit spacing, are avoided. This simplifies electrode design and makes implementation much easier.

[0246] To elaborate further, existing electrode assemblies that achieve magnetic alignment of elements through electric field induction also use multiple horizontally spaced electrodes as assembly electrodes, and encapsulate rod-shaped ultra-small LED elements on these assembly electrodes, directly using the same electrodes, i.e., the assembly electrodes, as driving electrodes. In contrast, the lower electrode line 200 provided in one embodiment of the present invention performs the function of an assembly electrode, but only the side surface of the first conductive semiconductor layer or the side surface of the second conductive semiconductor layer contacts the lower electrode line 200. Therefore, the micro-nano fin LED element 107 cannot emit light solely through the lower electrode line 200, thus differing from existing electrode assemblies that rely on electric field induction. This difference induces significant variations in the freedom and ease of electrode design.

[0247] In other words, when the assembly electrode and the driving electrode are used as the same electrode, it is necessary to realize an electrode with a structure that can encapsulate as many rod-shaped ultra-small LED elements as possible in a plane within a limited area and apply different voltages at micro- to nano-sized intervals. Therefore, it is not easy to design or realize the electrode structure.

[0248] However, when the lower electrode line 200 included in this invention is driven, the same type of power supply (such as, for example, (+) or (-) power supply) is applied, so the risk of electrical short circuit between the lower electrodes 211, 212, 213, and 214 in the lower electrode line 200 is low.

[0249] Furthermore, conventionally, each end of a single rod-shaped micro-LED element must correspond to and contact adjacent electrodes to emit light without short circuits. Therefore, when a single rod-shaped micro-LED element is configured to span three or four adjacent electrodes, the photoactive layer of the rod-shaped micro-LED element inevitably comes into contact with the electrodes, leading to the inconvenience of designing the electrodes to account for short circuits. However, in the micro-nano fin LED element 107 included in this invention, the surface of the first conductive semiconductor layer side or the second conductive semiconductor layer side contacts the lower electrode line. Therefore, even when configured to span multiple adjacent lower electrodes 211, 212, 213, 214, no short circuit occurs, thus offering the advantage of easier design of the lower electrode line 200.

[0250] And, as Figure 16 As shown, the upper electrode line 300 can be configured to make electrical contact with the upper surface of the configured micro-nano fin LED element 107, thus offering the advantage of being very easy to design or implement. In particular, Figure 16The upper electrode line 300 is shown to be divided into a first upper electrode 301 and a second upper electrode 302. It can also be implemented in a way that contacts the upper surface of all micro-nano fin LED elements configured with only one upper electrode, thus having the advantage of greatly simplifying the electrode implementation compared to the past.

[0251] The lower electrode line 200 is an assembly electrode that magnetically aligns the micro-nano fin LED element 107 by contacting the upper or lower surface of the micro-nano fin LED element 107 in the thickness direction. At the same time, it performs the function of one of the driving electrodes provided together with the upper electrode line 300 described later to make the micro-nano fin LED element 107 emit light.

[0252] Furthermore, the aforementioned lower electrode line 200 comprises a plurality of lower electrodes 211, 212, 213, and 214 spaced horizontally at predetermined intervals. The number of the aforementioned lower electrodes 211, 212, 213, and 214 and the spacing between the electrodes are appropriately set considering the function of the assembled electrodes, the length of the components, etc., including electrodes 211, 212, 213, and 214.

[0253] Furthermore, there are no specific restrictions on the electrode configuration of the plurality of lower electrodes 211, 212, 213, 214 included in the aforementioned lower electrode line 200, as long as they are arranged to be spaced apart along the horizontal direction. For example, a structure may be formed in which a plurality of electrodes are arranged side by side at a predetermined interval along one direction.

[0254] Furthermore, the spacing between adjacent electrodes 211 and 212 can be less than the length of the micro-nano fin LED elements 100 and 107. When the spacing between two adjacent electrodes is equal to or greater than the length of the micro-nano fin LED element, magnetic alignment can be achieved with the micro-nano fin LED element sandwiched between the two adjacent electrodes. In this case, there is a high risk of electrical short circuit caused by contact between the side of the electrode and the photoactive layer exposed on the side of the micro-nano fin LED element, which is therefore not preferred.

[0255] Furthermore, the number, arrangement, and shape of the aforementioned upper electrode line 300 are not limited when designed to make upper electrical contact with the multiple micro-nano fin LED elements 107 encapsulated on the aforementioned lower electrode line 200. However, if Figure 16 When the lower electrode lines 200 are arranged side by side along one direction, they are arranged in a way that is perpendicular to the aforementioned direction of the upper electrode lines 300. This electrode configuration is a commonly used electrode configuration in displays and the like, and has the advantage of being able to directly use the electrode configurations and control technologies in the display field.

[0256] in addition, Figure 16Only the first upper electrode 301 and the second upper electrode 302 are shown to illustrate that the upper electrode line 300 covering the first upper electrode 301 and the second upper electrode 302 covers only a portion of the element and is omitted for ease of explanation. There is also an upper electrode (not shown) disposed on the upper part of the micro-nano fin LED element.

[0257] The lower electrode line 200 and upper electrode line 300 described above can have the materials, shapes, widths, and thicknesses of electrodes used in conventional LED electrode assemblies, and can be manufactured using known methods. Therefore, the present invention is not specifically limited thereto. For example, the electrodes can be made of aluminum, chromium, gold, silver, copper, graphene, ITO, or alloys thereof, with a width of 2 μm to 50 μm and a thickness of 0.1 μm to 100 μm, which can be appropriately varied considering the size of the target LED electrode assembly.

[0258] Next, the micro-nano fin LED element 107 disposed between the lower electrode line 200 and the upper electrode line 300 will be described.

[0259] Reference Figures 17 to 19 To illustrate, the micro-nano fin LED element 107 of one embodiment of the present invention is a rod-shaped element as follows: with mutually perpendicular X-axis, Y-axis and Z-axis as references, when the X-axis direction is called length, the Y-axis direction is called width and the Z-axis direction is called thickness, the length is called the major axis and the thickness is called the minor axis, the length is greater than the thickness; it is an element in which a first conductive semiconductor layer 10, a photoactive layer 20, a second conductive semiconductor layer 30 and a polarization induction layer 90 are sequentially stacked along the thickness direction.

[0260] More specifically, the micro-nano fin LED element 107 has a predetermined shape in an XY plane formed by its length and width, with the thickness direction perpendicular to this plane, and layers stacked along this thickness direction. In this micro-nano fin LED element structure, even if the thickness of the photoactive layer 20 exposed on the sides is set thin, the plane formed by the length and width has the advantage of ensuring a wider light-emitting area. Furthermore, the light-emitting area of ​​the micro-nano fin LED element 100 according to an embodiment of the present invention can be more than twice the area of ​​its longitudinal section. The longitudinal section is a cross-section parallel to the X-axis direction, which is the length direction; in the case of an element with a constant width, it can be the aforementioned XY plane.

[0261] Specifically, refer to Figure 20a and Figure 20b To explain, Figure 20a The first rod-shaped element 1 shown in the figure and Figure 20bThe second rod-shaped element 1' shown in the diagram has a structure consisting of a first conductive semiconductor layer 10, a photoactive layer 20, and a second conductive semiconductor layer 30 stacked together, and is of a length Both rod-shaped elements have the same thickness m and the same thickness h of the photoactive layer. However, their structures differ in that the first rod-shaped element 1 has a first conductive semiconductor layer 10, a photoactive layer 20 and a second conductive semiconductor layer 30 stacked along the thickness direction, while the second rod-shaped element 1' has each layer stacked along the length direction.

[0262] However, the two elements 1 and 1' differ greatly in terms of their light-emitting areas. For example, assuming the length... When the light emission area is 4500 nm, the thickness m is 600 nm, and the thickness h of the photoactive layer 3 is 100 nm, the ratio of the surface area of ​​the photoactive layer 3 of the first rod-shaped element 1 to the surface area of ​​the photoactive layer 3 of the second rod-shaped element 1' is 6.42 μm. 2 0.75μm 2 The light-emitting area of ​​the micro-nano fin LED element 1 is approximately 8.56 times larger. Furthermore, in the total light-emitting area of ​​the photoactive layer, the proportion of the exposed surface area of ​​the photoactive layer 20 is similar for the first rod-shaped element 1 and the second rod-shaped element 1'. However, the absolute value of the unexposed surface area of ​​the increased photoactive layer 20 becomes much larger. Therefore, the influence of excitons on the exposed surface area is significantly reduced. Consequently, compared to the horizontally arranged rod-shaped element 1', the surface defects of the micro-nano fin LED element 1 have a significantly smaller impact on excitons. Therefore, in terms of luminous efficiency and brightness, the micro-nano fin LED element 1 can be evaluated as significantly superior to the horizontally arranged rod-shaped element 1'. Meanwhile, in the case of the second rod-shaped element 1', the wafer with the conductive semiconductor layer and photoactive layer stacked along the thickness direction is etched. Ultimately, the length of the long element should be proportional to the thickness of the wafer. In order to increase the length of the element, the etching depth inevitably increases. The greater the etching depth, the higher the possibility of surface defects. Ultimately, even if the area of ​​the exposed photoactive layer of the second rod-shaped element 1' is smaller than that of the first rod-shaped element 1, the possibility of surface defects is greater. Therefore, when considering the decrease in luminous efficiency caused by the increased possibility of surface defects, the first rod-shaped element 1 is ultimately superior in terms of luminous efficiency and brightness.

[0263] Furthermore, regarding the travel distance of holes injected into either the first conductive semiconductor layer 10 or the second conductive semiconductor layer 30, and electrons injected into the other, the first rod-shaped element 1 is shorter than the second rod-shaped element 1'. Therefore, due to defects in the walls during the movement of electrons and / or holes, the probability of electrons and / or holes being trapped is reduced, thereby minimizing light emission loss and reducing light emission loss caused by electron-hole velocity imbalance. In the case of the second rod-shaped element 1', a strong light path behavior occurs due to the circular rod-shaped structure. Therefore, the light path generated by electrons and holes resonates along the length direction, emitting light at both ends of the length direction. Thus, in the case of a horizontally arranged element, the forward light emission efficiency is poor due to the strong side-emitting profile. Conversely, in the case of the first rod-shaped element 1, light is emitted from the upper and lower surfaces, thus exhibiting the advantage of excellent forward light emission efficiency.

[0264] As described above, the micro-nano fin LED element 107 of the present invention has conductive semiconductor layers 10 and 30 and photoactive layer 20 stacked along the thickness direction, and is rod-shaped as follows: the length is made longer than the thickness, thereby having an increased light-emitting area. At the same time, even if the area of ​​the exposed photoactive layer 20 is slightly increased, the thickness is less than the length, so the etching depth is shallow, which reduces the possibility of defects being generated on the surface of the exposed photoactive layer 20, thereby helping to minimize or prevent the reduction in luminous efficiency caused by defects.

[0265] Figure 17 The plane shown above is rectangular, but it is not limited to this. It can be any shape, from a rhombus, parallelogram, trapezoid, or other conventional quadrilateral shape to an ellipse.

[0266] An embodiment of the micro-nano finned LED element 107 of the present invention has a length and width in the form of micro or nanometer units. For example, the length of the element can be 100 nm to 6000 nm, and the width can be 100 nm to 3000 nm. Furthermore, the thickness can be 100 nm to 2000 nm. The standards for the above length and width can vary depending on the shape of the plane. For example, in the case of a rhombus or parallelogram, one of the two diagonals is the length and the other is the width; in the case of a trapezoid, the longer of the height, the upper side, and the lower side is the length, and the shorter side perpendicular to the longer side is the width. Alternatively, in the case of an ellipse, the major axis of the ellipse is the length, and the minor axis is the width.

[0267] At this point, the thickness-to-length ratio of the micro-nano fin LED element 100 is 1:3 or more, more preferably 1:6 or more, and the length may be larger. This provides the advantage of easier magnetic alignment with the lower electrode via an electric field. When the thickness-to-length ratio of the micro-nano fin LED element 100 is less than 1:3, i.e., the length is smaller, it is difficult to magnetically align the element on the electrode via an electric field, and the element is not fixed to the lower electrode, resulting in electrical contact short circuits due to manufacturing defects. However, the thickness-to-length ratio can be 1:15 or less, which facilitates the optimization of the torsional force required for magnetic alignment via an electric field, thus achieving the objectives of this invention.

[0268] Furthermore, the width-to-length ratio of the aforementioned plane is preferably 1:3 or more, more preferably 1:6 or more, and the length may be even greater. This provides the advantage of easier magnetic alignment with the lower electrode via an electric field. However, the width-to-length ratio can be 1:15 or less, which is beneficial for optimizing the torsional force for magnetic alignment via an electric field.

[0269] Furthermore, the width of the aforementioned micro-nano fin LED element 107 can be equal to or greater than its thickness. Therefore, when the micro-nano fin LED element is aligned on the lower electrode line using an electric field, it has the advantage of minimizing or preventing horizontal alignment. Even if alignment and encapsulation are achieved with one end and the other end respectively contacting the two adjacent lower electrodes 211 / 212 and 213 / 214 in the case of horizontal alignment of the micro-nano fin LED element, there is a risk that the element will not emit light due to electrical short circuits caused by contact between the electrodes and the photoactive layer on the exposed side of the element.

[0270] Furthermore, the aforementioned micro-nano fin LED element 107 can be an element with different sizes at both ends in the length direction. For example, it can be a rod-shaped element with a quadrilateral plane whose height is greater than the height of the equilateral trapezoid of the upper and lower sides. Due to the difference in length between the upper and lower sides, a difference in positive and negative charges can be generated at both ends in the length direction of the element. Thus, it has the advantage of being more easily magnetically aligned by an electric field.

[0271] Furthermore, in the lower surface of the first conductive semiconductor layer 10 of the micro-nano fin LED element 107, a protrusion 11 with a specified width and thickness may be formed along the length direction of the element, or the protrusion may not be formed.

[0272] The protrusion 11 will be described in detail in the manufacturing method described later, but it can be formed by etching the wafer along the thickness direction, and then etching it horizontally from both sides of the lower end of the etched LED portion toward the inner side of the center in order to separate the etched LED portion from the wafer. The protrusion 11 helps to improve the forward light extraction function of the micro-nano fin LED element. Furthermore, the protrusion 11 helps to control alignment by placing the polarization induction layer 90, which is the opposite side of the element with the protrusion 11, on the lower electrode line 200 when the micro-nano fin LED element is magnetically aligned on the lower electrode line. Furthermore, with the polarization induction layer on the lower electrode line 200, an upper electrode line 300 is formed on one side of the element with the protrusion 11. As the contact area with the formed upper electrode line 300 increases, the protrusion 11 helps to improve the mechanical bonding force between the upper electrode line 300 and the micro-nano fin LED element 100.

[0273] At this time, the width of the protrusion 11 can be less than 50% of the width of the micro-nano fin LED element, more preferably less than 30% of the width of the micro-nano fin LED element. This makes it easier to separate the micro-nano fin LED element portion etched on the LED wafer. When the protrusion is formed with a width greater than 50% of the micro-nano fin LED element, it may not be easy to separate the micro-nano fin LED element portion etched on the LED wafer, and separation may occur in portions that are not the target portion, thereby reducing mass production feasibility and decreasing the uniformity of the generated multiple micro-nano fin LED elements. Furthermore, the width of the protrusion 11 can be formed to be more than 10% of the width of the micro-nano fin LED element. When the width of the protrusion is less than 10% of the width of the micro-nano fin LED element, it is easy to separate from the LED wafer, but during the side etching described later (see...). Figure 21 (g) part Figure 21 (i) Due to over-etching, there is a risk that the etching may proceed to a portion of the first conductive semiconductor layer that should not be etched, and the effect of the protrusion 11 may not be achieved. Furthermore, there is a risk of damage to the element due to the wet etching solution, thus necessitating the separation of the micro-nano fin LED element dispersed in a highly alkaline and hazardous etching solution for cleaning. Additionally, the thickness of the protrusion 11 can be 10% to 30% of the thickness of the first conductive semiconductor layer, thereby enabling the formation of the first conductive semiconductor layer with the target thickness and quality, which is more conducive to achieving the effect of the protrusion 11. The thickness of the first conductive semiconductor layer refers to the thickness based on the lower surface of the first conductive semiconductor layer where the protrusion is not formed.

[0274] For example, the width of the protrusion 11 can be 50nm to 300nm, and the thickness can be 50nm to 900nm.

[0275] The layers included in the micro-nano fin LED element 107 will be described below.

[0276] The micro-nano fin LED element includes a first conductive semiconductor layer 10 and a second conductive semiconductor layer 30. The conductive semiconductor layer used can be any of the conductive semiconductor layers used in conventional LED elements for lighting, displays, etc. According to a preferred embodiment of the invention, either the first conductive semiconductor layer 10 or the second conductive semiconductor layer 30 includes at least one n-type semiconductor layer, and the other conductive semiconductor layer may include at least one p-type semiconductor layer.

[0277] In the case where the first conductive semiconductor layer 10 includes an n-type semiconductor layer, the n-type semiconductor layer may use an In-type semiconductor layer. x Al y Ga 1-x-y The semiconductor material is composed of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1), for example, one or more of InAlGaN, GaN, AlGaN, InGaN, AlN, InN, etc., and may be doped with a first conductive dopant (e.g., Si, Ge, Sn, etc.). According to a preferred embodiment of the present invention, the thickness of the first conductive semiconductor layer 10 may be 1.5μm to 5μm, but is not limited thereto. Preferably, the thickness of the first conductive semiconductor layer 10 is equal to or thicker than the thickness of the second conductive semiconductor layer 30.

[0278] In the case where the second conductive semiconductor layer 30 includes a p-type semiconductor layer, the p-type semiconductor layer may use a material with In... x Al y Ga 1-x-y The semiconductor material with a composition of N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) can be, for example, one or more of InAlGaN, GaN, AlGaN, InGaN, AlN, InN, etc., and can be doped with a second conductive dopant (e.g., Mg). According to a preferred embodiment of the present invention, the thickness of the second conductive semiconductor layer 30 can be 0.01μm to 0.30μm, but is not limited thereto. Preferably, the thickness of the second conductive semiconductor layer 30 can be thinner than or equal to the thickness of the first conductive semiconductor layer 10.

[0279] According to an embodiment of the present invention, one of the first conductive semiconductor layer 10 and the second conductive semiconductor layer 30 includes a p-type GaN semiconductor layer, and the other includes an n-type GaN semiconductor layer. The thickness of the p-type GaN semiconductor layer can be 10 nm to 350 nm, and the thickness of the n-type GaN semiconductor layer can be 100 nm to 3000 nm. Thus, as... Figure 21 b. The travel distance of holes injected into the p-type GaN semiconductor layer and electrons injected into the n-type GaN semiconductor layer is shorter than that of rod-shaped elements with semiconductor layers and photoactive layers stacked along the length direction. Therefore, the probability of electrons and / or holes being trapped is reduced by the defects on the walls during the movement, thereby minimizing the light emission loss and helping to reduce the light emission loss caused by the imbalance of electron-hole velocities.

[0280] Subsequently, the photoactive layer 20 is formed on top of the first conductive semiconductor layer 10, and can be formed by a single quantum well or multiple quantum well structure. The photoactive layer 20 can be any photoactive layer included in conventional LED elements used for lighting, displays, etc., without limitation. A metal protective layer (not shown) doped with conductive dopants can also be formed above and / or below the photoactive layer 20. This metal protective layer doped with conductive dopants can be implemented by an AlGaN layer or an InAlGaN layer. Alternatively, materials such as AlGaN and AlInGaN can also be used in the photoactive layer 20. In this photoactive layer 20, when an electric field is applied to the element, electrons and holes moving from the conductive semiconductor layers located above and below the photoactive layer to the photoactive layer recombine in the photoactive layer, thereby emitting light. According to a preferred embodiment of the present invention, the thickness of the photoactive layer 20 can be 30 nm to 300 nm, but is not limited thereto.

[0281] Next, the polarization-inducing layer 90 formed on the second conductive semiconductor layer 30 is a layer with different polarities at both ends along the length direction of the element, which makes magnetic alignment through the electric field easier. At the same time, when using materials such as metals, conductivity is improved, thereby also serving as an electrode layer.

[0282] Furthermore, in the aforementioned polarization induction layer 90, a first polarization induction layer 91 is disposed at one end along the length direction of the element, and a second polarization induction layer 92 can be disposed at the other end. The polarities of the first polarization induction layer 91 and the second polarization induction layer 92 can be different. For example, the first polarization induction layer 91 is ITO, and the second polarization induction layer 92 can be a metal, a dielectric, or a semiconductor. The thickness of the polarization induction layer 90 can be from 50 nm to 500 nm, but is not limited to this. The first polarization induction layer 91 and the second polarization induction layer 92 can be equally divided on the upper surface of the second conductive semiconductor layer 30 and disposed with the same area, but is not limited to this; one of the first polarization induction layer 91 and the second polarization induction layer 92 can be disposed with a larger area.

[0283] The first conductive semiconductor layer 10, photoactive layer 20, second conductive semiconductor layer 30 and polarization induction layer 90 mentioned above can be included as the minimum components of an LED element. Other phosphor layers, active layers, semiconductor layers, hole block layers and / or electrode layers may also be included above / below each layer.

[0284] In addition, according to one embodiment of the present invention, a protective film 80 may be formed on the side surface of the micro-nano fin LED element to cover the exposed surface of the photoactive layer 20. The protective film 80 is a film for protecting the exposed surface of the photoactive layer 20, and includes at least all exposed surfaces of the photoactive layer 20. For example, it may cover both sides, the front end, and the rear end of the micro-nano fin LED element. Preferably, the protective film 80 may include one or more of silicon nitride, silicon dioxide, aluminum oxide, hafnium dioxide, zirconium oxide, yttrium oxide, titanium dioxide, aluminum nitride, and gallium nitride. More preferably, it is composed of the above components and is transparent, but is not limited thereto. According to a preferred embodiment of the present invention, the thickness of the protective film 80 may be 5 nm to 100 nm, but is not limited thereto.

[0285] The aforementioned micro-nano fin LED element 107 can be manufactured by the manufacturing method described later, but is not limited thereto. Specifically, the micro-nano fin LED element can be manufactured by performing a method including the following steps: step (A), preparing an LED wafer on a substrate by sequentially stacking a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer; step (B), forming a polarization induction layer on the second conductive semiconductor layer of the LED wafer, patterned such that regions with different polarities are adjacent to each other; step (C), etching the LED wafer along the thickness direction such that the thickness perpendicular to the plane is less than the length of the individual element having a plane, thereby forming a plurality of micro-nano fin LED pillars; and step (D), separating the plurality of micro-nano fin LED pillars from the substrate.

[0286] Reference Figure 21 To explain, firstly, as step (A) of the present invention, an LED chip 51 is formed by sequentially stacking a first conductive semiconductor layer 10, a photoactive layer 20 and a second conductive semiconductor layer 30 on a substrate (not shown).

[0287] The description of each layer disposed on the LED chip 51 is the same as above, therefore, the specific description will be omitted and the description will focus on the parts that have not been described.

[0288] First, the thickness of the first conductive semiconductor layer 10 within the LED chip 51 may be greater than the thickness of the first conductive semiconductor layer 10 in the micro-nano fin LED element 100. Furthermore, each layer within the LED chip 51 may have a c-planar crystalline structure.

[0289] The LED chip 51 described above can be used for a cleaning process. The cleaning process can appropriately employ conventional chip cleaning solutions and processes; therefore, the present invention is not particularly limited thereto. For example, the cleaning solution described above can be isopropanol, acetone, and hydrochloric acid, but is not limited thereto.

[0290] Then, as step (B) of the present invention, such as Figure 21 In portions (b) and (c1) / (c2), the step of forming a polarization induction layer 90 on the second conductive semiconductor layer 30 of the LED wafer 51 is performed. Specifically, the polarization induction layer 90 may be patterned on the second conductive semiconductor layer of the LED wafer in such a way that regions with different polarities are adjacent to each other. More specifically, step (B) may include: step B-1), as... Figure 22 In part (b), a first polarization induction layer 91 is formed on the second conductive semiconductor layer 30; in step B-2), the first polarization induction layer 91 is etched along the thickness direction according to a predetermined pattern; and in step B-3), as... Figure 21 (c1) part Figure 21 In part (c2), a second polarization induction layer 92 is formed in the etched negative portion.

[0291] First, as step B-1), the step of forming a first polarization induction layer 91 on the second conductive semiconductor layer 30 is performed. The first polarization induction layer 91 can be a conventional electrode layer formed on the semiconductor layer, for example, it can be Cr, Ti, Ni, Au, ITO, etc., preferably ITO in the transparent side. The first polarization induction layer 91 can be formed by conventional methods of forming electrodes, for example, by deposition via sputtering. For example, when using ITO, a thickness of approximately 150 nm can be deposited. After the deposition process, a rapid thermal processing process can be performed, for example, processing at 600°C for 10 minutes. The thickness and material of the first polarization induction layer 91 can be appropriately adjusted; therefore, the present invention is not particularly limited thereto.

[0292] Next, as step B-2), the first polarization induction layer 91 is etched along the thickness direction according to a predetermined pattern. This step prepares the location for forming the second polarization induction layer 92 (described later), and the pattern can be formed considering the area ratio and configuration of the first polarization induction layer 91 and the second polarization induction layer 92 within the element. For example, Figure 22 As can be confirmed in part (d), the above pattern can be formed by arranging the first polarization induction layer 91 and the second polarization induction layer 92 alternately side by side. The above pattern can be formed by applying conventional photolithography or nanoimprint lithography, etc., therefore, specific descriptions thereof will be omitted in this invention.

[0293] The etching described above can be performed using the selected material of the first polarization inducing layer 91 and an appropriate, known etching method. For example, if the first polarization inducing layer 91 is ITO, it can be etched by wet etching. In this case, the etched thickness extends to the upper surface of the second conductive semiconductor layer 30, that is, all ITO is etched along the thickness direction, but it is not limited to this. Specifically, only a portion of the ITO is etched along the thickness direction, and the second polarization inducing layer 92 can be formed in the etched negative portion. In this case, the upper layer of one end of the element can be formed with a two-layer structure consisting of the first polarization inducing layer 91 and the second polarization inducing layer 92 stacked as ITO.

[0294] Next, as step B-3, a second polarization induction layer 92 is formed on the formed negative portion. The second polarization induction layer 92 can be made of a material with a polarity different from the selected first polarization induction layer 91 and is a common material used in LEDs. For example, it can be a metal, dielectric, or semiconductor; specifically, it can be nickel or chromium. The formation method can be any known method, such as deposition, depending on the material, and the present invention is not particularly limited thereto.

[0295] Next, as step (C) of the present invention, the following steps are performed: a single element has a plane (which has a length and width of nanometer or micrometer size), and an LED wafer 51 is etched along the thickness direction such that the thickness perpendicular to the plane is less than the length, thereby forming a plurality of micro-nano fin LED pillars 52.

[0296] Specifically, step (C) above includes: step C-1), forming a mask pattern layer 61 on the upper surface of the polarization-inducing layer 90, such that individual elements become planes with a prescribed shape and length and width of nanometer or micrometer size. Figure 22 (d) portion); step C-2), according to the above pattern, etch along the thickness direction to a portion of the thickness of the first conductive semiconductor layer 10, thereby forming a plurality of micro-nano fin-shaped LED pillars 52 ( Figure 21 (e) part); step C-3), to form an insulating film 62 in a manner that covers the exposed sides of the micro-nano fin LED pillar 52 described above ( Figure 21 (f) part); step C-4), to expose the upper surface of the first conductive semiconductor layer 10 between adjacent micro-nano fin LED pillars 52 ( Figure 21 (f) A portion of the insulating film 62 formed on the upper part of the first conductive semiconductor layer 10 is removed by the method of A). Figure 21 (g) portion); step C-5), through the upper part of the exposed first conductive semiconductor layer ( Figure 21 (g) Part A), further etching the first conductive semiconductor layer 10 along the thickness direction to form a portion of the first conductive semiconductor layer exposed below the first conductive semiconductor layer of the micro-nano fin-shaped LED pillar with the insulating film 62 formed on the side at a predetermined thickness. Figure 21 (h) part B) Figure 21 (h) portion); step C-6), etching the exposed portion of the first conductive semiconductor layer from both sides toward the center side (h) portion. Figure 21 (h) part B) Figure 21 (i) portion); and step C-7), removing the mask pattern layer 61 disposed on the upper part of the polarization induction layer 90 and the insulating film 62 covering the side ( Figure 21 (j) part).

[0297] First, as step C-1, the following steps can be performed ( Figure 21 (d) portion: A mask pattern layer 61 is formed on the upper surface of the polarization-inducing layer 90 in such a way that individual elements are formed in a prescribed shape with length and width of nanometer or micrometer size.

[0298] The aforementioned mask pattern layer 61 is a layer with a pattern formed in such a way that it becomes the target planar shape of the realized LED element, and can be formed using known methods and materials used in etching LED wafers. For example, the aforementioned mask pattern layer 61 can be a SiO2 hard mask pattern layer. Briefly, the method of forming it can be described by the following steps: forming a SiO2 hard mask layer that is not patterned on the polarization inducing layer 90; forming a metal layer on the aforementioned SiO2 hard mask layer; forming a predetermined pattern on the aforementioned metal layer; etching the aforementioned metal layer and SiO2 hard mask layer according to the aforementioned pattern; and removing the metal layer.

[0299] The aforementioned mask layer is the source layer for the mask pattern layer 61. For example, SiO2 can be formed by deposition. The thickness of the aforementioned mask layer can be formed from 0.5 μm to 3 μm, for example, 1.2 μm. Furthermore, for example, the aforementioned metal layer can be an aluminum layer, which can be formed by deposition. The predetermined pattern formed on the formed metal layer is used to realize the pattern of the mask pattern layer, and can be a pattern formed by conventional methods. For example, the aforementioned pattern can be formed by photolithography using a photosensitive material or by known nanoimprint lithography, laser interference etching, electron beam etching, etc. Afterward, the step of etching the metal layer and the SiO2 hard mask layer according to the formed pattern is performed. For example, the aforementioned metal layer can be etched using ICP etching, and the SiO2 hard mask layer or the printed polymer layer can be etched by a dry etching method such as RIE.

[0300] Subsequently, steps can be performed to remove the metal layer, other photosensitive material layers, or polymer layers remaining from the imprinting process on top of the etched SiO2 hard mask layer. This removal can be performed using conventional wet or dry etching methods, depending on the material; specific details will be omitted here.

[0301] Figure 21 Part (d) is a top view of the patterning of the SiO2 hard mask layer 61 on the polarization-induced layer 90. Then, as in step C-2), the following steps can be performed: Figure 21 In part (e), multiple micro-nano fin LED pillars 52 are formed by etching along the thickness direction of the LED wafer 51 according to the above pattern down to a portion of the thickness of the first conductive semiconductor layer 10. The above etching can be performed by a conventional dry etching method such as ICP.

[0302] Then, as in step C-3), such as Figure 21 In part (f), the step of forming an insulating film 62 to cover the exposed sides of the aforementioned micro-nano finned LED pillar 52 can be performed. The insulating film 62 covering the sides can be formed by deposition, for example, its material can be SiO2, but is not limited thereto. The aforementioned insulating film 62 functions as a side mask layer, specifically, as... Figure 21 In part (i), during the process of etching the first conductive semiconductor layer portion B to separate the micro-nano fin LED pillar 52, the side surface of the micro-nano fin LED pillar 52 remains, preventing damage according to the etching process. The thickness of the insulating film 62 can be from 100 nm to 600 nm, but is not limited to this.

[0303] Next, as in step C-4), as... Figure 21 In part (g), the upper surface of the first conductive semiconductor layer 10 between adjacent micro-nano fin LED pillars 52 is subjected to [further action]. Figure 21 (g) A portion of the insulating cladding 62 formed on the upper part of the first conductive semiconductor layer 10 is removed by exposure of part A). The removal of the insulating cladding 62 can be performed by a suitable etching method, for example, the insulating cladding 62 of SiO2 can be removed by dry etching such as RIE.

[0304] Then, as in step C-5), as... Figure 21 In part (h), the following steps are performed: through the upper part of the exposed first conductive semiconductor layer ( Figure 21 (g) Part A), further etching the first conductive semiconductor layer 10 along the thickness direction, thereby forming a portion of the first conductive semiconductor layer exposed below the first conductive semiconductor layer of the micro-nano fin-shaped LED pillar with the insulating film 62 formed on the side at a predetermined thickness. Figure 21 (h) portion B). As described above, the exposed portion (B) of the first conductive semiconductor layer 10 is the portion that is etched laterally in a direction horizontal to the substrate (substrate) in the steps described later. For example, the process of further etching the first conductive semiconductor layer 10 along the thickness direction can be performed by a dry etching method such as ICP.

[0305] Next, as in step C-6), as... Figure 21 Part (i) can perform the first conductive semiconductor layer portion exposed on the side along a direction horizontal to the substrate. Figure 21 (h) Part B) Step of side etching. The side etching described above can be performed by wet etching, for example, by using a methylammonium hydroxide (TMAH) solution at a temperature of 60°C to 100°C.

[0306] Afterwards, wet etching is performed in the lateral direction (as step C-7), as follows. Figure 21 In part (j), the step of removing the mask pattern layer 61 disposed on the upper part of the polarization induction layer 90 and the insulating film 62 covering the side can be performed. The material of the mask pattern layer 61 and the insulating film 62 disposed on the upper part can be SiO2, which can be removed by wet etching. For example, the wet etching can be performed using a buffer oxide etchant (BOE).

[0307] According to an embodiment of the present invention, between step (C) and step (D) described above, step (E) is performed as follows: Figure 21 In part (k), a step of forming a protective coating 80 on the sides of multiple micro-nano finned LED pillars can also be performed. For example, the protective coating 80 can be formed by deposition, with a thickness of 10 nm to 100 nm, or for example, 90 nm, and the material can be alumina. When using alumina, an ALD process can be used as an example of the deposition. Furthermore, to ensure that the deposited protective coating 80 is formed only on the sides of the multiple micro-nano finned LED pillars, the remaining portion of the protective coating 80, excluding the sides, can be removed by etching, for example, by a dry etching method such as ICP. Additionally, Figure 21 Part (l) shows that the protective film 80 surrounds the entire side, and on the side, the entire remaining portion or a portion of the remaining portion, except for the photoactive layer, is not covered by the protective film 80.

[0308] Then, as step (D) of the present invention, as follows: Figure 21 In the (m) portion, the step of separating the plurality of micro-nano fin LED pillars 80 from the aforementioned substrate is performed. This separation can be achieved by cutting with a cutting tool or by detaching the adhesive film; the present invention is not particularly limited thereto.

[0309] Furthermore, regarding the manufacturing method of the second type (micro-nano fin) ultrathin LED electrode element described above, the separation step (D) includes: as in the manufacturing of the first type (dot or disk type) ultrathin LED electrode element, after immersing the LED wafer in an electrolyte, after electrically connecting the other terminal of the power supply, which is electrically connected to one terminal of the power supply, to the electrode immersed in the electrolyte, applying power to form multiple pores in the first part; and applying ultrasonic waves to the LED wafer to separate multiple LED structures from the first part where multiple pores are formed, thereby obtaining multiple micro-nano fin LED pillars 80 from the substrate.

[0310] Furthermore, pores may be formed in the first conductive semiconductor layer (or n-type conductive semiconductor layer) portion of each micro-nano fin LED pillar.

[0311] In addition, such as Figure 16 As shown, the micro-nano fin LED element 107 can be configured such that one side of the element on the polarization-inducing layer side in the thickness direction of each layer is in contact with two adjacent electrodes 211 / 212, 213 / 214 of the lower electrode line 200. The first conductive semiconductor layer 10, which is the opposite side of the element that is in contact with the lower electrode line 200, can be in contact with the upper electrode line 300. At this time, due to the protrusion formed on one side of the first conductive semiconductor layer 10, the polarization-inducing layer 90 can be configured to contact the lower electrode line 200 with a higher probability.

[0312] Furthermore, in the lower electrode line 200, the area of ​​the region that can be driven individually per unit electrode area, i.e., the region on which micro-nano fin LED elements are arranged on the lower electrode line 200 and the upper electrode line 300 is disposed on the micro-nano fin LED elements, is preferably 1 μm. 2 Up to 100cm 2 More preferably 4μm 2 Up to 100mm 2 The area of ​​a unit electrode is not limited to the area mentioned above.

[0313] According to an embodiment of the present invention, such as Figure 16 As shown, in order to reduce the contact resistance between the micro-nano fin LED elements 107 disposed on the lower electrode line 200, a current-carrying metal layer 500 may be included to connect the polarization induction layer 90 of the micro-nano fin LED elements 107 in contact with the lower electrode line 200 to the lower electrode line 200. The aforementioned current-carrying metal layer 500 may be a conductive metal layer such as silver, aluminum, or gold, and for example, it may be formed with a thickness of approximately 10 nm.

[0314] Furthermore, an insulating layer 600 may be included in the space between the upper electrode line 300 and the first conductive semiconductor layer 10 on the upper surface of the micro-nano fin LED element 107, which is magnetically aligned on the lower electrode line 200. The insulating layer 600 prevents electrical contact between the two electrode lines 200 and 300 facing each other in the vertical direction, and performs the function of making the implementation of the upper electrode line 300 easier.

[0315] The aforementioned insulating layer 600 can be made of materials that perform conventional insulating functions without limitation. Preferably, it can be a transparent material, such as, for example, SiO2 or SiN. x、 A layer formed by insulating materials such as Al2O, HfO2, and ZrO2.

[0316] The micro-nano fin LED electrode assembly 1001 of the present invention described above can be manufactured by performing a process including the following steps: step (1), adding an ink composition including a plurality of micro-nano fin LED elements 107 to a lower electrode line 200 including a plurality of lower electrodes 211, 212, 213, 214 spaced horizontally at a predetermined interval; step (2), applying an assembly voltage to the lower electrode line 200 to magnetically align the first conductive semiconductor layer 10 or polarization induction layer 90 of the micro-nano fin LED elements 107 in the solution to contact at least 17 adjacent lower electrodes 211 / 212, 213 / 214; and step (3), forming an upper electrode line 300 on the magnetically aligned plurality of micro-nano fin LED elements 107.

[0317] The micro-nano fin LED element in step (1) has a plane (with a length and width of nanometer or micrometer size). As a rod-shaped element with a thickness less than the length perpendicular to the plane, the first conductive semiconductor layer 10, the photoactive layer 20, the second conductive semiconductor layer 30 and the polarization induction layer 90 can be stacked sequentially along the thickness direction.

[0318] The solution comprising the aforementioned plurality of micro-nano fin LED elements 107 in step (1) may include the plurality of micro-nano fin LED elements 107 and a solvent that performs the function of dispersing the elements and moving them on the electrodes of the lower electrode line. At this time, the solution may be in the form of ink or paste, and the solution may be added to the lower electrode line 200 using inkjet printing. Furthermore, step (1) is illustrated by adding the elements to a solution mixed with the solvent, but the same situation also includes adding the solution after the elements are first added to the lower electrode line.

[0319] The solvent can be one or more selected from the group consisting of acetone, water, alcohols, and toluene, with acetone being more preferred. However, the type of solvent is not limited to the aforementioned substrate, and solvents that have no physical or chemical impact on the micro-nano fin LED element and evaporate well can be used without restriction. Preferably, 0.001 to 100 parts by weight of micro-nano fin LED element can be added relative to 100 parts by weight of solvent. If less than 0.001 parts by weight of micro-nano fin LED element is added, the number of micro-nano fin LED elements connected to the lower electrode is small, making it difficult to perform the normal function of the micro-nano fin LED electrode assembly, and there is a problem that the solution needs to be added dropwise multiple times to overcome this. If the amount of micro-nano fin LED element added is greater than 100 parts by weight, there is a problem that the alignment of the individual micro-nano fin LED elements is hindered.

[0320] Then, as step (2), the following steps are performed: an assembly voltage is applied to the lower electrode line 200 so that the first conductive semiconductor layer 10 or polarization induction layer 90 of the micro-nano fin LED element 107 in the solution is magnetically aligned with at least 17 adjacent lower electrodes 211 / 212, 213 / 214.

[0321] Step (2) above is as follows: In multiple micro-nano fin LED elements, due to the induction of the electric field formed by the potential difference between adjacent lower electrodes 211 / 212 and 213 / 214, charges are induced in the micro-nano fin LED elements. Along the length direction of the micro-nano fin LED elements, with the center of the element as the center, different charges are induced closer to the two ends, thereby achieving magnetic alignment. This is to apply power in such a way that a potential difference is formed between one of the two adjacent lower electrodes in the multiple lower electrodes of the lower electrode line, or between the first group (composed of two or more adjacent lower electrodes) and the second group (adjacent to the first group and composed of two or more adjacent lower electrodes). At this time, the intensity, type, etc. of the applied assembly voltage are referenced in Korean Patent Application Nos. 10-2013-41080912, 10-2016-0092737, and 10-2016-0073572 filed by the inventors of this invention.

[0322] Next, as step (3) of the present invention, the step of forming upper electrode lines 300 on a plurality of magnetically aligned micro-nano fin LED elements 107 is performed. The upper electrode lines 300 can be implemented by depositing electrode material after electrode line patterning using known photolithography, or by performing dry and / or wet etching after depositing electrode material. In this case, the description of the electrode material is the same as that of the electrode material of the lower electrode lines described above, and therefore will be omitted below.

[0323] Additionally, between steps (2) and (3) above, the following may be included: step (2-2), forming a current-carrying metal layer 500 for connecting the polarization induction layer 90 of each micro-nano fin LED element 107 in contact with the lower electrode line 200 to the lower electrode line 200; and step (2-3), forming an insulating layer 600 on the lower electrode line 200 in a manner that does not cover the upper surface of the magnetically aligned micro-nano fin LED element 107.

[0324] The aforementioned conductive metal layer 500 can be manufactured by: applying a photolithography process using photosensitive materials to pattern the lines to be deposited in the conductive metal layer, and then depositing the conductive metal layer; or, patterning the deposited metal layer and then etching it. This process can be performed using known methods, and the inventors of this invention's Korean Patent Application No. 10-2016-41181910 is incorporated herein by reference.

[0325] Alternatively, the following steps can be performed: after forming the conductive metal layer 500, the upper surface of the magnetically aligned micro-nano fin LED element 107 is not covered, thereby forming an insulating layer 600 on the lower electrode line 200. The insulating layer 600 can be formed by deposition of a known insulating material, such as SiO2 or SiN, for example, by deposition using a PECVD process. x The insulating material can be either AlN or GaN deposited via MOCVD, or Al2O, HfO2, or ZrO2 deposited via ALD. Furthermore, the insulating layer 600 can be formed horizontally without covering the upper surface of the magnetically aligned micro-nano fin LED element 107. For this purpose, the insulating layer is formed by deposition with a thickness that does not cover the upper surface, or by deposition that covers the upper surface followed by dry etching until the upper surface of the element is exposed.

[0326] The present invention will be described in more detail below through embodiments, but the following embodiments do not limit the scope of the present invention and should be interpreted as helping to understand the present invention.

[0327] [Example] Preparation Example 1: Manufacturing the first type of ultra-thin LED component A conventional LED wafer (Epistar) was prepared by sequentially stacking an undoped n-type III nitride semiconductor layer, a Si-doped n-type III nitride semiconductor layer (thickness: 4 μm), a photoactive layer (thickness: 0.45 μm), and a p-type III nitride semiconductor layer (thickness: 0.05 μm) on a substrate.

[0328] After sequentially stacking ITO (thickness: 0.15μm) as the lower electrode layer, SiO2 (thickness: 1.2μm) as the first mask layer, and Al (thickness: 0.2μm) as the second mask layer on the prepared LED wafer, the SOG resin layer with the transferred pattern is transferred onto the second mask layer using a nanoimprint pen.

[0329] Next, an LED wafer with multiple LED structures (diameter: 850 nm, height: 850 nm) was fabricated using KOH wet etching. Then, an SOG resin layer was cured using RIE, and the residual resin portion of the resin layer was etched using RIE to form a resin pattern layer. Following this, a second mask layer was etched using ICP according to the pattern, and a first mask layer was etched using RIE. Afterwards, the lower electrode layer, p-type III nitride semiconductor layer, and photoactive layer were etched using ICP. Then, the doped n-type III nitride semiconductor layer was etched to a thickness of 0.78 μm, with the sidewalls of the etched doped n-type III nitride semiconductor layer perpendicular to the surface layer.

[0330] Subsequently, SiN is deposited on the LED wafer formed from multiple LED structures. x Protective coating material (refer to) Figure 23 The SEM images show that the reference deposition thickness on the side of the LED structure is 52.5 nm and 72.5 nm. Then, the protective coating material formed between the multiple LED structures is removed by reactive ion etching, thereby exposing the upper surface S1 of the first part a of the doped n-type III nitride semiconductor layer.

[0331] Next, the LED chip with the temporary protective coating was immersed in a 0.3M electrolyte solution (an aqueous solution of oxalic acid) and connected to the anode terminal of the power supply. The cathode terminal was then connected to a platinum electrode immersed in the electrolyte. A voltage of 10V was applied for 5 minutes. Figure 24 The SEM images show multiple pores formed from the surface of the first portion a of the doped n-type III nitride semiconductor layer to a depth of 600 nm. After removing the temporary protective coating via RIE, a surface protective coating of Al2O3 with a thickness of 50 nm (based on the side of the LED structure) is deposited again on the LED wafer. The surface protective coatings formed on the upper parts of the multiple LED structures and on the surface S1 of the first portion a of the doped n-type III nitride semiconductor layer are removed via ICP, thereby exposing the upper surface S1 of the first portion a of the doped n-type III nitride semiconductor layer and the upper surface of the LED structure.

[0332] Subsequently, the LED chip was immersed in a bubble-forming solution of γ-butylacetone, and then bubbles generated by irradiating with ultrasound at a frequency of 40 kHz for 10 minutes were used to break down the pores formed in the doped n-type III nitride semiconductor layer, such as... Figure 25 The SEM images show an ultra-thin LED assembly fabricated by separating multiple LED structures from a wafer and including multiple ultra-thin LED elements. Furthermore, as... Figure 25It can be confirmed that there are no unseparated LED structures on the chip.

[0333] Example 1 for comparison: Rod-shaped LED element Using conventional methods, a rod-shaped LED element assembly with a diameter of 650 nm and a height of 4.2 μm and having the same stacked structure as in Example 1 was fabricated using LED wafers.

[0334] Experimental Example 1 LED element assemblies prepared in Preparation Example 1 and Comparative Preparation Example 1 were respectively added to acetone, irradiated with ultrasound at 100W to disperse them, and the dispersion state of the LED elements was confirmed by measuring the absorbance over 2 hours at 15-minute intervals. The spectral area in the visible light region of 380nm–780nm was normalized using the measured results, and... Figure 26 The absorbance is shown in the graph according to time.

[0335] If it can be passed Figure 26 It has been confirmed that, compared to the rod-shaped LED element of Preparation Example 1, the ultrathin LED element of Preparation Example 1 exhibits superior long-term dispersion retention in acetone solvent.

[0336] Example 1: Manufacturing of Ultra-thin LED Electrode Components The ultrathin LED element assembly was prepared by the same method as the ultrathin LED element manufactured in Preparation Example 1. Before separating it from the LED wafer by ultrasonic waves, a Ti / Au layer (10 nm / 100 nm thick) was formed on the lower electrode layer as an electrode layer. Then, 1,2-ethanedithiol was treated on the Ti / Au layer to prepare an ultrathin LED element assembly with an exposed thiol group bonding layer.

[0337] Next, the lower electrode line, including the lower electrode, is impregnated in an ink composition containing the ultrathin LED element assembly, thereby erecting and assembling the ultrathin LED element on the lower electrode within a specified time. The ultrathin LED element used here has a diameter of 750 nm and a height of 1.1 μm.

[0338] Subsequently, SiO2 is formed at a thickness of 1.4 μm to 1.6 μm as an insulating layer to perform the function of an insulator. In order to expose the n-GaN of the ultrathin LED element by 300 nm to 400 nm, an insulating layer of the corresponding thickness is etched. Then, AZO or ITO of 150 nm is deposited on the exposed ultrathin LED element to serve as a transparent electrode. This forms an upper electrode line including an upper electrode on the upper part of the ultrathin LED element, thereby manufacturing an ultrathin LED electrode assembly with a horizontal and vertical thickness of 0.3 mm.

[0339] In the aforementioned ultra-thin LED electrode assembly, a pixel unit is composed of three sub-pixel units, which are composed of a first sub-pixel unit including an ultra-thin blue LED element, a second sub-pixel unit including an ultra-thin red LED element, and a third sub-pixel unit including an ultra-thin red LED element.

[0340] Furthermore, each of the three sub-pixel units includes six ultra-thin LED elements.

[0341] Experiment Example 2 Power was applied to the upper and lower electrode lines of the ultra-thin LED electrode assembly manufactured in Example 1, and an ultra-thin LED electrode assembly with an emission of approximately 1000 PPI was manufactured, and it was confirmed that no dark spots were generated within the pixel.

[0342] The above describes a preferred embodiment of the present invention. However, the present invention can be modified and altered in various ways, and equivalent technical solutions can be used. It is clear that the above-described embodiments can be appropriately changed to be equally applicable. Therefore, the above description does not limit the scope of the present invention as defined by the claims.

Claims

1. A high-resolution ultra-thin LED display for AR / VR devices, characterized in that, Including ultra-thin LED electrode components, The aforementioned ultra-thin LED electrode assembly includes: Multiple lower electrodes are formed on the substrate; Multiple pixel units are formed on the aforementioned lower electrode; An insulating layer is formed on the substrate and the upper part of the plurality of pixel units; and Multiple upper electrodes are formed on the aforementioned insulating layer. The aforementioned pixel units each include sub-pixel units, and the aforementioned sub-pixel units include multiple ultra-thin LED elements. The multiple ultra-thin LED elements constituting the above-mentioned sub-pixel units are respectively stacked with a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer. The first conductive semiconductor layer of the aforementioned ultra-thin LED element is vertically disposed within the sub-pixel unit such that it faces the lower electrode. The aforementioned high-resolution ultra-thin LED display for AR and VR devices also includes at least one of the following coatings: Holes push the coating to surround the exposed side of the second conductive semiconductor layer, or at least a portion of the exposed side of the second conductive semiconductor layer and the exposed side of the photoactive layer, to move holes on the surface side of the exposed side to the center side; and Electrons drive the coating to surround the exposed side of the first conductive semiconductor layer, thereby moving electrons from the surface side of the exposed side to the center side.

2. The high-resolution ultra-thin LED display for AR / VR devices according to claim 1, characterized in that, The aforementioned sub-pixel unit includes three or more ultra-thin LED elements. The aforementioned ultra-thin LED components include one or more selected from ultra-thin blue LED components, ultra-thin green LED components, and ultra-thin red LED components.

3. The high-resolution ultra-thin LED display for AR / VR devices according to claim 1, characterized in that, The aforementioned pixel units each comprise 3 to 4 sub-pixel units. The aforementioned 3 to 4 sub-pixel units each include 3 to 30 ultra-thin LED elements.

4. The high-resolution ultra-thin LED display for AR / VR devices according to claim 3, characterized in that, The aforementioned 3 to 4 sub-pixel units are respectively circular, rectangular, or square.

5. The high-resolution ultra-thin LED display for AR / VR devices according to claim 3, characterized in that, The aforementioned pixel units each include 3 sub-pixel units. The above three sub-pixel units include: The first sub-pixel unit includes an ultra-thin blue LED element; The second sub-pixel unit includes an ultra-thin green LED element; and The third sub-pixel unit includes an ultra-thin red LED element.

6. The high-resolution ultra-thin LED display for AR / VR devices according to claim 3, characterized in that, The aforementioned three to four sub-pixel units all include ultra-thin blue LED elements.

7. The high-resolution ultra-thin LED display for AR / VR devices according to claim 6, characterized in that, One or more color-changing layers selected from green and red color-changing layers are also stacked on the upper part of the upper electrode.

8. The high-resolution ultra-thin LED display for AR / VR devices according to claim 1, characterized in that, The aforementioned ultra-thin LED element includes one or more selected from the following LED elements: Dot-type LED elements or disk-type LED elements, wherein the thickness along the stacking direction of the multiple layers is less than 2000 nm, wherein the ratio between the thickness of the dot-type LED element and the length of the major axis in the cross-section perpendicular to the stacking direction is 1:0.5 to 1:1.5, and the ratio between the thickness of the disk-type LED element and the length of the major axis in the cross-section perpendicular to the stacking direction is 1:1.5 to 1:5.0; and The micro-nano fin LED element has a thickness of 100nm to 2000nm along the stacking direction of multiple layers, and the length of the long axis in the vertical cross-section is 100nm to 6000nm, with the ratio between the thickness and the length of the long axis being 1:3 or more.

9. The high-resolution ultra-thin LED display for AR / VR devices according to claim 8, characterized in that, The ultra-thin LED element is further provided on one side and in the lower electrode of the aforementioned ultra-thin LED element, in either or both sides of the configuration area where the ultra-thin LED element is to be configured, and an alignment induction layer is also included, which vertically aligns the ultra-thin LED element along the thickness direction. The aforementioned arrangement-induced layer is a magnetic layer, a charge layer, or a binding layer.

10. The high-resolution ultra-thin LED display for AR / VR devices according to claim 1, characterized in that, The first conductive semiconductor layer of the aforementioned ultrathin LED element is an n-type group III nitride semiconductor layer. An electron delay layer is also included on the opposite side of the first conductive semiconductor layer that is adjacent to the photoactive layer, so that the number of electrons and holes recombinating in the photoactive layer is balanced.

11. The high-resolution ultra-thin LED display for AR / VR devices according to claim 10, characterized in that, The aforementioned first conductive semiconductor layer is a doped n-type group III nitride semiconductor layer. The aforementioned electron delay layer is a group III nitride semiconductor with a doping concentration lower than that of the aforementioned first conductive semiconductor layer.

12. The high-resolution ultra-thin LED display for AR / VR devices according to claim 1, characterized in that, The second conductive semiconductor layer of the aforementioned ultrathin LED element is a p-type group III nitride semiconductor layer. An electron delay layer is also included on the opposite side of the second conductive semiconductor layer that is adjacent to the photoactive layer, so that the number of electrons and holes recombinating in the photoactive layer is balanced.

13. The high-resolution ultra-thin LED display for AR / VR devices according to claim 1, characterized in that, The first conductive semiconductor layer of the aforementioned ultrathin LED element is an n-type group III nitride semiconductor layer. The second conductive semiconductor layer is a p-type group III nitride semiconductor layer.

14. The high-resolution ultra-thin LED display for AR / VR devices according to claim 13, characterized in that, The aforementioned ultrathin LED element includes both the hole-driven coating and the electron-driven coating, wherein the electron-driven coating is configured as the outermost coating surrounding the sides of the first conductive semiconductor layer, the photoactive layer, and the second conductive semiconductor layer.

15. The high-resolution ultra-thin LED display for AR / VR devices according to claim 8, characterized in that, In the case where the ultrathin LED element is a micro-nano fin LED element, a polarization induction layer is also stacked on the upper part of the second conductive semiconductor layer.

16. The high-resolution ultra-thin LED display for AR / VR devices according to claim 15, characterized in that, In the case where the ultrathin LED element is a micro-nano fin LED element, the first conductive semiconductor layer or polarization induction layer of the micro-nano fin LED element is configured to be in contact with at least two adjacent lower electrodes.

17. The high-resolution ultra-thin LED display for AR / VR devices according to any one of claims 1 to 16, characterized in that, It has a resolution of 450 PPI to 3000 PPI, where PPI refers to pixels per inch.

18. A method for manufacturing a high-resolution ultra-thin LED display for AR / VR devices, characterized in that, The aforementioned high-resolution ultra-thin LED display includes an ultra-thin LED electrode assembly, which undergoes a process comprising the following steps: Step (1), prepare the lower electrode wire including the lower electrode; Step (2): Form multiple pixel units on the lower electrode; Step (3): Fill the area around the ultra-thin LED element in each pixel unit with an insulator to form an insulating layer; as well as Step (4) forms the upper electrode line, so that the upper electrode is electrically connected to the opposite side of the ultra-thin LED element that is assembled on one side of the lower electrode. Each pixel unit in step (2) above is formed by a sub-pixel unit comprising multiple ultra-thin LED elements. The sub-pixel unit is formed by printing multiple ultra-thin LED elements on the lower electrode using inkjet printing, laser-supported transfer printing, stamp transfer printing, magnetic field-induced printing, or electric field-induced printing. The multiple ultra-thin LED elements constituting the above-mentioned sub-pixel units are respectively stacked with a first conductive semiconductor layer, a photoactive layer, and a second conductive semiconductor layer. The first conductive semiconductor layer of the aforementioned ultra-thin LED element is vertically disposed within the sub-pixel unit such that it faces the lower electrode. The aforementioned high-resolution ultra-thin LED display for AR and VR devices also includes at least one of the following coatings: Holes push the membrane to surround the exposed side of the second conductive semiconductor layer or at least a portion of the exposed side of the second conductive semiconductor layer and the exposed side of the photoactive layer to move holes on the surface side of the exposed side to the center side. as well as Electrons drive the coating to surround the exposed side of the first conductive semiconductor layer, thereby moving electrons from the surface side of the exposed side to the center side.

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