A semiconductor device and a method of fabricating the same

Abstract

The application provides a semiconductor device and a manufacturing method thereof. The manufacturing method comprises: placing a substrate into a reaction cavity of an epitaxial device; forming a patterned first epitaxial layer on the surface of the substrate by using a first epitaxial growth process in the reaction cavity; wherein, during the first epitaxial growth process, a set region of the surface of the substrate is irradiated by using a laser to form the first epitaxial layer in a region outside the set region. In the embodiment of the application, the epitaxial growth process in the set region is disturbed by using the laser, so that the first epitaxial layer is formed in the region outside the set region. The number of times of replacing the device can be reduced, and the process steps can be simplified, so that the yield of the semiconductor device can be improved. Moreover, the risk of introducing contamination caused by frequently replacing the device is reduced, and the damage of the first epitaxial layer caused by the patterning process such as etching can be avoided, and the process stability of the semiconductor device obtained by the manufacturing method is high.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for manufacturing the same. Background Technology

[0002] Compound semiconductor materials are semiconductor materials composed of two or more elements, and they can be widely used in various semiconductor devices. For example, GaN materials can be used in high electron mobility transistors (HEMTs) because GaN materials have advantages such as a large bandgap and high mobility. Furthermore, a two-dimensional electron gas can be generated at the interface of GaN-based heterostructures, giving HEMTs characteristics such as high mobility and high breakdown field strength.

[0003] In related technologies, semiconductor devices are fabricated using compound semiconductor materials. The fabrication process involves epitaxial growth to deposit the required epitaxial layer on a substrate, followed by numerous repetitions of resist coating, photolithography, film deposition, etching, and resist removal to pattern the epitaxial layer and ultimately complete the semiconductor device fabrication. The epitaxial growth process must be completed within the reaction chamber of the epitaxial equipment, while the resist coating, photolithography, film deposition, etching, and resist removal processes must be performed in other equipment. Thus, after each epitaxial growth process within the reaction chamber, the substrate must be removed and subjected to a series of processes in other equipment. In some cases, it may even need to be returned to the reaction chamber for another epitaxial growth process. Therefore, in these technologies, the semiconductor device fabrication process is complex, the yield is low, and the repeated return to the reaction chamber increases the risk of contamination and reduces process stability. Summary of the Invention

[0004] This application provides a semiconductor device and a method for manufacturing the same, which solves the problems of complex manufacturing process and low yield of semiconductor devices.

[0005] In a first aspect, embodiments of this application provide a method for fabricating a semiconductor device, which may include:

[0006] Place the substrate into the reaction chamber of the epitaxial equipment;

[0007] Inside the reaction chamber, a patterned first epitaxial layer is formed on the surface of the substrate using a first epitaxial growth process; wherein, during the first epitaxial growth process, a laser is used to irradiate a designated area on the surface of the substrate to form the first epitaxial layer in areas outside the designated area.

[0008] In the fabrication method provided in this application embodiment, during the first epitaxial growth process, a laser is used to irradiate a designated area on the substrate surface. The laser can interfere with the epitaxial growth interface within the designated area, suppressing the epitaxial growth process within the designated area. Thus, the first epitaxial layer will not form within the designated area on the substrate, allowing it to form outside the designated area. Consequently, a patterned first epitaxial layer can be formed within the reaction chamber of the epitaxial equipment. There is no need to remove the substrate from the reaction chamber of the epitaxial equipment and then use other equipment for processes such as resist coating, photolithography, film deposition, etching, and resist removal to pattern the epitaxial layer. Therefore, the fabrication method in this application embodiment can reduce the number of equipment changes, simplify process steps, and thereby increase the yield of semiconductor devices. Furthermore, it reduces the risk of contamination introduced by frequent equipment changes and avoids damage to the first epitaxial layer caused by patterning processes such as etching, resulting in semiconductor devices with higher process stability.

[0009] It should be noted that during the first epitaxial growth process described above, the surface of the substrate irradiated by the laser may or may not have other film layers, or the surface of the substrate irradiated by the laser may have other film layers, which is not limited here.

[0010] In practical implementation, during the first epitaxial growth process, a laser with a wavelength in the range of 200nm to 360nm can be used to irradiate a designated area on the substrate surface. This laser band can cover the characteristic absorption wavelengths of most compounds, such as aluminum nitride (AlN) and gallium nitride (GaN), thus giving the laser high energy to interfere with the epitaxial growth process of the compound. In actual process, the laser power can be adjusted according to the nucleation layer conditions of the first epitaxial layer material to effectively suppress the epitaxial growth process.

[0011] Furthermore, the fabrication method provided in this application embodiment, after placing the substrate into the reaction chamber of the epitaxial apparatus, and before or after forming a patterned first epitaxial layer on the surface of the substrate using a first epitaxial growth process within the reaction chamber, may further include:

[0012] Within the reaction chamber, a second epitaxial layer is formed on the surface of the substrate using a second epitaxial growth process; however, during this second epitaxial growth process, the substrate surface is not irradiated with a laser. In other words, the second epitaxial growth process allows for the formation of a full-surface second epitaxial layer on the substrate surface. In practical implementation, the order of the first and second epitaxial growth processes can be determined based on the specific structure of the semiconductor device; no specific order is specified here.

[0013] To more clearly illustrate the fabrication method in the embodiments of this application, taking a high electron mobility transistor as an example, the fabrication method will be described in detail. Specifically, the fabrication method of a high electron mobility transistor may include:

[0014] A first channel layer is formed on the surface of the substrate using a second epitaxial growth process. That is, the first channel layer can serve as the aforementioned second epitaxial layer, and the substrate surface is not irradiated with a laser during the formation of the first channel layer, thereby forming a full-surface first channel layer on the substrate surface. For example, gallium nitride (GaN) material can be used to fabricate the first channel layer.

[0015] A first epitaxial growth process is employed, in which a laser is used to irradiate the area other than the gate region to form a first gate in the gate region above the first channel layer; that is, the first gate is used as the first epitaxial layer, and the area other than the gate region is used as the designated area. Irradiating the area other than the gate region with a laser can interfere with the epitaxial growth process in the area other than the gate region, thereby allowing the first gate to be formed only in the gate region.

[0016] A first epitaxial growth process is employed, using laser irradiation of the gate region to form a second channel layer on top of the first channel layer, excluding the gate region. In other words, the second channel layer serves as the first epitaxial layer, and the gate region is defined as the designated region. Laser irradiation of the gate region interferes with the epitaxial growth process within the gate region, allowing the second channel layer to be formed in the area excluding the gate region. The second channel layer and the first channel layer can constitute a channel layer, and both the first and second channel layers can be fabricated using the same material.

[0017] In specific implementation, the above-mentioned first epitaxial growth process, which uses laser irradiation on the area excluding the gate region to form the first gate in the gate region above the first channel layer, may include:

[0018] The first gate is formed using GaN material doped with P-type impurities, with a concentration of less than 1E19. That is, the first gate is obtained by lightly doping GaN material with P-type impurities. This allows the first gate to have a certain degree of conductivity, enabling it to cooperate with the subsequently formed second gate and improve the gate control capability of the electron mobility transistor.

[0019] Before forming the first trench layer on the surface of the substrate using the second epitaxial growth process, the process may further include:

[0020] A buffer layer is formed on the surface of the substrate using a second epitaxial growth process. Optionally, the buffer layer can be made of materials such as AlN or AlGaN.

[0021] In some embodiments of this application, the surface of the substrate may include a source region and a drain region. The above fabrication method may further include:

[0022] A first epitaxial growth process is employed, using laser irradiation of the source and drain regions to form a barrier layer over the second channel layer and the first gate layer, excluding the source and drain regions. Optionally, AlGaN material can be used to fabricate the barrier layer. The thickness of the barrier layer can be in the range of 5 nm to 30 nm.

[0023] Optionally, in the embodiments of this application, the above manufacturing method may further include:

[0024] A first epitaxial growth process is employed, using laser irradiation of the area outside the gate region to form a second gate within the gate region above the barrier layer. Optionally, the thickness of the second gate G2 can be in the range of 30 nm to 120 nm. The second gate can be formed using GaN material doped with P-type impurities, with a P-type impurity concentration greater than 1E18. That is, the second gate is obtained by heavily doping GaN with P-type impurities, which gives the second gate better conductivity. During use, a gate voltage can be applied to the second gate through signal lines. Due to the good conductivity of the second gate, the high electron mobility transistor can thus have better gate control capability.

[0025] Furthermore, the fabrication method provided in this application can also fabricate other types of semiconductor devices, such as semiconductor devices with a metal-insulator-semiconductor (MIS) structure. The above fabrication method may include:

[0026] A second epitaxial growth process is used to form a trench layer on the surface of the substrate;

[0027] The first epitaxial growth process is used, and the gate region is irradiated with a laser to form a barrier layer in the area above the channel layer other than the gate region.

[0028] Secondly, embodiments of this application also provide a semiconductor device, which may include: a substrate, a channel layer located on the substrate, and at least one gate, wherein the side surface of at least one gate in the semiconductor device is stepped. In embodiments of this application, the stepped side surface of at least one gate can smooth out the spike electric field caused by edge effects, thereby improving the gate control capability and reliability of the semiconductor device. In specific implementations, the side surface of the gate may also include two, three, four, or more steps, which is not limited here.

[0029] In one possible implementation, the semiconductor device may have a dual-gate structure. The semiconductor device may further include a barrier layer located on the side of the channel layer facing away from the substrate. The at least one gate may include a first gate located on the side of the barrier layer near the substrate, and a second gate located on the side of the barrier layer facing away from the substrate. The first gate is embedded inside the channel layer. The orthogonal projections of the first gate and the second gate onto the substrate may have an overlapping region. In this embodiment, by setting the first gate and the second gate to form a dual-gate structure and embedding the first gate inside the channel layer, the gate control capability of the high electron mobility transistor can be increased. The semiconductor device may further include a buffer layer located between the substrate and the channel layer, a source, and a drain, wherein the source and drain are respectively in contact with the barrier layer.

[0030] In this embodiment, the side of the first gate in the semiconductor device may be stepped. In the direction from the substrate to the channel layer, the cross-sectional area of ​​the first gate gradually increases in the direction parallel to the substrate surface; or, in the direction from the substrate to the channel layer, the cross-sectional area of ​​the first gate gradually decreases in the direction parallel to the substrate surface.

[0031] In the embodiments of this application, the side of the second gate in the semiconductor device may be stepped, and the cross-sectional area of ​​the second gate gradually decreases in the direction parallel to the substrate surface in the direction from the substrate to the channel layer.

[0032] In practical implementation, the sides of both the first gate and the second gate in the semiconductor device can be stepped.

[0033] In another possible implementation, the semiconductor device may further include a barrier layer located on the side of the channel layer away from the substrate. The semiconductor device includes only a gate located on the side of the barrier layer away from the substrate, wherein the cross-sectional area of ​​the gate gradually decreases in the direction from the substrate to the channel layer in the direction parallel to the substrate surface.

[0034] In practical implementation, the semiconductor device can be fabricated using any of the above-described fabrication methods. In the above fabrication methods, during the first epitaxial growth process, laser interference is used to disrupt the epitaxial growth process within a designated area, ensuring that the first epitaxial layer is formed only in areas outside the designated area. Therefore, a patterned first epitaxial layer can be formed within the reaction chamber of the epitaxial equipment, eliminating the need to remove the substrate from the reaction chamber and then use other equipment for patterning. This avoids contamination problems caused by frequent equipment changes and prevents damage to the first epitaxial layer during patterning by other equipment. Therefore, the semiconductor device obtained using the above fabrication method has higher process stability and better electrical performance. During fabrication, the gate, barrier layer, and other films requiring patterning can be used as the first epitaxial layer, thus the patterns of the gate and barrier layers can be obtained through the first epitaxial growth process. Attached Figure Description

[0035] Figure 1 A schematic flowchart illustrating a method for fabricating a semiconductor device according to an embodiment of this application;

[0036] Figure 2 This is a schematic diagram of the epitaxial growth process in related technologies;

[0037] Figure 3 This is a schematic diagram of the first epitaxial growth process in the embodiments of this application;

[0038] Figure 4 This is a schematic diagram of the high electron mobility transistor in the embodiments of this application;

[0039] Figure 5 This is a flowchart illustrating the fabrication method of a high electron mobility transistor in an embodiment of this application.

[0040] Figures 6 to 10 This is a schematic diagram of the structure corresponding to each step in the fabrication method of a high electron mobility transistor;

[0041] Figure 11 This is a schematic diagram of the structure of a semiconductor device with a metal-insulator-semiconductor structure in the embodiments of this application;

[0042] Figure 12 This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of this application;

[0043] Figure 13 This is another schematic diagram of the structure of the semiconductor device provided in the embodiments of this application;

[0044] Figure 14 This is another schematic diagram of the structure of the semiconductor device provided in the embodiments of this application;

[0045] Figure 15This is another schematic diagram of the structure of the semiconductor device provided in the embodiments of this application;

[0046] Figure 16 This is another schematic diagram of the structure of the semiconductor device provided in the embodiments of this application;

[0047] Figures 17 to 24 This is a schematic diagram of the structure corresponding to each step in the method for fabricating a semiconductor device in the embodiments of this application.

[0048] Figure label:

[0049] 20-Substrate; 21-Epipolar layer; 22-First epitaxial layer; 201-Channel layer; 201a-First channel layer; 201b-Second channel layer; 201c-Third channel layer; 201d-Fourth channel layer; 202-Barrier layer; 203-Buffer layer; G1-First gate; G11-First sub-gate; G12-Second sub-gate; G13-Third sub-gate; G2-Second gate; S-Source; D-Drain; Q1-Gate region; Q11-First gate region; Q12-Second gate region; Q13-Third gate region; Q2-Source region; Q3-Drain region. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of this application clearer, the application will now be described in further detail with reference to the accompanying drawings.

[0051] It should be noted that the same reference numerals in the accompanying drawings of this application denote the same or similar structures, and therefore repeated descriptions of them will be omitted. Terms expressing position and direction described in this application are illustrative based on the accompanying drawings, but may be modified as needed, and all such modifications are included within the scope of protection of this application. The accompanying drawings of this application are for illustrating relative positional relationships only and do not represent actual scale.

[0052] This application provides a semiconductor device and a method for fabricating the same. This method can be used to fabricate various types of semiconductor devices, such as high electron mobility transistors, metal-oxide-semiconductor field-effect transistors (MOSFETs), etc. In practical applications, the fabrication method provided in this application can also be used to fabricate other types of semiconductor devices, which will not be listed here.

[0053] Figure 1 This is a schematic flowchart illustrating the method for fabricating a semiconductor device provided in an embodiment of this application, as shown below. Figure 1 As shown, the method for fabricating a semiconductor device provided in this application embodiment may include:

[0054] S101. Place the substrate into the reaction chamber of the epitaxial equipment;

[0055] S102. In the reaction chamber, a patterned first epitaxial layer is formed on the surface of the substrate using a first epitaxial growth process; wherein, during the first epitaxial growth process, a laser is used to irradiate a set area on the surface of the substrate to form the first epitaxial layer in the area outside the set area.

[0056] In the fabrication method provided in this application embodiment, during the first epitaxial growth process, a laser is used to irradiate a designated area on the substrate surface. The laser can interfere with the epitaxial growth interface within the designated area, suppressing the epitaxial growth process within the designated area. Thus, the first epitaxial layer will not form within the designated area on the substrate, allowing it to form outside the designated area. Consequently, a patterned first epitaxial layer can be formed within the reaction chamber of the epitaxial equipment. There is no need to remove the substrate from the reaction chamber of the epitaxial equipment and then use other equipment for processes such as resist coating, photolithography, film deposition, etching, and resist removal to pattern the epitaxial layer. Therefore, the fabrication method in this application embodiment can reduce the number of equipment changes, simplify process steps, and thereby increase the yield of semiconductor devices. Furthermore, it reduces the risk of contamination introduced by frequent equipment changes and avoids damage to the first epitaxial layer caused by patterning processes such as etching, resulting in semiconductor devices with higher process stability.

[0057] It should be noted that during the first epitaxial growth process described above, the surface of the substrate irradiated by the laser may or may not have other film layers, or the surface of the substrate irradiated by the laser may have other film layers, which is not limited here.

[0058] Figure 2 This is a schematic diagram of the epitaxial growth process in related technologies, such as... Figure 2 As shown, in related technologies, when fabricating an epitaxial layer, the substrate 20 needs to be placed in the reaction chamber of the epitaxial equipment. During the epitaxial growth process, the products resulting from the reaction between reactant A and reactant B are deposited layer by layer onto the surface of the substrate 20. The remaining gaseous products C are discharged with the carrier gas, thereby forming a full-surface epitaxial layer 21 on the surface of the substrate 20. Afterward, the substrate 20 needs to be removed from the reaction chamber of the epitaxial equipment and patterned in other equipment. It is evident that the process for obtaining a patterned epitaxial layer in related technologies is relatively complex.

[0059] Figure 3 This is a schematic diagram of the first epitaxial growth process in an embodiment of this application, as shown below. Figure 3As shown in this embodiment, during the first epitaxial growth process, a laser is used to irradiate a designated area on the surface of the substrate 20. The laser can interfere with the epitaxial growth interface within the designated area. Furthermore, due to the high energy of the laser, it can increase the molecular forces of the compound, hindering the deposition process and thus suppressing the epitaxial growth process within the designated area. Consequently, a patterned first epitaxial layer 22 can be formed on the surface of the substrate 20. This eliminates the need to remove the substrate 20 from the reaction chamber of the epitaxial equipment and then use other equipment for patterning, reducing the number of equipment changes and simplifying the process steps.

[0060] In the embodiments of this application, the epitaxial device can be a metal-organic chemical vapor deposition (MOCVD) device, or the epitaxial device can be a molecular beam epitaxy (MBE) device, etc.

[0061] In specific implementation, during step S102 above, a laser with a wavelength in the range of 200nm to 360nm can be used to irradiate a designated area on the substrate surface during the first epitaxial growth process. This laser band can cover the characteristic absorption wavelengths of most compounds, for example, it can cover the characteristic absorption wavelengths of aluminum nitride (AlN) and gallium nitride (GaN), thus giving the laser high energy so that it can interfere with the epitaxial growth process of the compound. In actual process, the laser power can be adjusted according to the nucleation layer conditions of the first epitaxial layer material so that the laser can effectively suppress the epitaxial growth process.

[0062] In step S102 above, by irradiating a designated area on the substrate surface with a laser, a first epitaxial layer can be formed in areas outside the designated area, thereby obtaining a patterned first epitaxial layer, i.e., a first epitaxial layer with a three-dimensional epitaxial structure. In specific implementation, the pattern of the designated area can be set according to the desired pattern of the first epitaxial layer to be formed, with the designated area corresponding to the area where the first epitaxial layer does not need to be formed. In the actual process, a mask can be used to ensure that the laser only irradiates the designated area on the substrate surface. Specifically, the mask can include a light-transmitting area and a light-blocking area. The light-transmitting area in the mask can be set to have the same shape and size as the designated area. In this way, by controlling the laser to irradiate the mask, the laser can pass through the light-transmitting area in the mask and be directed to the surface of the substrate, thereby achieving laser irradiation of the designated area on the substrate surface. Furthermore, during the first epitaxial growth process, different patterns of the first epitaxial layer can be formed by changing the mask.

[0063] Furthermore, the manufacturing method provided in this application embodiment may further include, after step S101 and before or after step S102:

[0064] Within the reaction chamber, a second epitaxial layer is formed on the surface of the substrate using a second epitaxial growth process; however, during this second epitaxial growth process, the substrate surface is not irradiated with a laser. In other words, the second epitaxial growth process allows for the formation of a full-surface second epitaxial layer on the substrate surface. In practical implementation, the order of the first and second epitaxial growth processes can be determined based on the specific structure of the semiconductor device; no specific order is specified here.

[0065] To more clearly illustrate the fabrication method in the embodiments of this application, the fabrication method will be described in detail below with reference to the accompanying drawings, taking a high electron mobility transistor as an example.

[0066] Figure 4 This is a schematic diagram of the high electron mobility transistor structure in an embodiment of this application, as shown below. Figure 4 As shown, a high electron mobility transistor may include: a substrate 20, a channel layer 201 located on the substrate 20, a barrier layer 202 located on the side of the channel layer 201 away from the substrate 20, a buffer layer 203 located on the side of the channel layer 201 close to the substrate 20, a first gate G1, a second gate G2, a source S, and a drain D, wherein the first gate G1 is embedded in the channel layer 201, the second gate G2 is located on the side of the barrier layer 202 away from the substrate 20, the orthogonal projections of the first gate G1 and the second gate G2 on the substrate 20 have an overlapping region, and the source S and the drain D are in contact with the barrier layer 202 respectively.

[0067] Continue to refer to Figure 4 The barrier layer 202 and the channel layer 201 can form a heterojunction, providing a channel for charge carriers. A high-density two-dimensional electron gas (2-DEG) exists within the channel layer 201 below the interface of the heterojunction formed by the barrier layer 202 and the channel layer 201, resulting in a high mobility of the high electron mobility transistor and improved electrical performance in terms of on-resistance and saturation current. In this embodiment, a dual-gate structure is formed by setting a first gate G1 and a second gate G2, and the first gate G1 is embedded inside the channel layer 201, which increases the gate control capability of the high electron mobility transistor. Under zero bias gate voltage, the two-dimensional electron gas in the channel layer 201 below the first gate G1 is depleted, causing the conductive channel to be pinched off, and the high electron mobility transistor is in the off state. When the voltage applied to the gate is greater than the threshold voltage, electrons accumulate in the channel layer 201 below the first gate G1, forming a continuous conductive channel between the source (S) and drain (D), and the high electron mobility transistor is in the on state.

[0068] Figure 5 This is a flowchart illustrating the fabrication method of a high electron mobility transistor in an embodiment of this application. Figures 6 to 10 This is a schematic diagram of the structure corresponding to each step in the fabrication method of a high electron mobility transistor, such as... Figure 5 As shown, the manufacturing method may include:

[0069] S301, reference Figure 6 A first channel layer 201a is formed on the surface of the substrate 20 using a second epitaxial growth process. That is, the first channel layer 201a can serve as the aforementioned second epitaxial layer. During the formation of the first channel layer 201a, no laser irradiation is used on the surface of the substrate 20, thereby forming a full-surface first channel layer 201a on the surface of the substrate 20. For example, gallium nitride (GaN) material can be used to fabricate the first channel layer 201a.

[0070] S302, reference Figure 7 A first epitaxial growth process is employed, using a laser (as shown by arrow T in the figure) to irradiate the area excluding the gate region Q1, thereby forming a first gate G1 within the gate region Q1 above the first channel layer 201a. In other words, the first gate G1 is used as the first epitaxial layer, and the area excluding the gate region Q1 is designated as the specified region. Irradiating the area excluding the gate region Q1 with laser T can interfere with the epitaxial growth process in the area outside the gate region Q1, thus allowing the first gate G1 to be formed only within the gate region Q1.

[0071] S303, reference Figure 8 A first epitaxial growth process is employed, using laser T to irradiate the gate region Q1, thereby forming a second channel layer 201b on the first channel layer 201a in the region excluding the gate region Q1. In other words, the second channel layer 201b serves as the first epitaxial layer, and the gate region Q1 is the designated region. Irradiating the gate region Q1 with laser T interferes with the epitaxial growth process within the gate region Q1, causing the second channel layer 201b to be formed in the region excluding the gate region Q1. In actual fabrication, the surface of the formed second channel layer 201b can be flush with the surface of the first gate G1, or it can extend beyond the surface of the first gate G1; no limitation is made here. The second channel layer 201b and the first channel layer 201a can constitute a channel layer 201, and during fabrication, the first channel layer 201a and the second channel layer 201b can be made using the same material.

[0072] In specific implementation, step S302 above may include:

[0073] The first gate is formed using GaN material doped with P-type impurities. The concentration of the P-type impurities is less than 1E19, meaning that the first gate is obtained by lightly doping the GaN material with P-type impurities. This allows the first gate to have a certain conductivity, enabling it to cooperate with the subsequently formed second gate and improve the gate control capability of the electron mobility transistor.

[0074] Before step S301 above, the following may also be included:

[0075] Reference Figure 6 A buffer layer 203 is formed on the surface of the substrate 20 using a second epitaxial growth process. That is, the buffer layer 203 can serve as the aforementioned second epitaxial layer. During the formation of the second epitaxial layer, the surface of the substrate 20 is not irradiated with a laser, thereby forming a full-layer buffer layer 203 on the surface of the substrate 20. Optionally, the buffer layer 203 can be made of materials such as AlN or AlGaN.

[0076] like Figure 9 As shown, the surface of substrate 20 may further include a source region Q2 and a drain region Q3. For example... Figure 5 As shown, the above manufacturing method may further include:

[0077] S304. Using a first epitaxial growth process, a laser T is used to irradiate the source region Q2 and the drain region Q3 to form a barrier layer 202 on the second channel layer 201b and the first gate G1, excluding the source region Q2 and the drain region Q3. That is, the barrier layer 202 can be used as the first epitaxial layer, and the source region Q2 and the drain region Q3 can be used as the defined regions. By irradiating the source region Q2 and the drain region Q3 with a laser T, the barrier layer 202 is formed in the region excluding the source region Q2 and the drain region Q3. Optionally, AlGaN material can be used to fabricate the barrier layer 202. The thickness of the barrier layer 202 can be in the range of 5nm to 30nm.

[0078] Continue as Figure 5 As shown, the above manufacturing method may further include:

[0079] S305. Using a first epitaxial growth process, a laser T is used to irradiate the area outside the gate region Q1 to form a second gate G2 within the gate region Q1 above the barrier layer 202. During the first epitaxial growth process, the second gate G2 can be used as the first epitaxial layer, and the area outside the gate region Q1 can be used as the designated area. Irradiating the area outside the gate region Q1 with a laser T allows the second gate G2 to be formed within the gate region Q1. Optionally, the thickness of the second gate G2 can be in the range of 30nm to 120nm.

[0080] In specific implementation, step S305 above may include:

[0081] The second gate is formed using GaN material doped with P-type impurities, with a concentration greater than 1E18. That is, the second gate is obtained by heavily doping GaN with P-type impurities. This gives the second gate better conductivity, allowing a gate voltage to be applied to it via signal lines during operation. Because of the good conductivity of the second gate, the high electron mobility transistor exhibits better gate control capability.

[0082] After undergoing multiple first epitaxial growth processes and multiple second epitaxial growth processes, it can be achieved that... Figure 10 The structure shown is taken from the reaction chamber of the epitaxial device and then used to form the source and drain in other devices to obtain, as shown in the figure. Figure 4 The high electron mobility transistor shown.

[0083] Furthermore, the fabrication method provided in this application embodiment can also fabricate other types of semiconductor devices, such as semiconductor devices with a metal-insulator-semiconductor structure (MIS). Figure 11 This is a schematic diagram of the structure of a semiconductor device with a metal-insulator-semiconductor structure in an embodiment of this application, such as... Figure 11 As shown, the above manufacturing method may include:

[0084] A second epitaxial growth process is used to form a channel layer 201 on the surface of the substrate 20. That is, the channel layer 201 can serve as the aforementioned second epitaxial layer. During the formation of the channel layer 201, no laser irradiation is used on the surface of the substrate 20, thereby forming a full-surface channel layer 201 on the surface of the substrate 20. For example, gallium nitride (GaN) material can be used to fabricate the channel layer 201. Before fabricating the channel layer 201, a buffer layer 203 may also be formed on the surface of the substrate 20 using the second epitaxial growth process.

[0085] A first epitaxial growth process is employed, in which a laser is used to irradiate the gate region T to form a barrier layer 202 on the channel layer 201, excluding the gate region Q1. In other words, the barrier layer 202 serves as the first epitaxial layer, the gate region Q1 is defined as the designated region, and the laser T is used to irradiate the gate region Q1, interfering with the epitaxial growth process within the gate region Q1, so that the barrier layer 202 is formed in the region outside the gate region Q1.

[0086] In summary, the fabrication method provided in this application can fabricate various types of semiconductor devices. The above description uses the fabrication of high electron mobility transistors and semiconductor devices with metal-insulator-semiconductor structures as examples. Other types of semiconductor devices can be fabricated by referring to the above implementation method, and will not be described in detail here.

[0087] Based on the same technical concept, this application also provides a semiconductor device. Figure 12 This is a schematic diagram of the structure of the semiconductor device provided in the embodiments of this application, such as... Figure 12 As shown, the semiconductor device may include: a substrate 20, a channel layer 201 located on the substrate 20, and at least one gate. Figure 12 Taking a semiconductor device as an example, it includes two gates: a first gate G1 and a second gate G2. In this example, at least one gate in the semiconductor device has a stepped side surface, for example... Figure 12 The side surface of the first gate G1 is stepped. In this embodiment, at least one gate has a stepped side surface, which can smooth out the spike electric field caused by edge effects and improve the gate control capability and reliability of the semiconductor device. Figure 12 In the example where the side of the first gate G1 includes three steps, in a specific implementation, the side of the gate may also include two, four or more steps, which is not limited here.

[0088] In one possible implementation, the aforementioned semiconductor device may have a dual-gate structure, continuing with... Figure 12 The aforementioned semiconductor device may further include: a barrier layer 202 located on the side of the channel layer 201 facing away from the substrate 20; the at least one gate may include: a first gate G1 located on the side of the barrier layer 202 close to the substrate 20, and a second gate G2 located on the side of the barrier layer 202 facing away from the substrate 20. The first gate G1 is embedded inside the channel layer 201. The orthogonal projections of the first gate G1 and the second gate G2 on the substrate 20 may have an overlapping region. In this embodiment, by setting the first gate G1 and the second gate G2, a dual-gate structure is formed, and the first gate G1 is embedded inside the channel layer 201, which can increase the gate control capability of the high electron mobility transistor. The aforementioned semiconductor device may further include: a buffer layer 203 located between the substrate 20 and the channel layer 201, a source S and a drain D, wherein the source S and the drain D are respectively in contact with the barrier layer 202.

[0089] Figure 13 This is another schematic diagram of the semiconductor device provided in the embodiments of this application, such as... Figure 12 and Figure 13 As shown, the side surface of the first gate G1 in this semiconductor device can be stepped. For example... Figure 12 As shown, in the direction from substrate 20 to channel layer 201 (i.e., from bottom to top in the figure), the cross-sectional area of ​​the first gate G1 gradually increases in the direction parallel to the surface of substrate 20; or, as... Figure 13 As shown, in the direction from the substrate 20 to the channel layer 201 (i.e., from bottom to top in the figure), the cross-sectional area of ​​the first gate G1 in the direction parallel to the surface of the substrate 20 gradually decreases.

[0090] Figure 14 This is another schematic diagram of the semiconductor device provided in the embodiments of this application, such as... Figure 14 As shown, the side of the second gate G2 in the semiconductor device can be stepped. In the direction from the substrate 20 to the channel layer 201, the cross-sectional area of ​​the second gate G2 in the direction parallel to the surface of the substrate 20 gradually decreases.

[0091] Figure 15 This is another schematic diagram of the semiconductor device provided in the embodiments of this application, such as... Figure 15 As shown, the sides of the first gate G1 and the second gate G2 in this semiconductor device can both be stepped. Figure 15 Taking the cross-sectional area of ​​the first gate G1 in the direction parallel to the surface of the substrate 20 as an example, which gradually decreases in the direction from the substrate 20 to the channel layer 201, in practical applications, Figure 15 The cross-sectional area of ​​the first gate G1 in the direction parallel to the surface of the substrate 20 can also be set to gradually increase in the direction of the substrate 20 pointing to the channel layer 201.

[0092] Figure 16 This is another schematic diagram of the semiconductor device provided in the embodiments of this application, such as... Figure 16 As shown, in another possible implementation, the semiconductor device may further include a barrier layer 202 located on the side of the channel layer 201 away from the substrate 20. The semiconductor device includes only a gate G located on the side of the barrier layer 202 away from the substrate 20. In the direction from the substrate 20 to the channel layer 201, the cross-sectional area of ​​the gate G in the direction parallel to the surface of the substrate 20 gradually decreases.

[0093] In practice, Figures 12 to 16 The semiconductor devices described above can be fabricated using any of the aforementioned methods. In these methods, during the first epitaxial growth process, laser interference is used to disrupt the epitaxial growth process within a designated area, ensuring that the first epitaxial layer is formed only in areas outside the designated region. This allows for the formation of a patterned first epitaxial layer within the reaction chamber of the epitaxial equipment, eliminating the need to remove the substrate from the reaction chamber and then use other equipment for patterning. This avoids contamination issues caused by frequent equipment changes and prevents damage to the first epitaxial layer during patterning by other equipment. Therefore, the semiconductor devices obtained using these methods exhibit higher process stability and better electrical performance. During fabrication, the gate, barrier layer, and other patterned layers can be used as the first epitaxial layer, thus allowing the patterns of these layers to be obtained through the first epitaxial growth process.

[0094] To more clearly illustrate the fabrication method of the semiconductor device in the embodiments of this application, the following will use... Figure 12 Taking the structure of the semiconductor device shown as an example, the fabrication method of the semiconductor device in the embodiments of this application will be described in detail. Figures 13 to 16 The fabrication method of the semiconductor device shown can be referred to Figure 12 The fabrication methods of the semiconductor devices shown are repeated hereafter. Figures 17 to 24 This is a schematic diagram of the structure corresponding to each step in the method for fabricating a semiconductor device in the embodiments of this application, combined with... Figure 6 ,and Figures 17 to 24 The manufacturing method may include:

[0095] Reference Figure 6 A buffer layer 203 and a first channel layer 201a are sequentially formed on the surface of the substrate 20 using a second epitaxial growth process. In other words, the buffer layer 203 and the first channel layer 201a can be used as the second epitaxial layer. During the formation of the buffer layer 203 and the first channel layer 201a, the surface of the substrate 20 is not irradiated with a laser, thereby forming a full-surface buffer layer 203 and the first channel layer 201a on the surface of the substrate 20.

[0096] Reference Figure 17 A first epitaxial growth process is employed, using a laser (as shown by arrow T in the figure) to irradiate the area excluding the first gate region Q11, thereby forming a first sub-gate G11 within the first gate region Q11 above the first channel layer 201a. In other words, the first sub-gate G11 is used as the first epitaxial layer, and the area excluding the first gate region Q11 is designated as the specified region. Irradiating the area excluding the first gate region Q11 with laser T interferes with the epitaxial growth process in the area outside the first gate region Q11, thus allowing the first sub-gate G11 to be formed only within the first gate region Q11.

[0097] Reference Figure 18 A first epitaxial growth process is employed, using laser T to irradiate the first gate region Q11, thereby forming a second channel layer 201b in the region above the first channel layer 201a, excluding the first gate region Q11. In other words, the second channel layer 201b can be used as the aforementioned first epitaxial layer, and the first gate region Q11 as the aforementioned designated region. Irradiating the first gate region Q11 with laser T can interfere with the epitaxial growth process within the first gate region Q11, causing the second channel layer 201b to be formed in the region excluding the first gate region Q11.

[0098] Reference Figure 19A first epitaxial growth process is employed, using laser T to irradiate the area excluding the second gate region Q12, thereby forming a second sub-gate G12 within the second gate region Q12 above the second channel layer 201b. In other words, the second sub-gate G12 is used as the aforementioned first epitaxial layer, and the area excluding the second gate region Q12 is designated as the aforementioned set region. Irradiating the area excluding the second gate region Q12 with laser T can interfere with the epitaxial growth process in the area outside the second gate region Q12, thus allowing the second sub-gate G12 to be formed only within the second gate region Q12.

[0099] Reference Figure 20 A first epitaxial growth process is employed, using laser T to irradiate the second gate region Q12, thereby forming a third channel layer 201c in the region above the second channel layer 201b, excluding the second gate region Q12. In other words, the third channel layer 201c can be used as the aforementioned first epitaxial layer, and the second gate region Q12 as the aforementioned designated region. Irradiating the second gate region Q12 with laser T can interfere with the epitaxial growth process within the second gate region Q12, causing the third channel layer 201c to be formed in the region excluding the second gate region Q12.

[0100] Reference Figure 21 A first epitaxial growth process is employed, using laser T to irradiate the area excluding the third gate region Q13, thereby forming a third sub-gate G13 within the third gate region Q13 above the third channel layer 201c. In other words, the third sub-gate G13 is used as the aforementioned first epitaxial layer, and the area excluding the third gate region Q13 is designated as the aforementioned set region. Irradiating the area excluding the third gate region Q13 with laser T can interfere with the epitaxial growth process in the area excluding the third gate region Q13, thus allowing the third sub-gate G13 to be formed only within the third gate region Q13.

[0101] Reference Figure 22 A first epitaxial growth process is employed, using laser T to irradiate the third gate region Q13, thereby forming a fourth channel layer 201d on the third channel layer 201c in the region excluding the third gate region Q13. In other words, the fourth channel layer 201d can be used as the aforementioned first epitaxial layer, and the third gate region Q13 as the aforementioned designated region. Irradiating the third gate region Q13 with laser T can interfere with the epitaxial growth process within the third gate region Q13, causing the fourth channel layer 201d to be formed in the region excluding the third gate region Q13. The first sub-gate G11, the second sub-gate G12, and the third sub-gate G13 can constitute the first gate, and the first channel layer 201a, the second channel layer 201b, the third channel layer 201c, and the fourth channel layer 201d can constitute the channel layer.

[0102] Reference Figure 23 A first epitaxial growth process is employed, using laser T to irradiate the source region Q2 and the drain region Q3, thereby forming a barrier layer 202 on the second channel layer 201b and the first gate G1, excluding the source region Q2 and the drain region Q3. That is, the barrier layer 202 can be used as the first epitaxial layer, and the source region Q2 and the drain region Q3 can be used as the defined regions. By irradiating the source region Q2 and the drain region Q3 with laser T, the barrier layer 202 is formed in the region excluding the source region Q2 and the drain region Q3.

[0103] Reference Figure 24 A first epitaxial growth process is employed, in which a laser T is used to irradiate the area outside the first gate region Q11 to form a second gate G2 within the first gate region Q11 above the barrier layer 202. During the first epitaxial growth process, the second gate G2 can be used as the aforementioned first epitaxial layer, and the area outside the first gate region Q11 can be used as the aforementioned designated area. Irradiating the area outside the first gate region Q11 with a laser T allows the second gate G2 to be formed within the first gate region Q11.

[0104] Then, source and drain electrodes can be formed in other devices to obtain Figure 12 The semiconductor device shown.

[0105] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0106] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this application without departing from the spirit and scope of the embodiments of this application. Therefore, if these modifications and variations to the embodiments of this application fall within the scope of the claims of this application and their equivalents, this application also intends to include these modifications and variations.

Claims

1. A semiconductor device, characterized in that, include: A substrate, a channel layer located on the substrate, and at least one gate; wherein the side of at least one gate in the semiconductor device is stepped; The gate material includes GaN doped with P-type impurities, and the characteristic absorption wavelength of the GaN is located within the laser band, which is 200nm~360nm. The gate is formed using an epitaxial growth process, during which the laser is used to interfere with the epitaxial growth and nucleation process of the GaN.

2. The semiconductor device as claimed in claim 1, characterized in that, Also includes: A barrier layer located on the side of the channel layer opposite to the substrate; The at least one gate includes: a first gate located on the side of the barrier layer close to the substrate, and a second gate located on the side of the barrier layer away from the substrate; The first gate is embedded inside the channel layer.

3. The semiconductor device as described in claim 2, characterized in that, The side of the first gate is stepped; In the direction from the substrate to the channel layer, the cross-sectional area of ​​the first gate gradually increases or decreases in the direction parallel to the surface of the substrate.

4. The semiconductor device as described in claim 2, characterized in that, The side of the second gate is stepped; In the direction from the substrate to the channel layer, the cross-sectional area of ​​the second gate gradually decreases in the direction parallel to the substrate surface.

5. The semiconductor device as claimed in claim 1, characterized in that, Also includes: A barrier layer located on the side of the channel layer opposite to the substrate; The semiconductor device includes only one gate located on the side of the barrier layer opposite to the substrate; In the direction from the substrate to the channel layer, the cross-sectional area of ​​the gate gradually decreases in the direction parallel to the surface of the substrate.

6. A method for fabricating a semiconductor device, characterized in that, include: Place the substrate into the reaction chamber of the epitaxial equipment; Within the reaction chamber, a patterned first epitaxial layer is formed on the surface of the substrate using a first epitaxial growth process; wherein, during the first epitaxial growth process, a laser is used to irradiate a designated area on the surface of the substrate to form the first epitaxial layer in areas outside the designated area: Within the reaction chamber, a channel layer and at least one gate are formed on the substrate; the side of at least one gate in the semiconductor device is stepped; the first epitaxial layer includes the gate, the material of the gate includes GaN doped with P-type impurities, the characteristic absorption wavelength of the GaN is located within the laser band, the laser band is 200nm~360nm; the gate is formed by an epitaxial growth process, and during the epitaxial growth process, the laser is used to interfere with the epitaxial growth nucleation process of the GaN.

7. The manufacturing method as described in claim 6, characterized in that, After the substrate is placed into the reaction chamber of the epitaxial apparatus, before or after forming a patterned first epitaxial layer on the surface of the substrate using a first epitaxial growth process within the reaction chamber, the process further includes: Within the reaction chamber, a second epitaxial layer is formed on the surface of the substrate using a second epitaxial growth process; wherein, during the second epitaxial growth process, the surface of the substrate is not irradiated with a laser.

8. The manufacturing method as described in claim 7, characterized in that, The semiconductor device is a high electron mobility transistor, and the surface of the substrate includes a gate region. The second epitaxial layer is the first channel layer; The second epitaxial layer is formed on the surface of the substrate using a second epitaxial growth process within the reaction chamber, including: A first trench layer is formed on the surface of the substrate using the second epitaxial growth process; The first epitaxial layer is a first gate layer or a second channel layer; the formation of a patterned first epitaxial layer on the surface of the substrate within the reaction chamber using a first epitaxial growth process includes: Using the first epitaxial growth process, a laser is used to irradiate the area other than the gate region to form a first gate in the gate region above the first channel layer; Using the first epitaxial growth process, the gate region is irradiated with a laser to form a second channel layer in the region other than the gate region above the first channel layer.

9. The manufacturing method as described in claim 8, characterized in that, The surface of the substrate further includes a source region and a drain region; The first epitaxial layer is a barrier layer or a second gate layer; the formation of a patterned first epitaxial layer on the surface of the substrate using a first epitaxial growth process within the reaction chamber includes: Using the first epitaxial growth process, the source region and the drain region are irradiated with a laser to form a barrier layer on the second channel layer and the first gate, excluding the source region and the drain region. Using the first epitaxial growth process, a laser is used to irradiate the area outside the gate region to form a second gate in the gate region above the barrier layer.

10. The manufacturing method as described in claim 7, characterized in that, The semiconductor device has a metal-insulator-semiconductor structure, and the surface of the substrate includes a gate region; The second epitaxial layer is a channel layer; The second epitaxial layer is formed on the surface of the substrate using a second epitaxial growth process within the reaction chamber, including: A channel layer is formed on the surface of the substrate using the second epitaxial growth process; The first epitaxial layer is a barrier layer; the formation of a patterned first epitaxial layer on the surface of the substrate using a first epitaxial growth process within the reaction chamber includes: Using the first epitaxial growth process, the gate region is irradiated with a laser to form a barrier layer in the area above the channel layer other than the gate region.

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