Distributed CNC power supply synchronous networking system

Abstract

This invention belongs to the field of power supply technology and relates to a distributed digital control power supply synchronization networking system, comprising several power supply modules; among these power supply modules is a master power supply module operating in master mode and several slave power supply modules operating in slave mode; the master power supply module and each slave power supply module are synchronously connected via a daisy-chain structure; the master power supply module generates a phase-shifted synchronization clock signal and sends it to the slave power supply modules. This invention utilizes a daisy-chain structure to synchronize multiple power supply modules. The controller is equipped with a phase shifter, and the slave power supply modules relay the received synchronization clock signal to the next slave power supply module in the daisy chain after phase shifting, thus enabling multiple power supply modules to output power. This increases current output while reducing output voltage ripple; the use of distributed digital control increases the flexibility of the power supply output network, maximizes the synchronization and networking capabilities between power supplies, improves the synchronization capability of switching signals between power supplies, and saves control costs.

Description

Technical Field

[0001] This invention relates to the field of power supply technology, and more specifically, to a distributed numerical control power supply synchronous networking system. Background Technology

[0002] To address the increasing power demand, besides using higher-power components, the upper limit of the current that the power supply can carry can be increased by paralleling power supplies. This method has the advantage of lower power requirements for components and improved power system efficiency through multi-phase interleaved output, while reducing power ripple at the output. However, using multi-phase interleaved output to parallel buck power supplies requires high timing accuracy. This method typically requires specific power supply chips to control the switching timing of different power channels, or pure digital control using an FPGA. The drawback is poor output flexibility when based on power supply chips, while FPGA-based methods require high-performance FPGAs. Chinese patent application number 2020227790442 discloses a numerically controlled BUCK circuit capable of closed-loop control of the output voltage. However, this solution suffers from low timing accuracy when using an MCU to control the power supply, and weak networking capability due to the inability to synchronize multiple power supplies in parallel for multi-phase interleaved output. Chinese patent application number 2022106045301 discloses a multi-power supply networking method. However, this distributed power supply does not have a synchronization link, and it cannot reduce output ripple through parallel connection. Moreover, the communication network becomes quite complex as the number of power supply channels increases. For example, in the above patent, 3 power supplies require 3 communication links, 4 power supplies require 6 links, and n power supplies require (n-1)*n / 2 links. Establishing a distributed communication network between the controllers of each distributed power supply is quite complex, and the synchronization capability between power supplies is poor. Summary of the Invention

[0003] To solve the above-mentioned technical problems, the present invention provides a distributed numerical control power supply synchronization networking system, including several power supply modules;

[0004] The plurality of power modules include a master power module operating in master mode and a plurality of slave power modules operating in slave mode; the master power module and each of the slave power modules are synchronously connected through a daisy chain structure, and the power modules are connected in parallel.

[0005] The main power module generates a phase-shifted synchronization clock signal and sends it to the slave power module;

[0006] Each of the power modules is equipped with a controller and a power conversion circuit; the output terminal of the controller is electrically connected to the input terminal of the power conversion circuit.

[0007] Each of the power modules' controllers is equipped with a phase shifter; the phase-shifting synchronization clock signals are connected between the controllers of each power module.

[0008] The beneficial effects of this invention are:

[0009] This invention utilizes a daisy-chain structure to synchronize multiple power modules, increasing current output while reducing output voltage ripple. Compared to traditional parallel power supply solutions, this invention uses a distributed digital control method, increasing the flexibility of the power output network, maximizing the synchronization and networking capabilities between multiple power supplies, reducing the complexity of multi-phase parallel power supplies, improving the synchronization capability of switching signals between multiple power supplies, greatly reducing the repetitive workload of power engineers when designing large-scale power supplies, and saving control costs.

[0010] When the power module is in master mode, it generates and outputs a synchronous clock signal through a square wave generator. The spontaneously generated synchronous clock is in phase with the PWM signal output by the master device. This synchronous clock can generate a phase-shifted synchronous clock output signal with a phase difference of up to 180° through a phase shifter. When the power module is in slave mode, the control of the power module and the reset of the timer will be synchronized to the rising edge of the phase-shifted synchronous clock it receives.

[0011] A single power module includes a controller and a power conversion circuit. Several power modules are connected in parallel, and the output current is the sum of the output currents of all power modules. Since its equivalent control frequency and equivalent feedback sampling rate are both greater than those of a single power module, its ripple characteristics and dynamic response speed are superior to those of a single power output. The controllers of each power module are connected with synchronous signals, which helps to reduce ripple on the output voltage.

[0012] Based on the above technical solution, the present invention can be further improved as follows.

[0013] Furthermore, the controller includes a feedback sampler, a PI controller, and a PWM generator;

[0014] The feedback sampler contains a clock generator; the feedback sampler is electrically connected to the input terminal of the PI controller; the output terminal of the PI controller is electrically connected to the PWM generator.

[0015] The PI controller generates a trigger signal for timing synchronization; when the power module is in master mode, the trigger signal generated by the PI controller serves as a reset signal; when the power module is in slave mode, an externally input phase-shifted synchronization clock signal serves as the reset signal.

[0016] The PWM generator of the main power module resets the timer according to the trigger signal; the PWM generator generates a cycle end signal and feeds it back to the PI controller.

[0017] Furthermore, the PI controller includes a feedback signal selector, a proportional-integral regulator, and an output limiter; the feedback signal selector is electrically connected to the output limiter through the proportional-integral regulator.

[0018] The feedback signal selector is used to calculate the output current error and output voltage error of the current cycle based on the collected current signal and voltage signal, and select the output mode of the next cycle as current source mode or voltage source mode based on the output current error and output voltage error of the current cycle.

[0019] The proportional-integral regulator is used to generate a proportional coefficient and an integral coefficient based on the output current error and the output voltage error, and to use the proportional coefficient and the integral coefficient to perform cycle-by-cycle proportional-integral regulation on the current signal and the voltage signal.

[0020] The output limiter is used to limit the pulse width of the output PWM signal.

[0021] Furthermore, the PWM generator includes a trigger selector, a timer, a target register, a phase register, a first comparator, a second comparator, a third comparator, a fourth comparator, and a clock-synchronized SR flip-flop;

[0022] The trigger selector receives a phase-shifted synchronization clock input signal and a trigger signal, and outputs the reset signal to the timer;

[0023] The target register is used to receive the PWM signal, compare the PWM signal with the output signal of the timer, and output the target PWM signal;

[0024] The output signal of the timer and the output signal of the phase register are compared by the second comparator and then input to the first input terminal of the SR flip-flop.

[0025] The output signal of the timer and the output signal of the phase register are input to the second input terminal of the SR flip-flop after passing through the third comparator;

[0026] The timer outputs the cycle end signal after the output signal reaches the third comparator.

[0027] The SR trigger outputs the phase-shifted synchronization clock signal.

[0028] Furthermore, the output terminals of each power module are electrically connected, and the phase-shifting synchronization clock signals of the controllers of each power module are connected, resulting in an equivalent power circuit in which multiple power modules are synchronously connected in parallel.

[0029] Furthermore, the output terminal of the power conversion circuit is also provided with a transformer; the output terminals of the power conversion circuits of several parallel power modules are connected to the first input terminal of the primary side of the transformer, and the output terminals of the power conversion circuits of several power modules are connected to the second input terminal of the primary side of the transformer; the controllers of each power module are connected through a communication bus; the power conversion circuit includes a BUCK circuit; each BUCK circuit forms an inverter circuit on the primary side of the transformer.

[0030] Furthermore, the BUCK circuit includes a switching transistor drive circuit, a switching transistor circuit, and an output filter circuit; the output terminal of the controller is electrically connected to the input terminal of the switching transistor circuit through the switching transistor drive circuit; the output terminal of the switching transistor circuit is electrically connected to the primary input terminal of the transformer through the output filter circuit.

[0031] Furthermore, the controller of each power module is connected to a host computer; each controller communicates with the host computer via a communication bus. Attached Figure Description

[0032] Figure 1 This is a system block diagram of a distributed numerical control power supply synchronization networking system provided in an embodiment of the present invention;

[0033] Figure 2 This is the schematic diagram of the controller;

[0034] Figure 3 This is a circuit diagram of a PWM generator connected to a phase shifter;

[0035] Figure 4 This is a circuit diagram showing the power modules being synchronously connected via a daisy-chain structure.

[0036] Figure 5 This is a timing diagram of the sub-power module control flow;

[0037] Figure 6 This is a schematic diagram of the structural principle of a PI controller;

[0038] Figure 7 This is the logic structure diagram of a PWM generator;

[0039] Figure 8 This is an equivalent power circuit diagram showing multiple power modules connected in a daisy-chain configuration for synchronization.

[0040] Figure 9This is a schematic diagram of a full-bridge inverter circuit with a two-phase interleaved output network of two power supply modules.

[0041] Figure 10 This is a schematic diagram of the simplified equivalent circuit of the power supply output network when the transformer T outputs a positive half-cycle waveform.

[0042] Figure 11 This is a schematic diagram of the simplified equivalent circuit of the power supply output network when the transformer T outputs the negative half-cycle waveform.

[0043] Figure 12 This is a schematic diagram of the voltage waveforms at the two input terminals of the primary winding of the transformer and the output voltage waveform of the secondary winding of the transformer.

[0044] Figure 13 It is a schematic diagram of a power module that includes a power conversion circuit;

[0045] Figure 14 This is a schematic diagram showing the power module connecting to the host computer via a communication bus.

[0046] Figure 15 This is a circuit diagram showing the connection between the power module and the voltage feedback circuit and the current feedback circuit.

[0047] Icons: R1 - First resistor; R2 - Second resistor; R3 - Third resistor; R4 - Fourth resistor; L - Inductor; C - Capacitor; Q1 - First switching transistor; Q2 - Second switching transistor; SW - Selector switch; V1 - First operational amplifier; V2 - Second operational amplifier; ADC1 - First analog-to-digital converter; ADC2 - Second analog-to-digital converter; T - Transformer. Detailed Implementation

[0048] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0049] As an example, to solve the above-mentioned technical problems, as shown in the appendix Figure 1 As shown, this embodiment provides a distributed CNC power supply synchronization networking system, including several power supply modules; the several power supply modules include a master power supply module working in master device mode and several slave power supply modules working in slave device mode; the master power supply module and each slave power supply module are synchronously connected through a daisy chain structure, and the power supply modules are connected in parallel;

[0050] The main power module generates a phase-shifted synchronization clock signal and sends it to the slave power module;

[0051] Each power module is equipped with a controller and a power conversion circuit; the output terminal of the controller is electrically connected to the input terminal of the power conversion circuit.

[0052] Each power module controller is equipped with a phase shifter; the phase shifting synchronization clock signals are connected between the controllers of each power module.

[0053] In practical applications, a daisy-chain structure is used to synchronize multiple power modules, which increases current output while reducing output voltage ripple. Compared with traditional parallel power supply solutions, this invention uses a distributed digital control method, which increases the flexibility of the power output network, maximizes the synchronization and networking capabilities between multiple power supplies, reduces the complexity of multi-phase parallel power supplies, improves power signal synchronization capabilities, greatly reduces the repetitive workload of power engineers when designing large-scale power supplies, and saves control costs.

[0054] When the power module is in master mode, it generates and outputs a synchronization clock signal via a square wave generator. The spontaneously generated synchronization clock is in phase with the PWM signal output by the master device. However, this synchronization clock can be used to generate a phase-shifted synchronization clock output signal with a phase difference of up to 180° through a phase shifter. When the power module is in slave mode, the control of the power module and the reset of the timer will be synchronized to the rising edge of the received phase-shifted synchronization clock.

[0055] In practical applications, a single power module includes a controller and a power conversion circuit. Several power modules are connected in parallel, and the output current is the sum of the output currents of all power modules. Because its equivalent control frequency and equivalent feedback sampling rate are both greater than those of a single power module, its ripple characteristics and dynamic response speed are superior to those of a single power output. The number of power modules is set according to actual needs. The controllers of each power module are connected with synchronization signals, which helps to reduce ripple on the output voltage.

[0056] Optional, as shown in the appendix Figure 2 As shown, the controller includes a feedback sampler, a PI controller, and a PWM generator;

[0057] The feedback sampler contains a clock generator; the feedback sampler is electrically connected to the input of the PI controller; the output of the PI controller is electrically connected to the PWM generator.

[0058] The PI controller generates a trigger signal for timing synchronization; when the power module is in master mode, the trigger signal generated by the PI controller serves as a reset signal; when the power module is in slave mode, the externally input phase-shifted synchronization clock signal serves as a reset signal.

[0059] The PWM generator of the main power module resets the timer according to the trigger signal; the PWM generator generates a cycle end signal and feeds it back to the PI controller.

[0060] In practical applications, the output voltage and current of the power module are fed back to the controller for cycle-by-cycle control, with the control frequency matching the switching frequency of the power module. The voltage and current feedback signals sampled by the ADC are received by a feedback sampler and relayed to the proportional-integral controller (PI controller). The clock signal of the feedback sampler is generated by an internal clock generator. This clock generator, triggered by a trigger signal generated by the PI controller, synchronizes the ADC's sampling signal to the start of the PI controller's control cycle.

[0061] In practical applications, the control signal output by the controller is converted into a PWM signal by the PWM generator and output to the power conversion circuit. This PWM signal can be synchronized to an external clock source via a phase-shifted synchronization clock input signal. In addition, the PWM generator can also output a phase-shifted synchronization clock output signal with the same switching frequency as the PWM generator through an internal phase shifter. By using the phase-shifted synchronization clock input signal and the phase-shifted synchronization clock output signal generated by the PWM generator, multiple power modules consisting of the controller and the power conversion circuit can be synchronized through a daisy-chain structure. Power module 1 operates in master mode, and power modules 2 through n operate in slave mode.

[0062] Multiple power modules are phase-shifted via phase shifters within the PWM generator, enabling multi-phase interleaved output from multiple power modules. (See attached diagram) Figure 4 Taking the case of three power modules synchronized by a daisy chain structure as an example, if the phase shifters of power module 1 and power module 2 are both set to 120°, and the power output terminals of the three power modules connected in parallel are connected, then the three power modules are equivalent to a single power supply with three-phase interleaved output.

[0063] Compared to the single power supply mode, the three sub-power supply modules are equivalent to a single-phase interleaved output power supply. In addition to having an output current that is three times that of a single sub-power supply module, the ripple characteristics and dynamic response speed of the single sub-power supply module are also superior because its equivalent control frequency is three times that of a single module.

[0064] The control of the power module output requires the collaboration of a feedback sampler, a PI controller, and a PWM generator. When the power module is in master mode, its timing is primarily controlled by the PWM cycle end (EOC) signal. The timing sequence of its control flow is shown in the attached figure. Figure 5 As shown.

[0065] During the first PWM cycle upon power-up, both the EOC signal and the trigger signal generated by the PI controller are low. Because the initial value of the internal timer in the PWM generator is zero, the PWM generator will not generate a PWM signal in the first cycle after power-up. At the end of the first PWM cycle, the EOC signal generated by the PWM generator jumps to a high level. This EOC signal is sent from the PWM generator to the PI controller. When the PI controller detects the rising edge of the EOC signal, it updates the PWM control signal and also pulls its generated trigger signal high. The rising edge of this trigger signal simultaneously resets the 9-bit timer and feedback clock generator within the PWM generator, thus entering the next PWM cycle. When the power supply is in slave mode, the trigger signal generated by the PI controller will be overridden by an externally input phase-shifted synchronization clock signal. The control flow timing diagram in slave mode is shown in the attached diagram. Figure 5 The timing process is the same, but because the trigger signal is replaced by an externally input phase-shifted synchronization clock, the timing flow is replaced by the phase-shifted synchronization clock signal. In this mode, the PWM generator must wait for the rising edge of the phase-shifted synchronization clock input signal to reset its internal timer before entering the next control cycle.

[0066] Optionally, the PI controller includes a feedback signal selector, a proportional-integral (PI) regulator, and an output limiter; the feedback signal selector is electrically connected to the output limiter via the PI regulator; a schematic diagram of the PI controller's structure is attached. Figure 6 As shown;

[0067] The feedback signal selector is used to calculate the output current error and output voltage error of the current cycle based on the acquired current signal and voltage signal, and select the output mode of the next cycle as either current source mode or voltage source mode based on the output current error and output voltage error of the current cycle.

[0068] A proportional-integral regulator is used to generate proportional and integral coefficients based on the output current error and output voltage error, and to use the proportional and integral coefficients to perform cycle-by-cycle proportional-integral regulation on the current and voltage signals.

[0069] Output limiter, used to limit the pulse width of the output PWM signal.

[0070] In practical applications, the feedback signal selector calculates the output error using the feedback signal and switches the output to current source mode when the output current reaches its upper limit, which can be set by the user. When the output current reaches its upper limit, the module's overcurrent protection signal (OCP) is triggered, and its feedback signal is changed to current feedback, thus changing the control target to the output current. The error signal processed by the feedback signal selector is then processed by the intermediate PI controller. The PI controller uses a pipelined structure to match the computation time of integral and proportional control to avoid control signal errors. The control signal calculated by the PI controller, through the output limiter at the output end, prevents control problems caused by data overflow and integral saturation.

[0071] This power controller can be programmed via a host computer to provide any voltage output up to the supply voltage. The controller's output voltage control begins with a feedback sampler measuring the power supply's output voltage and current via an external analog-to-digital converter. The feedback signal from these measurements is then controlled by a PI controller, which selects between voltage source and current source modes based on whether the output current reaches its upper limit. The PI controller and PWM generator work together to achieve cycle-by-cycle control of the power supply output. The PI controller's control cycle begins with the end-of-cycle (EOC) signal from the PWM generator. Upon receiving the EOC signal, the PI controller updates the control signal for the next control cycle and simultaneously generates a trigger signal. This trigger signal commands the feedback sampler to sample the power supply output and resets the timer in the PWM generator to begin the next control cycle.

[0072] In addition to the PWM control signal, the PI controller also generates a trigger signal for timing synchronization at the end of the control cycle. This trigger signal is used to trigger the analog-to-digital converter to sample the feedback signal and reset the timer inside the PWM generator when the power supply is in master mode.

[0073] In cycle-by-cycle control mode, the 9-bit timer inside the PWM generator will not automatically reset. Therefore, an external signal is needed to reset the timer at the end of the timing cycle in order to generate a continuous PWM signal. When the sub-power module is the master device, the timer is reset by a trigger signal generated by the PI controller. If the sub-power module is operating in slave mode, the timer is reset by a phase-shifted synchronization clock input signal received from outside the sub-power module.

[0074] The PWM signal generated by this PWM generator is compared with the timing output of an internal target register and a 9-bit timer via a first comparator. The duty cycle of the PWM signal can be controlled by changing the target register. This target register is controlled by a control signal generated by a PI controller in the power supply's control logic.

[0075] In addition to generating PWM signals, this PWM generator can also simultaneously output a phase-shifted synchronization clock signal of the same frequency, with a fixed duty cycle of 50%. The phase difference between the clock signal and the PWM signal can be controlled by a phase register. By using the phase-shifted synchronization clock input signal of the PWM generator and the phase-shifted synchronization clock output signal generated by it, multiple power modules can be synchronized through a daisy-chain structure.

[0076] Optionally, the PWM generator includes a trigger selector, a timer, a target register, a phase register, a first comparator, a second comparator, a third comparator, a fourth comparator, and a clock-synchronized SR flip-flop;

[0077] The trigger selector receives the phase-shift synchronization clock input signal and the trigger signal, and outputs a reset signal to the timer;

[0078] The target register is used to receive the PWM signal, compare the PWM signal with the timer's output signal, and output the target PWM signal.

[0079] The output signal of the timer and the output signal of the phase register are compared by the second comparator and then input to the first input terminal of the SR flip-flop.

[0080] The output signal of the timer and the output signal of the phase register are input to the second input terminal of the SR flip-flop after passing through the third comparator;

[0081] The timer outputs a cycle end signal after the output signal reaches the third comparator.

[0082] The SR flip-flop outputs a phase-shifted synchronous clock signal.

[0083] In practical applications, a PWM generator consists of a PWM generation circuit and a clock synchronization circuit. The logic structure diagram of the PWM generator is shown in the attached figure. Figure 7As shown, the two circuits share the same timer, which can be reset by a trigger signal from the PI controller or an externally input phase-shifted synchronization clock signal. The PWM generator circuit generates PWM signals with different duty cycles by comparing the outputs of the target register and the timer. The target register is controlled by a control signal generated by the PI controller. The clock synchronization circuit includes an input clock synchronization section and an output clock synchronization section. The input clock synchronization section includes a timer reset signal selector, which selects the timer reset signal by recognizing the master / slave mode of the device. When the power module is in master mode, the selector selects the trigger signal generated by the PI controller as the reset signal; when the power module is in slave mode, the selector selects the externally input phase-shifted synchronization clock signal as the reset signal. The output clock synchronization section of the PWM generator consists of a phase shifter, an SR latch, and a timer shared with the PWM generator circuit. The phase shifter is controlled by a phase register. When the outputs of the phase register and the timer are equal, the set pin of the SR latch jumps to a high level, thereby pulling the phase-shifting synchronization clock output signal high. When the sum of the half-values ​​of the phase register and the timer equals the output of the timer, the reset pin of the SR latch jumps to a high level, thereby pulling the phase-shifting synchronization clock output signal low.

[0084] Optional, as shown in the appendix Figure 8 As shown, the output terminals of each power module are electrically connected, and the controller phase-shifting synchronization clock signals of each power module are connected, resulting in an equivalent power circuit in which multiple power modules are connected in parallel synchronously.

[0085] In practical applications, compared to the single power supply mode, the single power supply with multiple power modules equivalent to multi-phase interleaved output not only has an output current that can be many times that of a single sub-power supply module, but also has better ripple characteristics and dynamic response speed than a single sub-power supply module because its equivalent control frequency is many times that of a single module.

[0086] Optionally, the output terminal of the power conversion circuit is also equipped with a transformer; the output terminals of the power conversion circuits of several parallel power modules are connected to the first input terminal of the primary side of the transformer, and the output terminals of the power conversion circuits of several power modules are connected to the second input terminal of the primary side of the transformer; the controllers of each power module are connected through a communication bus; the power conversion circuit includes a BUCK circuit; each BUCK circuit forms an inverter circuit on the primary side of the transformer.

[0087] In practical applications, the output terminals of each power conversion circuit are also connected to a transformer T; the output terminals of each power conversion circuit are electrically connected to the input terminals of the transformer T; a controller and a BUCK circuit form a power module; a power module is set at the first input terminal and the second input terminal of the primary side of the transformer T; multiple power modules 1 are electrically connected to the first input terminal of the primary side of the transformer T, and multiple power modules are electrically connected to the second input terminal of the primary side of the transformer T. The power modules form a full-bridge inverter circuit on the primary side of the transformer T.

[0088] Optionally, the number of power modules at the first input terminal of the primary side of the transformer and the number of power modules at the second input terminal of the primary side of the transformer can be the same or different.

[0089] In practical applications, since the BUCK circuit consists of high-side and low-side MOSFETs, when the power supply outputs 0V, its output can be directly short-circuited to ground. In this state, the power supply can absorb current from the output terminal. If one set of power modules outputs current and another set absorbs current, the two sets of power modules can form a full-bridge circuit. This full-bridge mode can be widely used in scenarios requiring bidirectional current drive, such as transformer drives and motor drives. Taking a transformer drive circuit as an example, multiple sets of power modules and a transformer T form a full-bridge inverter circuit, and their circuit connections are as follows. This full-bridge inverter network increases the output power of the power system by combining a multi-phase interleaved output network. Taking the case of two power modules with a two-phase interleaved output network as an example, as shown in the attached diagram... Figure 9 The connection method shown allows four power modules and transformer T to form a full-bridge inverter circuit, which can double the maximum output current of the full-bridge inverter network.

[0090] This circuit can be used to simulate mains voltage output. Multiple power modules form a parallel power network 1, and multiple power modules form a parallel power network 2. Specifically, the host computer controls the two power modules to alternately output a half-cycle sine wave. When transformer T outputs a positive half-cycle sine wave, parallel power network 1 generates a half-cycle sine wave at the first input terminal of transformer T. Parallel power network 2 grounds the second input terminal of transformer T through its low-side MOSFET. The simplified equivalent circuit is shown in the attached figure. Figure 10 As shown.

[0091] When transformer T outputs a negative half-cycle waveform, a half-cycle sine wave is generated at the second input terminal of transformer T by parallel power supply network 2, while parallel power supply network 1 grounds the first input terminal of transformer T. The simplified equivalent circuit of this output network when transformer T outputs a negative half-cycle waveform is shown in the attached figure. Figure 11 As shown in the figure, the first input terminal of the primary side of transformer T is A, the second input terminal of the primary side of transformer T is B, and the output current of transformer is I.out The transformer output voltage is V out .

[0092] The waveforms of the voltages at the two input terminals of the primary winding of transformer T and the output voltage of the secondary winding in this inverter network are shown in the attached diagram. Figure 12 As shown in the figure, the horizontal axis represents time t, and the vertical axis represents the output voltage V of transformer T. out The voltage V at the first input terminal of the primary side of transformer T A and the voltage V at the second input terminal of the primary side of transformer T B .

[0093] Optionally, the BUCK circuit includes a switching transistor drive circuit, a switching transistor circuit, and an output filter circuit; the output terminal of the controller is electrically connected to the input terminal of the switching transistor circuit through the switching transistor drive circuit; the output terminal of the switching transistor circuit is electrically connected to the primary input terminal of the transformer through the output filter circuit.

[0094] The controller's output is electrically connected to the input of the switching transistor circuit via a switching transistor driver circuit; see attached. Figure 13 As shown, the output terminal of the output filter circuit is connected to a current feedback circuit and a voltage feedback circuit; the output terminal of the switching transistor circuit is electrically connected to the input terminal of the current feedback circuit and the input terminal of the voltage feedback circuit; optionally, the switching transistor drive circuit uses a switching transistor driver, such as a full-bridge / half-bridge switching transistor driver.

[0095] Optional, as shown in the appendix Figure 9 As shown, the switching transistor circuit includes a first switching transistor Q1 and a second switching transistor Q2; the first output terminal of the switching transistor driving circuit is connected to the gate electrical signal of the first switching transistor Q1; the second output terminal of the switching transistor driving circuit is connected to the gate electrical signal of the second switching transistor Q2; the drain of the first switching transistor Q1 is used for voltage signal input; the source of the first switching transistor Q1 is connected to the output terminal of the switching transistor circuit and the drain of the second switching transistor Q2; the source of the second switching transistor Q2 is grounded.

[0096] Optionally, the output filter circuit includes an inductor L and a capacitor C; the output terminal of the switching transistor circuit is electrically connected to the first terminal of inductor L; the second terminal of inductor L is electrically connected to the first terminal of capacitor C, the input terminal of the current feedback circuit, and the input terminal of the voltage feedback circuit; the second terminal of capacitor C is grounded. In practical applications, inductor L and capacitor C form a low-pass filter. The PWM signal output by the controller is amplified by the power conversion circuit, filtered by the low-pass filter, converted into a DC voltage, and then output to external devices.

[0097] Optionally, the controller of each power module is connected to a host computer; each controller communicates with the host computer via a communication bus.

[0098] In practical applications, multiple sub-power modules can be configured simultaneously via a communication bus. The communication bus can be SPI, IIC, or any other one-to-many communication protocol. Taking the case where each power module is individually controlled via the SPI protocol as an example, the circuit connection of the communication bus is shown in the attached figure. Figure 14 As shown, this connection method allows for the unlimited addition of sub-power modules to the communication bus. The ports of each sub-power module are connected to the serial clock input SCLK, data input MOSI, chip select CS, and data output MISO of the host computer, respectively.

[0099] The output network of this CNC DC step-down power supply is highly flexible. Because its output current and output voltage are controllable, it can be used as a low-frequency waveform generator. Its applications include, but are not limited to, generating high-power arbitrary waveforms required for experiments, such as triangular waves, square waves, sine waves, etc., or simulating power supplies with variable power, such as simulating battery discharge and simulating the output model of solar panels when the weather changes.

[0100] Optional, as shown in the appendix Figure 15 As shown, the current feedback circuit includes a Hall sensor, a first operational amplifier V1, and a first analog-to-digital converter ADC1; the input terminal of the Hall sensor is electrically connected to the output terminal of the power conversion circuit; the output terminal of the Hall sensor is electrically connected to the input terminal of the first analog-to-digital converter ADC1 through the first operational amplifier V1; and the output terminal of the first analog-to-digital converter ADC1 is electrically connected to the input terminal of the controller.

[0101] Optional, as shown in the appendix Figure 15 As shown, the voltage signal acquisition circuit includes a voltage sampling circuit, a second operational amplifier V2, and a second analog-to-digital converter ADC2. The voltage sampling circuit includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is electrically connected to the output terminal of the power conversion circuit. The second end of the first resistor R1 is electrically connected to the first end of the second resistor R2 and the input terminal of the second operational amplifier V2. The second end of the second resistor R2 is grounded. The output terminal of the second operational amplifier V2 is electrically connected to the input terminal of the controller through the second analog-to-digital converter ADC2.

[0102] This invention increases the flexibility of the power output network by using a distributed power source synchronization control method, while maximizing the synchronization and networking capabilities among multiple power sources. Regarding output flexibility, since both the output current and output voltage can be controlled by software, it can also be used as a low-frequency waveform generator. Its applications include, but are not limited to, generating high-power arbitrary waveforms required for experiments, such as triangular waves, square waves, and sine waves, or simulating power sources with variable power, such as simulating battery discharge and the output model of solar panels under changing weather conditions. In terms of power source synchronization and networking, the controller can achieve different functions based on various output networks. In the case of multiple power sources connected in parallel, this invention uses a daisy-chain structure to synchronize multiple modules, increasing the upper limit of current output while reducing ripple in the output voltage.

[0103] In terms of power synchronization and networking, the controller can achieve different functions based on various output networks. When multiple power supplies are connected in parallel, a daisy-chain structure is used to synchronize multiple modules, increasing the upper limit of current output while reducing output voltage ripple. Compared to traditional parallel power supply solutions, this invention uses a distributed digital control method, increasing the flexibility of the power output network, maximizing the synchronization and networking capabilities between multiple power supplies, reducing the control cost of multi-phase parallel power supplies, and significantly reducing the repetitive workload for power engineers designing large-scale power supplies through modular individual sub-power supply module channels. By controlling the power supplies or power networks at both ends of the load to generate half-cycle voltage waveforms in turn, multiple modules can also be combined into a full-bridge circuit for generating bidirectional current. This full-bridge network can be used to generate AC output of arbitrary voltage through a transformer, thus applicable to various scenarios requiring low-frequency inversion, such as photovoltaic inverters and DC-to-AC stages of uninterruptible power supplies. This full-bridge network can also be used to drive motors, electromagnetic coils, and other electromagnetic devices to provide a bidirectional electromagnetic field.

[0104] This controller is applicable to any switching DC power supply structure capable of outputting 0V, such as a two-switch BUCK structure and a four-switch BUCK-BOOST structure. Taking the two-switch BUCK structure as an example, this power supply network includes several independent DC buck power supply modules using the aforementioned power controller, and a host computer connected to each power supply via a bus. Multiple power supply modules are connected in parallel to form an interleaved output power supply. By using a daisy-chain connection between the phase-shifting synchronization clock input and phase-shifting synchronization clock output of multiple modules, the power controller synchronizes the switching timing of multiple parallel power supplies. By using the phase shifter within the PWM generator of the power controller, multi-phase interleaved output of multiple power supply modules can be achieved; furthermore, by switching between constant current / constant voltage modes, the power network composed of multiple modules can achieve output network current limiting. The output voltage and current limits of each module can be controlled by the host computer. By programming different modules through the host computer, multiple modules can be combined into a full-bridge network to generate bidirectional current. Specifically, two power modules, or two identical parallel output networks composed of multiple power modules, are connected to the two ends of the load. The host computer commands the power supply or power network at both ends of the load to generate half-cycle voltage waveforms in turn. When a voltage waveform is generated on one side of the load, the power network on the other side of the load absorbs current from the high-voltage side by outputting 0V voltage. By making the power networks on both sides of the load generate half-cycle voltage waveforms in turn, forward and reverse load currents can be generated on the load in turn.

[0105] Compared to traditional parallel power supply solutions, this invention utilizes a distributed digital control method, increasing the flexibility of the power output network while maximizing the synchronization and networking capabilities among multiple power supplies. This reduces the control cost of multi-phase parallel power supplies and significantly reduces the repetitive workload for power engineers designing large-scale power supplies by modularizing individual power channels. When using a two-switch BUCK or four-switch BUCK-BOOST structure, the method of alternately generating half-cycle voltage waveforms at both ends of the load allows multiple modules to be combined into a full-bridge circuit for generating bidirectional current. This full-bridge network can be used to generate AC output of arbitrary voltage through a transformer, thus applicable to various scenarios requiring low-frequency inversion, such as photovoltaic inverters and DC-to-AC stages in uninterruptible power supplies. The full-bridge network can also be used to drive motors, electromagnetic coils, and other electromagnetic devices to provide a bidirectional electromagnetic field.

[0106] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A distributed numerical control power supply synchronous networking system, characterized in that, It includes several power modules; among the several power modules, there is a master power module operating in master mode and several slave power modules operating in slave mode; the master power module and each of the slave power modules are synchronously connected through a daisy chain structure, and the power modules are connected in parallel. The main power module generates a phase-shifted synchronization clock signal and sends it to the slave power module; Each of the power modules is equipped with a controller and a power conversion circuit; the output terminal of the controller is electrically connected to the input terminal of the power conversion circuit. Each of the power modules' controllers is equipped with a phase shifter; the phase-shifting synchronization clock signals are connected between the controllers of each power module. The controller includes a feedback sampler, a PI controller, and a PWM generator; the feedback sampler contains a clock generator; the feedback sampler is electrically connected to the input terminal of the PI controller; the output terminal of the PI controller is electrically connected to the PWM generator; the output terminal of the PWM generator is electrically connected to the phase shifter; the PI controller generates a trigger signal for timing synchronization. When the power module is in master device mode, the trigger signal generated by the PI controller serves as a reset signal. When the power module is in slave mode, the externally input phase-shifted synchronization clock signal serves as the reset signal; the PWM generator of the main power module resets the timer according to the trigger signal; the PWM generator generates a cycle end signal and feeds it back to the PI controller; The PI controller includes a feedback signal selector, a proportional-integral (PI) regulator, and an output limiter. The feedback signal selector is electrically connected to the output limiter via the PI regulator. The feedback signal selector is used to calculate the output current error and output voltage error for the current cycle based on the acquired current and voltage signals, and select the output mode for the next cycle as either current source mode or voltage source mode based on the current and voltage errors for the current cycle. The PI regulator is used to generate proportional and integral coefficients based on the output current and voltage errors, and use the proportional and integral coefficients to perform cycle-by-cycle proportional-integral adjustment on the current and voltage signals. The output limiter is used to limit the pulse width of the output PWM signal. The PWM generator includes a trigger selector, a timer, a target register, a phase register, a first comparator, a second comparator, a third comparator, a fourth comparator, and a clock-synchronized SR flip-flop. The trigger selector receives a phase-shifted synchronous clock input signal and a trigger signal, and outputs the reset signal to the timer. The target register receives the PWM signal and compares it with the output signal of the timer, outputting a target PWM signal. The output signal of the timer and the output signal of the phase register are compared by the second comparator and then input to the first input terminal of the SR flip-flop. The output signal of the timer and the output signal of the phase register are compared by the third comparator and then input to the second input terminal of the SR flip-flop. The output signal of the timer reaches the third comparator and outputs the cycle end signal. The SR flip-flop outputs the phase-shifted synchronous clock signal.

2. The distributed numerical control power supply synchronization networking system according to claim 1, characterized in that, The output terminals of each power module are electrically connected, and the phase-shifting synchronization clock signals of the controllers of each power module are connected, resulting in an equivalent power circuit in which multiple power modules are synchronously connected in parallel.

3. The distributed numerical control power supply synchronization networking system according to claim 1, characterized in that, The output terminal of the power conversion circuit is also provided with a transformer; the output terminals of the power conversion circuits of several parallel power modules are connected to the first input terminal of the primary side of the transformer, and the output terminals of the power conversion circuits of several power modules are connected to the second input terminal of the primary side of the transformer; the controllers of each power module are connected through a communication bus; the power conversion circuit includes a BUCK circuit; each BUCK circuit forms an inverter circuit on the primary side of the transformer.

4. The distributed numerical control power supply synchronization networking system according to claim 3, characterized in that, The BUCK circuit includes a switching transistor drive circuit, a switching transistor circuit, and an output filter circuit; the output terminal of the controller is electrically connected to the input terminal of the switching transistor circuit through the switching transistor drive circuit; the output terminal of the switching transistor circuit is electrically connected to the primary input terminal of the transformer through the output filter circuit.

5. The distributed numerical control power supply synchronization networking system according to any one of claims 1-4, characterized in that, Each of the power modules has a controller connected to a host computer; each controller communicates with the host computer via a communication bus.

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