A dual-channel square wave synchronous circuit based on an isolation transformer

Abstract

The application discloses a kind of double-way square wave synchronous circuits based on isolation transformer, the circuit includes: waveform generating unit, differential signal sending unit, direct-current isolation capacitor, sending transformer, receiving transformer, filter unit, differential receiving signal unit, waveform monitoring unit and logic conversion unit;The circuit structure is simple and reasonable, has the advantages of easy to expand, low cost and anti-interference, the circuit uses the logic operation of double-way square wave signal flexibly, can generate the synchronous drive signal required by multiple topologies, the pulse width of signal generated is large, easy to filter, not easy to distort.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion technology, and in particular to a dual-channel square wave synchronous circuit based on an isolation transformer. Background Technology

[0002] In the field of power electronic conversion, greater output power is achieved by connecting power units in parallel. The problem to be solved in the parallel connection process is the current sharing problem between modules. Since the consistency of the drive signal has a great impact on current sharing, an additional current sharing control circuit needs to be introduced to ensure current sharing between modules.

[0003] In parallel connections of non-isolated power units, even with a current sharing control circuit, only the current sharing of the controlled branch can be guaranteed; current imbalance during current return cannot be controlled. Therefore, in parallel designs of non-isolated circuit topologies, independent current sharing control circuits for each power unit are typically not added; instead, current sharing is achieved automatically based on their impedance characteristics. With uniform power units, impedance consistency is good. In this case, the driving signal has the greatest impact on current sharing. Because the internal resistance of the parallel branches of the power units is very small, even a slight difference in the duty cycle of the driving signal can generate very severe current imbalance. Therefore, it is necessary to strictly ensure the consistency of the driving signal.

[0004] Currently, there are several methods for synchronizing signals: First, using non-isolated electrical signals, which is the fastest and has the least delay, but there is significant common-mode interference between power units, affecting reliability; Second, using high-speed fiber optic synchronization, which has the best anti-interference performance and the highest isolation voltage, and is widely used, but the application cost is high, it can only be connected one-to-one, and its scalability is poor, making it suitable for large-scale equipment; Third, using digital isolation chips to isolate electrical signals, which is fast, but because the isolator requires power supply on both sides, the signal is weak and the anti-interference performance is average, for example, narrow pulse reception is easily interfered with.

[0005] Therefore, there is an urgent need in this field for a synchronization circuit that is easy to expand, low in cost, and resistant to interference to synchronize signals. Summary of the Invention

[0006] In view of the above-mentioned technical problems, the present invention provides a dual-channel square wave synchronization circuit based on an isolation transformer. The circuit has a simple and reasonable structure and has the advantages of easy expansion, low cost and anti-interference. The circuit utilizes the flexible logic operation of dual-channel square wave signals to generate synchronization drive signals required by various topologies. The generated signal has a large pulse width, is easy to filter and is not easily distorted.

[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0008] This invention provides a dual-channel square wave synchronization circuit based on an isolation transformer. The circuit includes a transmitting unit and a receiving unit, wherein the transmitting unit is connected to the receiving unit, and:

[0009] The transmitting unit includes: a waveform generating unit, an A-channel differential signal transmitting unit, a B-channel differential signal transmitting unit, an A-channel transmitting transformer, and a B-channel transmitting transformer, wherein:

[0010] The waveform generation unit is used to output one square wave signal A and one square wave signal B; on the path of square wave signal A, the square wave signal A output terminal of the waveform generation unit, the A-path differential signal transmission unit and the A-path transmission transformer are connected in sequence; on the path of square wave signal B, the square wave signal B output terminal of the waveform generation unit, the B-path differential signal transmission unit and the B-path transmission transformer are connected in sequence.

[0011] The receiving unit includes: an A-channel receiving transformer, a B-channel receiving transformer, an A-channel filtering unit, a B-channel filtering unit, an A-channel differential signal receiving unit, a B-channel differential signal receiving unit, a waveform monitoring unit, and a logic conversion unit, wherein:

[0012] The input terminal of the A-channel receiving transformer is connected to the output terminal of the A-channel transmitting transformer; the output terminal of the A-channel receiving transformer is connected to the input terminal of the A-channel filtering unit; the A-channel filtering unit, the A-channel differential signal receiving unit, the waveform monitoring unit, and the logic conversion unit are connected in sequence.

[0013] The input terminal of the B-channel receiving transformer is connected to the output terminal of the B-channel transmitting transformer; the output terminal of the B-channel receiving transformer is connected to the input terminal of the B-channel filtering unit; the B-channel filtering unit, the B-channel differential signal receiving unit, the waveform monitoring unit, and the logic conversion unit are connected in sequence.

[0014] Furthermore, the transmitting unit also includes: a DC blocking capacitor A and a DC blocking capacitor B, wherein:

[0015] One end of the DC blocking capacitor of the A-channel is connected to the first output terminal of the A-channel differential signal transmitting unit, and the other end is connected to the first input terminal of the A-channel transmitting transformer;

[0016] One end of the DC blocking capacitor of the B-channel is connected to the first output terminal of the B-channel differential signal transmitting unit, and the other end is connected to the first input terminal of the B-channel transmitting transformer.

[0017] Furthermore, when the number of receiving units is N and corresponds to one transmitting unit, the N receiving units are connected to the transmitting unit in parallel and simultaneously receive the output signal of the transmitting unit; N is a positive integer greater than 1.

[0018] Furthermore, when the number of transmitting units is M, the M transmitting units are connected to N receiving units; M≤N, and M and N are positive integers greater than 1.

[0019] Furthermore, the square wave signal A and the square wave signal B output by the waveform generation unit are out of phase.

[0020] Compared with the prior art, the present invention has the following beneficial effects:

[0021] 1. This invention provides a dual-channel square wave synchronization circuit based on an isolation transformer. The circuit has a simple and reasonable structure and has the advantages of easy expansion, low cost and anti-interference. The circuit utilizes the flexible logic operation of dual-channel square wave signals to generate synchronization drive signals required by various topologies. The generated signal has a large pulse width, is easy to filter, and is not easily distorted.

[0022] 2. The present invention provides a dual-channel square wave synchronous circuit based on an isolation transformer, which is easy to detect and determine whether there is an abnormality during signal reception, and can then shut down the power unit in time, thus ensuring high safety.

[0023] 3. The present invention provides a dual-channel square wave synchronous circuit based on an isolation transformer, which has good transformer isolation effect, strong signal, and good anti-interference performance;

[0024] 4. The present invention provides a dual-channel square wave synchronous circuit based on an isolation transformer, which can form a bus and be expanded into multiple channels, offering good flexibility.

[0025] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the written description and the accompanying drawings.

[0026] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof.

[0029] Figure 1 A schematic diagram of a dual-channel square wave synchronization circuit based on an isolation transformer provided for an embodiment of the present invention;

[0030] Figure 2 A block diagram illustrating the principle of a signal synchronization circuit with multiple receiving units connected in parallel, provided in an embodiment of the present invention;

[0031] Figure 3 The waveform diagram of signal A and signal B logically converted to half-bridge drive provided in the embodiments of the present invention;

[0032] Figure 4 The waveform diagram of signal A and signal B being logically converted into synchronous BUCK drive is provided in the embodiment of the present invention;

[0033] Figure 5 The waveform diagram of signal A and signal B being logically converted into a phase-shifted full-bridge waveform is provided for embodiments of the present invention. Detailed Implementation

[0034] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.

[0035] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," "outer," "front end," "rear end," "both ends," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0036] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0037] Reference Figure 1 and Figure 2 As shown, this embodiment of the invention provides a dual-channel square wave synchronization circuit based on an isolation transformer, including: a transmitting unit 110 and a receiving unit 111, wherein the transmitting unit 110 and the receiving unit 111 are connected.

[0038] The above units will be explained in detail below:

[0039] Combination such as Figure 1 and Figure 2 As shown, in this embodiment, the transmitting unit 110 includes: a waveform generating unit 101, an A-channel differential signal transmitting unit 102, a B-channel differential signal transmitting unit 122, an A-channel DC blocking capacitor 103, a B-channel DC blocking capacitor 123, an A-channel transmitting transformer 104, and a B-channel transmitting transformer 124.

[0040] The receiving unit 111 includes: A-channel receiving transformer 105, B-channel receiving transformer 125, A-channel filtering unit 106, B-channel filtering unit 126, A-channel differential signal receiving unit 107, B-channel differential signal receiving unit 127, waveform monitoring unit 108, and logic conversion unit 109.

[0041] The transmitting unit 110 is used to output two mutually phase-shifted square wave signals A and B, with variable phase shift angle and variable frequency.

[0042] like Figure 1 As shown, in specific operation, signal A is converted into differential signals a1 and a1' by the A-channel differential signal transmitting unit 102. Signal a1 is connected to input terminal 1 of the A-channel transmitting transformer 104 via the A-channel DC blocking capacitor 103, and signal a1' is connected to input terminal 2 of the A-channel transmitting transformer 104. Output terminals 3 and 4 of the A-channel transmitting transformer 104 output differential signals a2 and a2' respectively. Output terminals 3 and 4 of the A-channel transmitting transformer 104 are connected to input terminals 1 and 2 of the A-channel receiving transformer 105 respectively. Terminals 1, 3, and 5 of the A-channel receiving transformer 105 are terminals with the same name. Output terminals 4 and 5 of the A-channel receiving transformer 105 are connected to signal ground AGND. Output terminals 3 and 6 of the A-channel receiving transformer 105 are the output differential signals a3 and a3'. After passing through the A-channel filtering unit 106, differential signals a3 and a3' are output as differential signals a4 and a4'. Differential signals a4 and a4' are then passed through the A-channel differential signal receiving unit 107 to obtain signal PWMA.

[0043] Similarly, signal B is converted into differential signals b1 and b1' by the B-channel differential signal transmitting unit 122. Signal b1 is connected to input terminal 1 of the B-channel transmitting transformer 124 via the B-channel DC blocking capacitor 123, and signal b1' is connected to input terminal 2 of the B-channel transmitting transformer 124. Output terminals 3 and 4 of the B-channel transmitting transformer 124 output differential signals b2 and b2' respectively. Output terminals 3 and 4 of the B-channel transmitting transformer 124 are connected to input terminals 1 and 2 of the B-channel receiving transformer 125 respectively. Terminals 1, 3, and 5 of the B-channel receiving transformer 125 are terminals with the same name. Output terminals 4 and 5 of the B-channel receiving transformer 125 are connected to signal ground AGND. Output terminals 3 and 6 of the B-channel receiving transformer 125 output differential signals b3 and b3'. After passing through the B-channel filtering unit 126, differential signals b3 and b3' are output as differential signals b4 and b4'. Differential signals b4 and b4' are then passed through the B-channel differential signal receiving unit 127 to obtain signal PWMB.

[0044] Furthermore, signals PWMA and PWMB are output as PWMA1 and PWMB1 by the waveform monitoring unit 108, and then converted into the required drive signals DR1, DR2, DR3, and DR4 by the logic conversion unit 109. The circuit of the logic conversion unit 109 can be designed according to the specific circuit topology, and no specific limitations are made here.

[0045] In this embodiment, the aforementioned signal PWMA1 is synchronized with signal A, and the aforementioned signal PWMB1 is synchronized with signal B; both are square wave signals. Signal PWMA1 follows the changes in signal A, and signal PWMB1 follows the changes in signal B. Therefore, signals PWMA1 and PWMB1 follow the phase angle changes of signals A and B, respectively.

[0046] In this embodiment, the waveform monitoring unit 108 is used to monitor signals PWMA1 and PWMB1, determine whether there are any abnormalities in the waveform, such as judging the frequency, phase reversal angle, and duty cycle. If there are any abnormalities, corresponding protection and blocking operations can be performed.

[0047] The logic conversion unit 109 performs corresponding logic operations on signals PWMA1 and PWMB1 to obtain the desired drive waveform. See the following example for illustration:

[0048] Example 1: Converting to half-bridge drive waveform

[0049] like Figure 3 As shown, performing an AND operation between signal A and signal B yields the upper half-bridge transistor drive waveform DR1, and performing an AND operation between signal B and signal A yields the lower half-bridge transistor drive waveform DR1.

[0050] Example 2: Converting to a synchronous BUCK drive waveform

[0051] like Figure 4 As shown, performing an XOR operation on signal A and signal B yields the upper transistor drive waveform DR1 for synchronous BUCK, and the lower transistor waveform DR2 is the inverse of the upper transistor drive waveform.

[0052] Example 3: Converting to the driving waveform of a phase-shifted full-bridge

[0053] like Figure 5 As shown, signal A, the inverse of signal A, signal B, and the inverse of signal B correspond to the driving waveforms DR1, DR2, DR3, and DR4 of the four transistors in the phase-shifted full-bridge, respectively.

[0054] It should be noted that: such as Figure 2 As shown, in this embodiment, N receiving units can be connected in parallel to one transmitting unit, simultaneously receiving the output signals of the transmitting unit; that is, the output signals a2 and a2', b2 and b2' of one transmitting unit 110 can simultaneously serve as inputs to multiple receiving units, obtaining multiple sets of isolated drive signals. These can be used as the drive signals required for the parallel connection of multiple power units.

[0055] Similarly, multiple transmission and reception units can be combined to generate drive waveforms with various circuit topologies. For example, using 5 transmission units, each of which is connected to 3 parallel reception units (the combination methods of this invention are diverse, and their specific connection relationships can be obtained from existing technologies, which will not be enumerated here); since all drive waveforms follow the exact same transmission path, the delays between each group of drive waveforms will cancel each other out, thereby maximizing the signal synchronization between each group of power units and effectively ensuring the consistency between parallel power units.

[0056] As described in the above embodiments, those skilled in the art will understand that the present invention provides a dual-channel square wave synchronization circuit based on an isolation transformer, comprising: a waveform generation unit, a differential signal transmission unit, a DC blocking capacitor, a transmitting transformer, a receiving transformer, a filtering unit, a differential receiving signal unit, a waveform monitoring unit, and a logic conversion unit, etc. This circuit has a simple and reasonable structure, with advantages such as easy expansion, low cost, and anti-interference. Utilizing the flexible logic operation of dual-channel square wave signals, this circuit can generate synchronization drive signals required for various topologies. The generated signal pulse width is large, easy to filter, and not easily distorted. Simultaneously, during signal reception, it is easy to detect and determine whether there is an abnormality, thereby promptly shutting down the power unit, resulting in high safety. The specific selection of each unit in the circuit of the present invention can be obtained from existing technologies and will not be elaborated here.

[0057] The embodiments of the present invention have been described in detail above, and the principles and implementation methods of the present invention have been explained. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention.

[0058] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A dual-channel square wave synchronous circuit based on an isolation transformer, characterized in that, The circuit includes a transmitting unit and a receiving unit, wherein the transmitting unit is connected to the receiving unit, and: The transmitting unit includes: a waveform generation unit, an A-channel differential signal transmitting unit, a B-channel differential signal transmitting unit, an A-channel transmitting transformer, and a B-channel transmitting transformer, wherein: The waveform generation unit is used to output one square wave signal A and one square wave signal B. On the path of square wave signal A, the square wave signal A output terminal of the waveform generation unit, the A-channel differential signal transmission unit, and the A-channel transmission transformer are connected in sequence. Similarly, on the path of square wave signal B, the square wave signal B output terminal of the waveform generation unit, the B-channel differential signal transmission unit, and the B-channel transmission transformer are connected in sequence. The receiving unit includes: an A-channel receiving transformer, a B-channel receiving transformer, an A-channel filtering unit, a B-channel filtering unit, an A-channel differential signal receiving unit, a B-channel differential signal receiving unit, a waveform monitoring unit, and a logic conversion unit, wherein: The input terminal of the A-channel receiving transformer is connected to the output terminal of the A-channel transmitting transformer; the output terminal of the A-channel receiving transformer is connected to the input terminal of the A-channel filtering unit; the A-channel filtering unit, the A-channel differential signal receiving unit, the waveform monitoring unit, and the logic conversion unit are connected in sequence. The input terminal of the B-channel receiving transformer is connected to the output terminal of the B-channel transmitting transformer; the output terminal of the B-channel receiving transformer is connected to the input terminal of the B-channel filtering unit; the B-channel filtering unit, the B-channel differential signal receiving unit, the waveform monitoring unit, and the logic conversion unit are connected in sequence.

2. The dual-channel square wave synchronization circuit based on an isolation transformer according to claim 1, characterized in that, The transmitting unit further includes: a DC blocking capacitor A and a DC blocking capacitor B, wherein: One end of the DC blocking capacitor of the A-channel is connected to the first output terminal of the A-channel differential signal transmitting unit, and the other end is connected to the first input terminal of the A-channel transmitting transformer. One end of the DC blocking capacitor of the B-channel is connected to the first output terminal of the B-channel differential signal transmitting unit, and the other end is connected to the first input terminal of the B-channel transmitting transformer.

3. The dual-channel square wave synchronization circuit based on an isolation transformer according to claim 1, characterized in that, When there are N receiving units and one corresponding transmitting unit, the N receiving units are connected in parallel to the transmitting unit and simultaneously receive the output signal of the transmitting unit; N is a positive integer greater than 1.

4. The dual-channel square wave synchronization circuit based on an isolation transformer according to claim 3, characterized in that, When the number of transmitting units is M, the M transmitting units are connected to N receiving units; M≤N, and M and N are positive integers greater than 1.

5. A dual-channel square wave synchronization circuit based on an isolation transformer according to claim 1, characterized in that, The square wave signal A and the square wave signal B output by the waveform generation unit are out of phase.

Images